Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * 7990.h -- LANCE ethernet IC generic routines.
  3  * This is an attempt to separate out the bits of various ethernet
  4  * drivers that are common because they all use the AMD 7990 LANCE
  5  * (Local Area Network Controller for Ethernet) chip.
  6  *
  7  * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
  8  *
  9  * Most of this stuff was obtained by looking at other LANCE drivers,
 10  * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
 11  */
 12 
 13 #ifndef _7990_H
 14 #define _7990_H
 15 
 16 /* The lance only has two register locations. We communicate mostly via memory. */
 17 #define LANCE_RDP       0       /* Register Data Port */
 18 #define LANCE_RAP       2       /* Register Address Port */
 19 
 20 /* Transmit/receive ring definitions.
 21  * We allow the specific drivers to override these defaults if they want to.
 22  * NB: according to lance.c, increasing the number of buffers is a waste
 23  * of space and reduces the chance that an upper layer will be able to
 24  * reorder queued Tx packets based on priority. [Clearly there is a minimum
 25  * limit too: too small and we drop rx packets and can't tx at full speed.]
 26  * 4+4 seems to be the usual setting; the atarilance driver uses 3 and 5.
 27  */
 28 
 29 /* Blast! This won't work. The problem is that we can't specify a default
 30  * setting because that would cause the lance_init_block struct to be
 31  * too long (and overflow the RAM on shared-memory cards like the HP LANCE.
 32  */
 33 #ifndef LANCE_LOG_TX_BUFFERS
 34 #define LANCE_LOG_TX_BUFFERS 1
 35 #define LANCE_LOG_RX_BUFFERS 3
 36 #endif
 37 
 38 #define TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS)
 39 #define RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS)
 40 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
 41 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
 42 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
 43 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
 44 #define PKT_BUFF_SIZE (1544)
 45 #define RX_BUFF_SIZE PKT_BUFF_SIZE
 46 #define TX_BUFF_SIZE PKT_BUFF_SIZE
 47 
 48 /* Each receive buffer is described by a receive message descriptor (RMD) */
 49 struct lance_rx_desc {
 50         volatile unsigned short rmd0;        /* low address of packet */
 51         volatile unsigned char  rmd1_bits;   /* descriptor bits */
 52         volatile unsigned char  rmd1_hadr;   /* high address of packet */
 53         volatile short    length;           /* This length is 2s complement (negative)!
 54                                      * Buffer length
 55                                      */
 56         volatile unsigned short mblength;    /* Actual number of bytes received */
 57 };
 58 
 59 /* Ditto for TMD: */
 60 struct lance_tx_desc {
 61         volatile unsigned short tmd0;        /* low address of packet */
 62         volatile unsigned char  tmd1_bits;   /* descriptor bits */
 63         volatile unsigned char  tmd1_hadr;   /* high address of packet */
 64         volatile short    length;                   /* Length is 2s complement (negative)! */
 65         volatile unsigned short misc;
 66 };
 67 
 68 /* There are three memory structures accessed by the LANCE:
 69  * the initialization block, the receive and transmit descriptor rings,
 70  * and the data buffers themselves. In fact we might as well put the
 71  * init block,the Tx and Rx rings and the buffers together in memory:
 72  */
 73 struct lance_init_block {
 74         volatile unsigned short mode;            /* Pre-set mode (reg. 15) */
 75         volatile unsigned char phys_addr[6];     /* Physical ethernet address */
 76         volatile unsigned filter[2];             /* Multicast filter (64 bits) */
 77 
 78         /* Receive and transmit ring base, along with extra bits. */
 79         volatile unsigned short rx_ptr;          /* receive descriptor addr */
 80         volatile unsigned short rx_len;          /* receive len and high addr */
 81         volatile unsigned short tx_ptr;          /* transmit descriptor addr */
 82         volatile unsigned short tx_len;          /* transmit len and high addr */
 83 
 84         /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
 85          * This will be true if this whole struct is 8-byte aligned.
 86          */
 87         volatile struct lance_tx_desc btx_ring[TX_RING_SIZE];
 88         volatile struct lance_rx_desc brx_ring[RX_RING_SIZE];
 89 
 90         volatile char   tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
 91         volatile char   rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
 92         /* we use this just to make the struct big enough that we can move its startaddr
 93          * in order to force alignment to an eight byte boundary.
 94          */
 95 };
 96 
 97 /* This is where we keep all the stuff the driver needs to know about.
 98  * I'm definitely unhappy about the mechanism for allowing specific
 99  * drivers to add things...
100  */
101 struct lance_private
102 {
103         char *name;
104         unsigned long base;
105         volatile struct lance_init_block *init_block; /* CPU address of RAM */
106         volatile struct lance_init_block *lance_init_block; /* LANCE address of RAM */
107 
108         int rx_new, tx_new;
109         int rx_old, tx_old;
110 
111         int lance_log_rx_bufs, lance_log_tx_bufs;
112         int rx_ring_mod_mask, tx_ring_mod_mask;
113 
114         int tpe;                                  /* TPE is selected */
115         int auto_select;                          /* cable-selection is by carrier */
116         unsigned short busmaster_regval;
117 
118         unsigned int irq;                         /* IRQ to register */
119 
120         /* This is because the HP LANCE is disgusting and you have to check
121          * a DIO-specific register every time you read/write the LANCE regs :-<
122          * [could we get away with making these some sort of macro?]
123          */
124         void (*writerap)(void *, unsigned short);
125         void (*writerdp)(void *, unsigned short);
126         unsigned short (*readrdp)(void *);
127         spinlock_t devlock;
128         char tx_full;
129 };
130 
131 /*
132  *              Am7990 Control and Status Registers
133  */
134 #define LE_CSR0         0x0000          /* LANCE Controller Status */
135 #define LE_CSR1         0x0001          /* IADR[15:0] (bit0==0 ie word aligned) */
136 #define LE_CSR2         0x0002          /* IADR[23:16] (high bits reserved) */
137 #define LE_CSR3         0x0003          /* Misc */
138 
139 /*
140  *              Bit definitions for CSR0 (LANCE Controller Status)
141  */
142 #define LE_C0_ERR       0x8000          /* Error = BABL | CERR | MISS | MERR */
143 #define LE_C0_BABL      0x4000          /* Babble: Transmitted too many bits */
144 #define LE_C0_CERR      0x2000          /* No Heartbeat (10BASE-T) */
145 #define LE_C0_MISS      0x1000          /* Missed Frame (no rx buffer to put it in) */
146 #define LE_C0_MERR      0x0800          /* Memory Error */
147 #define LE_C0_RINT      0x0400          /* Receive Interrupt */
148 #define LE_C0_TINT      0x0200          /* Transmit Interrupt */
149 #define LE_C0_IDON      0x0100          /* Initialization Done */
150 #define LE_C0_INTR      0x0080          /* Interrupt Flag
151                                          = BABL | MISS | MERR | RINT | TINT | IDON */
152 #define LE_C0_INEA      0x0040          /* Interrupt Enable */
153 #define LE_C0_RXON      0x0020          /* Receive On */
154 #define LE_C0_TXON      0x0010          /* Transmit On */
155 #define LE_C0_TDMD      0x0008          /* Transmit Demand */
156 #define LE_C0_STOP      0x0004          /* Stop */
157 #define LE_C0_STRT      0x0002          /* Start */
158 #define LE_C0_INIT      0x0001          /* Initialize */
159 
160 
161 /*
162  *              Bit definitions for CSR3
163  */
164 #define LE_C3_BSWP      0x0004          /* Byte Swap
165                                            (on for big endian byte order) */
166 #define LE_C3_ACON      0x0002          /* ALE Control
167                                            (on for active low ALE) */
168 #define LE_C3_BCON      0x0001          /* Byte Control */
169 
170 
171 /*
172  *              Mode Flags
173  */
174 #define LE_MO_PROM      0x8000          /* Promiscuous Mode */
175 /* these next ones 0x4000 -- 0x0080 are not available on the LANCE 7990,
176  * but they are in NetBSD's am7990.h, presumably for backwards-compatible chips
177  */
178 #define LE_MO_DRCVBC  0x4000          /* disable receive broadcast */
179 #define LE_MO_DRCVPA  0x2000          /* disable physical address detection */
180 #define LE_MO_DLNKTST 0x1000          /* disable link status */
181 #define LE_MO_DAPC    0x0800          /* disable automatic polarity correction */
182 #define LE_MO_MENDECL 0x0400          /* MENDEC loopback mode */
183 #define LE_MO_LRTTSEL 0x0200          /* lower RX threshold / TX mode selection */
184 #define LE_MO_PSEL1   0x0100          /* port selection bit1 */
185 #define LE_MO_PSEL0   0x0080          /* port selection bit0 */
186 /* and this one is from the C-LANCE data sheet... */
187 #define LE_MO_EMBA      0x0080          /* Enable Modified Backoff Algorithm
188                                            (C-LANCE, not original LANCE) */
189 #define LE_MO_INTL      0x0040          /* Internal Loopback */
190 #define LE_MO_DRTY      0x0020          /* Disable Retry */
191 #define LE_MO_FCOLL     0x0010          /* Force Collision */
192 #define LE_MO_DXMTFCS   0x0008          /* Disable Transmit CRC */
193 #define LE_MO_LOOP      0x0004          /* Loopback Enable */
194 #define LE_MO_DTX       0x0002          /* Disable Transmitter */
195 #define LE_MO_DRX       0x0001          /* Disable Receiver */
196 
197 
198 /*
199  *              Receive Flags
200  */
201 #define LE_R1_OWN       0x80            /* LANCE owns the descriptor */
202 #define LE_R1_ERR       0x40            /* Error */
203 #define LE_R1_FRA       0x20            /* Framing Error */
204 #define LE_R1_OFL       0x10            /* Overflow Error */
205 #define LE_R1_CRC       0x08            /* CRC Error */
206 #define LE_R1_BUF       0x04            /* Buffer Error */
207 #define LE_R1_SOP       0x02            /* Start of Packet */
208 #define LE_R1_EOP       0x01            /* End of Packet */
209 #define LE_R1_POK       0x03            /* Packet is complete: SOP + EOP */
210 
211 
212 /*
213  *              Transmit Flags
214  */
215 #define LE_T1_OWN       0x80            /* LANCE owns the descriptor */
216 #define LE_T1_ERR       0x40            /* Error */
217 #define LE_T1_RES       0x20            /* Reserved, LANCE writes this with a zero */
218 #define LE_T1_EMORE     0x10            /* More than one retry needed */
219 #define LE_T1_EONE      0x08            /* One retry needed */
220 #define LE_T1_EDEF      0x04            /* Deferred */
221 #define LE_T1_SOP       0x02            /* Start of Packet */
222 #define LE_T1_EOP       0x01            /* End of Packet */
223 #define LE_T1_POK       0x03            /* Packet is complete: SOP + EOP */
224 
225 /*
226  *              Error Flags
227  */
228 #define LE_T3_BUF       0x8000          /* Buffer Error */
229 #define LE_T3_UFL       0x4000          /* Underflow Error */
230 #define LE_T3_LCOL      0x1000          /* Late Collision */
231 #define LE_T3_CLOS      0x0800          /* Loss of Carrier */
232 #define LE_T3_RTY       0x0400          /* Retry Error */
233 #define LE_T3_TDR       0x03ff          /* Time Domain Reflectometry */
234 
235 /* Miscellaneous useful macros */
236 
237 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
238                         lp->tx_old+lp->tx_ring_mod_mask-lp->tx_new:\
239                         lp->tx_old - lp->tx_new-1)
240 
241 /* The LANCE only uses 24 bit addresses. This does the obvious thing. */
242 #define LANCE_ADDR(x) ((int)(x) & ~0xff000000)
243 
244 /* Now the prototypes we export */
245 extern int lance_open(struct net_device *dev);
246 extern int lance_close (struct net_device *dev);
247 extern int lance_start_xmit (struct sk_buff *skb, struct net_device *dev);
248 extern void lance_set_multicast (struct net_device *dev);
249 extern void lance_tx_timeout(struct net_device *dev);
250 #ifdef CONFIG_NET_POLL_CONTROLLER
251 extern void lance_poll(struct net_device *dev);
252 #endif
253 
254 #endif /* ndef _7990_H */
255 
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