1 #include <linux/module.h>
2 #include <linux/clk.h>
3 #include <linux/err.h>
4 #include <linux/io.h>
5 #include <linux/interrupt.h>
6 #include <linux/platform_device.h>
7 #include <linux/atmel_pwm.h>
8
9
10 /*
11 * This is a simple driver for the PWM controller found in various newer
12 * Atmel SOCs, including the AVR32 series and the AT91sam9263.
13 *
14 * Chips with current Linux ports have only 4 PWM channels, out of max 32.
15 * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
16 * Docs are inconsistent about the width of the channel counter registers;
17 * it's at least 16 bits, but several places say 20 bits.
18 */
19 #define PWM_NCHAN 4 /* max 32 */
20
21 struct pwm {
22 spinlock_t lock;
23 struct platform_device *pdev;
24 u32 mask;
25 int irq;
26 void __iomem *base;
27 struct clk *clk;
28 struct pwm_channel *channel[PWM_NCHAN];
29 void (*handler[PWM_NCHAN])(struct pwm_channel *);
30 };
31
32
33 /* global PWM controller registers */
34 #define PWM_MR 0x00
35 #define PWM_ENA 0x04
36 #define PWM_DIS 0x08
37 #define PWM_SR 0x0c
38 #define PWM_IER 0x10
39 #define PWM_IDR 0x14
40 #define PWM_IMR 0x18
41 #define PWM_ISR 0x1c
42
43 static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
44 {
45 __raw_writel(val, p->base + offset);
46 }
47
48 static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
49 {
50 return __raw_readl(p->base + offset);
51 }
52
53 static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
54 {
55 return p->base + 0x200 + index * 0x20;
56 }
57
58 static struct pwm *pwm;
59
60 static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
61 {
62 struct device *dev = &pwm->pdev->dev;
63
64 dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
65 tag,
66 pwm_readl(pwm, PWM_MR),
67 pwm_readl(pwm, PWM_SR),
68 pwm_readl(pwm, PWM_IMR));
69 dev_dbg(dev,
70 "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
71 ch->index,
72 pwm_channel_readl(ch, PWM_CMR),
73 pwm_channel_readl(ch, PWM_CDTY),
74 pwm_channel_readl(ch, PWM_CPRD),
75 pwm_channel_readl(ch, PWM_CCNT));
76 }
77
78
79 /**
80 * pwm_channel_alloc - allocate an unused PWM channel
81 * @index: identifies the channel
82 * @ch: structure to be initialized
83 *
84 * Drivers allocate PWM channels according to the board's wiring, and
85 * matching board-specific setup code. Returns zero or negative errno.
86 */
87 int pwm_channel_alloc(int index, struct pwm_channel *ch)
88 {
89 unsigned long flags;
90 int status = 0;
91
92 /* insist on PWM init, with this signal pinned out */
93 if (!pwm || !(pwm->mask & 1 << index))
94 return -ENODEV;
95
96 if (index < 0 || index >= PWM_NCHAN || !ch)
97 return -EINVAL;
98 memset(ch, 0, sizeof *ch);
99
100 spin_lock_irqsave(&pwm->lock, flags);
101 if (pwm->channel[index])
102 status = -EBUSY;
103 else {
104 clk_enable(pwm->clk);
105
106 ch->regs = pwmc_regs(pwm, index);
107 ch->index = index;
108
109 /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
110 ch->mck = clk_get_rate(pwm->clk);
111
112 pwm->channel[index] = ch;
113 pwm->handler[index] = NULL;
114
115 /* channel and irq are always disabled when we return */
116 pwm_writel(pwm, PWM_DIS, 1 << index);
117 pwm_writel(pwm, PWM_IDR, 1 << index);
118 }
119 spin_unlock_irqrestore(&pwm->lock, flags);
120 return status;
121 }
122 EXPORT_SYMBOL(pwm_channel_alloc);
123
124 static int pwmcheck(struct pwm_channel *ch)
125 {
126 int index;
127
128 if (!pwm)
129 return -ENODEV;
130 if (!ch)
131 return -EINVAL;
132 index = ch->index;
133 if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
134 return -EINVAL;
135
136 return index;
137 }
138
139 /**
140 * pwm_channel_free - release a previously allocated channel
141 * @ch: the channel being released
142 *
143 * The channel is completely shut down (counter and IRQ disabled),
144 * and made available for re-use. Returns zero, or negative errno.
145 */
146 int pwm_channel_free(struct pwm_channel *ch)
147 {
148 unsigned long flags;
149 int t;
150
151 spin_lock_irqsave(&pwm->lock, flags);
152 t = pwmcheck(ch);
153 if (t >= 0) {
154 pwm->channel[t] = NULL;
155 pwm->handler[t] = NULL;
156
157 /* channel and irq are always disabled when we return */
158 pwm_writel(pwm, PWM_DIS, 1 << t);
159 pwm_writel(pwm, PWM_IDR, 1 << t);
160
161 clk_disable(pwm->clk);
162 t = 0;
163 }
164 spin_unlock_irqrestore(&pwm->lock, flags);
165 return t;
166 }
167 EXPORT_SYMBOL(pwm_channel_free);
168
169 int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
170 {
171 unsigned long flags;
172 int t;
173
174 /* OMITTED FUNCTIONALITY: starting several channels in synch */
175
176 spin_lock_irqsave(&pwm->lock, flags);
177 t = pwmcheck(ch);
178 if (t >= 0) {
179 pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
180 t = 0;
181 pwm_dumpregs(ch, enabled ? "enable" : "disable");
182 }
183 spin_unlock_irqrestore(&pwm->lock, flags);
184
185 return t;
186 }
187 EXPORT_SYMBOL(__pwm_channel_onoff);
188
189 /**
190 * pwm_clk_alloc - allocate and configure CLKA or CLKB
191 * @prescale: from 0..10, the power of two used to divide MCK
192 * @div: from 1..255, the linear divisor to use
193 *
194 * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
195 * clock will run with a period of (2^prescale * div) / MCK, or twice as
196 * long if center aligned PWM output is used. The clock must later be
197 * deconfigured using pwm_clk_free().
198 */
199 int pwm_clk_alloc(unsigned prescale, unsigned div)
200 {
201 unsigned long flags;
202 u32 mr;
203 u32 val = (prescale << 8) | div;
204 int ret = -EBUSY;
205
206 if (prescale >= 10 || div == 0 || div > 255)
207 return -EINVAL;
208
209 spin_lock_irqsave(&pwm->lock, flags);
210 mr = pwm_readl(pwm, PWM_MR);
211 if ((mr & 0xffff) == 0) {
212 mr |= val;
213 ret = PWM_CPR_CLKA;
214 } else if ((mr & (0xffff << 16)) == 0) {
215 mr |= val << 16;
216 ret = PWM_CPR_CLKB;
217 }
218 if (ret > 0)
219 pwm_writel(pwm, PWM_MR, mr);
220 spin_unlock_irqrestore(&pwm->lock, flags);
221 return ret;
222 }
223 EXPORT_SYMBOL(pwm_clk_alloc);
224
225 /**
226 * pwm_clk_free - deconfigure and release CLKA or CLKB
227 *
228 * Reverses the effect of pwm_clk_alloc().
229 */
230 void pwm_clk_free(unsigned clk)
231 {
232 unsigned long flags;
233 u32 mr;
234
235 spin_lock_irqsave(&pwm->lock, flags);
236 mr = pwm_readl(pwm, PWM_MR);
237 if (clk == PWM_CPR_CLKA)
238 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
239 if (clk == PWM_CPR_CLKB)
240 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
241 spin_unlock_irqrestore(&pwm->lock, flags);
242 }
243 EXPORT_SYMBOL(pwm_clk_free);
244
245 /**
246 * pwm_channel_handler - manage channel's IRQ handler
247 * @ch: the channel
248 * @handler: the handler to use, possibly NULL
249 *
250 * If the handler is non-null, the handler will be called after every
251 * period of this PWM channel. If the handler is null, this channel
252 * won't generate an IRQ.
253 */
254 int pwm_channel_handler(struct pwm_channel *ch,
255 void (*handler)(struct pwm_channel *ch))
256 {
257 unsigned long flags;
258 int t;
259
260 spin_lock_irqsave(&pwm->lock, flags);
261 t = pwmcheck(ch);
262 if (t >= 0) {
263 pwm->handler[t] = handler;
264 pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
265 t = 0;
266 }
267 spin_unlock_irqrestore(&pwm->lock, flags);
268
269 return t;
270 }
271 EXPORT_SYMBOL(pwm_channel_handler);
272
273 static irqreturn_t pwm_irq(int id, void *_pwm)
274 {
275 struct pwm *p = _pwm;
276 irqreturn_t handled = IRQ_NONE;
277 u32 irqstat;
278 int index;
279
280 spin_lock(&p->lock);
281
282 /* ack irqs, then handle them */
283 irqstat = pwm_readl(pwm, PWM_ISR);
284
285 while (irqstat) {
286 struct pwm_channel *ch;
287 void (*handler)(struct pwm_channel *ch);
288
289 index = ffs(irqstat) - 1;
290 irqstat &= ~(1 << index);
291 ch = pwm->channel[index];
292 handler = pwm->handler[index];
293 if (handler && ch) {
294 spin_unlock(&p->lock);
295 handler(ch);
296 spin_lock(&p->lock);
297 handled = IRQ_HANDLED;
298 }
299 }
300
301 spin_unlock(&p->lock);
302 return handled;
303 }
304
305 static int __init pwm_probe(struct platform_device *pdev)
306 {
307 struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
308 int irq = platform_get_irq(pdev, 0);
309 u32 *mp = pdev->dev.platform_data;
310 struct pwm *p;
311 int status = -EIO;
312
313 if (pwm)
314 return -EBUSY;
315 if (!r || irq < 0 || !mp || !*mp)
316 return -ENODEV;
317 if (*mp & ~((1<<PWM_NCHAN)-1)) {
318 dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
319 *mp, PWM_NCHAN);
320 return -EINVAL;
321 }
322
323 p = kzalloc(sizeof(*p), GFP_KERNEL);
324 if (!p)
325 return -ENOMEM;
326
327 spin_lock_init(&p->lock);
328 p->pdev = pdev;
329 p->mask = *mp;
330 p->irq = irq;
331 p->base = ioremap(r->start, r->end - r->start + 1);
332 if (!p->base)
333 goto fail;
334 p->clk = clk_get(&pdev->dev, "pwm_clk");
335 if (IS_ERR(p->clk)) {
336 status = PTR_ERR(p->clk);
337 p->clk = NULL;
338 goto fail;
339 }
340
341 status = request_irq(irq, pwm_irq, 0, pdev->name, p);
342 if (status < 0)
343 goto fail;
344
345 pwm = p;
346 platform_set_drvdata(pdev, p);
347
348 return 0;
349
350 fail:
351 if (p->clk)
352 clk_put(p->clk);
353 if (p->base)
354 iounmap(p->base);
355
356 kfree(p);
357 return status;
358 }
359
360 static int __exit pwm_remove(struct platform_device *pdev)
361 {
362 struct pwm *p = platform_get_drvdata(pdev);
363
364 if (p != pwm)
365 return -EINVAL;
366
367 clk_enable(pwm->clk);
368 pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
369 pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
370 clk_disable(pwm->clk);
371
372 pwm = NULL;
373
374 free_irq(p->irq, p);
375 clk_put(p->clk);
376 iounmap(p->base);
377 kfree(p);
378
379 return 0;
380 }
381
382 static struct platform_driver atmel_pwm_driver = {
383 .driver = {
384 .name = "atmel_pwm",
385 .owner = THIS_MODULE,
386 },
387 .remove = __exit_p(pwm_remove),
388
389 /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
390 * and all AT91sam9263 states, albeit at reduced clock rate if
391 * MCK becomes the slow clock (i.e. what Linux labels STR).
392 */
393 };
394
395 static int __init pwm_init(void)
396 {
397 return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
398 }
399 module_init(pwm_init);
400
401 static void __exit pwm_exit(void)
402 {
403 platform_driver_unregister(&atmel_pwm_driver);
404 }
405 module_exit(pwm_exit);
406
407 MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
408 MODULE_LICENSE("GPL");
409 MODULE_ALIAS("platform:atmel_pwm");
410
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