1 /*
2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
3 *
4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
5 *
6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
7 * by Dany Salman <salmandany@yahoo.fr>
8 * Copyright (c) 2004 TDF
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 */
25
26 #include <linux/i2c.h>
27 #include <linux/i2c-algo-bit.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33
34 #include "demux.h"
35 #include "dmxdev.h"
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
38 #include "dvb_net.h"
39 #include "dvbdev.h"
40 #include "tda1004x.h"
41
42 #define DRIVER_NAME "pluto2"
43
44 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
45 #define REG_PCAR 0x0020 /* PC address register */
46 #define REG_TSCR 0x0024 /* TS ctrl & status */
47 #define REG_MISC 0x0028 /* miscellaneous */
48 #define REG_MMAC 0x002c /* MSB MAC address */
49 #define REG_IMAC 0x0030 /* ISB MAC address */
50 #define REG_LMAC 0x0034 /* LSB MAC address */
51 #define REG_SPID 0x0038 /* SPI data */
52 #define REG_SLCS 0x003c /* serial links ctrl/status */
53
54 #define PID0_NOFIL (0x0001 << 16)
55 #define PIDn_ENP (0x0001 << 15)
56 #define PID0_END (0x0001 << 14)
57 #define PID0_AFIL (0x0001 << 13)
58 #define PIDn_PID (0x1fff << 0)
59
60 #define TSCR_NBPACKETS (0x00ff << 24)
61 #define TSCR_DEM (0x0001 << 17)
62 #define TSCR_DE (0x0001 << 16)
63 #define TSCR_RSTN (0x0001 << 15)
64 #define TSCR_MSKO (0x0001 << 14)
65 #define TSCR_MSKA (0x0001 << 13)
66 #define TSCR_MSKL (0x0001 << 12)
67 #define TSCR_OVR (0x0001 << 11)
68 #define TSCR_AFUL (0x0001 << 10)
69 #define TSCR_LOCK (0x0001 << 9)
70 #define TSCR_IACK (0x0001 << 8)
71 #define TSCR_ADEF (0x007f << 0)
72
73 #define MISC_DVR (0x0fff << 4)
74 #define MISC_ALED (0x0001 << 3)
75 #define MISC_FRST (0x0001 << 2)
76 #define MISC_LED1 (0x0001 << 1)
77 #define MISC_LED0 (0x0001 << 0)
78
79 #define SPID_SPIDR (0x00ff << 0)
80
81 #define SLCS_SCL (0x0001 << 7)
82 #define SLCS_SDA (0x0001 << 6)
83 #define SLCS_CSN (0x0001 << 2)
84 #define SLCS_OVR (0x0001 << 1)
85 #define SLCS_SWC (0x0001 << 0)
86
87 #define TS_DMA_PACKETS (8)
88 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
89
90 #define I2C_ADDR_TDA10046 0x10
91 #define I2C_ADDR_TUA6034 0xc2
92 #define NHWFILTERS 8
93
94 struct pluto {
95 /* pci */
96 struct pci_dev *pdev;
97 u8 __iomem *io_mem;
98
99 /* dvb */
100 struct dmx_frontend hw_frontend;
101 struct dmx_frontend mem_frontend;
102 struct dmxdev dmxdev;
103 struct dvb_adapter dvb_adapter;
104 struct dvb_demux demux;
105 struct dvb_frontend *fe;
106 struct dvb_net dvbnet;
107 unsigned int full_ts_users;
108 unsigned int users;
109
110 /* i2c */
111 struct i2c_algo_bit_data i2c_bit;
112 struct i2c_adapter i2c_adap;
113 unsigned int i2cbug;
114
115 /* irq */
116 unsigned int overflow;
117
118 /* dma */
119 dma_addr_t dma_addr;
120 u8 dma_buf[TS_DMA_BYTES];
121 u8 dummy[4096];
122 };
123
124 static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
125 {
126 return container_of(feed->demux, struct pluto, demux);
127 }
128
129 static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
130 {
131 return container_of(fe->dvb, struct pluto, dvb_adapter);
132 }
133
134 static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
135 {
136 return readl(&pluto->io_mem[reg]);
137 }
138
139 static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
140 {
141 writel(val, &pluto->io_mem[reg]);
142 }
143
144 static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
145 {
146 u32 val = readl(&pluto->io_mem[reg]);
147 val &= ~mask;
148 val |= bits;
149 writel(val, &pluto->io_mem[reg]);
150 }
151
152 static void pluto_write_tscr(struct pluto *pluto, u32 val)
153 {
154 /* set the number of packets */
155 val &= ~TSCR_ADEF;
156 val |= TS_DMA_PACKETS / 2;
157
158 pluto_writereg(pluto, REG_TSCR, val);
159 }
160
161 static void pluto_setsda(void *data, int state)
162 {
163 struct pluto *pluto = data;
164
165 if (state)
166 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
167 else
168 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
169 }
170
171 static void pluto_setscl(void *data, int state)
172 {
173 struct pluto *pluto = data;
174
175 if (state)
176 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
177 else
178 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
179
180 /* try to detect i2c_inb() to workaround hardware bug:
181 * reset SDA to high after SCL has been set to low */
182 if ((state) && (pluto->i2cbug == 0)) {
183 pluto->i2cbug = 1;
184 } else {
185 if ((!state) && (pluto->i2cbug == 1))
186 pluto_setsda(pluto, 1);
187 pluto->i2cbug = 0;
188 }
189 }
190
191 static int pluto_getsda(void *data)
192 {
193 struct pluto *pluto = data;
194
195 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
196 }
197
198 static int pluto_getscl(void *data)
199 {
200 struct pluto *pluto = data;
201
202 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
203 }
204
205 static void pluto_reset_frontend(struct pluto *pluto, int reenable)
206 {
207 u32 val = pluto_readreg(pluto, REG_MISC);
208
209 if (val & MISC_FRST) {
210 val &= ~MISC_FRST;
211 pluto_writereg(pluto, REG_MISC, val);
212 }
213 if (reenable) {
214 val |= MISC_FRST;
215 pluto_writereg(pluto, REG_MISC, val);
216 }
217 }
218
219 static void pluto_reset_ts(struct pluto *pluto, int reenable)
220 {
221 u32 val = pluto_readreg(pluto, REG_TSCR);
222
223 if (val & TSCR_RSTN) {
224 val &= ~TSCR_RSTN;
225 pluto_write_tscr(pluto, val);
226 }
227 if (reenable) {
228 val |= TSCR_RSTN;
229 pluto_write_tscr(pluto, val);
230 }
231 }
232
233 static void pluto_set_dma_addr(struct pluto *pluto)
234 {
235 pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr));
236 }
237
238 static int __devinit pluto_dma_map(struct pluto *pluto)
239 {
240 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
241 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
242
243 return pci_dma_mapping_error(pluto->dma_addr);
244 }
245
246 static void pluto_dma_unmap(struct pluto *pluto)
247 {
248 pci_unmap_single(pluto->pdev, pluto->dma_addr,
249 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
250 }
251
252 static int pluto_start_feed(struct dvb_demux_feed *f)
253 {
254 struct pluto *pluto = feed_to_pluto(f);
255
256 /* enable PID filtering */
257 if (pluto->users++ == 0)
258 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
259
260 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
261 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
262 else if (pluto->full_ts_users++ == 0)
263 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
264
265 return 0;
266 }
267
268 static int pluto_stop_feed(struct dvb_demux_feed *f)
269 {
270 struct pluto *pluto = feed_to_pluto(f);
271
272 /* disable PID filtering */
273 if (--pluto->users == 0)
274 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
275
276 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
277 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
278 else if (--pluto->full_ts_users == 0)
279 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
280
281 return 0;
282 }
283
284 static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
285 {
286 /* synchronize the DMA transfer with the CPU
287 * first so that we see updated contents. */
288 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
289 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
290
291 /* Workaround for broken hardware:
292 * [1] On startup NBPACKETS seems to contain an uninitialized value,
293 * but no packets have been transfered.
294 * [2] Sometimes (actually very often) NBPACKETS stays at zero
295 * although one packet has been transfered.
296 * [3] Sometimes (actually rarely), the card gets into an erroneous
297 * mode where it continuously generates interrupts, claiming it
298 * has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
299 * has been transfered. Only a reset seems to solve this
300 */
301 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
302 unsigned int i = 0;
303 while (pluto->dma_buf[i] == 0x47)
304 i += 188;
305 nbpackets = i / 188;
306 if (i == 0) {
307 pluto_reset_ts(pluto, 1);
308 dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n");
309 }
310 }
311
312 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
313
314 /* clear the dma buffer. this is needed to be able to identify
315 * new valid ts packets above */
316 memset(pluto->dma_buf, 0, nbpackets * 188);
317
318 /* reset the dma address */
319 pluto_set_dma_addr(pluto);
320
321 /* sync the buffer and give it back to the card */
322 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
323 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
324 }
325
326 static irqreturn_t pluto_irq(int irq, void *dev_id)
327 {
328 struct pluto *pluto = dev_id;
329 u32 tscr;
330
331 /* check whether an interrupt occured on this device */
332 tscr = pluto_readreg(pluto, REG_TSCR);
333 if (!(tscr & (TSCR_DE | TSCR_OVR)))
334 return IRQ_NONE;
335
336 if (tscr == 0xffffffff) {
337 // FIXME: maybe recover somehow
338 dev_err(&pluto->pdev->dev, "card hung up :(\n");
339 return IRQ_HANDLED;
340 }
341
342 /* dma end interrupt */
343 if (tscr & TSCR_DE) {
344 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
345 /* overflow interrupt */
346 if (tscr & TSCR_OVR)
347 pluto->overflow++;
348 if (pluto->overflow) {
349 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
350 pluto->overflow);
351 pluto_reset_ts(pluto, 1);
352 pluto->overflow = 0;
353 }
354 } else if (tscr & TSCR_OVR) {
355 pluto->overflow++;
356 }
357
358 /* ACK the interrupt */
359 pluto_write_tscr(pluto, tscr | TSCR_IACK);
360
361 return IRQ_HANDLED;
362 }
363
364 static void __devinit pluto_enable_irqs(struct pluto *pluto)
365 {
366 u32 val = pluto_readreg(pluto, REG_TSCR);
367
368 /* disable AFUL and LOCK interrupts */
369 val |= (TSCR_MSKA | TSCR_MSKL);
370 /* enable DMA and OVERFLOW interrupts */
371 val &= ~(TSCR_DEM | TSCR_MSKO);
372 /* clear pending interrupts */
373 val |= TSCR_IACK;
374
375 pluto_write_tscr(pluto, val);
376 }
377
378 static void pluto_disable_irqs(struct pluto *pluto)
379 {
380 u32 val = pluto_readreg(pluto, REG_TSCR);
381
382 /* disable all interrupts */
383 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
384 /* clear pending interrupts */
385 val |= TSCR_IACK;
386
387 pluto_write_tscr(pluto, val);
388 }
389
390 static int __devinit pluto_hw_init(struct pluto *pluto)
391 {
392 pluto_reset_frontend(pluto, 1);
393
394 /* set automatic LED control by FPGA */
395 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
396
397 /* set data endianess */
398 #ifdef __LITTLE_ENDIAN
399 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
400 #else
401 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
402 #endif
403 /* map DMA and set address */
404 pluto_dma_map(pluto);
405 pluto_set_dma_addr(pluto);
406
407 /* enable interrupts */
408 pluto_enable_irqs(pluto);
409
410 /* reset TS logic */
411 pluto_reset_ts(pluto, 1);
412
413 return 0;
414 }
415
416 static void pluto_hw_exit(struct pluto *pluto)
417 {
418 /* disable interrupts */
419 pluto_disable_irqs(pluto);
420
421 pluto_reset_ts(pluto, 0);
422
423 /* LED: disable automatic control, enable yellow, disable green */
424 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
425
426 /* unmap DMA */
427 pluto_dma_unmap(pluto);
428
429 pluto_reset_frontend(pluto, 0);
430 }
431
432 static inline u32 divide(u32 numerator, u32 denominator)
433 {
434 if (denominator == 0)
435 return ~0;
436
437 return (numerator + denominator / 2) / denominator;
438 }
439
440 /* LG Innotek TDTE-E001P (Infineon TUA6034) */
441 static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
442 struct dvb_frontend_parameters *p)
443 {
444 struct pluto *pluto = frontend_to_pluto(fe);
445 struct i2c_msg msg;
446 int ret;
447 u8 buf[4];
448 u32 div;
449
450 // Fref = 166.667 Hz
451 // Fref * 3 = 500.000 Hz
452 // IF = 36166667
453 // IF / Fref = 217
454 //div = divide(p->frequency + 36166667, 166667);
455 div = divide(p->frequency * 3, 500000) + 217;
456 buf[0] = (div >> 8) & 0x7f;
457 buf[1] = (div >> 0) & 0xff;
458
459 if (p->frequency < 611000000)
460 buf[2] = 0xb4;
461 else if (p->frequency < 811000000)
462 buf[2] = 0xbc;
463 else
464 buf[2] = 0xf4;
465
466 // VHF: 174-230 MHz
467 // center: 350 MHz
468 // UHF: 470-862 MHz
469 if (p->frequency < 350000000)
470 buf[3] = 0x02;
471 else
472 buf[3] = 0x04;
473
474 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
475 buf[3] |= 0x08;
476
477 if (sizeof(buf) == 6) {
478 buf[4] = buf[2];
479 buf[4] &= ~0x1c;
480 buf[4] |= 0x18;
481
482 buf[5] = (0 << 7) | (2 << 4);
483 }
484
485 msg.addr = I2C_ADDR_TUA6034 >> 1;
486 msg.flags = 0;
487 msg.buf = buf;
488 msg.len = sizeof(buf);
489
490 if (fe->ops.i2c_gate_ctrl)
491 fe->ops.i2c_gate_ctrl(fe, 1);
492 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
493 if (ret < 0)
494 return ret;
495 else if (ret == 0)
496 return -EREMOTEIO;
497
498 return 0;
499 }
500
501 static int pluto2_request_firmware(struct dvb_frontend *fe,
502 const struct firmware **fw, char *name)
503 {
504 struct pluto *pluto = frontend_to_pluto(fe);
505
506 return request_firmware(fw, name, &pluto->pdev->dev);
507 }
508
509 static struct tda1004x_config pluto2_fe_config __devinitdata = {
510 .demod_address = I2C_ADDR_TDA10046 >> 1,
511 .invert = 1,
512 .invert_oclk = 0,
513 .xtal_freq = TDA10046_XTAL_16M,
514 .agc_config = TDA10046_AGC_DEFAULT,
515 .if_freq = TDA10046_FREQ_3617,
516 .request_firmware = pluto2_request_firmware,
517 };
518
519 static int __devinit frontend_init(struct pluto *pluto)
520 {
521 int ret;
522
523 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
524 if (!pluto->fe) {
525 dev_err(&pluto->pdev->dev, "could not attach frontend\n");
526 return -ENODEV;
527 }
528 pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
529
530 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
531 if (ret < 0) {
532 if (pluto->fe->ops.release)
533 pluto->fe->ops.release(pluto->fe);
534 return ret;
535 }
536
537 return 0;
538 }
539
540 static void __devinit pluto_read_rev(struct pluto *pluto)
541 {
542 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
543 dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
544 (val >> 12) & 0x0f, (val >> 4) & 0xff);
545 }
546
547 static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
548 {
549 u32 val = pluto_readreg(pluto, REG_MMAC);
550 mac[0] = (val >> 8) & 0xff;
551 mac[1] = (val >> 0) & 0xff;
552
553 val = pluto_readreg(pluto, REG_IMAC);
554 mac[2] = (val >> 8) & 0xff;
555 mac[3] = (val >> 0) & 0xff;
556
557 val = pluto_readreg(pluto, REG_LMAC);
558 mac[4] = (val >> 8) & 0xff;
559 mac[5] = (val >> 0) & 0xff;
560
561 dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
562 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
563 }
564
565 static int __devinit pluto_read_serial(struct pluto *pluto)
566 {
567 struct pci_dev *pdev = pluto->pdev;
568 unsigned int i, j;
569 u8 __iomem *cis;
570
571 cis = pci_iomap(pdev, 1, 0);
572 if (!cis)
573 return -EIO;
574
575 dev_info(&pdev->dev, "S/N ");
576
577 for (i = 0xe0; i < 0x100; i += 4) {
578 u32 val = readl(&cis[i]);
579 for (j = 0; j < 32; j += 8) {
580 if ((val & 0xff) == 0xff)
581 goto out;
582 printk("%c", val & 0xff);
583 val >>= 8;
584 }
585 }
586 out:
587 printk("\n");
588 pci_iounmap(pdev, cis);
589
590 return 0;
591 }
592
593 static int __devinit pluto2_probe(struct pci_dev *pdev,
594 const struct pci_device_id *ent)
595 {
596 struct pluto *pluto;
597 struct dvb_adapter *dvb_adapter;
598 struct dvb_demux *dvbdemux;
599 struct dmx_demux *dmx;
600 int ret = -ENOMEM;
601
602 pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
603 if (!pluto)
604 goto out;
605
606 pluto->pdev = pdev;
607
608 ret = pci_enable_device(pdev);
609 if (ret < 0)
610 goto err_kfree;
611
612 /* enable interrupts */
613 pci_write_config_dword(pdev, 0x6c, 0x8000);
614
615 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
616 if (ret < 0)
617 goto err_pci_disable_device;
618
619 pci_set_master(pdev);
620
621 ret = pci_request_regions(pdev, DRIVER_NAME);
622 if (ret < 0)
623 goto err_pci_disable_device;
624
625 pluto->io_mem = pci_iomap(pdev, 0, 0x40);
626 if (!pluto->io_mem) {
627 ret = -EIO;
628 goto err_pci_release_regions;
629 }
630
631 pci_set_drvdata(pdev, pluto);
632
633 ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
634 if (ret < 0)
635 goto err_pci_iounmap;
636
637 ret = pluto_hw_init(pluto);
638 if (ret < 0)
639 goto err_free_irq;
640
641 /* i2c */
642 i2c_set_adapdata(&pluto->i2c_adap, pluto);
643 strcpy(pluto->i2c_adap.name, DRIVER_NAME);
644 pluto->i2c_adap.owner = THIS_MODULE;
645 pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
646 pluto->i2c_adap.dev.parent = &pdev->dev;
647 pluto->i2c_adap.algo_data = &pluto->i2c_bit;
648 pluto->i2c_bit.data = pluto;
649 pluto->i2c_bit.setsda = pluto_setsda;
650 pluto->i2c_bit.setscl = pluto_setscl;
651 pluto->i2c_bit.getsda = pluto_getsda;
652 pluto->i2c_bit.getscl = pluto_getscl;
653 pluto->i2c_bit.udelay = 10;
654 pluto->i2c_bit.timeout = 10;
655
656 /* Raise SCL and SDA */
657 pluto_setsda(pluto, 1);
658 pluto_setscl(pluto, 1);
659
660 ret = i2c_bit_add_bus(&pluto->i2c_adap);
661 if (ret < 0)
662 goto err_pluto_hw_exit;
663
664 /* dvb */
665 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE, &pdev->dev);
666 if (ret < 0)
667 goto err_i2c_del_adapter;
668
669 dvb_adapter = &pluto->dvb_adapter;
670
671 pluto_read_rev(pluto);
672 pluto_read_serial(pluto);
673 pluto_read_mac(pluto, dvb_adapter->proposed_mac);
674
675 dvbdemux = &pluto->demux;
676 dvbdemux->filternum = 256;
677 dvbdemux->feednum = 256;
678 dvbdemux->start_feed = pluto_start_feed;
679 dvbdemux->stop_feed = pluto_stop_feed;
680 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
681 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
682 ret = dvb_dmx_init(dvbdemux);
683 if (ret < 0)
684 goto err_dvb_unregister_adapter;
685
686 dmx = &dvbdemux->dmx;
687
688 pluto->hw_frontend.source = DMX_FRONTEND_0;
689 pluto->mem_frontend.source = DMX_MEMORY_FE;
690 pluto->dmxdev.filternum = NHWFILTERS;
691 pluto->dmxdev.demux = dmx;
692
693 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
694 if (ret < 0)
695 goto err_dvb_dmx_release;
696
697 ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
698 if (ret < 0)
699 goto err_dvb_dmxdev_release;
700
701 ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
702 if (ret < 0)
703 goto err_remove_hw_frontend;
704
705 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
706 if (ret < 0)
707 goto err_remove_mem_frontend;
708
709 ret = frontend_init(pluto);
710 if (ret < 0)
711 goto err_disconnect_frontend;
712
713 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
714 out:
715 return ret;
716
717 err_disconnect_frontend:
718 dmx->disconnect_frontend(dmx);
719 err_remove_mem_frontend:
720 dmx->remove_frontend(dmx, &pluto->mem_frontend);
721 err_remove_hw_frontend:
722 dmx->remove_frontend(dmx, &pluto->hw_frontend);
723 err_dvb_dmxdev_release:
724 dvb_dmxdev_release(&pluto->dmxdev);
725 err_dvb_dmx_release:
726 dvb_dmx_release(dvbdemux);
727 err_dvb_unregister_adapter:
728 dvb_unregister_adapter(dvb_adapter);
729 err_i2c_del_adapter:
730 i2c_del_adapter(&pluto->i2c_adap);
731 err_pluto_hw_exit:
732 pluto_hw_exit(pluto);
733 err_free_irq:
734 free_irq(pdev->irq, pluto);
735 err_pci_iounmap:
736 pci_iounmap(pdev, pluto->io_mem);
737 err_pci_release_regions:
738 pci_release_regions(pdev);
739 err_pci_disable_device:
740 pci_disable_device(pdev);
741 err_kfree:
742 pci_set_drvdata(pdev, NULL);
743 kfree(pluto);
744 goto out;
745 }
746
747 static void __devexit pluto2_remove(struct pci_dev *pdev)
748 {
749 struct pluto *pluto = pci_get_drvdata(pdev);
750 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
751 struct dvb_demux *dvbdemux = &pluto->demux;
752 struct dmx_demux *dmx = &dvbdemux->dmx;
753
754 dmx->close(dmx);
755 dvb_net_release(&pluto->dvbnet);
756 if (pluto->fe)
757 dvb_unregister_frontend(pluto->fe);
758
759 dmx->disconnect_frontend(dmx);
760 dmx->remove_frontend(dmx, &pluto->mem_frontend);
761 dmx->remove_frontend(dmx, &pluto->hw_frontend);
762 dvb_dmxdev_release(&pluto->dmxdev);
763 dvb_dmx_release(dvbdemux);
764 dvb_unregister_adapter(dvb_adapter);
765 i2c_del_adapter(&pluto->i2c_adap);
766 pluto_hw_exit(pluto);
767 free_irq(pdev->irq, pluto);
768 pci_iounmap(pdev, pluto->io_mem);
769 pci_release_regions(pdev);
770 pci_disable_device(pdev);
771 pci_set_drvdata(pdev, NULL);
772 kfree(pluto);
773 }
774
775 #ifndef PCI_VENDOR_ID_SCM
776 #define PCI_VENDOR_ID_SCM 0x0432
777 #endif
778 #ifndef PCI_DEVICE_ID_PLUTO2
779 #define PCI_DEVICE_ID_PLUTO2 0x0001
780 #endif
781
782 static struct pci_device_id pluto2_id_table[] __devinitdata = {
783 {
784 .vendor = PCI_VENDOR_ID_SCM,
785 .device = PCI_DEVICE_ID_PLUTO2,
786 .subvendor = PCI_ANY_ID,
787 .subdevice = PCI_ANY_ID,
788 }, {
789 /* empty */
790 },
791 };
792
793 MODULE_DEVICE_TABLE(pci, pluto2_id_table);
794
795 static struct pci_driver pluto2_driver = {
796 .name = DRIVER_NAME,
797 .id_table = pluto2_id_table,
798 .probe = pluto2_probe,
799 .remove = __devexit_p(pluto2_remove),
800 };
801
802 static int __init pluto2_init(void)
803 {
804 return pci_register_driver(&pluto2_driver);
805 }
806
807 static void __exit pluto2_exit(void)
808 {
809 pci_unregister_driver(&pluto2_driver);
810 }
811
812 module_init(pluto2_init);
813 module_exit(pluto2_exit);
814
815 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
816 MODULE_DESCRIPTION("Pluto2 driver");
817 MODULE_LICENSE("GPL");
818
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