1 /*
2 * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32 #ifndef __IWCH_PROVIDER_H__
33 #define __IWCH_PROVIDER_H__
34
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <rdma/ib_verbs.h>
38 #include <asm/types.h>
39 #include "t3cdev.h"
40 #include "iwch.h"
41 #include "cxio_wr.h"
42 #include "cxio_hal.h"
43
44 struct iwch_pd {
45 struct ib_pd ibpd;
46 u32 pdid;
47 struct iwch_dev *rhp;
48 };
49
50 static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd)
51 {
52 return container_of(ibpd, struct iwch_pd, ibpd);
53 }
54
55 struct tpt_attributes {
56 u32 stag;
57 u32 state:1;
58 u32 type:2;
59 u32 rsvd:1;
60 enum tpt_mem_perm perms;
61 u32 remote_invaliate_disable:1;
62 u32 zbva:1;
63 u32 mw_bind_enable:1;
64 u32 page_size:5;
65
66 u32 pdid;
67 u32 qpid;
68 u32 pbl_addr;
69 u32 len;
70 u64 va_fbo;
71 u32 pbl_size;
72 };
73
74 struct iwch_mr {
75 struct ib_mr ibmr;
76 struct ib_umem *umem;
77 struct iwch_dev *rhp;
78 u64 kva;
79 struct tpt_attributes attr;
80 };
81
82 typedef struct iwch_mw iwch_mw_handle;
83
84 static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr)
85 {
86 return container_of(ibmr, struct iwch_mr, ibmr);
87 }
88
89 struct iwch_mw {
90 struct ib_mw ibmw;
91 struct iwch_dev *rhp;
92 u64 kva;
93 struct tpt_attributes attr;
94 };
95
96 static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw)
97 {
98 return container_of(ibmw, struct iwch_mw, ibmw);
99 }
100
101 struct iwch_cq {
102 struct ib_cq ibcq;
103 struct iwch_dev *rhp;
104 struct t3_cq cq;
105 spinlock_t lock;
106 atomic_t refcnt;
107 wait_queue_head_t wait;
108 u32 __user *user_rptr_addr;
109 };
110
111 static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq)
112 {
113 return container_of(ibcq, struct iwch_cq, ibcq);
114 }
115
116 enum IWCH_QP_FLAGS {
117 QP_QUIESCED = 0x01
118 };
119
120 struct iwch_mpa_attributes {
121 u8 recv_marker_enabled;
122 u8 xmit_marker_enabled; /* iWARP: enable inbound Read Resp. */
123 u8 crc_enabled;
124 u8 version; /* 0 or 1 */
125 };
126
127 struct iwch_qp_attributes {
128 u32 scq;
129 u32 rcq;
130 u32 sq_num_entries;
131 u32 rq_num_entries;
132 u32 sq_max_sges;
133 u32 sq_max_sges_rdma_write;
134 u32 rq_max_sges;
135 u32 state;
136 u8 enable_rdma_read;
137 u8 enable_rdma_write; /* enable inbound Read Resp. */
138 u8 enable_bind;
139 u8 enable_mmid0_fastreg; /* Enable STAG0 + Fast-register */
140 /*
141 * Next QP state. If specify the current state, only the
142 * QP attributes will be modified.
143 */
144 u32 max_ord;
145 u32 max_ird;
146 u32 pd; /* IN */
147 u32 next_state;
148 char terminate_buffer[52];
149 u32 terminate_msg_len;
150 u8 is_terminate_local;
151 struct iwch_mpa_attributes mpa_attr; /* IN-OUT */
152 struct iwch_ep *llp_stream_handle;
153 char *stream_msg_buf; /* Last stream msg. before Idle -> RTS */
154 u32 stream_msg_buf_len; /* Only on Idle -> RTS */
155 };
156
157 struct iwch_qp {
158 struct ib_qp ibqp;
159 struct iwch_dev *rhp;
160 struct iwch_ep *ep;
161 struct iwch_qp_attributes attr;
162 struct t3_wq wq;
163 spinlock_t lock;
164 atomic_t refcnt;
165 wait_queue_head_t wait;
166 enum IWCH_QP_FLAGS flags;
167 struct timer_list timer;
168 };
169
170 static inline int qp_quiesced(struct iwch_qp *qhp)
171 {
172 return qhp->flags & QP_QUIESCED;
173 }
174
175 static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp)
176 {
177 return container_of(ibqp, struct iwch_qp, ibqp);
178 }
179
180 void iwch_qp_add_ref(struct ib_qp *qp);
181 void iwch_qp_rem_ref(struct ib_qp *qp);
182
183 struct iwch_ucontext {
184 struct ib_ucontext ibucontext;
185 struct cxio_ucontext uctx;
186 u32 key;
187 spinlock_t mmap_lock;
188 struct list_head mmaps;
189 };
190
191 static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c)
192 {
193 return container_of(c, struct iwch_ucontext, ibucontext);
194 }
195
196 struct iwch_mm_entry {
197 struct list_head entry;
198 u64 addr;
199 u32 key;
200 unsigned len;
201 };
202
203 static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext,
204 u32 key, unsigned len)
205 {
206 struct list_head *pos, *nxt;
207 struct iwch_mm_entry *mm;
208
209 spin_lock(&ucontext->mmap_lock);
210 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
211
212 mm = list_entry(pos, struct iwch_mm_entry, entry);
213 if (mm->key == key && mm->len == len) {
214 list_del_init(&mm->entry);
215 spin_unlock(&ucontext->mmap_lock);
216 PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__,
217 key, (unsigned long long) mm->addr, mm->len);
218 return mm;
219 }
220 }
221 spin_unlock(&ucontext->mmap_lock);
222 return NULL;
223 }
224
225 static inline void insert_mmap(struct iwch_ucontext *ucontext,
226 struct iwch_mm_entry *mm)
227 {
228 spin_lock(&ucontext->mmap_lock);
229 PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__,
230 mm->key, (unsigned long long) mm->addr, mm->len);
231 list_add_tail(&mm->entry, &ucontext->mmaps);
232 spin_unlock(&ucontext->mmap_lock);
233 }
234
235 enum iwch_qp_attr_mask {
236 IWCH_QP_ATTR_NEXT_STATE = 1 << 0,
237 IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
238 IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
239 IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
240 IWCH_QP_ATTR_MAX_ORD = 1 << 11,
241 IWCH_QP_ATTR_MAX_IRD = 1 << 12,
242 IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
243 IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
244 IWCH_QP_ATTR_MPA_ATTR = 1 << 24,
245 IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
246 IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ |
247 IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
248 IWCH_QP_ATTR_MAX_ORD |
249 IWCH_QP_ATTR_MAX_IRD |
250 IWCH_QP_ATTR_LLP_STREAM_HANDLE |
251 IWCH_QP_ATTR_STREAM_MSG_BUFFER |
252 IWCH_QP_ATTR_MPA_ATTR |
253 IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE)
254 };
255
256 int iwch_modify_qp(struct iwch_dev *rhp,
257 struct iwch_qp *qhp,
258 enum iwch_qp_attr_mask mask,
259 struct iwch_qp_attributes *attrs,
260 int internal);
261
262 enum iwch_qp_state {
263 IWCH_QP_STATE_IDLE,
264 IWCH_QP_STATE_RTS,
265 IWCH_QP_STATE_ERROR,
266 IWCH_QP_STATE_TERMINATE,
267 IWCH_QP_STATE_CLOSING,
268 IWCH_QP_STATE_TOT
269 };
270
271 static inline int iwch_convert_state(enum ib_qp_state ib_state)
272 {
273 switch (ib_state) {
274 case IB_QPS_RESET:
275 case IB_QPS_INIT:
276 return IWCH_QP_STATE_IDLE;
277 case IB_QPS_RTS:
278 return IWCH_QP_STATE_RTS;
279 case IB_QPS_SQD:
280 return IWCH_QP_STATE_CLOSING;
281 case IB_QPS_SQE:
282 return IWCH_QP_STATE_TERMINATE;
283 case IB_QPS_ERR:
284 return IWCH_QP_STATE_ERROR;
285 default:
286 return -1;
287 }
288 }
289
290 static inline u32 iwch_ib_to_tpt_access(int acc)
291 {
292 return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |
293 (acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |
294 (acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |
295 TPT_LOCAL_READ;
296 }
297
298 static inline u32 iwch_ib_to_mwbind_access(int acc)
299 {
300 return (acc & IB_ACCESS_REMOTE_WRITE ? T3_MEM_ACCESS_REM_WRITE : 0) |
301 (acc & IB_ACCESS_REMOTE_READ ? T3_MEM_ACCESS_REM_READ : 0) |
302 (acc & IB_ACCESS_LOCAL_WRITE ? T3_MEM_ACCESS_LOCAL_WRITE : 0) |
303 T3_MEM_ACCESS_LOCAL_READ;
304 }
305
306 enum iwch_mmid_state {
307 IWCH_STAG_STATE_VALID,
308 IWCH_STAG_STATE_INVALID
309 };
310
311 enum iwch_qp_query_flags {
312 IWCH_QP_QUERY_CONTEXT_NONE = 0x0, /* No ctx; Only attrs */
313 IWCH_QP_QUERY_CONTEXT_GET = 0x1, /* Get ctx + attrs */
314 IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2, /* Not Supported */
315
316 /*
317 * Quiesce QP context; Consumer
318 * will NOT replay outstanding WR
319 */
320 IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4,
321 IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8,
322 IWCH_QP_QUERY_TEST_USERWRITE = 0x32 /* Test special */
323 };
324
325 int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
326 struct ib_send_wr **bad_wr);
327 int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
328 struct ib_recv_wr **bad_wr);
329 int iwch_bind_mw(struct ib_qp *qp,
330 struct ib_mw *mw,
331 struct ib_mw_bind *mw_bind);
332 int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
333 int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg);
334 int iwch_register_device(struct iwch_dev *dev);
335 void iwch_unregister_device(struct iwch_dev *dev);
336 int iwch_quiesce_qps(struct iwch_cq *chp);
337 int iwch_resume_qps(struct iwch_cq *chp);
338 void stop_read_rep_timer(struct iwch_qp *qhp);
339 int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
340 struct iwch_mr *mhp,
341 int shift,
342 __be64 *page_list);
343 int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
344 struct iwch_mr *mhp,
345 int shift,
346 __be64 *page_list,
347 int npages);
348 int build_phys_page_list(struct ib_phys_buf *buffer_list,
349 int num_phys_buf,
350 u64 *iova_start,
351 u64 *total_size,
352 int *npages,
353 int *shift,
354 __be64 **page_list);
355
356
357 #define IWCH_NODE_DESC "cxgb3 Chelsio Communications"
358
359 #endif
360
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