1 /*
2 * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
3 * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
6 *
7 * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
8 */
9
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/hdreg.h>
15 #include <linux/pci.h>
16 #include <linux/delay.h>
17 #include <linux/ide.h>
18 #include <linux/init.h>
19
20 #include <asm/io.h>
21
22 #ifdef CONFIG_SUPERIO
23 /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
24 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
25 * which use the integrated NS87514 cell for CD-ROM support.
26 * i.e we have to support for CD-ROM installs.
27 * See drivers/parisc/superio.c for more gory details.
28 */
29 #include <asm/superio.h>
30
31 static unsigned long superio_ide_status[2];
32 static unsigned long superio_ide_select[2];
33 static unsigned long superio_ide_dma_status[2];
34
35 #define SUPERIO_IDE_MAX_RETRIES 25
36
37 /* Because of a defect in Super I/O, all reads of the PCI DMA status
38 * registers, IDE status register and the IDE select register need to be
39 * retried
40 */
41 static u8 superio_ide_inb (unsigned long port)
42 {
43 if (port == superio_ide_status[0] ||
44 port == superio_ide_status[1] ||
45 port == superio_ide_select[0] ||
46 port == superio_ide_select[1] ||
47 port == superio_ide_dma_status[0] ||
48 port == superio_ide_dma_status[1]) {
49 u8 tmp;
50 int retries = SUPERIO_IDE_MAX_RETRIES;
51
52 /* printk(" [ reading port 0x%x with retry ] ", port); */
53
54 do {
55 tmp = inb(port);
56 if (tmp == 0)
57 udelay(50);
58 } while (tmp == 0 && retries-- > 0);
59
60 return tmp;
61 }
62
63 return inb(port);
64 }
65
66 static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
67 {
68 struct pci_dev *pdev = to_pci_dev(hwif->dev);
69 u32 base, dmabase;
70 u8 port = hwif->channel, tmp;
71
72 base = pci_resource_start(pdev, port * 2) & ~3;
73 dmabase = pci_resource_start(pdev, 4) & ~3;
74
75 superio_ide_status[port] = base + IDE_STATUS_OFFSET;
76 superio_ide_select[port] = base + IDE_SELECT_OFFSET;
77 superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
78
79 /* Clear error/interrupt, enable dma */
80 tmp = superio_ide_inb(superio_ide_dma_status[port]);
81 outb(tmp | 0x66, superio_ide_dma_status[port]);
82
83 /* We need to override inb to workaround a SuperIO errata */
84 hwif->INB = superio_ide_inb;
85 }
86
87 static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
88 {
89 struct pci_dev *dev = to_pci_dev(hwif->dev);
90
91 if (PCI_SLOT(dev->devfn) == 0xE)
92 /* Built-in - assume it's under superio. */
93 superio_ide_init_iops(hwif);
94 }
95 #endif
96
97 static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
98
99 /*
100 * This routine either enables/disables (according to drive->present)
101 * the IRQ associated with the port (HWIF(drive)),
102 * and selects either PIO or DMA handshaking for the next I/O operation.
103 */
104 static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
105 {
106 ide_hwif_t *hwif = HWIF(drive);
107 struct pci_dev *dev = to_pci_dev(hwif->dev);
108 unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
109 unsigned long flags;
110
111 local_irq_save(flags);
112 new = *old;
113
114 /* Adjust IRQ enable bit */
115 bit = 1 << (8 + hwif->channel);
116 new = drive->present ? (new & ~bit) : (new | bit);
117
118 /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
119 bit = 1 << (20 + drive->select.b.unit + (hwif->channel << 1));
120 other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1));
121 new = use_dma ? ((new & ~other) | bit) : (new & ~bit);
122
123 if (new != *old) {
124 unsigned char stat;
125
126 /*
127 * Don't change DMA engine settings while Write Buffers
128 * are busy.
129 */
130 (void) pci_read_config_byte(dev, 0x43, &stat);
131 while (stat & 0x03) {
132 udelay(1);
133 (void) pci_read_config_byte(dev, 0x43, &stat);
134 }
135
136 *old = new;
137 (void) pci_write_config_dword(dev, 0x40, new);
138
139 /*
140 * And let things settle...
141 */
142 udelay(10);
143 }
144
145 local_irq_restore(flags);
146 }
147
148 static void ns87415_selectproc (ide_drive_t *drive)
149 {
150 ns87415_prepare_drive (drive, drive->using_dma);
151 }
152
153 static int ns87415_ide_dma_end (ide_drive_t *drive)
154 {
155 ide_hwif_t *hwif = HWIF(drive);
156 u8 dma_stat = 0, dma_cmd = 0;
157
158 drive->waiting_for_dma = 0;
159 dma_stat = hwif->INB(hwif->dma_status);
160 /* get dma command mode */
161 dma_cmd = hwif->INB(hwif->dma_command);
162 /* stop DMA */
163 outb(dma_cmd & ~1, hwif->dma_command);
164 /* from ERRATA: clear the INTR & ERROR bits */
165 dma_cmd = hwif->INB(hwif->dma_command);
166 outb(dma_cmd | 6, hwif->dma_command);
167 /* and free any DMA resources */
168 ide_destroy_dmatable(drive);
169 /* verify good DMA status */
170 return (dma_stat & 7) != 4;
171 }
172
173 static int ns87415_ide_dma_setup(ide_drive_t *drive)
174 {
175 /* select DMA xfer */
176 ns87415_prepare_drive(drive, 1);
177 if (!ide_dma_setup(drive))
178 return 0;
179 /* DMA failed: select PIO xfer */
180 ns87415_prepare_drive(drive, 0);
181 return 1;
182 }
183
184 static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
185 {
186 struct pci_dev *dev = to_pci_dev(hwif->dev);
187 unsigned int ctrl, using_inta;
188 u8 progif;
189 #ifdef __sparc_v9__
190 int timeout;
191 u8 stat;
192 #endif
193
194 hwif->selectproc = &ns87415_selectproc;
195
196 /*
197 * We cannot probe for IRQ: both ports share common IRQ on INTA.
198 * Also, leave IRQ masked during drive probing, to prevent infinite
199 * interrupts from a potentially floating INTA..
200 *
201 * IRQs get unmasked in selectproc when drive is first used.
202 */
203 (void) pci_read_config_dword(dev, 0x40, &ctrl);
204 (void) pci_read_config_byte(dev, 0x09, &progif);
205 /* is irq in "native" mode? */
206 using_inta = progif & (1 << (hwif->channel << 1));
207 if (!using_inta)
208 using_inta = ctrl & (1 << (4 + hwif->channel));
209 if (hwif->mate) {
210 hwif->select_data = hwif->mate->select_data;
211 } else {
212 hwif->select_data = (unsigned long)
213 &ns87415_control[ns87415_count++];
214 ctrl |= (1 << 8) | (1 << 9); /* mask both IRQs */
215 if (using_inta)
216 ctrl &= ~(1 << 6); /* unmask INTA */
217 *((unsigned int *)hwif->select_data) = ctrl;
218 (void) pci_write_config_dword(dev, 0x40, ctrl);
219
220 /*
221 * Set prefetch size to 512 bytes for both ports,
222 * but don't turn on/off prefetching here.
223 */
224 pci_write_config_byte(dev, 0x55, 0xee);
225
226 #ifdef __sparc_v9__
227 /*
228 * XXX: Reset the device, if we don't it will not respond to
229 * SELECT_DRIVE() properly during first ide_probe_port().
230 */
231 timeout = 10000;
232 outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
233 udelay(10);
234 outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
235 do {
236 udelay(50);
237 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
238 if (stat == 0xff)
239 break;
240 } while ((stat & BUSY_STAT) && --timeout);
241 #endif
242 }
243
244 if (!using_inta)
245 hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]);
246 else if (!hwif->irq && hwif->mate && hwif->mate->irq)
247 hwif->irq = hwif->mate->irq; /* share IRQ with mate */
248
249 if (!hwif->dma_base)
250 return;
251
252 outb(0x60, hwif->dma_status);
253 hwif->dma_setup = &ns87415_ide_dma_setup;
254 hwif->ide_dma_end = &ns87415_ide_dma_end;
255 }
256
257 static const struct ide_port_info ns87415_chipset __devinitdata = {
258 .name = "NS87415",
259 #ifdef CONFIG_SUPERIO
260 .init_iops = init_iops_ns87415,
261 #endif
262 .init_hwif = init_hwif_ns87415,
263 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
264 IDE_HFLAG_NO_ATAPI_DMA |
265 IDE_HFLAG_BOOTABLE,
266 };
267
268 static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
269 {
270 return ide_setup_pci_device(dev, &ns87415_chipset);
271 }
272
273 static const struct pci_device_id ns87415_pci_tbl[] = {
274 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87415), 0 },
275 { 0, },
276 };
277 MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl);
278
279 static struct pci_driver driver = {
280 .name = "NS87415_IDE",
281 .id_table = ns87415_pci_tbl,
282 .probe = ns87415_init_one,
283 };
284
285 static int __init ns87415_ide_init(void)
286 {
287 return ide_pci_register_driver(&driver);
288 }
289
290 module_init(ns87415_ide_init);
291
292 MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
293 MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
294 MODULE_LICENSE("GPL");
295
|
This page was automatically generated by the
LXR engine.
|