1 /*
2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 /*
24 Supports following chips:
25
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83627thf 9 3 2 3 0x90 0x5ca3 no yes(LPC)
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
34 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
35
36 */
37
38 #include <linux/config.h>
39 #include <linux/module.h>
40 #include <linux/init.h>
41 #include <linux/slab.h>
42 #include <linux/i2c.h>
43 #include <linux/i2c-sensor.h>
44 #include <linux/i2c-vid.h>
45 #include <asm/io.h>
46 #include "lm75.h"
47
48 /* RT Table support #defined so we can take it out if it gets bothersome */
49 #define W83781D_RT 1
50
51 /* Addresses to scan */
52 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
53 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
54 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
55 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
56
57 /* Insmod parameters */
58 SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
59 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
60 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
61
62 static int init = 1;
63 module_param(init, bool, 0);
64 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
65
66 /* Constants specified below */
67
68 /* Length of ISA address segment */
69 #define W83781D_EXTENT 8
70
71 /* Where are the ISA address/data registers relative to the base address */
72 #define W83781D_ADDR_REG_OFFSET 5
73 #define W83781D_DATA_REG_OFFSET 6
74
75 /* The W83781D registers */
76 /* The W83782D registers for nr=7,8 are in bank 5 */
77 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
78 (0x554 + (((nr) - 7) * 2)))
79 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
80 (0x555 + (((nr) - 7) * 2)))
81 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
82 (0x550 + (nr) - 7))
83
84 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
85 #define W83781D_REG_FAN(nr) (0x27 + (nr))
86
87 #define W83781D_REG_BANK 0x4E
88 #define W83781D_REG_TEMP2_CONFIG 0x152
89 #define W83781D_REG_TEMP3_CONFIG 0x252
90 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
91 ((nr == 2) ? (0x0150) : \
92 (0x27)))
93 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
94 ((nr == 2) ? (0x153) : \
95 (0x3A)))
96 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
97 ((nr == 2) ? (0x155) : \
98 (0x39)))
99
100 #define W83781D_REG_CONFIG 0x40
101 #define W83781D_REG_ALARM1 0x41
102 #define W83781D_REG_ALARM2 0x42
103 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */
104
105 #define W83781D_REG_IRQ 0x4C
106 #define W83781D_REG_BEEP_CONFIG 0x4D
107 #define W83781D_REG_BEEP_INTS1 0x56
108 #define W83781D_REG_BEEP_INTS2 0x57
109 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
110
111 #define W83781D_REG_VID_FANDIV 0x47
112
113 #define W83781D_REG_CHIPID 0x49
114 #define W83781D_REG_WCHIPID 0x58
115 #define W83781D_REG_CHIPMAN 0x4F
116 #define W83781D_REG_PIN 0x4B
117
118 /* 782D/783S only */
119 #define W83781D_REG_VBAT 0x5D
120
121 /* PWM 782D (1-4) and 783S (1-2) only */
122 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
123 /* on which is which; */
124 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
125 /* However 782d is probably wrong. */
126 #define W83781D_REG_PWM3 0x5E
127 #define W83781D_REG_PWM4 0x5F
128 #define W83781D_REG_PWMCLK12 0x5C
129 #define W83781D_REG_PWMCLK34 0x45C
130 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
131 W83781D_REG_PWM3, W83781D_REG_PWM4
132 };
133
134 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
135
136 #define W83781D_REG_I2C_ADDR 0x48
137 #define W83781D_REG_I2C_SUBADDR 0x4A
138
139 /* The following are undocumented in the data sheets however we
140 received the information in an email from Winbond tech support */
141 /* Sensor selection - not on 781d */
142 #define W83781D_REG_SCFG1 0x5D
143 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
144
145 #define W83781D_REG_SCFG2 0x59
146 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
147
148 #define W83781D_DEFAULT_BETA 3435
149
150 /* RT Table registers */
151 #define W83781D_REG_RT_IDX 0x50
152 #define W83781D_REG_RT_VAL 0x51
153
154 /* Conversions. Rounding and limit checking is only done on the TO_REG
155 variants. Note that you should be a bit careful with which arguments
156 these macros are called: arguments may be evaluated more than once.
157 Fixing this is just not worth it. */
158 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
159 #define IN_FROM_REG(val) (((val) * 16) / 10)
160
161 static inline u8
162 FAN_TO_REG(long rpm, int div)
163 {
164 if (rpm == 0)
165 return 255;
166 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
167 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
168 }
169
170 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
171 ((val) == 255 ? 0 : \
172 1350000 / ((val) * (div))))
173
174 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
175 : (val)) / 1000, 0, 0xff))
176 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
177
178 #define ALARMS_FROM_REG(val) (val)
179 #define PWM_FROM_REG(val) (val)
180 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
181 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
182 (val) ^ 0x7fff : (val))
183 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
184 (~(val)) & 0x7fff : (val) & 0xffffff)
185
186 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
187 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
188
189 #define DIV_FROM_REG(val) (1 << (val))
190
191 static inline u8
192 DIV_TO_REG(long val, enum chips type)
193 {
194 int i;
195 val = SENSORS_LIMIT(val, 1,
196 ((type == w83781d
197 || type == as99127f) ? 8 : 128)) >> 1;
198 for (i = 0; i < 6; i++) {
199 if (val == 0)
200 break;
201 val >>= 1;
202 }
203 return ((u8) i);
204 }
205
206 /* There are some complications in a module like this. First off, W83781D chips
207 may be both present on the SMBus and the ISA bus, and we have to handle
208 those cases separately at some places. Second, there might be several
209 W83781D chips available (well, actually, that is probably never done; but
210 it is a clean illustration of how to handle a case like that). Finally,
211 a specific chip may be attached to *both* ISA and SMBus, and we would
212 not like to detect it double. Fortunately, in the case of the W83781D at
213 least, a register tells us what SMBus address we are on, so that helps
214 a bit - except if there could be more than one SMBus. Groan. No solution
215 for this yet. */
216
217 /* This module may seem overly long and complicated. In fact, it is not so
218 bad. Quite a lot of bookkeeping is done. A real driver can often cut
219 some corners. */
220
221 /* For each registered W83781D, we need to keep some data in memory. That
222 data is pointed to by w83781d_list[NR]->data. The structure itself is
223 dynamically allocated, at the same time when a new w83781d client is
224 allocated. */
225 struct w83781d_data {
226 struct i2c_client client;
227 struct semaphore lock;
228 enum chips type;
229
230 struct semaphore update_lock;
231 char valid; /* !=0 if following fields are valid */
232 unsigned long last_updated; /* In jiffies */
233
234 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
235 /* array of 2 pointers to subclients */
236
237 u8 in[9]; /* Register value - 8 & 9 for 782D only */
238 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
239 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
240 u8 fan[3]; /* Register value */
241 u8 fan_min[3]; /* Register value */
242 u8 temp;
243 u8 temp_max; /* Register value */
244 u8 temp_max_hyst; /* Register value */
245 u16 temp_add[2]; /* Register value */
246 u16 temp_max_add[2]; /* Register value */
247 u16 temp_max_hyst_add[2]; /* Register value */
248 u8 fan_div[3]; /* Register encoding, shifted right */
249 u8 vid; /* Register encoding, combined */
250 u32 alarms; /* Register encoding, combined */
251 u32 beep_mask; /* Register encoding, combined */
252 u8 beep_enable; /* Boolean */
253 u8 pwm[4]; /* Register value */
254 u8 pwmenable[4]; /* Boolean */
255 u16 sens[3]; /* 782D/783S only.
256 1 = pentium diode; 2 = 3904 diode;
257 3000-5000 = thermistor beta.
258 Default = 3435.
259 Other Betas unimplemented */
260 #ifdef W83781D_RT
261 u8 rt[3][32]; /* Register value */
262 #endif
263 u8 vrm;
264 };
265
266 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
267 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
268 static int w83781d_detach_client(struct i2c_client *client);
269
270 static int w83781d_read_value(struct i2c_client *client, u16 register);
271 static int w83781d_write_value(struct i2c_client *client, u16 register,
272 u16 value);
273 static struct w83781d_data *w83781d_update_device(struct device *dev);
274 static void w83781d_init_client(struct i2c_client *client);
275
276 static struct i2c_driver w83781d_driver = {
277 .owner = THIS_MODULE,
278 .name = "w83781d",
279 .id = I2C_DRIVERID_W83781D,
280 .flags = I2C_DF_NOTIFY,
281 .attach_adapter = w83781d_attach_adapter,
282 .detach_client = w83781d_detach_client,
283 };
284
285 /* following are the sysfs callback functions */
286 #define show_in_reg(reg) \
287 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
288 { \
289 struct w83781d_data *data = w83781d_update_device(dev); \
290 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
291 }
292 show_in_reg(in);
293 show_in_reg(in_min);
294 show_in_reg(in_max);
295
296 #define store_in_reg(REG, reg) \
297 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
298 { \
299 struct i2c_client *client = to_i2c_client(dev); \
300 struct w83781d_data *data = i2c_get_clientdata(client); \
301 u32 val; \
302 \
303 val = simple_strtoul(buf, NULL, 10) / 10; \
304 data->in_##reg[nr] = IN_TO_REG(val); \
305 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
306 \
307 return count; \
308 }
309 store_in_reg(MIN, min);
310 store_in_reg(MAX, max);
311
312 #define sysfs_in_offset(offset) \
313 static ssize_t \
314 show_regs_in_##offset (struct device *dev, char *buf) \
315 { \
316 return show_in(dev, buf, offset); \
317 } \
318 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
319
320 #define sysfs_in_reg_offset(reg, offset) \
321 static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
322 { \
323 return show_in_##reg (dev, buf, offset); \
324 } \
325 static ssize_t store_regs_in_##reg##offset (struct device *dev, const char *buf, size_t count) \
326 { \
327 return store_in_##reg (dev, buf, count, offset); \
328 } \
329 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
330
331 #define sysfs_in_offsets(offset) \
332 sysfs_in_offset(offset); \
333 sysfs_in_reg_offset(min, offset); \
334 sysfs_in_reg_offset(max, offset);
335
336 sysfs_in_offsets(0);
337 sysfs_in_offsets(1);
338 sysfs_in_offsets(2);
339 sysfs_in_offsets(3);
340 sysfs_in_offsets(4);
341 sysfs_in_offsets(5);
342 sysfs_in_offsets(6);
343 sysfs_in_offsets(7);
344 sysfs_in_offsets(8);
345
346 #define device_create_file_in(client, offset) \
347 do { \
348 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
349 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
350 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
351 } while (0)
352
353 #define show_fan_reg(reg) \
354 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
355 { \
356 struct w83781d_data *data = w83781d_update_device(dev); \
357 return sprintf(buf,"%ld\n", \
358 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
359 }
360 show_fan_reg(fan);
361 show_fan_reg(fan_min);
362
363 static ssize_t
364 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
365 {
366 struct i2c_client *client = to_i2c_client(dev);
367 struct w83781d_data *data = i2c_get_clientdata(client);
368 u32 val;
369
370 val = simple_strtoul(buf, NULL, 10);
371 data->fan_min[nr - 1] =
372 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
373 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
374 data->fan_min[nr - 1]);
375
376 return count;
377 }
378
379 #define sysfs_fan_offset(offset) \
380 static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
381 { \
382 return show_fan(dev, buf, offset); \
383 } \
384 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
385
386 #define sysfs_fan_min_offset(offset) \
387 static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
388 { \
389 return show_fan_min(dev, buf, offset); \
390 } \
391 static ssize_t store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
392 { \
393 return store_fan_min(dev, buf, count, offset); \
394 } \
395 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
396
397 sysfs_fan_offset(1);
398 sysfs_fan_min_offset(1);
399 sysfs_fan_offset(2);
400 sysfs_fan_min_offset(2);
401 sysfs_fan_offset(3);
402 sysfs_fan_min_offset(3);
403
404 #define device_create_file_fan(client, offset) \
405 do { \
406 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
407 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
408 } while (0)
409
410 #define show_temp_reg(reg) \
411 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
412 { \
413 struct w83781d_data *data = w83781d_update_device(dev); \
414 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
415 return sprintf(buf,"%d\n", \
416 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
417 } else { /* TEMP1 */ \
418 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
419 } \
420 }
421 show_temp_reg(temp);
422 show_temp_reg(temp_max);
423 show_temp_reg(temp_max_hyst);
424
425 #define store_temp_reg(REG, reg) \
426 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
427 { \
428 struct i2c_client *client = to_i2c_client(dev); \
429 struct w83781d_data *data = i2c_get_clientdata(client); \
430 s32 val; \
431 \
432 val = simple_strtol(buf, NULL, 10); \
433 \
434 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
435 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
436 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
437 data->temp_##reg##_add[nr-2]); \
438 } else { /* TEMP1 */ \
439 data->temp_##reg = TEMP_TO_REG(val); \
440 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
441 data->temp_##reg); \
442 } \
443 \
444 return count; \
445 }
446 store_temp_reg(OVER, max);
447 store_temp_reg(HYST, max_hyst);
448
449 #define sysfs_temp_offset(offset) \
450 static ssize_t \
451 show_regs_temp_##offset (struct device *dev, char *buf) \
452 { \
453 return show_temp(dev, buf, offset); \
454 } \
455 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
456
457 #define sysfs_temp_reg_offset(reg, offset) \
458 static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
459 { \
460 return show_temp_##reg (dev, buf, offset); \
461 } \
462 static ssize_t store_regs_temp_##reg##offset (struct device *dev, const char *buf, size_t count) \
463 { \
464 return store_temp_##reg (dev, buf, count, offset); \
465 } \
466 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
467
468 #define sysfs_temp_offsets(offset) \
469 sysfs_temp_offset(offset); \
470 sysfs_temp_reg_offset(max, offset); \
471 sysfs_temp_reg_offset(max_hyst, offset);
472
473 sysfs_temp_offsets(1);
474 sysfs_temp_offsets(2);
475 sysfs_temp_offsets(3);
476
477 #define device_create_file_temp(client, offset) \
478 do { \
479 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
480 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
481 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
482 } while (0)
483
484 static ssize_t
485 show_vid_reg(struct device *dev, char *buf)
486 {
487 struct w83781d_data *data = w83781d_update_device(dev);
488 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
489 }
490
491 static
492 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
493 #define device_create_file_vid(client) \
494 device_create_file(&client->dev, &dev_attr_cpu0_vid);
495 static ssize_t
496 show_vrm_reg(struct device *dev, char *buf)
497 {
498 struct w83781d_data *data = w83781d_update_device(dev);
499 return sprintf(buf, "%ld\n", (long) data->vrm);
500 }
501
502 static ssize_t
503 store_vrm_reg(struct device *dev, const char *buf, size_t count)
504 {
505 struct i2c_client *client = to_i2c_client(dev);
506 struct w83781d_data *data = i2c_get_clientdata(client);
507 u32 val;
508
509 val = simple_strtoul(buf, NULL, 10);
510 data->vrm = val;
511
512 return count;
513 }
514
515 static
516 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
517 #define device_create_file_vrm(client) \
518 device_create_file(&client->dev, &dev_attr_vrm);
519 static ssize_t
520 show_alarms_reg(struct device *dev, char *buf)
521 {
522 struct w83781d_data *data = w83781d_update_device(dev);
523 return sprintf(buf, "%ld\n", (long) ALARMS_FROM_REG(data->alarms));
524 }
525
526 static
527 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
528 #define device_create_file_alarms(client) \
529 device_create_file(&client->dev, &dev_attr_alarms);
530 static ssize_t show_beep_mask (struct device *dev, char *buf)
531 {
532 struct w83781d_data *data = w83781d_update_device(dev);
533 return sprintf(buf, "%ld\n",
534 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
535 }
536 static ssize_t show_beep_enable (struct device *dev, char *buf)
537 {
538 struct w83781d_data *data = w83781d_update_device(dev);
539 return sprintf(buf, "%ld\n",
540 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
541 }
542
543 #define BEEP_ENABLE 0 /* Store beep_enable */
544 #define BEEP_MASK 1 /* Store beep_mask */
545
546 static ssize_t
547 store_beep_reg(struct device *dev, const char *buf, size_t count,
548 int update_mask)
549 {
550 struct i2c_client *client = to_i2c_client(dev);
551 struct w83781d_data *data = i2c_get_clientdata(client);
552 u32 val, val2;
553
554 val = simple_strtoul(buf, NULL, 10);
555
556 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
557 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
558 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
559 data->beep_mask & 0xff);
560
561 if ((data->type != w83781d) && (data->type != as99127f)) {
562 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
563 ((data->beep_mask) >> 16) & 0xff);
564 }
565
566 val2 = (data->beep_mask >> 8) & 0x7f;
567 } else { /* We are storing beep_enable */
568 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
569 data->beep_enable = BEEP_ENABLE_TO_REG(val);
570 }
571
572 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
573 val2 | data->beep_enable << 7);
574
575 return count;
576 }
577
578 #define sysfs_beep(REG, reg) \
579 static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
580 { \
581 return show_beep_##reg(dev, buf); \
582 } \
583 static ssize_t store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
584 { \
585 return store_beep_reg(dev, buf, count, BEEP_##REG); \
586 } \
587 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
588
589 sysfs_beep(ENABLE, enable);
590 sysfs_beep(MASK, mask);
591
592 #define device_create_file_beep(client) \
593 do { \
594 device_create_file(&client->dev, &dev_attr_beep_enable); \
595 device_create_file(&client->dev, &dev_attr_beep_mask); \
596 } while (0)
597
598 static ssize_t
599 show_fan_div_reg(struct device *dev, char *buf, int nr)
600 {
601 struct w83781d_data *data = w83781d_update_device(dev);
602 return sprintf(buf, "%ld\n",
603 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
604 }
605
606 /* Note: we save and restore the fan minimum here, because its value is
607 determined in part by the fan divisor. This follows the principle of
608 least suprise; the user doesn't expect the fan minimum to change just
609 because the divisor changed. */
610 static ssize_t
611 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
612 {
613 struct i2c_client *client = to_i2c_client(dev);
614 struct w83781d_data *data = i2c_get_clientdata(client);
615 unsigned long min;
616 u8 reg;
617
618 /* Save fan_min */
619 min = FAN_FROM_REG(data->fan_min[nr],
620 DIV_FROM_REG(data->fan_div[nr]));
621
622 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10),
623 data->type);
624
625 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
626 & (nr==0 ? 0xcf : 0x3f))
627 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
628 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
629
630 /* w83781d and as99127f don't have extended divisor bits */
631 if (data->type != w83781d && data->type != as99127f) {
632 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
633 & ~(1 << (5 + nr)))
634 | ((data->fan_div[nr] & 0x04) << (3 + nr));
635 w83781d_write_value(client, W83781D_REG_VBAT, reg);
636 }
637
638 /* Restore fan_min */
639 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
640 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
641
642 return count;
643 }
644
645 #define sysfs_fan_div(offset) \
646 static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
647 { \
648 return show_fan_div_reg(dev, buf, offset); \
649 } \
650 static ssize_t store_regs_fan_div_##offset (struct device *dev, const char *buf, size_t count) \
651 { \
652 return store_fan_div_reg(dev, buf, count, offset - 1); \
653 } \
654 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
655
656 sysfs_fan_div(1);
657 sysfs_fan_div(2);
658 sysfs_fan_div(3);
659
660 #define device_create_file_fan_div(client, offset) \
661 do { \
662 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
663 } while (0)
664
665 static ssize_t
666 show_pwm_reg(struct device *dev, char *buf, int nr)
667 {
668 struct w83781d_data *data = w83781d_update_device(dev);
669 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
670 }
671
672 static ssize_t
673 show_pwmenable_reg(struct device *dev, char *buf, int nr)
674 {
675 struct w83781d_data *data = w83781d_update_device(dev);
676 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
677 }
678
679 static ssize_t
680 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
681 {
682 struct i2c_client *client = to_i2c_client(dev);
683 struct w83781d_data *data = i2c_get_clientdata(client);
684 u32 val;
685
686 val = simple_strtoul(buf, NULL, 10);
687
688 data->pwm[nr - 1] = PWM_TO_REG(val);
689 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
690
691 return count;
692 }
693
694 static ssize_t
695 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
696 {
697 struct i2c_client *client = to_i2c_client(dev);
698 struct w83781d_data *data = i2c_get_clientdata(client);
699 u32 val, reg;
700
701 val = simple_strtoul(buf, NULL, 10);
702
703 switch (val) {
704 case 0:
705 case 1:
706 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
707 w83781d_write_value(client, W83781D_REG_PWMCLK12,
708 (reg & 0xf7) | (val << 3));
709
710 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
711 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
712 (reg & 0xef) | (!val << 4));
713
714 data->pwmenable[nr - 1] = val;
715 break;
716
717 default:
718 return -EINVAL;
719 }
720
721 return count;
722 }
723
724 #define sysfs_pwm(offset) \
725 static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
726 { \
727 return show_pwm_reg(dev, buf, offset); \
728 } \
729 static ssize_t store_regs_pwm_##offset (struct device *dev, \
730 const char *buf, size_t count) \
731 { \
732 return store_pwm_reg(dev, buf, count, offset); \
733 } \
734 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
735 show_regs_pwm_##offset, store_regs_pwm_##offset);
736
737 #define sysfs_pwmenable(offset) \
738 static ssize_t show_regs_pwmenable_##offset (struct device *dev, char *buf) \
739 { \
740 return show_pwmenable_reg(dev, buf, offset); \
741 } \
742 static ssize_t store_regs_pwmenable_##offset (struct device *dev, \
743 const char *buf, size_t count) \
744 { \
745 return store_pwmenable_reg(dev, buf, count, offset); \
746 } \
747 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
748 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
749
750 sysfs_pwm(1);
751 sysfs_pwm(2);
752 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
753 sysfs_pwm(3);
754 sysfs_pwm(4);
755
756 #define device_create_file_pwm(client, offset) \
757 do { \
758 device_create_file(&client->dev, &dev_attr_pwm##offset); \
759 } while (0)
760
761 #define device_create_file_pwmenable(client, offset) \
762 do { \
763 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
764 } while (0)
765
766 static ssize_t
767 show_sensor_reg(struct device *dev, char *buf, int nr)
768 {
769 struct w83781d_data *data = w83781d_update_device(dev);
770 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
771 }
772
773 static ssize_t
774 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
775 {
776 struct i2c_client *client = to_i2c_client(dev);
777 struct w83781d_data *data = i2c_get_clientdata(client);
778 u32 val, tmp;
779
780 val = simple_strtoul(buf, NULL, 10);
781
782 switch (val) {
783 case 1: /* PII/Celeron diode */
784 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
785 w83781d_write_value(client, W83781D_REG_SCFG1,
786 tmp | BIT_SCFG1[nr - 1]);
787 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
788 w83781d_write_value(client, W83781D_REG_SCFG2,
789 tmp | BIT_SCFG2[nr - 1]);
790 data->sens[nr - 1] = val;
791 break;
792 case 2: /* 3904 */
793 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
794 w83781d_write_value(client, W83781D_REG_SCFG1,
795 tmp | BIT_SCFG1[nr - 1]);
796 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
797 w83781d_write_value(client, W83781D_REG_SCFG2,
798 tmp & ~BIT_SCFG2[nr - 1]);
799 data->sens[nr - 1] = val;
800 break;
801 case W83781D_DEFAULT_BETA: /* thermistor */
802 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
803 w83781d_write_value(client, W83781D_REG_SCFG1,
804 tmp & ~BIT_SCFG1[nr - 1]);
805 data->sens[nr - 1] = val;
806 break;
807 default:
808 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
809 (long) val, W83781D_DEFAULT_BETA);
810 break;
811 }
812
813 return count;
814 }
815
816 #define sysfs_sensor(offset) \
817 static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
818 { \
819 return show_sensor_reg(dev, buf, offset); \
820 } \
821 static ssize_t store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
822 { \
823 return store_sensor_reg(dev, buf, count, offset); \
824 } \
825 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
826
827 sysfs_sensor(1);
828 sysfs_sensor(2);
829 sysfs_sensor(3);
830
831 #define device_create_file_sensor(client, offset) \
832 do { \
833 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
834 } while (0)
835
836 #ifdef W83781D_RT
837 static ssize_t
838 show_rt_reg(struct device *dev, char *buf, int nr)
839 {
840 struct w83781d_data *data = w83781d_update_device(dev);
841 int i, j = 0;
842
843 for (i = 0; i < 32; i++) {
844 if (i > 0)
845 j += sprintf(buf, " %ld", (long) data->rt[nr - 1][i]);
846 else
847 j += sprintf(buf, "%ld", (long) data->rt[nr - 1][i]);
848 }
849 j += sprintf(buf, "\n");
850
851 return j;
852 }
853
854 static ssize_t
855 store_rt_reg(struct device *dev, const char *buf, size_t count, int nr)
856 {
857 struct i2c_client *client = to_i2c_client(dev);
858 struct w83781d_data *data = i2c_get_clientdata(client);
859 u32 val, i;
860
861 for (i = 0; i < count; i++) {
862 val = simple_strtoul(buf + count, NULL, 10);
863
864 /* fixme: no bounds checking 0-255 */
865 data->rt[nr - 1][i] = val & 0xff;
866 w83781d_write_value(client, W83781D_REG_RT_IDX, i);
867 w83781d_write_value(client, W83781D_REG_RT_VAL,
868 data->rt[nr - 1][i]);
869 }
870
871 return count;
872 }
873
874 #define sysfs_rt(offset) \
875 static ssize_t show_regs_rt_##offset (struct device *dev, char *buf) \
876 { \
877 return show_rt_reg(dev, buf, offset); \
878 } \
879 static ssize_t store_regs_rt_##offset (struct device *dev, const char *buf, size_t count) \
880 { \
881 return store_rt_reg(dev, buf, count, offset); \
882 } \
883 static DEVICE_ATTR(rt##offset, S_IRUGO | S_IWUSR, show_regs_rt_##offset, store_regs_rt_##offset);
884
885 sysfs_rt(1);
886 sysfs_rt(2);
887 sysfs_rt(3);
888
889 #define device_create_file_rt(client, offset) \
890 do { \
891 device_create_file(&client->dev, &dev_attr_rt##offset); \
892 } while (0)
893
894 #endif /* ifdef W83781D_RT */
895
896 /* This function is called when:
897 * w83781d_driver is inserted (when this module is loaded), for each
898 available adapter
899 * when a new adapter is inserted (and w83781d_driver is still present) */
900 static int
901 w83781d_attach_adapter(struct i2c_adapter *adapter)
902 {
903 if (!(adapter->class & I2C_CLASS_HWMON))
904 return 0;
905 return i2c_detect(adapter, &addr_data, w83781d_detect);
906 }
907
908 /* Assumes that adapter is of I2C, not ISA variety.
909 * OTHERWISE DON'T CALL THIS
910 */
911 static int
912 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
913 struct i2c_client *new_client)
914 {
915 int i, val1 = 0, id;
916 int err;
917 const char *client_name = "";
918 struct w83781d_data *data = i2c_get_clientdata(new_client);
919
920 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
921 if (!(data->lm75[0])) {
922 err = -ENOMEM;
923 goto ERROR_SC_0;
924 }
925 memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
926
927 id = i2c_adapter_id(adapter);
928
929 if (force_subclients[0] == id && force_subclients[1] == address) {
930 for (i = 2; i <= 3; i++) {
931 if (force_subclients[i] < 0x48 ||
932 force_subclients[i] > 0x4f) {
933 dev_err(&new_client->dev, "Invalid subclient "
934 "address %d; must be 0x48-0x4f\n",
935 force_subclients[i]);
936 err = -EINVAL;
937 goto ERROR_SC_1;
938 }
939 }
940 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
941 (force_subclients[2] & 0x07) |
942 ((force_subclients[3] & 0x07) << 4));
943 data->lm75[0]->addr = force_subclients[2];
944 } else {
945 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
946 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
947 }
948
949 if (kind != w83783s) {
950
951 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
952 if (!(data->lm75[1])) {
953 err = -ENOMEM;
954 goto ERROR_SC_1;
955 }
956 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
957
958 if (force_subclients[0] == id &&
959 force_subclients[1] == address) {
960 data->lm75[1]->addr = force_subclients[3];
961 } else {
962 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
963 }
964 if (data->lm75[0]->addr == data->lm75[1]->addr) {
965 dev_err(&new_client->dev,
966 "Duplicate addresses 0x%x for subclients.\n",
967 data->lm75[0]->addr);
968 err = -EBUSY;
969 goto ERROR_SC_2;
970 }
971 }
972
973 if (kind == w83781d)
974 client_name = "w83781d subclient";
975 else if (kind == w83782d)
976 client_name = "w83782d subclient";
977 else if (kind == w83783s)
978 client_name = "w83783s subclient";
979 else if (kind == w83627hf)
980 client_name = "w83627hf subclient";
981 else if (kind == as99127f)
982 client_name = "as99127f subclient";
983
984 for (i = 0; i <= 1; i++) {
985 /* store all data in w83781d */
986 i2c_set_clientdata(data->lm75[i], NULL);
987 data->lm75[i]->adapter = adapter;
988 data->lm75[i]->driver = &w83781d_driver;
989 data->lm75[i]->flags = 0;
990 strlcpy(data->lm75[i]->name, client_name,
991 I2C_NAME_SIZE);
992 if ((err = i2c_attach_client(data->lm75[i]))) {
993 dev_err(&new_client->dev, "Subclient %d "
994 "registration at address 0x%x "
995 "failed.\n", i, data->lm75[i]->addr);
996 if (i == 1)
997 goto ERROR_SC_3;
998 goto ERROR_SC_2;
999 }
1000 if (kind == w83783s)
1001 break;
1002 }
1003
1004 return 0;
1005
1006 /* Undo inits in case of errors */
1007 ERROR_SC_3:
1008 i2c_detach_client(data->lm75[0]);
1009 ERROR_SC_2:
1010 if (NULL != data->lm75[1])
1011 kfree(data->lm75[1]);
1012 ERROR_SC_1:
1013 if (NULL != data->lm75[0])
1014 kfree(data->lm75[0]);
1015 ERROR_SC_0:
1016 return err;
1017 }
1018
1019 static int
1020 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1021 {
1022 int i = 0, val1 = 0, val2;
1023 struct i2c_client *new_client;
1024 struct w83781d_data *data;
1025 int err;
1026 const char *client_name = "";
1027 int is_isa = i2c_is_isa_adapter(adapter);
1028 enum vendor { winbond, asus } vendid;
1029
1030 if (!is_isa
1031 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1032 err = -EINVAL;
1033 goto ERROR0;
1034 }
1035
1036 /* Prevent users from forcing a kind for a bus it isn't supposed
1037 to possibly be on */
1038 if (is_isa && (kind == as99127f || kind == w83783s)) {
1039 dev_err(&adapter->dev,
1040 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1041 address);
1042 err = -EINVAL;
1043 goto ERROR0;
1044 }
1045 if (!is_isa && kind == w83697hf) {
1046 dev_err(&adapter->dev,
1047 "Cannot force ISA-only chip for I2C address 0x%02x.\n",
1048 address);
1049 err = -EINVAL;
1050 goto ERROR0;
1051 }
1052
1053 if (is_isa)
1054 if (!request_region(address, W83781D_EXTENT,
1055 w83781d_driver.name)) {
1056 dev_dbg(&adapter->dev, "Request of region "
1057 "0x%x-0x%x for w83781d failed\n", address,
1058 address + W83781D_EXTENT - 1);
1059 err = -EBUSY;
1060 goto ERROR0;
1061 }
1062
1063 /* Probe whether there is anything available on this address. Already
1064 done for SMBus clients */
1065 if (kind < 0) {
1066 if (is_isa) {
1067
1068 #define REALLY_SLOW_IO
1069 /* We need the timeouts for at least some LM78-like
1070 chips. But only if we read 'undefined' registers. */
1071 i = inb_p(address + 1);
1072 if (inb_p(address + 2) != i
1073 || inb_p(address + 3) != i
1074 || inb_p(address + 7) != i) {
1075 dev_dbg(&adapter->dev, "Detection of w83781d "
1076 "chip failed at step 1\n");
1077 err = -ENODEV;
1078 goto ERROR1;
1079 }
1080 #undef REALLY_SLOW_IO
1081
1082 /* Let's just hope nothing breaks here */
1083 i = inb_p(address + 5) & 0x7f;
1084 outb_p(~i & 0x7f, address + 5);
1085 val2 = inb_p(address + 5) & 0x7f;
1086 if (val2 != (~i & 0x7f)) {
1087 outb_p(i, address + 5);
1088 dev_dbg(&adapter->dev, "Detection of w83781d "
1089 "chip failed at step 2 (0x%x != "
1090 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1091 address + 5);
1092 err = -ENODEV;
1093 goto ERROR1;
1094 }
1095 }
1096 }
1097
1098 /* OK. For now, we presume we have a valid client. We now create the
1099 client structure, even though we cannot fill it completely yet.
1100 But it allows us to access w83781d_{read,write}_value. */
1101
1102 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1103 err = -ENOMEM;
1104 goto ERROR1;
1105 }
1106 memset(data, 0, sizeof(struct w83781d_data));
1107
1108 new_client = &data->client;
1109 i2c_set_clientdata(new_client, data);
1110 new_client->addr = address;
1111 init_MUTEX(&data->lock);
1112 new_client->adapter = adapter;
1113 new_client->driver = &w83781d_driver;
1114 new_client->flags = 0;
1115
1116 /* Now, we do the remaining detection. */
1117
1118 /* The w8378?d may be stuck in some other bank than bank 0. This may
1119 make reading other information impossible. Specify a force=... or
1120 force_*=... parameter, and the Winbond will be reset to the right
1121 bank. */
1122 if (kind < 0) {
1123 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1124 dev_dbg(&new_client->dev, "Detection failed at step "
1125 "3\n");
1126 err = -ENODEV;
1127 goto ERROR2;
1128 }
1129 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1130 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1131 /* Check for Winbond or Asus ID if in bank 0 */
1132 if ((!(val1 & 0x07)) &&
1133 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1134 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1135 dev_dbg(&new_client->dev, "Detection failed at step "
1136 "4\n");
1137 err = -ENODEV;
1138 goto ERROR2;
1139 }
1140 /* If Winbond SMBus, check address at 0x48.
1141 Asus doesn't support, except for as99127f rev.2 */
1142 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1143 ((val1 & 0x80) && (val2 == 0x5c)))) {
1144 if (w83781d_read_value
1145 (new_client, W83781D_REG_I2C_ADDR) != address) {
1146 dev_dbg(&new_client->dev, "Detection failed "
1147 "at step 5\n");
1148 err = -ENODEV;
1149 goto ERROR2;
1150 }
1151 }
1152 }
1153
1154 /* We have either had a force parameter, or we have already detected the
1155 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1156 w83781d_write_value(new_client, W83781D_REG_BANK,
1157 (w83781d_read_value(new_client,
1158 W83781D_REG_BANK) & 0x78) |
1159 0x80);
1160
1161 /* Determine the chip type. */
1162 if (kind <= 0) {
1163 /* get vendor ID */
1164 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1165 if (val2 == 0x5c)
1166 vendid = winbond;
1167 else if (val2 == 0x12)
1168 vendid = asus;
1169 else {
1170 dev_dbg(&new_client->dev, "Chip was made by neither "
1171 "Winbond nor Asus?\n");
1172 err = -ENODEV;
1173 goto ERROR2;
1174 }
1175
1176 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1177 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1178 kind = w83781d;
1179 else if (val1 == 0x30 && vendid == winbond)
1180 kind = w83782d;
1181 else if (val1 == 0x40 && vendid == winbond && !is_isa
1182 && address == 0x2d)
1183 kind = w83783s;
1184 else if ((val1 == 0x21 || val1 == 0x90) && vendid == winbond)
1185 kind = w83627hf;
1186 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1187 kind = as99127f;
1188 else if (val1 == 0x60 && vendid == winbond && is_isa)
1189 kind = w83697hf;
1190 else {
1191 if (kind == 0)
1192 dev_warn(&new_client->dev, "Ignoring 'force' "
1193 "parameter for unknown chip at "
1194 "adapter %d, address 0x%02x\n",
1195 i2c_adapter_id(adapter), address);
1196 err = -EINVAL;
1197 goto ERROR2;
1198 }
1199 }
1200
1201 if (kind == w83781d) {
1202 client_name = "w83781d";
1203 } else if (kind == w83782d) {
1204 client_name = "w83782d";
1205 } else if (kind == w83783s) {
1206 client_name = "w83783s";
1207 } else if (kind == w83627hf) {
1208 if (val1 == 0x90)
1209 client_name = "w83627thf";
1210 else
1211 client_name = "w83627hf";
1212 } else if (kind == as99127f) {
1213 client_name = "as99127f";
1214 } else if (kind == w83697hf) {
1215 client_name = "w83697hf";
1216 }
1217
1218 /* Fill in the remaining client fields and put into the global list */
1219 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1220 data->type = kind;
1221
1222 data->valid = 0;
1223 init_MUTEX(&data->update_lock);
1224
1225 /* Tell the I2C layer a new client has arrived */
1226 if ((err = i2c_attach_client(new_client)))
1227 goto ERROR2;
1228
1229 /* attach secondary i2c lm75-like clients */
1230 if (!is_isa) {
1231 if ((err = w83781d_detect_subclients(adapter, address,
1232 kind, new_client)))
1233 goto ERROR3;
1234 } else {
1235 data->lm75[0] = NULL;
1236 data->lm75[1] = NULL;
1237 }
1238
1239 /* Initialize the chip */
1240 w83781d_init_client(new_client);
1241
1242 /* A few vars need to be filled upon startup */
1243 for (i = 1; i <= 3; i++) {
1244 data->fan_min[i - 1] = w83781d_read_value(new_client,
1245 W83781D_REG_FAN_MIN(i));
1246 }
1247 if (kind != w83781d && kind != as99127f)
1248 for (i = 0; i < 4; i++)
1249 data->pwmenable[i] = 1;
1250
1251 /* Register sysfs hooks */
1252 device_create_file_in(new_client, 0);
1253 if (kind != w83783s && kind != w83697hf)
1254 device_create_file_in(new_client, 1);
1255 device_create_file_in(new_client, 2);
1256 device_create_file_in(new_client, 3);
1257 device_create_file_in(new_client, 4);
1258 device_create_file_in(new_client, 5);
1259 device_create_file_in(new_client, 6);
1260 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1261 device_create_file_in(new_client, 7);
1262 device_create_file_in(new_client, 8);
1263 }
1264
1265 device_create_file_fan(new_client, 1);
1266 device_create_file_fan(new_client, 2);
1267 if (kind != w83697hf)
1268 device_create_file_fan(new_client, 3);
1269
1270 device_create_file_temp(new_client, 1);
1271 device_create_file_temp(new_client, 2);
1272 if (kind != w83783s && kind != w83697hf)
1273 device_create_file_temp(new_client, 3);
1274
1275 if (kind != w83697hf)
1276 device_create_file_vid(new_client);
1277
1278 if (kind != w83697hf)
1279 device_create_file_vrm(new_client);
1280
1281 device_create_file_fan_div(new_client, 1);
1282 device_create_file_fan_div(new_client, 2);
1283 if (kind != w83697hf)
1284 device_create_file_fan_div(new_client, 3);
1285
1286 device_create_file_alarms(new_client);
1287
1288 device_create_file_beep(new_client);
1289
1290 if (kind != w83781d && kind != as99127f) {
1291 device_create_file_pwm(new_client, 1);
1292 device_create_file_pwm(new_client, 2);
1293 device_create_file_pwmenable(new_client, 2);
1294 }
1295 if (kind == w83782d && !is_isa) {
1296 device_create_file_pwm(new_client, 3);
1297 device_create_file_pwm(new_client, 4);
1298 }
1299
1300 if (kind != as99127f && kind != w83781d) {
1301 device_create_file_sensor(new_client, 1);
1302 device_create_file_sensor(new_client, 2);
1303 if (kind != w83783s && kind != w83697hf)
1304 device_create_file_sensor(new_client, 3);
1305 }
1306 #ifdef W83781D_RT
1307 if (kind == w83781d) {
1308 device_create_file_rt(new_client, 1);
1309 device_create_file_rt(new_client, 2);
1310 device_create_file_rt(new_client, 3);
1311 }
1312 #endif
1313
1314 return 0;
1315
1316 ERROR3:
1317 i2c_detach_client(new_client);
1318 ERROR2:
1319 kfree(data);
1320 ERROR1:
1321 if (is_isa)
1322 release_region(address, W83781D_EXTENT);
1323 ERROR0:
1324 return err;
1325 }
1326
1327 static int
1328 w83781d_detach_client(struct i2c_client *client)
1329 {
1330 int err;
1331
1332 if (i2c_is_isa_client(client))
1333 release_region(client->addr, W83781D_EXTENT);
1334
1335 if ((err = i2c_detach_client(client))) {
1336 dev_err(&client->dev,
1337 "Client deregistration failed, client not detached.\n");
1338 return err;
1339 }
1340
1341 if (i2c_get_clientdata(client)==NULL) {
1342 /* subclients */
1343 kfree(client);
1344 } else {
1345 /* main client */
1346 kfree(i2c_get_clientdata(client));
1347 }
1348
1349 return 0;
1350 }
1351
1352 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1353 bank switches. ISA access must always be locked explicitly!
1354 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1355 would slow down the W83781D access and should not be necessary.
1356 There are some ugly typecasts here, but the good news is - they should
1357 nowhere else be necessary! */
1358 static int
1359 w83781d_read_value(struct i2c_client *client, u16 reg)
1360 {
1361 struct w83781d_data *data = i2c_get_clientdata(client);
1362 int res, word_sized, bank;
1363 struct i2c_client *cl;
1364
1365 down(&data->lock);
1366 if (i2c_is_isa_client(client)) {
1367 word_sized = (((reg & 0xff00) == 0x100)
1368 || ((reg & 0xff00) == 0x200))
1369 && (((reg & 0x00ff) == 0x50)
1370 || ((reg & 0x00ff) == 0x53)
1371 || ((reg & 0x00ff) == 0x55));
1372 if (reg & 0xff00) {
1373 outb_p(W83781D_REG_BANK,
1374 client->addr + W83781D_ADDR_REG_OFFSET);
1375 outb_p(reg >> 8,
1376 client->addr + W83781D_DATA_REG_OFFSET);
1377 }
1378 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1379 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1380 if (word_sized) {
1381 outb_p((reg & 0xff) + 1,
1382 client->addr + W83781D_ADDR_REG_OFFSET);
1383 res =
1384 (res << 8) + inb_p(client->addr +
1385 W83781D_DATA_REG_OFFSET);
1386 }
1387 if (reg & 0xff00) {
1388 outb_p(W83781D_REG_BANK,
1389 client->addr + W83781D_ADDR_REG_OFFSET);
1390 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1391 }
1392 } else {
1393 bank = (reg >> 8) & 0x0f;
1394 if (bank > 2)
1395 /* switch banks */
1396 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1397 bank);
1398 if (bank == 0 || bank > 2) {
1399 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1400 } else {
1401 /* switch to subclient */
1402 cl = data->lm75[bank - 1];
1403 /* convert from ISA to LM75 I2C addresses */
1404 switch (reg & 0xff) {
1405 case 0x50: /* TEMP */
1406 res = swab16(i2c_smbus_read_word_data(cl, 0));
1407 break;
1408 case 0x52: /* CONFIG */
1409 res = i2c_smbus_read_byte_data(cl, 1);
1410 break;
1411 case 0x53: /* HYST */
1412 res = swab16(i2c_smbus_read_word_data(cl, 2));
1413 break;
1414 case 0x55: /* OVER */
1415 default:
1416 res = swab16(i2c_smbus_read_word_data(cl, 3));
1417 break;
1418 }
1419 }
1420 if (bank > 2)
1421 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1422 }
1423 up(&data->lock);
1424 return res;
1425 }
1426
1427 static int
1428 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1429 {
1430 struct w83781d_data *data = i2c_get_clientdata(client);
1431 int word_sized, bank;
1432 struct i2c_client *cl;
1433
1434 down(&data->lock);
1435 if (i2c_is_isa_client(client)) {
1436 word_sized = (((reg & 0xff00) == 0x100)
1437 || ((reg & 0xff00) == 0x200))
1438 && (((reg & 0x00ff) == 0x53)
1439 || ((reg & 0x00ff) == 0x55));
1440 if (reg & 0xff00) {
1441 outb_p(W83781D_REG_BANK,
1442 client->addr + W83781D_ADDR_REG_OFFSET);
1443 outb_p(reg >> 8,
1444 client->addr + W83781D_DATA_REG_OFFSET);
1445 }
1446 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1447 if (word_sized) {
1448 outb_p(value >> 8,
1449 client->addr + W83781D_DATA_REG_OFFSET);
1450 outb_p((reg & 0xff) + 1,
1451 client->addr + W83781D_ADDR_REG_OFFSET);
1452 }
1453 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1454 if (reg & 0xff00) {
1455 outb_p(W83781D_REG_BANK,
1456 client->addr + W83781D_ADDR_REG_OFFSET);
1457 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1458 }
1459 } else {
1460 bank = (reg >> 8) & 0x0f;
1461 if (bank > 2)
1462 /* switch banks */
1463 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1464 bank);
1465 if (bank == 0 || bank > 2) {
1466 i2c_smbus_write_byte_data(client, reg & 0xff,
1467 value & 0xff);
1468 } else {
1469 /* switch to subclient */
1470 cl = data->lm75[bank - 1];
1471 /* convert from ISA to LM75 I2C addresses */
1472 switch (reg & 0xff) {
1473 case 0x52: /* CONFIG */
1474 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1475 break;
1476 case 0x53: /* HYST */
1477 i2c_smbus_write_word_data(cl, 2, swab16(value));
1478 break;
1479 case 0x55: /* OVER */
1480 i2c_smbus_write_word_data(cl, 3, swab16(value));
1481 break;
1482 }
1483 }
1484 if (bank > 2)
1485 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1486 }
1487 up(&data->lock);
1488 return 0;
1489 }
1490
1491 /* Called when we have found a new W83781D. It should set limits, etc. */
1492 static void
1493 w83781d_init_client(struct i2c_client *client)
1494 {
1495 struct w83781d_data *data = i2c_get_clientdata(client);
1496 int i, p;
1497 int type = data->type;
1498 u8 tmp;
1499
1500 if (init && type != as99127f) { /* this resets registers we don't have
1501 documentation for on the as99127f */
1502 /* save these registers */
1503 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1504 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1505 /* Reset all except Watchdog values and last conversion values
1506 This sets fan-divs to 2, among others */
1507 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1508 /* Restore the registers and disable power-on abnormal beep.
1509 This saves FAN 1/2/3 input/output values set by BIOS. */
1510 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1511 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1512 /* Disable master beep-enable (reset turns it on).
1513 Individual beep_mask should be reset to off but for some reason
1514 disabling this bit helps some people not get beeped */
1515 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1516 }
1517
1518 data->vrm = i2c_which_vrm();
1519
1520 if ((type != w83781d) && (type != as99127f)) {
1521 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1522 for (i = 1; i <= 3; i++) {
1523 if (!(tmp & BIT_SCFG1[i - 1])) {
1524 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1525 } else {
1526 if (w83781d_read_value
1527 (client,
1528 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1529 data->sens[i - 1] = 1;
1530 else
1531 data->sens[i - 1] = 2;
1532 }
1533 if ((type == w83783s || type == w83697hf) && (i == 2))
1534 break;
1535 }
1536 }
1537 #ifdef W83781D_RT
1538 /*
1539 Fill up the RT Tables.
1540 We assume that they are 32 bytes long, in order for temp 1-3.
1541 Data sheet documentation is sparse.
1542 We also assume that it is only for the 781D although I suspect
1543 that the others support it as well....
1544 */
1545
1546 if (init && type == w83781d) {
1547 u16 k = 0;
1548 /*
1549 Auto-indexing doesn't seem to work...
1550 w83781d_write_value(client,W83781D_REG_RT_IDX,0);
1551 */
1552 for (i = 0; i < 3; i++) {
1553 int j;
1554 for (j = 0; j < 32; j++) {
1555 w83781d_write_value(client,
1556 W83781D_REG_RT_IDX, k++);
1557 data->rt[i][j] =
1558 w83781d_read_value(client,
1559 W83781D_REG_RT_VAL);
1560 }
1561 }
1562 }
1563 #endif /* W83781D_RT */
1564
1565 if (init) {
1566 if (type != w83783s && type != w83697hf) {
1567 w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
1568 0x00);
1569 }
1570 if (type != w83781d) {
1571 /* enable comparator mode for temp2 and temp3 so
1572 alarm indication will work correctly */
1573 i = w83781d_read_value(client, W83781D_REG_IRQ);
1574 if (!(i & 0x40))
1575 w83781d_write_value(client, W83781D_REG_IRQ,
1576 i | 0x40);
1577 }
1578 }
1579
1580 /* Start monitoring */
1581 w83781d_write_value(client, W83781D_REG_CONFIG,
1582 (w83781d_read_value(client,
1583 W83781D_REG_CONFIG) & 0xf7)
1584 | 0x01);
1585 }
1586
1587 static struct w83781d_data *w83781d_update_device(struct device *dev)
1588 {
1589 struct i2c_client *client = to_i2c_client(dev);
1590 struct w83781d_data *data = i2c_get_clientdata(client);
1591 int i;
1592
1593 down(&data->update_lock);
1594
1595 if (time_after
1596 (jiffies - data->last_updated, (unsigned long) (HZ + HZ / 2))
1597 || time_before(jiffies, data->last_updated) || !data->valid) {
1598 dev_dbg(dev, "Starting device update\n");
1599
1600 for (i = 0; i <= 8; i++) {
1601 if ((data->type == w83783s || data->type == w83697hf)
1602 && (i == 1))
1603 continue; /* 783S has no in1 */
1604 data->in[i] =
1605 w83781d_read_value(client, W83781D_REG_IN(i));
1606 data->in_min[i] =
1607 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1608 data->in_max[i] =
1609 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1610 if ((data->type != w83782d) && (data->type != w83697hf)
1611 && (data->type != w83627hf) && (i == 6))
1612 break;
1613 }
1614 for (i = 1; i <= 3; i++) {
1615 data->fan[i - 1] =
1616 w83781d_read_value(client, W83781D_REG_FAN(i));
1617 data->fan_min[i - 1] =
1618 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1619 }
1620 if (data->type != w83781d && data->type != as99127f) {
1621 for (i = 1; i <= 4; i++) {
1622 data->pwm[i - 1] =
1623 w83781d_read_value(client,
1624 W83781D_REG_PWM(i));
1625 if ((data->type != w83782d
1626 || i2c_is_isa_client(client))
1627 && i == 2)
1628 break;
1629 }
1630 /* Only PWM2 can be disabled */
1631 data->pwmenable[1] = (w83781d_read_value(client,
1632 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1633 }
1634
1635 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1636 data->temp_max =
1637 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1638 data->temp_max_hyst =
1639 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1640 data->temp_add[0] =
1641 w83781d_read_value(client, W83781D_REG_TEMP(2));
1642 data->temp_max_add[0] =
1643 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1644 data->temp_max_hyst_add[0] =
1645 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1646 if (data->type != w83783s && data->type != w83697hf) {
1647 data->temp_add[1] =
1648 w83781d_read_value(client, W83781D_REG_TEMP(3));
1649 data->temp_max_add[1] =
1650 w83781d_read_value(client,
1651 W83781D_REG_TEMP_OVER(3));
1652 data->temp_max_hyst_add[1] =
1653 w83781d_read_value(client,
1654 W83781D_REG_TEMP_HYST(3));
1655 }
1656 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1657 if (data->type != w83697hf) {
1658 data->vid = i & 0x0f;
1659 data->vid |=
1660 (w83781d_read_value(client, W83781D_REG_CHIPID) &
1661 0x01)
1662 << 4;
1663 }
1664 data->fan_div[0] = (i >> 4) & 0x03;
1665 data->fan_div[1] = (i >> 6) & 0x03;
1666 if (data->type != w83697hf) {
1667 data->fan_div[2] = (w83781d_read_value(client,
1668 W83781D_REG_PIN)
1669 >> 6) & 0x03;
1670 }
1671 if ((data->type != w83781d) && (data->type != as99127f)) {
1672 i = w83781d_read_value(client, W83781D_REG_VBAT);
1673 data->fan_div[0] |= (i >> 3) & 0x04;
1674 data->fan_div[1] |= (i >> 4) & 0x04;
1675 if (data->type != w83697hf)
1676 data->fan_div[2] |= (i >> 5) & 0x04;
1677 }
1678 data->alarms =
1679 w83781d_read_value(client,
1680 W83781D_REG_ALARM1) +
1681 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1682 if ((data->type == w83782d) || (data->type == w83627hf)) {
1683 data->alarms |=
1684 w83781d_read_value(client,
1685 W83781D_REG_ALARM3) << 16;
1686 }
1687 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1688 data->beep_enable = i >> 7;
1689 data->beep_mask = ((i & 0x7f) << 8) +
1690 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1691 if ((data->type != w83781d) && (data->type != as99127f)) {
1692 data->beep_mask |=
1693 w83781d_read_value(client,
1694 W83781D_REG_BEEP_INTS3) << 16;
1695 }
1696 data->last_updated = jiffies;
1697 data->valid = 1;
1698 }
1699
1700 up(&data->update_lock);
1701
1702 return data;
1703 }
1704
1705 static int __init
1706 sensors_w83781d_init(void)
1707 {
1708 return i2c_add_driver(&w83781d_driver);
1709 }
1710
1711 static void __exit
1712 sensors_w83781d_exit(void)
1713 {
1714 i2c_del_driver(&w83781d_driver);
1715 }
1716
1717 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1718 "Philip Edelbrock <phil@netroedge.com>, "
1719 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1720 MODULE_DESCRIPTION("W83781D driver");
1721 MODULE_LICENSE("GPL");
1722
1723 module_init(sensors_w83781d_init);
1724 module_exit(sensors_w83781d_exit);
1725
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