1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 /*
25 Supports following chips:
26
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
29 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
30 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
31 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
32
33 For other winbond chips, and for i2c support in the above chips,
34 use w83781d.c.
35
36 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
37 supported yet.
38 */
39
40 #include <linux/module.h>
41 #include <linux/init.h>
42 #include <linux/slab.h>
43 #include <linux/i2c.h>
44 #include <linux/i2c-sensor.h>
45 #include <linux/i2c-vid.h>
46 #include <asm/io.h>
47 #include "lm75.h"
48
49 static u16 force_addr;
50 module_param(force_addr, ushort, 0);
51 MODULE_PARM_DESC(force_addr,
52 "Initialize the base address of the sensors");
53 static u8 force_i2c = 0x1f;
54 module_param(force_i2c, byte, 0);
55 MODULE_PARM_DESC(force_i2c,
56 "Initialize the i2c address of the sensors");
57
58 /* Addresses to scan */
59 static unsigned short normal_i2c[] = { I2C_CLIENT_END };
60 static unsigned int normal_isa[] = { 0, I2C_CLIENT_ISA_END };
61
62 /* Insmod parameters */
63 SENSORS_INSMOD_4(w83627hf, w83627thf, w83697hf, w83637hf);
64
65 static int init = 1;
66 module_param(init, bool, 0);
67 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
68
69 /* modified from kernel/include/traps.c */
70 static int REG; /* The register to read/write */
71 #define DEV 0x07 /* Register: Logical device select */
72 static int VAL; /* The value to read/write */
73
74 /* logical device numbers for superio_select (below) */
75 #define W83627HF_LD_FDC 0x00
76 #define W83627HF_LD_PRT 0x01
77 #define W83627HF_LD_UART1 0x02
78 #define W83627HF_LD_UART2 0x03
79 #define W83627HF_LD_KBC 0x05
80 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
81 #define W83627HF_LD_GAME 0x07
82 #define W83627HF_LD_MIDI 0x07
83 #define W83627HF_LD_GPIO1 0x07
84 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
85 #define W83627HF_LD_GPIO2 0x08
86 #define W83627HF_LD_GPIO3 0x09
87 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
88 #define W83627HF_LD_ACPI 0x0a
89 #define W83627HF_LD_HWM 0x0b
90
91 #define DEVID 0x20 /* Register: Device ID */
92
93 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
94 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
95 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
96
97 static inline void
98 superio_outb(int reg, int val)
99 {
100 outb(reg, REG);
101 outb(val, VAL);
102 }
103
104 static inline int
105 superio_inb(int reg)
106 {
107 outb(reg, REG);
108 return inb(VAL);
109 }
110
111 static inline void
112 superio_select(int ld)
113 {
114 outb(DEV, REG);
115 outb(ld, VAL);
116 }
117
118 static inline void
119 superio_enter(void)
120 {
121 outb(0x87, REG);
122 outb(0x87, REG);
123 }
124
125 static inline void
126 superio_exit(void)
127 {
128 outb(0xAA, REG);
129 }
130
131 #define W627_DEVID 0x52
132 #define W627THF_DEVID 0x82
133 #define W697_DEVID 0x60
134 #define W637_DEVID 0x70
135 #define WINB_ACT_REG 0x30
136 #define WINB_BASE_REG 0x60
137 /* Constants specified below */
138
139 /* Length of ISA address segment */
140 #define WINB_EXTENT 8
141
142 /* Where are the ISA address/data registers relative to the base address */
143 #define W83781D_ADDR_REG_OFFSET 5
144 #define W83781D_DATA_REG_OFFSET 6
145
146 /* The W83781D registers */
147 /* The W83782D registers for nr=7,8 are in bank 5 */
148 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
149 (0x554 + (((nr) - 7) * 2)))
150 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
151 (0x555 + (((nr) - 7) * 2)))
152 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
153 (0x550 + (nr) - 7))
154
155 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
156 #define W83781D_REG_FAN(nr) (0x27 + (nr))
157
158 #define W83781D_REG_TEMP2_CONFIG 0x152
159 #define W83781D_REG_TEMP3_CONFIG 0x252
160 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
161 ((nr == 2) ? (0x0150) : \
162 (0x27)))
163 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
164 ((nr == 2) ? (0x153) : \
165 (0x3A)))
166 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
167 ((nr == 2) ? (0x155) : \
168 (0x39)))
169
170 #define W83781D_REG_BANK 0x4E
171
172 #define W83781D_REG_CONFIG 0x40
173 #define W83781D_REG_ALARM1 0x41
174 #define W83781D_REG_ALARM2 0x42
175 #define W83781D_REG_ALARM3 0x450
176
177 #define W83781D_REG_IRQ 0x4C
178 #define W83781D_REG_BEEP_CONFIG 0x4D
179 #define W83781D_REG_BEEP_INTS1 0x56
180 #define W83781D_REG_BEEP_INTS2 0x57
181 #define W83781D_REG_BEEP_INTS3 0x453
182
183 #define W83781D_REG_VID_FANDIV 0x47
184
185 #define W83781D_REG_CHIPID 0x49
186 #define W83781D_REG_WCHIPID 0x58
187 #define W83781D_REG_CHIPMAN 0x4F
188 #define W83781D_REG_PIN 0x4B
189
190 #define W83781D_REG_VBAT 0x5D
191
192 #define W83627HF_REG_PWM1 0x5A
193 #define W83627HF_REG_PWM2 0x5B
194 #define W83627HF_REG_PWMCLK12 0x5C
195
196 #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
197 #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
198 #define W83627THF_REG_PWM3 0x11 /* 637HF too */
199
200 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
201
202 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
203 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
204 W83627THF_REG_PWM3 };
205 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
206 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
207
208 #define W83781D_REG_I2C_ADDR 0x48
209 #define W83781D_REG_I2C_SUBADDR 0x4A
210
211 /* Sensor selection */
212 #define W83781D_REG_SCFG1 0x5D
213 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
214 #define W83781D_REG_SCFG2 0x59
215 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
216 #define W83781D_DEFAULT_BETA 3435
217
218 /* Conversions. Limit checking is only done on the TO_REG
219 variants. Note that you should be a bit careful with which arguments
220 these macros are called: arguments may be evaluated more than once.
221 Fixing this is just not worth it. */
222 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
223 #define IN_FROM_REG(val) ((val) * 16)
224
225 static inline u8 FAN_TO_REG(long rpm, int div)
226 {
227 if (rpm == 0)
228 return 255;
229 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
230 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
231 254);
232 }
233
234 #define TEMP_MIN (-128000)
235 #define TEMP_MAX ( 127000)
236
237 /* TEMP: 0.001C/bit (-128C to +127C)
238 REG: 1C/bit, two's complement */
239 static u8 TEMP_TO_REG(int temp)
240 {
241 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
242 ntemp += (ntemp<0 ? -500 : 500);
243 return (u8)(ntemp / 1000);
244 }
245
246 static int TEMP_FROM_REG(u8 reg)
247 {
248 return (s8)reg * 1000;
249 }
250
251 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
252
253 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
254
255 #define BEEP_MASK_FROM_REG(val) (val)
256 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
257 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
258 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
259
260 #define DIV_FROM_REG(val) (1 << (val))
261
262 static inline u8 DIV_TO_REG(long val)
263 {
264 int i;
265 val = SENSORS_LIMIT(val, 1, 128) >> 1;
266 for (i = 0; i < 6; i++) {
267 if (val == 0)
268 break;
269 val >>= 1;
270 }
271 return ((u8) i);
272 }
273
274 /* For each registered chip, we need to keep some data in memory. That
275 data is pointed to by w83627hf_list[NR]->data. The structure itself is
276 dynamically allocated, at the same time when a new client is allocated. */
277 struct w83627hf_data {
278 struct i2c_client client;
279 struct semaphore lock;
280 enum chips type;
281
282 struct semaphore update_lock;
283 char valid; /* !=0 if following fields are valid */
284 unsigned long last_updated; /* In jiffies */
285
286 struct i2c_client *lm75; /* for secondary I2C addresses */
287 /* pointer to array of 2 subclients */
288
289 u8 in[9]; /* Register value */
290 u8 in_max[9]; /* Register value */
291 u8 in_min[9]; /* Register value */
292 u8 fan[3]; /* Register value */
293 u8 fan_min[3]; /* Register value */
294 u8 temp;
295 u8 temp_max; /* Register value */
296 u8 temp_max_hyst; /* Register value */
297 u16 temp_add[2]; /* Register value */
298 u16 temp_max_add[2]; /* Register value */
299 u16 temp_max_hyst_add[2]; /* Register value */
300 u8 fan_div[3]; /* Register encoding, shifted right */
301 u8 vid; /* Register encoding, combined */
302 u32 alarms; /* Register encoding, combined */
303 u32 beep_mask; /* Register encoding, combined */
304 u8 beep_enable; /* Boolean */
305 u8 pwm[3]; /* Register value */
306 u8 pwmenable[3]; /* bool */
307 u16 sens[3]; /* 782D/783S only.
308 1 = pentium diode; 2 = 3904 diode;
309 3000-5000 = thermistor beta.
310 Default = 3435.
311 Other Betas unimplemented */
312 u8 vrm;
313 u8 vrm_ovt; /* Register value, 627thf & 637hf only */
314 };
315
316
317 static int w83627hf_attach_adapter(struct i2c_adapter *adapter);
318 static int w83627hf_detect(struct i2c_adapter *adapter, int address,
319 int kind);
320 static int w83627hf_detach_client(struct i2c_client *client);
321
322 static int w83627hf_read_value(struct i2c_client *client, u16 register);
323 static int w83627hf_write_value(struct i2c_client *client, u16 register,
324 u16 value);
325 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
326 static void w83627hf_init_client(struct i2c_client *client);
327
328 static struct i2c_driver w83627hf_driver = {
329 .owner = THIS_MODULE,
330 .name = "w83627hf",
331 .id = I2C_DRIVERID_W83627HF,
332 .flags = I2C_DF_NOTIFY,
333 .attach_adapter = w83627hf_attach_adapter,
334 .detach_client = w83627hf_detach_client,
335 };
336
337 /* following are the sysfs callback functions */
338 #define show_in_reg(reg) \
339 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
340 { \
341 struct w83627hf_data *data = w83627hf_update_device(dev); \
342 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
343 }
344 show_in_reg(in)
345 show_in_reg(in_min)
346 show_in_reg(in_max)
347
348 #define store_in_reg(REG, reg) \
349 static ssize_t \
350 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
351 { \
352 struct i2c_client *client = to_i2c_client(dev); \
353 struct w83627hf_data *data = i2c_get_clientdata(client); \
354 u32 val; \
355 \
356 val = simple_strtoul(buf, NULL, 10); \
357 data->in_##reg[nr] = IN_TO_REG(val); \
358 w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
359 data->in_##reg[nr]); \
360 \
361 return count; \
362 }
363 store_in_reg(MIN, min)
364 store_in_reg(MAX, max)
365
366 #define sysfs_in_offset(offset) \
367 static ssize_t \
368 show_regs_in_##offset (struct device *dev, char *buf) \
369 { \
370 return show_in(dev, buf, offset); \
371 } \
372 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
373
374 #define sysfs_in_reg_offset(reg, offset) \
375 static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
376 { \
377 return show_in_##reg (dev, buf, offset); \
378 } \
379 static ssize_t \
380 store_regs_in_##reg##offset (struct device *dev, \
381 const char *buf, size_t count) \
382 { \
383 return store_in_##reg (dev, buf, count, offset); \
384 } \
385 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
386 show_regs_in_##reg##offset, store_regs_in_##reg##offset);
387
388 #define sysfs_in_offsets(offset) \
389 sysfs_in_offset(offset) \
390 sysfs_in_reg_offset(min, offset) \
391 sysfs_in_reg_offset(max, offset)
392
393 sysfs_in_offsets(1);
394 sysfs_in_offsets(2);
395 sysfs_in_offsets(3);
396 sysfs_in_offsets(4);
397 sysfs_in_offsets(5);
398 sysfs_in_offsets(6);
399 sysfs_in_offsets(7);
400 sysfs_in_offsets(8);
401
402 /* use a different set of functions for in0 */
403 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
404 {
405 long in0;
406
407 if ((data->vrm_ovt & 0x01) &&
408 (w83627thf == data->type || w83637hf == data->type))
409
410 /* use VRM9 calculation */
411 in0 = (long)((reg * 488 + 70000 + 50) / 100);
412 else
413 /* use VRM8 (standard) calculation */
414 in0 = (long)IN_FROM_REG(reg);
415
416 return sprintf(buf,"%ld\n", in0);
417 }
418
419 static ssize_t show_regs_in_0(struct device *dev, char *buf)
420 {
421 struct w83627hf_data *data = w83627hf_update_device(dev);
422 return show_in_0(data, buf, data->in[0]);
423 }
424
425 static ssize_t show_regs_in_min0(struct device *dev, char *buf)
426 {
427 struct w83627hf_data *data = w83627hf_update_device(dev);
428 return show_in_0(data, buf, data->in_min[0]);
429 }
430
431 static ssize_t show_regs_in_max0(struct device *dev, char *buf)
432 {
433 struct w83627hf_data *data = w83627hf_update_device(dev);
434 return show_in_0(data, buf, data->in_max[0]);
435 }
436
437 static ssize_t store_regs_in_min0(struct device *dev,
438 const char *buf, size_t count)
439 {
440 struct i2c_client *client = to_i2c_client(dev);
441 struct w83627hf_data *data = i2c_get_clientdata(client);
442 u32 val;
443
444 val = simple_strtoul(buf, NULL, 10);
445 if ((data->vrm_ovt & 0x01) &&
446 (w83627thf == data->type || w83637hf == data->type))
447
448 /* use VRM9 calculation */
449 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
450 else
451 /* use VRM8 (standard) calculation */
452 data->in_min[0] = IN_TO_REG(val);
453
454 w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
455 return count;
456 }
457
458 static ssize_t store_regs_in_max0(struct device *dev,
459 const char *buf, size_t count)
460 {
461 struct i2c_client *client = to_i2c_client(dev);
462 struct w83627hf_data *data = i2c_get_clientdata(client);
463 u32 val;
464
465 val = simple_strtoul(buf, NULL, 10);
466 if ((data->vrm_ovt & 0x01) &&
467 (w83627thf == data->type || w83637hf == data->type))
468
469 /* use VRM9 calculation */
470 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
471 else
472 /* use VRM8 (standard) calculation */
473 data->in_max[0] = IN_TO_REG(val);
474
475 w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
476 return count;
477 }
478
479 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
480 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
481 show_regs_in_min0, store_regs_in_min0);
482 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
483 show_regs_in_max0, store_regs_in_max0);
484
485 #define device_create_file_in(client, offset) \
486 do { \
487 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
488 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
489 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
490 } while (0)
491
492 #define show_fan_reg(reg) \
493 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
494 { \
495 struct w83627hf_data *data = w83627hf_update_device(dev); \
496 return sprintf(buf,"%ld\n", \
497 FAN_FROM_REG(data->reg[nr-1], \
498 (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
499 }
500 show_fan_reg(fan);
501 show_fan_reg(fan_min);
502
503 static ssize_t
504 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
505 {
506 struct i2c_client *client = to_i2c_client(dev);
507 struct w83627hf_data *data = i2c_get_clientdata(client);
508 u32 val;
509
510 val = simple_strtoul(buf, NULL, 10);
511 data->fan_min[nr - 1] =
512 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
513 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
514 data->fan_min[nr - 1]);
515
516 return count;
517 }
518
519 #define sysfs_fan_offset(offset) \
520 static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
521 { \
522 return show_fan(dev, buf, offset); \
523 } \
524 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
525
526 #define sysfs_fan_min_offset(offset) \
527 static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
528 { \
529 return show_fan_min(dev, buf, offset); \
530 } \
531 static ssize_t \
532 store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
533 { \
534 return store_fan_min(dev, buf, count, offset); \
535 } \
536 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
537 show_regs_fan_min##offset, store_regs_fan_min##offset);
538
539 sysfs_fan_offset(1);
540 sysfs_fan_min_offset(1);
541 sysfs_fan_offset(2);
542 sysfs_fan_min_offset(2);
543 sysfs_fan_offset(3);
544 sysfs_fan_min_offset(3);
545
546 #define device_create_file_fan(client, offset) \
547 do { \
548 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
549 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
550 } while (0)
551
552 #define show_temp_reg(reg) \
553 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
554 { \
555 struct w83627hf_data *data = w83627hf_update_device(dev); \
556 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
557 return sprintf(buf,"%ld\n", \
558 (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
559 } else { /* TEMP1 */ \
560 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
561 } \
562 }
563 show_temp_reg(temp);
564 show_temp_reg(temp_max);
565 show_temp_reg(temp_max_hyst);
566
567 #define store_temp_reg(REG, reg) \
568 static ssize_t \
569 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
570 { \
571 struct i2c_client *client = to_i2c_client(dev); \
572 struct w83627hf_data *data = i2c_get_clientdata(client); \
573 u32 val; \
574 \
575 val = simple_strtoul(buf, NULL, 10); \
576 \
577 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
578 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
579 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
580 data->temp_##reg##_add[nr-2]); \
581 } else { /* TEMP1 */ \
582 data->temp_##reg = TEMP_TO_REG(val); \
583 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
584 data->temp_##reg); \
585 } \
586 \
587 return count; \
588 }
589 store_temp_reg(OVER, max);
590 store_temp_reg(HYST, max_hyst);
591
592 #define sysfs_temp_offset(offset) \
593 static ssize_t \
594 show_regs_temp_##offset (struct device *dev, char *buf) \
595 { \
596 return show_temp(dev, buf, offset); \
597 } \
598 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
599
600 #define sysfs_temp_reg_offset(reg, offset) \
601 static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
602 { \
603 return show_temp_##reg (dev, buf, offset); \
604 } \
605 static ssize_t \
606 store_regs_temp_##reg##offset (struct device *dev, \
607 const char *buf, size_t count) \
608 { \
609 return store_temp_##reg (dev, buf, count, offset); \
610 } \
611 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
612 show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
613
614 #define sysfs_temp_offsets(offset) \
615 sysfs_temp_offset(offset) \
616 sysfs_temp_reg_offset(max, offset) \
617 sysfs_temp_reg_offset(max_hyst, offset)
618
619 sysfs_temp_offsets(1);
620 sysfs_temp_offsets(2);
621 sysfs_temp_offsets(3);
622
623 #define device_create_file_temp(client, offset) \
624 do { \
625 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
626 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
627 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
628 } while (0)
629
630 static ssize_t
631 show_vid_reg(struct device *dev, char *buf)
632 {
633 struct w83627hf_data *data = w83627hf_update_device(dev);
634 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
635 }
636 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
637 #define device_create_file_vid(client) \
638 device_create_file(&client->dev, &dev_attr_cpu0_vid)
639
640 static ssize_t
641 show_vrm_reg(struct device *dev, char *buf)
642 {
643 struct w83627hf_data *data = w83627hf_update_device(dev);
644 return sprintf(buf, "%ld\n", (long) data->vrm);
645 }
646 static ssize_t
647 store_vrm_reg(struct device *dev, const char *buf, size_t count)
648 {
649 struct i2c_client *client = to_i2c_client(dev);
650 struct w83627hf_data *data = i2c_get_clientdata(client);
651 u32 val;
652
653 val = simple_strtoul(buf, NULL, 10);
654 data->vrm = val;
655
656 return count;
657 }
658 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
659 #define device_create_file_vrm(client) \
660 device_create_file(&client->dev, &dev_attr_vrm)
661
662 static ssize_t
663 show_alarms_reg(struct device *dev, char *buf)
664 {
665 struct w83627hf_data *data = w83627hf_update_device(dev);
666 return sprintf(buf, "%ld\n", (long) data->alarms);
667 }
668 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
669 #define device_create_file_alarms(client) \
670 device_create_file(&client->dev, &dev_attr_alarms)
671
672 #define show_beep_reg(REG, reg) \
673 static ssize_t show_beep_##reg (struct device *dev, char *buf) \
674 { \
675 struct w83627hf_data *data = w83627hf_update_device(dev); \
676 return sprintf(buf,"%ld\n", \
677 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
678 }
679 show_beep_reg(ENABLE, enable)
680 show_beep_reg(MASK, mask)
681
682 #define BEEP_ENABLE 0 /* Store beep_enable */
683 #define BEEP_MASK 1 /* Store beep_mask */
684
685 static ssize_t
686 store_beep_reg(struct device *dev, const char *buf, size_t count,
687 int update_mask)
688 {
689 struct i2c_client *client = to_i2c_client(dev);
690 struct w83627hf_data *data = i2c_get_clientdata(client);
691 u32 val, val2;
692
693 val = simple_strtoul(buf, NULL, 10);
694
695 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
696 data->beep_mask = BEEP_MASK_TO_REG(val);
697 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
698 data->beep_mask & 0xff);
699 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
700 ((data->beep_mask) >> 16) & 0xff);
701 val2 = (data->beep_mask >> 8) & 0x7f;
702 } else { /* We are storing beep_enable */
703 val2 =
704 w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
705 data->beep_enable = BEEP_ENABLE_TO_REG(val);
706 }
707
708 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
709 val2 | data->beep_enable << 7);
710
711 return count;
712 }
713
714 #define sysfs_beep(REG, reg) \
715 static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
716 { \
717 return show_beep_##reg(dev, buf); \
718 } \
719 static ssize_t \
720 store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
721 { \
722 return store_beep_reg(dev, buf, count, BEEP_##REG); \
723 } \
724 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
725 show_regs_beep_##reg, store_regs_beep_##reg);
726
727 sysfs_beep(ENABLE, enable);
728 sysfs_beep(MASK, mask);
729
730 #define device_create_file_beep(client) \
731 do { \
732 device_create_file(&client->dev, &dev_attr_beep_enable); \
733 device_create_file(&client->dev, &dev_attr_beep_mask); \
734 } while (0)
735
736 static ssize_t
737 show_fan_div_reg(struct device *dev, char *buf, int nr)
738 {
739 struct w83627hf_data *data = w83627hf_update_device(dev);
740 return sprintf(buf, "%ld\n",
741 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
742 }
743
744 /* Note: we save and restore the fan minimum here, because its value is
745 determined in part by the fan divisor. This follows the principle of
746 least suprise; the user doesn't expect the fan minimum to change just
747 because the divisor changed. */
748 static ssize_t
749 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
750 {
751 struct i2c_client *client = to_i2c_client(dev);
752 struct w83627hf_data *data = i2c_get_clientdata(client);
753 unsigned long min;
754 u8 reg;
755
756 /* Save fan_min */
757 min = FAN_FROM_REG(data->fan_min[nr],
758 DIV_FROM_REG(data->fan_div[nr]));
759
760 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
761
762 reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
763 & (nr==0 ? 0xcf : 0x3f))
764 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
765 w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
766
767 reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
768 & ~(1 << (5 + nr)))
769 | ((data->fan_div[nr] & 0x04) << (3 + nr));
770 w83627hf_write_value(client, W83781D_REG_VBAT, reg);
771
772 /* Restore fan_min */
773 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
774 w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
775
776 return count;
777 }
778
779 #define sysfs_fan_div(offset) \
780 static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
781 { \
782 return show_fan_div_reg(dev, buf, offset); \
783 } \
784 static ssize_t \
785 store_regs_fan_div_##offset (struct device *dev, \
786 const char *buf, size_t count) \
787 { \
788 return store_fan_div_reg(dev, buf, count, offset - 1); \
789 } \
790 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
791 show_regs_fan_div_##offset, store_regs_fan_div_##offset);
792
793 sysfs_fan_div(1);
794 sysfs_fan_div(2);
795 sysfs_fan_div(3);
796
797 #define device_create_file_fan_div(client, offset) \
798 do { \
799 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
800 } while (0)
801
802 static ssize_t
803 show_pwm_reg(struct device *dev, char *buf, int nr)
804 {
805 struct w83627hf_data *data = w83627hf_update_device(dev);
806 return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
807 }
808
809 static ssize_t
810 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
811 {
812 struct i2c_client *client = to_i2c_client(dev);
813 struct w83627hf_data *data = i2c_get_clientdata(client);
814 u32 val;
815
816 val = simple_strtoul(buf, NULL, 10);
817
818 if (data->type == w83627thf) {
819 /* bits 0-3 are reserved in 627THF */
820 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
821 w83627hf_write_value(client,
822 W836X7HF_REG_PWM(data->type, nr),
823 data->pwm[nr - 1] |
824 (w83627hf_read_value(client,
825 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
826 } else {
827 data->pwm[nr - 1] = PWM_TO_REG(val);
828 w83627hf_write_value(client,
829 W836X7HF_REG_PWM(data->type, nr),
830 data->pwm[nr - 1]);
831 }
832
833 return count;
834 }
835
836 #define sysfs_pwm(offset) \
837 static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
838 { \
839 return show_pwm_reg(dev, buf, offset); \
840 } \
841 static ssize_t \
842 store_regs_pwm_##offset (struct device *dev, const char *buf, size_t count) \
843 { \
844 return store_pwm_reg(dev, buf, count, offset); \
845 } \
846 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
847 show_regs_pwm_##offset, store_regs_pwm_##offset);
848
849 sysfs_pwm(1);
850 sysfs_pwm(2);
851 sysfs_pwm(3);
852
853 #define device_create_file_pwm(client, offset) \
854 do { \
855 device_create_file(&client->dev, &dev_attr_pwm##offset); \
856 } while (0)
857
858 static ssize_t
859 show_sensor_reg(struct device *dev, char *buf, int nr)
860 {
861 struct w83627hf_data *data = w83627hf_update_device(dev);
862 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
863 }
864
865 static ssize_t
866 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
867 {
868 struct i2c_client *client = to_i2c_client(dev);
869 struct w83627hf_data *data = i2c_get_clientdata(client);
870 u32 val, tmp;
871
872 val = simple_strtoul(buf, NULL, 10);
873
874 switch (val) {
875 case 1: /* PII/Celeron diode */
876 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
877 w83627hf_write_value(client, W83781D_REG_SCFG1,
878 tmp | BIT_SCFG1[nr - 1]);
879 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
880 w83627hf_write_value(client, W83781D_REG_SCFG2,
881 tmp | BIT_SCFG2[nr - 1]);
882 data->sens[nr - 1] = val;
883 break;
884 case 2: /* 3904 */
885 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
886 w83627hf_write_value(client, W83781D_REG_SCFG1,
887 tmp | BIT_SCFG1[nr - 1]);
888 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
889 w83627hf_write_value(client, W83781D_REG_SCFG2,
890 tmp & ~BIT_SCFG2[nr - 1]);
891 data->sens[nr - 1] = val;
892 break;
893 case W83781D_DEFAULT_BETA: /* thermistor */
894 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
895 w83627hf_write_value(client, W83781D_REG_SCFG1,
896 tmp & ~BIT_SCFG1[nr - 1]);
897 data->sens[nr - 1] = val;
898 break;
899 default:
900 dev_err(&client->dev,
901 "Invalid sensor type %ld; must be 1, 2, or %d\n",
902 (long) val, W83781D_DEFAULT_BETA);
903 break;
904 }
905
906 return count;
907 }
908
909 #define sysfs_sensor(offset) \
910 static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
911 { \
912 return show_sensor_reg(dev, buf, offset); \
913 } \
914 static ssize_t \
915 store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
916 { \
917 return store_sensor_reg(dev, buf, count, offset); \
918 } \
919 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
920 show_regs_sensor_##offset, store_regs_sensor_##offset);
921
922 sysfs_sensor(1);
923 sysfs_sensor(2);
924 sysfs_sensor(3);
925
926 #define device_create_file_sensor(client, offset) \
927 do { \
928 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
929 } while (0)
930
931
932 /* This function is called when:
933 * w83627hf_driver is inserted (when this module is loaded), for each
934 available adapter
935 * when a new adapter is inserted (and w83627hf_driver is still present) */
936 static int w83627hf_attach_adapter(struct i2c_adapter *adapter)
937 {
938 return i2c_detect(adapter, &addr_data, w83627hf_detect);
939 }
940
941 static int w83627hf_find(int sioaddr, int *address)
942 {
943 u16 val;
944
945 REG = sioaddr;
946 VAL = sioaddr + 1;
947
948 superio_enter();
949 val= superio_inb(DEVID);
950 if(val != W627_DEVID &&
951 val != W627THF_DEVID &&
952 val != W697_DEVID &&
953 val != W637_DEVID) {
954 superio_exit();
955 return -ENODEV;
956 }
957
958 superio_select(W83627HF_LD_HWM);
959 val = (superio_inb(WINB_BASE_REG) << 8) |
960 superio_inb(WINB_BASE_REG + 1);
961 *address = val & ~(WINB_EXTENT - 1);
962 if (*address == 0 && force_addr == 0) {
963 superio_exit();
964 return -ENODEV;
965 }
966 if (force_addr)
967 *address = force_addr; /* so detect will get called */
968
969 superio_exit();
970 return 0;
971 }
972
973 int w83627hf_detect(struct i2c_adapter *adapter, int address,
974 int kind)
975 {
976 int val;
977 struct i2c_client *new_client;
978 struct w83627hf_data *data;
979 int err = 0;
980 const char *client_name = "";
981
982 if (!i2c_is_isa_adapter(adapter)) {
983 err = -ENODEV;
984 goto ERROR0;
985 }
986
987 if(force_addr)
988 address = force_addr & ~(WINB_EXTENT - 1);
989
990 if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
991 err = -EBUSY;
992 goto ERROR0;
993 }
994
995 if(force_addr) {
996 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
997 superio_enter();
998 superio_select(W83627HF_LD_HWM);
999 superio_outb(WINB_BASE_REG, address >> 8);
1000 superio_outb(WINB_BASE_REG+1, address & 0xff);
1001 superio_exit();
1002 }
1003
1004 superio_enter();
1005 val= superio_inb(DEVID);
1006 if(val == W627_DEVID)
1007 kind = w83627hf;
1008 else if(val == W697_DEVID)
1009 kind = w83697hf;
1010 else if(val == W627THF_DEVID)
1011 kind = w83627thf;
1012 else if(val == W637_DEVID)
1013 kind = w83637hf;
1014 else {
1015 dev_info(&adapter->dev,
1016 "Unsupported chip (dev_id=0x%02X).\n", val);
1017 goto ERROR1;
1018 }
1019
1020 superio_select(W83627HF_LD_HWM);
1021 if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1022 superio_outb(WINB_ACT_REG, 1);
1023 superio_exit();
1024
1025 /* OK. For now, we presume we have a valid client. We now create the
1026 client structure, even though we cannot fill it completely yet.
1027 But it allows us to access w83627hf_{read,write}_value. */
1028
1029 if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1030 err = -ENOMEM;
1031 goto ERROR1;
1032 }
1033 memset(data, 0, sizeof(struct w83627hf_data));
1034
1035 new_client = &data->client;
1036 i2c_set_clientdata(new_client, data);
1037 new_client->addr = address;
1038 init_MUTEX(&data->lock);
1039 new_client->adapter = adapter;
1040 new_client->driver = &w83627hf_driver;
1041 new_client->flags = 0;
1042
1043
1044 if (kind == w83627hf) {
1045 client_name = "w83627hf";
1046 } else if (kind == w83627thf) {
1047 client_name = "w83627thf";
1048 } else if (kind == w83697hf) {
1049 client_name = "w83697hf";
1050 } else if (kind == w83637hf) {
1051 client_name = "w83637hf";
1052 }
1053
1054 /* Fill in the remaining client fields and put into the global list */
1055 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1056 data->type = kind;
1057 data->valid = 0;
1058 init_MUTEX(&data->update_lock);
1059
1060 /* Tell the I2C layer a new client has arrived */
1061 if ((err = i2c_attach_client(new_client)))
1062 goto ERROR2;
1063
1064 data->lm75 = NULL;
1065
1066 /* Initialize the chip */
1067 w83627hf_init_client(new_client);
1068
1069 /* A few vars need to be filled upon startup */
1070 data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1071 data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1072 data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1073
1074 /* Register sysfs hooks */
1075 device_create_file_in(new_client, 0);
1076 if (kind != w83697hf)
1077 device_create_file_in(new_client, 1);
1078 device_create_file_in(new_client, 2);
1079 device_create_file_in(new_client, 3);
1080 device_create_file_in(new_client, 4);
1081 if (kind != w83627thf && kind != w83637hf) {
1082 device_create_file_in(new_client, 5);
1083 device_create_file_in(new_client, 6);
1084 }
1085 device_create_file_in(new_client, 7);
1086 device_create_file_in(new_client, 8);
1087
1088 device_create_file_fan(new_client, 1);
1089 device_create_file_fan(new_client, 2);
1090 if (kind != w83697hf)
1091 device_create_file_fan(new_client, 3);
1092
1093 device_create_file_temp(new_client, 1);
1094 device_create_file_temp(new_client, 2);
1095 if (kind != w83697hf)
1096 device_create_file_temp(new_client, 3);
1097
1098 if (kind != w83697hf)
1099 device_create_file_vid(new_client);
1100
1101 if (kind != w83697hf)
1102 device_create_file_vrm(new_client);
1103
1104 device_create_file_fan_div(new_client, 1);
1105 device_create_file_fan_div(new_client, 2);
1106 if (kind != w83697hf)
1107 device_create_file_fan_div(new_client, 3);
1108
1109 device_create_file_alarms(new_client);
1110
1111 device_create_file_beep(new_client);
1112
1113 device_create_file_pwm(new_client, 1);
1114 device_create_file_pwm(new_client, 2);
1115 if (kind == w83627thf || kind == w83637hf)
1116 device_create_file_pwm(new_client, 3);
1117
1118 device_create_file_sensor(new_client, 1);
1119 device_create_file_sensor(new_client, 2);
1120 if (kind != w83697hf)
1121 device_create_file_sensor(new_client, 3);
1122
1123 return 0;
1124
1125 ERROR2:
1126 kfree(data);
1127 ERROR1:
1128 release_region(address, WINB_EXTENT);
1129 ERROR0:
1130 return err;
1131 }
1132
1133 static int w83627hf_detach_client(struct i2c_client *client)
1134 {
1135 int err;
1136
1137 if ((err = i2c_detach_client(client))) {
1138 dev_err(&client->dev,
1139 "Client deregistration failed, client not detached.\n");
1140 return err;
1141 }
1142
1143 release_region(client->addr, WINB_EXTENT);
1144 kfree(i2c_get_clientdata(client));
1145
1146 return 0;
1147 }
1148
1149
1150 /*
1151 ISA access must always be locked explicitly!
1152 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1153 would slow down the W83781D access and should not be necessary.
1154 There are some ugly typecasts here, but the good news is - they should
1155 nowhere else be necessary! */
1156 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1157 {
1158 struct w83627hf_data *data = i2c_get_clientdata(client);
1159 int res, word_sized;
1160
1161 down(&data->lock);
1162 word_sized = (((reg & 0xff00) == 0x100)
1163 || ((reg & 0xff00) == 0x200))
1164 && (((reg & 0x00ff) == 0x50)
1165 || ((reg & 0x00ff) == 0x53)
1166 || ((reg & 0x00ff) == 0x55));
1167 if (reg & 0xff00) {
1168 outb_p(W83781D_REG_BANK,
1169 client->addr + W83781D_ADDR_REG_OFFSET);
1170 outb_p(reg >> 8,
1171 client->addr + W83781D_DATA_REG_OFFSET);
1172 }
1173 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1174 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1175 if (word_sized) {
1176 outb_p((reg & 0xff) + 1,
1177 client->addr + W83781D_ADDR_REG_OFFSET);
1178 res =
1179 (res << 8) + inb_p(client->addr +
1180 W83781D_DATA_REG_OFFSET);
1181 }
1182 if (reg & 0xff00) {
1183 outb_p(W83781D_REG_BANK,
1184 client->addr + W83781D_ADDR_REG_OFFSET);
1185 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1186 }
1187 up(&data->lock);
1188 return res;
1189 }
1190
1191 static int w83627thf_read_gpio5(struct i2c_client *client)
1192 {
1193 int res = 0xff, sel;
1194
1195 superio_enter();
1196 superio_select(W83627HF_LD_GPIO5);
1197
1198 /* Make sure these GPIO pins are enabled */
1199 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1200 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1201 goto exit;
1202 }
1203
1204 /* Make sure the pins are configured for input
1205 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1206 sel = superio_inb(W83627THF_GPIO5_IOSR);
1207 if ((sel & 0x1f) != 0x1f) {
1208 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1209 "function\n");
1210 goto exit;
1211 }
1212
1213 dev_info(&client->dev, "Reading VID from GPIO5\n");
1214 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1215
1216 exit:
1217 superio_exit();
1218 return res;
1219 }
1220
1221 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1222 {
1223 struct w83627hf_data *data = i2c_get_clientdata(client);
1224 int word_sized;
1225
1226 down(&data->lock);
1227 word_sized = (((reg & 0xff00) == 0x100)
1228 || ((reg & 0xff00) == 0x200))
1229 && (((reg & 0x00ff) == 0x53)
1230 || ((reg & 0x00ff) == 0x55));
1231 if (reg & 0xff00) {
1232 outb_p(W83781D_REG_BANK,
1233 client->addr + W83781D_ADDR_REG_OFFSET);
1234 outb_p(reg >> 8,
1235 client->addr + W83781D_DATA_REG_OFFSET);
1236 }
1237 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1238 if (word_sized) {
1239 outb_p(value >> 8,
1240 client->addr + W83781D_DATA_REG_OFFSET);
1241 outb_p((reg & 0xff) + 1,
1242 client->addr + W83781D_ADDR_REG_OFFSET);
1243 }
1244 outb_p(value & 0xff,
1245 client->addr + W83781D_DATA_REG_OFFSET);
1246 if (reg & 0xff00) {
1247 outb_p(W83781D_REG_BANK,
1248 client->addr + W83781D_ADDR_REG_OFFSET);
1249 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1250 }
1251 up(&data->lock);
1252 return 0;
1253 }
1254
1255 /* Called when we have found a new W83781D. It should set limits, etc. */
1256 static void w83627hf_init_client(struct i2c_client *client)
1257 {
1258 struct w83627hf_data *data = i2c_get_clientdata(client);
1259 int i;
1260 int type = data->type;
1261 u8 tmp;
1262
1263 if(init) {
1264 /* save this register */
1265 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1266 /* Reset all except Watchdog values and last conversion values
1267 This sets fan-divs to 2, among others */
1268 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1269 /* Restore the register and disable power-on abnormal beep.
1270 This saves FAN 1/2/3 input/output values set by BIOS. */
1271 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1272 /* Disable master beep-enable (reset turns it on).
1273 Individual beeps should be reset to off but for some reason
1274 disabling this bit helps some people not get beeped */
1275 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1276 }
1277
1278 /* Minimize conflicts with other winbond i2c-only clients... */
1279 /* disable i2c subclients... how to disable main i2c client?? */
1280 /* force i2c address to relatively uncommon address */
1281 w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1282 w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1283
1284 /* Read VID only once */
1285 if (w83627hf == data->type || w83637hf == data->type) {
1286 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1287 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1288 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1289 } else if (w83627thf == data->type) {
1290 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1291 }
1292
1293 /* Read VRM & OVT Config only once */
1294 if (w83627thf == data->type || w83637hf == data->type) {
1295 data->vrm_ovt =
1296 w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1297 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1298 } else {
1299 /* Convert VID to voltage based on default VRM */
1300 data->vrm = i2c_which_vrm();
1301 }
1302
1303 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1304 for (i = 1; i <= 3; i++) {
1305 if (!(tmp & BIT_SCFG1[i - 1])) {
1306 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1307 } else {
1308 if (w83627hf_read_value
1309 (client,
1310 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1311 data->sens[i - 1] = 1;
1312 else
1313 data->sens[i - 1] = 2;
1314 }
1315 if ((type == w83697hf) && (i == 2))
1316 break;
1317 }
1318
1319 data->pwmenable[0] = 1;
1320 data->pwmenable[1] = 1;
1321 data->pwmenable[2] = 1;
1322
1323 if(init) {
1324 if (type == w83627hf) {
1325 /* enable PWM2 control (can't hurt since PWM reg
1326 should have been reset to 0xff) */
1327 w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
1328 0x19);
1329 }
1330 /* enable comparator mode for temp2 and temp3 so
1331 alarm indication will work correctly */
1332 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1333 if (!(i & 0x40))
1334 w83627hf_write_value(client, W83781D_REG_IRQ,
1335 i | 0x40);
1336 }
1337
1338 /* Start monitoring */
1339 w83627hf_write_value(client, W83781D_REG_CONFIG,
1340 (w83627hf_read_value(client,
1341 W83781D_REG_CONFIG) & 0xf7)
1342 | 0x01);
1343 }
1344
1345 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1346 {
1347 struct i2c_client *client = to_i2c_client(dev);
1348 struct w83627hf_data *data = i2c_get_clientdata(client);
1349 int i;
1350
1351 down(&data->update_lock);
1352
1353 if ((jiffies - data->last_updated > HZ + HZ / 2) ||
1354 (jiffies < data->last_updated) || !data->valid) {
1355 for (i = 0; i <= 8; i++) {
1356 /* skip missing sensors */
1357 if (((data->type == w83697hf) && (i == 1)) ||
1358 ((data->type == w83627thf || data->type == w83637hf)
1359 && (i == 4 || i == 5)))
1360 continue;
1361 data->in[i] =
1362 w83627hf_read_value(client, W83781D_REG_IN(i));
1363 data->in_min[i] =
1364 w83627hf_read_value(client,
1365 W83781D_REG_IN_MIN(i));
1366 data->in_max[i] =
1367 w83627hf_read_value(client,
1368 W83781D_REG_IN_MAX(i));
1369 }
1370 for (i = 1; i <= 3; i++) {
1371 data->fan[i - 1] =
1372 w83627hf_read_value(client, W83781D_REG_FAN(i));
1373 data->fan_min[i - 1] =
1374 w83627hf_read_value(client,
1375 W83781D_REG_FAN_MIN(i));
1376 }
1377 for (i = 1; i <= 3; i++) {
1378 u8 tmp = w83627hf_read_value(client,
1379 W836X7HF_REG_PWM(data->type, i));
1380 /* bits 0-3 are reserved in 627THF */
1381 if (data->type == w83627thf)
1382 tmp &= 0xf0;
1383 data->pwm[i - 1] = tmp;
1384 if(i == 2 &&
1385 (data->type == w83627hf || data->type == w83697hf))
1386 break;
1387 }
1388
1389 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1390 data->temp_max =
1391 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1392 data->temp_max_hyst =
1393 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1394 data->temp_add[0] =
1395 w83627hf_read_value(client, W83781D_REG_TEMP(2));
1396 data->temp_max_add[0] =
1397 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1398 data->temp_max_hyst_add[0] =
1399 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1400 if (data->type != w83697hf) {
1401 data->temp_add[1] =
1402 w83627hf_read_value(client, W83781D_REG_TEMP(3));
1403 data->temp_max_add[1] =
1404 w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1405 data->temp_max_hyst_add[1] =
1406 w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1407 }
1408
1409 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1410 data->fan_div[0] = (i >> 4) & 0x03;
1411 data->fan_div[1] = (i >> 6) & 0x03;
1412 if (data->type != w83697hf) {
1413 data->fan_div[2] = (w83627hf_read_value(client,
1414 W83781D_REG_PIN) >> 6) & 0x03;
1415 }
1416 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1417 data->fan_div[0] |= (i >> 3) & 0x04;
1418 data->fan_div[1] |= (i >> 4) & 0x04;
1419 if (data->type != w83697hf)
1420 data->fan_div[2] |= (i >> 5) & 0x04;
1421 data->alarms =
1422 w83627hf_read_value(client, W83781D_REG_ALARM1) |
1423 (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1424 (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1425 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1426 data->beep_enable = i >> 7;
1427 data->beep_mask = ((i & 0x7f) << 8) |
1428 w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1429 w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1430 data->last_updated = jiffies;
1431 data->valid = 1;
1432 }
1433
1434 up(&data->update_lock);
1435
1436 return data;
1437 }
1438
1439 static int __init sensors_w83627hf_init(void)
1440 {
1441 int addr;
1442
1443 if (w83627hf_find(0x2e, &addr)
1444 && w83627hf_find(0x4e, &addr)) {
1445 return -ENODEV;
1446 }
1447 normal_isa[0] = addr;
1448
1449 return i2c_add_driver(&w83627hf_driver);
1450 }
1451
1452 static void __exit sensors_w83627hf_exit(void)
1453 {
1454 i2c_del_driver(&w83627hf_driver);
1455 }
1456
1457 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1458 "Philip Edelbrock <phil@netroedge.com>, "
1459 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1460 MODULE_DESCRIPTION("W83627HF driver");
1461 MODULE_LICENSE("GPL");
1462
1463 module_init(sensors_w83627hf_init);
1464 module_exit(sensors_w83627hf_exit);
1465
|
This page was automatically generated by the
LXR engine.
|