1 /*
2 sis96x.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4
5 Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 /*
23 This module must be considered BETA unless and until
24 the chipset manufacturer releases a datasheet.
25 The register definitions are based on the SiS630.
26
27 This module relies on quirk_sis_96x_smbus (drivers/pci/quirks.c)
28 for just about every machine for which users have reported.
29 If this module isn't detecting your 96x south bridge, have a
30 look there.
31
32 We assume there can only be one SiS96x with one SMBus interface.
33 */
34
35 #include <linux/module.h>
36 #include <linux/pci.h>
37 #include <linux/kernel.h>
38 #include <linux/delay.h>
39 #include <linux/stddef.h>
40 #include <linux/ioport.h>
41 #include <linux/i2c.h>
42 #include <linux/init.h>
43 #include <asm/io.h>
44
45 /* base address register in PCI config space */
46 #define SIS96x_BAR 0x04
47
48 /* SiS96x SMBus registers */
49 #define SMB_STS 0x00
50 #define SMB_EN 0x01
51 #define SMB_CNT 0x02
52 #define SMB_HOST_CNT 0x03
53 #define SMB_ADDR 0x04
54 #define SMB_CMD 0x05
55 #define SMB_PCOUNT 0x06
56 #define SMB_COUNT 0x07
57 #define SMB_BYTE 0x08
58 #define SMB_DEV_ADDR 0x10
59 #define SMB_DB0 0x11
60 #define SMB_DB1 0x12
61 #define SMB_SAA 0x13
62
63 /* register count for request_region */
64 #define SMB_IOSIZE 0x20
65
66 /* Other settings */
67 #define MAX_TIMEOUT 500
68
69 /* SiS96x SMBus constants */
70 #define SIS96x_QUICK 0x00
71 #define SIS96x_BYTE 0x01
72 #define SIS96x_BYTE_DATA 0x02
73 #define SIS96x_WORD_DATA 0x03
74 #define SIS96x_PROC_CALL 0x04
75 #define SIS96x_BLOCK_DATA 0x05
76
77 static struct pci_driver sis96x_driver;
78 static struct i2c_adapter sis96x_adapter;
79 static u16 sis96x_smbus_base;
80
81 static inline u8 sis96x_read(u8 reg)
82 {
83 return inb(sis96x_smbus_base + reg) ;
84 }
85
86 static inline void sis96x_write(u8 reg, u8 data)
87 {
88 outb(data, sis96x_smbus_base + reg) ;
89 }
90
91 /* Execute a SMBus transaction.
92 int size is from SIS96x_QUICK to SIS96x_BLOCK_DATA
93 */
94 static int sis96x_transaction(int size)
95 {
96 int temp;
97 int result = 0;
98 int timeout = 0;
99
100 dev_dbg(&sis96x_adapter.dev, "SMBus transaction %d\n", size);
101
102 /* Make sure the SMBus host is ready to start transmitting */
103 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
104
105 dev_dbg(&sis96x_adapter.dev, "SMBus busy (0x%02x). "
106 "Resetting...\n", temp);
107
108 /* kill the transaction */
109 sis96x_write(SMB_HOST_CNT, 0x20);
110
111 /* check it again */
112 if (((temp = sis96x_read(SMB_CNT)) & 0x03) != 0x00) {
113 dev_dbg(&sis96x_adapter.dev, "Failed (0x%02x)\n", temp);
114 return -1;
115 } else {
116 dev_dbg(&sis96x_adapter.dev, "Successful\n");
117 }
118 }
119
120 /* Turn off timeout interrupts, set fast host clock */
121 sis96x_write(SMB_CNT, 0x20);
122
123 /* clear all (sticky) status flags */
124 temp = sis96x_read(SMB_STS);
125 sis96x_write(SMB_STS, temp & 0x1e);
126
127 /* start the transaction by setting bit 4 and size bits */
128 sis96x_write(SMB_HOST_CNT, 0x10 | (size & 0x07));
129
130 /* We will always wait for a fraction of a second! */
131 do {
132 msleep(1);
133 temp = sis96x_read(SMB_STS);
134 } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
135
136 /* If the SMBus is still busy, we give up */
137 if (timeout >= MAX_TIMEOUT) {
138 dev_dbg(&sis96x_adapter.dev, "SMBus Timeout! (0x%02x)\n", temp);
139 result = -1;
140 }
141
142 /* device error - probably missing ACK */
143 if (temp & 0x02) {
144 dev_dbg(&sis96x_adapter.dev, "Failed bus transaction!\n");
145 result = -1;
146 }
147
148 /* bus collision */
149 if (temp & 0x04) {
150 dev_dbg(&sis96x_adapter.dev, "Bus collision!\n");
151 result = -1;
152 }
153
154 /* Finish up by resetting the bus */
155 sis96x_write(SMB_STS, temp);
156 if ((temp = sis96x_read(SMB_STS))) {
157 dev_dbg(&sis96x_adapter.dev, "Failed reset at "
158 "end of transaction! (0x%02x)\n", temp);
159 }
160
161 return result;
162 }
163
164 /* Return -1 on error. */
165 static s32 sis96x_access(struct i2c_adapter * adap, u16 addr,
166 unsigned short flags, char read_write,
167 u8 command, int size, union i2c_smbus_data * data)
168 {
169
170 switch (size) {
171 case I2C_SMBUS_QUICK:
172 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
173 size = SIS96x_QUICK;
174 break;
175
176 case I2C_SMBUS_BYTE:
177 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
178 if (read_write == I2C_SMBUS_WRITE)
179 sis96x_write(SMB_CMD, command);
180 size = SIS96x_BYTE;
181 break;
182
183 case I2C_SMBUS_BYTE_DATA:
184 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
185 sis96x_write(SMB_CMD, command);
186 if (read_write == I2C_SMBUS_WRITE)
187 sis96x_write(SMB_BYTE, data->byte);
188 size = SIS96x_BYTE_DATA;
189 break;
190
191 case I2C_SMBUS_PROC_CALL:
192 case I2C_SMBUS_WORD_DATA:
193 sis96x_write(SMB_ADDR, ((addr & 0x7f) << 1) | (read_write & 0x01));
194 sis96x_write(SMB_CMD, command);
195 if (read_write == I2C_SMBUS_WRITE) {
196 sis96x_write(SMB_BYTE, data->word & 0xff);
197 sis96x_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
198 }
199 size = (size == I2C_SMBUS_PROC_CALL ?
200 SIS96x_PROC_CALL : SIS96x_WORD_DATA);
201 break;
202
203 case I2C_SMBUS_BLOCK_DATA:
204 /* TO DO: */
205 dev_info(&adap->dev, "SMBus block not implemented!\n");
206 return -1;
207 break;
208
209 default:
210 dev_info(&adap->dev, "Unsupported I2C size\n");
211 return -1;
212 break;
213 }
214
215 if (sis96x_transaction(size))
216 return -1;
217
218 if ((size != SIS96x_PROC_CALL) &&
219 ((read_write == I2C_SMBUS_WRITE) || (size == SIS96x_QUICK)))
220 return 0;
221
222 switch (size) {
223 case SIS96x_BYTE:
224 case SIS96x_BYTE_DATA:
225 data->byte = sis96x_read(SMB_BYTE);
226 break;
227
228 case SIS96x_WORD_DATA:
229 case SIS96x_PROC_CALL:
230 data->word = sis96x_read(SMB_BYTE) +
231 (sis96x_read(SMB_BYTE + 1) << 8);
232 break;
233 }
234 return 0;
235 }
236
237 static u32 sis96x_func(struct i2c_adapter *adapter)
238 {
239 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
240 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
241 I2C_FUNC_SMBUS_PROC_CALL;
242 }
243
244 static const struct i2c_algorithm smbus_algorithm = {
245 .smbus_xfer = sis96x_access,
246 .functionality = sis96x_func,
247 };
248
249 static struct i2c_adapter sis96x_adapter = {
250 .owner = THIS_MODULE,
251 .id = I2C_HW_SMBUS_SIS96X,
252 .class = I2C_CLASS_HWMON,
253 .algo = &smbus_algorithm,
254 };
255
256 static struct pci_device_id sis96x_ids[] = {
257 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_SMBUS) },
258 { 0, }
259 };
260
261 MODULE_DEVICE_TABLE (pci, sis96x_ids);
262
263 static int __devinit sis96x_probe(struct pci_dev *dev,
264 const struct pci_device_id *id)
265 {
266 u16 ww = 0;
267 int retval;
268
269 if (sis96x_smbus_base) {
270 dev_err(&dev->dev, "Only one device supported.\n");
271 return -EBUSY;
272 }
273
274 pci_read_config_word(dev, PCI_CLASS_DEVICE, &ww);
275 if (PCI_CLASS_SERIAL_SMBUS != ww) {
276 dev_err(&dev->dev, "Unsupported device class 0x%04x!\n", ww);
277 return -ENODEV;
278 }
279
280 sis96x_smbus_base = pci_resource_start(dev, SIS96x_BAR);
281 if (!sis96x_smbus_base) {
282 dev_err(&dev->dev, "SiS96x SMBus base address "
283 "not initialized!\n");
284 return -EINVAL;
285 }
286 dev_info(&dev->dev, "SiS96x SMBus base address: 0x%04x\n",
287 sis96x_smbus_base);
288
289 /* Everything is happy, let's grab the memory and set things up. */
290 if (!request_region(sis96x_smbus_base, SMB_IOSIZE,
291 sis96x_driver.name)) {
292 dev_err(&dev->dev, "SMBus registers 0x%04x-0x%04x "
293 "already in use!\n", sis96x_smbus_base,
294 sis96x_smbus_base + SMB_IOSIZE - 1);
295
296 sis96x_smbus_base = 0;
297 return -EINVAL;
298 }
299
300 /* set up the sysfs linkage to our parent device */
301 sis96x_adapter.dev.parent = &dev->dev;
302
303 snprintf(sis96x_adapter.name, sizeof(sis96x_adapter.name),
304 "SiS96x SMBus adapter at 0x%04x", sis96x_smbus_base);
305
306 if ((retval = i2c_add_adapter(&sis96x_adapter))) {
307 dev_err(&dev->dev, "Couldn't register adapter!\n");
308 release_region(sis96x_smbus_base, SMB_IOSIZE);
309 sis96x_smbus_base = 0;
310 }
311
312 return retval;
313 }
314
315 static void __devexit sis96x_remove(struct pci_dev *dev)
316 {
317 if (sis96x_smbus_base) {
318 i2c_del_adapter(&sis96x_adapter);
319 release_region(sis96x_smbus_base, SMB_IOSIZE);
320 sis96x_smbus_base = 0;
321 }
322 }
323
324 static struct pci_driver sis96x_driver = {
325 .name = "sis96x_smbus",
326 .id_table = sis96x_ids,
327 .probe = sis96x_probe,
328 .remove = __devexit_p(sis96x_remove),
329 };
330
331 static int __init i2c_sis96x_init(void)
332 {
333 return pci_register_driver(&sis96x_driver);
334 }
335
336 static void __exit i2c_sis96x_exit(void)
337 {
338 pci_unregister_driver(&sis96x_driver);
339 }
340
341 MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>");
342 MODULE_DESCRIPTION("SiS96x SMBus driver");
343 MODULE_LICENSE("GPL");
344
345 /* Register initialization functions using helper macros */
346 module_init(i2c_sis96x_init);
347 module_exit(i2c_sis96x_exit);
348
349
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