1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
2 *
3 * Copyright (C) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 I2C Controller
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25
26 #include <linux/i2c.h>
27 #include <linux/i2c-id.h>
28 #include <linux/init.h>
29 #include <linux/time.h>
30 #include <linux/interrupt.h>
31 #include <linux/sched.h>
32 #include <linux/delay.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/device.h>
36
37 #include <asm/hardware.h>
38 #include <asm/irq.h>
39 #include <asm/io.h>
40
41 #include <asm/hardware/clock.h>
42 #include <asm/arch/regs-gpio.h>
43 #include <asm/arch/regs-iic.h>
44 #include <asm/arch/iic.h>
45
46 /* i2c controller state */
47
48 enum s3c24xx_i2c_state {
49 STATE_IDLE,
50 STATE_START,
51 STATE_READ,
52 STATE_WRITE,
53 STATE_STOP
54 };
55
56 struct s3c24xx_i2c {
57 spinlock_t lock;
58 wait_queue_head_t wait;
59
60 struct i2c_msg *msg;
61 unsigned int msg_num;
62 unsigned int msg_idx;
63 unsigned int msg_ptr;
64
65 enum s3c24xx_i2c_state state;
66
67 void __iomem *regs;
68 struct clk *clk;
69 struct device *dev;
70 struct resource *irq;
71 struct resource *ioarea;
72 struct i2c_adapter adap;
73 };
74
75 /* default platform data to use if not supplied in the platform_device
76 */
77
78 static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {
79 .flags = 0,
80 .slave_addr = 0x10,
81 .bus_freq = 100*1000,
82 .max_freq = 400*1000,
83 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,
84 };
85
86 /* s3c24xx_i2c_is2440()
87 *
88 * return true is this is an s3c2440
89 */
90
91 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
92 {
93 struct platform_device *pdev = to_platform_device(i2c->dev);
94
95 return !strcmp(pdev->name, "s3c2440-i2c");
96 }
97
98
99 /* s3c24xx_i2c_get_platformdata
100 *
101 * get the platform data associated with the given device, or return
102 * the default if there is none
103 */
104
105 static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)
106 {
107 if (dev->platform_data != NULL)
108 return (struct s3c2410_platform_i2c *)dev->platform_data;
109
110 return &s3c24xx_i2c_default_platform;
111 }
112
113 /* s3c24xx_i2c_master_complete
114 *
115 * complete the message and wake up the caller, using the given return code,
116 * or zero to mean ok.
117 */
118
119 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
120 {
121 dev_dbg(i2c->dev, "master_complete %d\n", ret);
122
123 i2c->msg_ptr = 0;
124 i2c->msg = NULL;
125 i2c->msg_idx ++;
126 i2c->msg_num = 0;
127 if (ret)
128 i2c->msg_idx = ret;
129
130 wake_up(&i2c->wait);
131 }
132
133 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
134 {
135 unsigned long tmp;
136
137 tmp = readl(i2c->regs + S3C2410_IICCON);
138 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
139
140 }
141
142 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
143 {
144 unsigned long tmp;
145
146 tmp = readl(i2c->regs + S3C2410_IICCON);
147 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
148
149 }
150
151 /* irq enable/disable functions */
152
153 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
154 {
155 unsigned long tmp;
156
157 tmp = readl(i2c->regs + S3C2410_IICCON);
158 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
159 }
160
161 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
162 {
163 unsigned long tmp;
164
165 tmp = readl(i2c->regs + S3C2410_IICCON);
166 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
167 }
168
169
170 /* s3c24xx_i2c_message_start
171 *
172 * put the start of a message onto the bus
173 */
174
175 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
176 struct i2c_msg *msg)
177 {
178 unsigned int addr = (msg->addr & 0x7f) << 1;
179 unsigned long stat;
180 unsigned long iiccon;
181
182 stat = 0;
183 stat |= S3C2410_IICSTAT_TXRXEN;
184
185 if (msg->flags & I2C_M_RD) {
186 stat |= S3C2410_IICSTAT_MASTER_RX;
187 addr |= 1;
188 } else
189 stat |= S3C2410_IICSTAT_MASTER_TX;
190
191 // todo - check for wether ack wanted or not
192 s3c24xx_i2c_enable_ack(i2c);
193
194 iiccon = readl(i2c->regs + S3C2410_IICCON);
195 writel(stat, i2c->regs + S3C2410_IICSTAT);
196
197 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
198 writeb(addr, i2c->regs + S3C2410_IICDS);
199
200 // delay a bit and reset iiccon before setting start (per samsung)
201 udelay(1);
202 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
203 writel(iiccon, i2c->regs + S3C2410_IICCON);
204
205 stat |= S3C2410_IICSTAT_START;
206 writel(stat, i2c->regs + S3C2410_IICSTAT);
207 }
208
209 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
210 {
211 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
212
213 dev_dbg(i2c->dev, "STOP\n");
214
215 /* stop the transfer */
216 iicstat &= ~ S3C2410_IICSTAT_START;
217 writel(iicstat, i2c->regs + S3C2410_IICSTAT);
218
219 i2c->state = STATE_STOP;
220
221 s3c24xx_i2c_master_complete(i2c, ret);
222 s3c24xx_i2c_disable_irq(i2c);
223 }
224
225 /* helper functions to determine the current state in the set of
226 * messages we are sending */
227
228 /* is_lastmsg()
229 *
230 * returns TRUE if the current message is the last in the set
231 */
232
233 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
234 {
235 return i2c->msg_idx >= (i2c->msg_num - 1);
236 }
237
238 /* is_msglast
239 *
240 * returns TRUE if we this is the last byte in the current message
241 */
242
243 static inline int is_msglast(struct s3c24xx_i2c *i2c)
244 {
245 return i2c->msg_ptr == i2c->msg->len-1;
246 }
247
248 /* is_msgend
249 *
250 * returns TRUE if we reached the end of the current message
251 */
252
253 static inline int is_msgend(struct s3c24xx_i2c *i2c)
254 {
255 return i2c->msg_ptr >= i2c->msg->len;
256 }
257
258 /* i2s_s3c_irq_nextbyte
259 *
260 * process an interrupt and work out what to do
261 */
262
263 static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
264 {
265 unsigned long tmp;
266 unsigned char byte;
267 int ret = 0;
268
269 switch (i2c->state) {
270
271 case STATE_IDLE:
272 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);
273 goto out;
274 break;
275
276 case STATE_STOP:
277 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);
278 s3c24xx_i2c_disable_irq(i2c);
279 goto out_ack;
280
281 case STATE_START:
282 /* last thing we did was send a start condition on the
283 * bus, or started a new i2c message
284 */
285
286 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
287 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
288 /* ack was not received... */
289
290 dev_err(i2c->dev, "ack was not received\n" );
291 s3c24xx_i2c_stop(i2c, -EREMOTEIO);
292 goto out_ack;
293 }
294
295 if (i2c->msg->flags & I2C_M_RD)
296 i2c->state = STATE_READ;
297 else
298 i2c->state = STATE_WRITE;
299
300 /* terminate the transfer if there is nothing to do
301 * (used by the i2c probe to find devices */
302
303 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
304 s3c24xx_i2c_stop(i2c, 0);
305 goto out_ack;
306 }
307
308 if (i2c->state == STATE_READ)
309 goto prepare_read;
310
311 /* fall through to the write state, as we will need to
312 * send a byte as well */
313
314 case STATE_WRITE:
315 /* we are writing data to the device... check for the
316 * end of the message, and if so, work out what to do
317 */
318
319 retry_write:
320 if (!is_msgend(i2c)) {
321 byte = i2c->msg->buf[i2c->msg_ptr++];
322 writeb(byte, i2c->regs + S3C2410_IICDS);
323
324 } else if (!is_lastmsg(i2c)) {
325 /* we need to go to the next i2c message */
326
327 dev_dbg(i2c->dev, "WRITE: Next Message\n");
328
329 i2c->msg_ptr = 0;
330 i2c->msg_idx ++;
331 i2c->msg++;
332
333 /* check to see if we need to do another message */
334 if (i2c->msg->flags & I2C_M_NOSTART) {
335
336 if (i2c->msg->flags & I2C_M_RD) {
337 /* cannot do this, the controller
338 * forces us to send a new START
339 * when we change direction */
340
341 s3c24xx_i2c_stop(i2c, -EINVAL);
342 }
343
344 goto retry_write;
345 } else {
346
347 /* send the new start */
348 s3c24xx_i2c_message_start(i2c, i2c->msg);
349 i2c->state = STATE_START;
350 }
351
352 } else {
353 /* send stop */
354
355 s3c24xx_i2c_stop(i2c, 0);
356 }
357 break;
358
359 case STATE_READ:
360 /* we have a byte of data in the data register, do
361 * something with it, and then work out wether we are
362 * going to do any more read/write
363 */
364
365 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&
366 !(is_msglast(i2c) && is_lastmsg(i2c))) {
367
368 if (iicstat & S3C2410_IICSTAT_LASTBIT) {
369 dev_dbg(i2c->dev, "READ: No Ack\n");
370
371 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
372 goto out_ack;
373 }
374 }
375
376 byte = readb(i2c->regs + S3C2410_IICDS);
377 i2c->msg->buf[i2c->msg_ptr++] = byte;
378
379 prepare_read:
380 if (is_msglast(i2c)) {
381 /* last byte of buffer */
382
383 if (is_lastmsg(i2c))
384 s3c24xx_i2c_disable_ack(i2c);
385
386 } else if (is_msgend(i2c)) {
387 /* ok, we've read the entire buffer, see if there
388 * is anything else we need to do */
389
390 if (is_lastmsg(i2c)) {
391 /* last message, send stop and complete */
392 dev_dbg(i2c->dev, "READ: Send Stop\n");
393
394 s3c24xx_i2c_stop(i2c, 0);
395 } else {
396 /* go to the next transfer */
397 dev_dbg(i2c->dev, "READ: Next Transfer\n");
398
399 i2c->msg_ptr = 0;
400 i2c->msg_idx++;
401 i2c->msg++;
402 }
403 }
404
405 break;
406 }
407
408 /* acknowlegde the IRQ and get back on with the work */
409
410 out_ack:
411 tmp = readl(i2c->regs + S3C2410_IICCON);
412 tmp &= ~S3C2410_IICCON_IRQPEND;
413 writel(tmp, i2c->regs + S3C2410_IICCON);
414 out:
415 return ret;
416 }
417
418 /* s3c24xx_i2c_irq
419 *
420 * top level IRQ servicing routine
421 */
422
423 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id,
424 struct pt_regs *regs)
425 {
426 struct s3c24xx_i2c *i2c = dev_id;
427 unsigned long status;
428 unsigned long tmp;
429
430 status = readl(i2c->regs + S3C2410_IICSTAT);
431
432 if (status & S3C2410_IICSTAT_ARBITR) {
433 // deal with arbitration loss
434 dev_err(i2c->dev, "deal with arbitration loss\n");
435 }
436
437 if (i2c->state == STATE_IDLE) {
438 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
439
440 tmp = readl(i2c->regs + S3C2410_IICCON);
441 tmp &= ~S3C2410_IICCON_IRQPEND;
442 writel(tmp, i2c->regs + S3C2410_IICCON);
443 goto out;
444 }
445
446 /* pretty much this leaves us with the fact that we've
447 * transmitted or received whatever byte we last sent */
448
449 i2s_s3c_irq_nextbyte(i2c, status);
450
451 out:
452 return IRQ_HANDLED;
453 }
454
455
456 /* s3c24xx_i2c_set_master
457 *
458 * get the i2c bus for a master transaction
459 */
460
461 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
462 {
463 unsigned long iicstat;
464 int timeout = 400;
465
466 while (timeout-- > 0) {
467 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
468
469 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
470 return 0;
471
472 msleep(1);
473 }
474
475 dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",
476 __raw_readl(S3C2410_GPEDAT));
477
478 return -ETIMEDOUT;
479 }
480
481 /* s3c24xx_i2c_doxfer
482 *
483 * this starts an i2c transfer
484 */
485
486 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg msgs[], int num)
487 {
488 unsigned long timeout;
489 int ret;
490
491 ret = s3c24xx_i2c_set_master(i2c);
492 if (ret != 0) {
493 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
494 ret = -EAGAIN;
495 goto out;
496 }
497
498 spin_lock_irq(&i2c->lock);
499
500 i2c->msg = msgs;
501 i2c->msg_num = num;
502 i2c->msg_ptr = 0;
503 i2c->msg_idx = 0;
504 i2c->state = STATE_START;
505
506 s3c24xx_i2c_enable_irq(i2c);
507 s3c24xx_i2c_message_start(i2c, msgs);
508 spin_unlock_irq(&i2c->lock);
509
510 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
511
512 ret = i2c->msg_idx;
513
514 /* having these next two as dev_err() makes life very
515 * noisy when doing an i2cdetect */
516
517 if (timeout == 0)
518 dev_dbg(i2c->dev, "timeout\n");
519 else if (ret != num)
520 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
521
522 /* ensure the stop has been through the bus */
523
524 msleep(1);
525
526 out:
527 return ret;
528 }
529
530 /* s3c24xx_i2c_xfer
531 *
532 * first port of call from the i2c bus code when an message needs
533 * transfering across the i2c bus.
534 */
535
536 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
537 struct i2c_msg msgs[], int num)
538 {
539 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
540 int retry;
541 int ret;
542
543 for (retry = 0; retry < adap->retries; retry++) {
544
545 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
546
547 if (ret != -EAGAIN)
548 return ret;
549
550 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
551
552 udelay(100);
553 }
554
555 return -EREMOTEIO;
556 }
557
558 /* i2c bus registration info */
559
560 static struct i2c_algorithm s3c24xx_i2c_algorithm = {
561 .name = "S3C2410-I2C-Algorithm",
562 .master_xfer = s3c24xx_i2c_xfer,
563 };
564
565 static struct s3c24xx_i2c s3c24xx_i2c = {
566 .lock = SPIN_LOCK_UNLOCKED,
567 .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),
568 .adap = {
569 .name = "s3c2410-i2c",
570 .algo = &s3c24xx_i2c_algorithm,
571 .retries = 2,
572 },
573 };
574
575 /* s3c24xx_i2c_calcdivisor
576 *
577 * return the divisor settings for a given frequency
578 */
579
580 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
581 unsigned int *div1, unsigned int *divs)
582 {
583 unsigned int calc_divs = clkin / wanted;
584 unsigned int calc_div1;
585
586 if (calc_divs > (16*16))
587 calc_div1 = 512;
588 else
589 calc_div1 = 16;
590
591 calc_divs += calc_div1-1;
592 calc_divs /= calc_div1;
593
594 if (calc_divs == 0)
595 calc_divs = 1;
596 if (calc_divs > 17)
597 calc_divs = 17;
598
599 *divs = calc_divs;
600 *div1 = calc_div1;
601
602 return clkin / (calc_divs * calc_div1);
603 }
604
605 /* freq_acceptable
606 *
607 * test wether a frequency is within the acceptable range of error
608 */
609
610 static inline int freq_acceptable(unsigned int freq, unsigned int wanted)
611 {
612 int diff = freq - wanted;
613
614 return (diff >= -2 && diff <= 2);
615 }
616
617 /* s3c24xx_i2c_getdivisor
618 *
619 * work out a divisor for the user requested frequency setting,
620 * either by the requested frequency, or scanning the acceptable
621 * range of frequencies until something is found
622 */
623
624 static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
625 struct s3c2410_platform_i2c *pdata,
626 unsigned long *iicon,
627 unsigned int *got)
628 {
629 unsigned long clkin = clk_get_rate(i2c->clk);
630
631 unsigned int divs, div1;
632 int freq;
633 int start, end;
634
635 clkin /= 1000; /* clkin now in KHz */
636
637 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
638 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
639
640 if (pdata->bus_freq != 0) {
641 freq = s3c24xx_i2c_calcdivisor(clkin, pdata->bus_freq/1000,
642 &div1, &divs);
643 if (freq_acceptable(freq, pdata->bus_freq/1000))
644 goto found;
645 }
646
647 /* ok, we may have to search for something suitable... */
648
649 start = (pdata->max_freq == 0) ? pdata->bus_freq : pdata->max_freq;
650 end = pdata->min_freq;
651
652 start /= 1000;
653 end /= 1000;
654
655 /* search loop... */
656
657 for (; start > end; start--) {
658 freq = s3c24xx_i2c_calcdivisor(clkin, start, &div1, &divs);
659 if (freq_acceptable(freq, start))
660 goto found;
661 }
662
663 /* cannot find frequency spec */
664
665 return -EINVAL;
666
667 found:
668 *got = freq;
669 *iicon |= (divs-1);
670 *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
671 return 0;
672 }
673
674 /* s3c24xx_i2c_init
675 *
676 * initialise the controller, set the IO lines and frequency
677 */
678
679 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
680 {
681 unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
682 struct s3c2410_platform_i2c *pdata;
683 unsigned int freq;
684
685 /* get the plafrom data */
686
687 pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
688
689 /* inititalise the gpio */
690
691 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);
692 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);
693
694 /* write slave address */
695
696 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
697
698 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
699
700 /* we need to work out the divisors for the clock... */
701
702 if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
703 dev_err(i2c->dev, "cannot meet bus frequency required\n");
704 return -EINVAL;
705 }
706
707 /* todo - check that the i2c lines aren't being dragged anywhere */
708
709 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
710 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
711
712 writel(iicon, i2c->regs + S3C2410_IICCON);
713
714 /* check for s3c2440 i2c controller */
715
716 if (s3c24xx_i2c_is2440(i2c)) {
717 dev_dbg(i2c->dev, "S3C2440_IICLC=%08x\n", pdata->sda_delay);
718
719 writel(pdata->sda_delay, i2c->regs + S3C2440_IICLC);
720 }
721
722 return 0;
723 }
724
725 static void s3c24xx_i2c_free(struct s3c24xx_i2c *i2c)
726 {
727 if (i2c->clk != NULL && !IS_ERR(i2c->clk)) {
728 clk_disable(i2c->clk);
729 clk_unuse(i2c->clk);
730 clk_put(i2c->clk);
731 i2c->clk = NULL;
732 }
733
734 if (i2c->regs != NULL) {
735 iounmap(i2c->regs);
736 i2c->regs = NULL;
737 }
738
739 if (i2c->ioarea != NULL) {
740 release_resource(i2c->ioarea);
741 kfree(i2c->ioarea);
742 i2c->ioarea = NULL;
743 }
744 }
745
746 /* s3c24xx_i2c_probe
747 *
748 * called by the bus driver when a suitable device is found
749 */
750
751 static int s3c24xx_i2c_probe(struct device *dev)
752 {
753 struct platform_device *pdev = to_platform_device(dev);
754 struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
755 struct resource *res;
756 int ret;
757
758 /* find the clock and enable it */
759
760 i2c->dev = dev;
761 i2c->clk = clk_get(dev, "i2c");
762 if (IS_ERR(i2c->clk)) {
763 dev_err(dev, "cannot get clock\n");
764 ret = -ENOENT;
765 goto out;
766 }
767
768 dev_dbg(dev, "clock source %p\n", i2c->clk);
769
770 clk_use(i2c->clk);
771 clk_enable(i2c->clk);
772
773 /* map the registers */
774
775 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
776 if (res == NULL) {
777 dev_err(dev, "cannot find IO resource\n");
778 ret = -ENOENT;
779 goto out;
780 }
781
782 i2c->ioarea = request_mem_region(res->start, (res->end-res->start)+1,
783 pdev->name);
784
785 if (i2c->ioarea == NULL) {
786 dev_err(dev, "cannot request IO\n");
787 ret = -ENXIO;
788 goto out;
789 }
790
791 i2c->regs = ioremap(res->start, (res->end-res->start)+1);
792
793 if (i2c->regs == NULL) {
794 dev_err(dev, "cannot map IO\n");
795 ret = -ENXIO;
796 goto out;
797 }
798
799 dev_dbg(dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);
800
801 /* setup info block for the i2c core */
802
803 i2c->adap.algo_data = i2c;
804 i2c->adap.dev.parent = dev;
805
806 /* initialise the i2c controller */
807
808 ret = s3c24xx_i2c_init(i2c);
809 if (ret != 0)
810 goto out;
811
812 /* find the IRQ for this unit (note, this relies on the init call to
813 * ensure no current IRQs pending
814 */
815
816 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
817 if (res == NULL) {
818 dev_err(dev, "cannot find IRQ\n");
819 ret = -ENOENT;
820 goto out;
821 }
822
823 ret = request_irq(res->start, s3c24xx_i2c_irq, SA_INTERRUPT,
824 pdev->name, i2c);
825
826 if (ret != 0) {
827 dev_err(dev, "cannot claim IRQ\n");
828 goto out;
829 }
830
831 i2c->irq = res;
832
833 dev_dbg(dev, "irq resource %p (%ld)\n", res, res->start);
834
835 ret = i2c_add_adapter(&i2c->adap);
836 if (ret < 0) {
837 dev_err(dev, "failed to add bus to i2c core\n");
838 goto out;
839 }
840
841 dev_set_drvdata(dev, i2c);
842
843 dev_info(dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
844
845 out:
846 if (ret < 0)
847 s3c24xx_i2c_free(i2c);
848
849 return ret;
850 }
851
852 /* s3c24xx_i2c_remove
853 *
854 * called when device is removed from the bus
855 */
856
857 static int s3c24xx_i2c_remove(struct device *dev)
858 {
859 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
860
861 if (i2c != NULL) {
862 s3c24xx_i2c_free(i2c);
863 dev_set_drvdata(dev, NULL);
864 }
865
866 return 0;
867 }
868
869 #ifdef CONFIG_PM
870 static int s3c24xx_i2c_resume(struct device *dev, u32 level)
871 {
872 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev);
873
874 if (i2c != NULL && level == RESUME_ENABLE) {
875 dev_dbg(dev, "resume: level %d\n", level);
876 s3c24xx_i2c_init(i2c);
877 }
878
879 return 0;
880 }
881
882 #else
883 #define s3c24xx_i2c_resume NULL
884 #endif
885
886 /* device driver for platform bus bits */
887
888 static struct device_driver s3c2410_i2c_driver = {
889 .name = "s3c2410-i2c",
890 .bus = &platform_bus_type,
891 .probe = s3c24xx_i2c_probe,
892 .remove = s3c24xx_i2c_remove,
893 .resume = s3c24xx_i2c_resume,
894 };
895
896 static struct device_driver s3c2440_i2c_driver = {
897 .name = "s3c2440-i2c",
898 .bus = &platform_bus_type,
899 .probe = s3c24xx_i2c_probe,
900 .remove = s3c24xx_i2c_remove,
901 .resume = s3c24xx_i2c_resume,
902 };
903
904 static int __init i2c_adap_s3c_init(void)
905 {
906 int ret;
907
908 ret = driver_register(&s3c2410_i2c_driver);
909 if (ret == 0)
910 ret = driver_register(&s3c2440_i2c_driver);
911
912 return ret;
913 }
914
915 static void __exit i2c_adap_s3c_exit(void)
916 {
917 driver_unregister(&s3c2410_i2c_driver);
918 driver_unregister(&s3c2440_i2c_driver);
919 }
920
921 module_init(i2c_adap_s3c_init);
922 module_exit(i2c_adap_s3c_exit);
923
924 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
925 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
926 MODULE_LICENSE("GPL");
927
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