1 /*
2 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
3 * (http://www.opencores.org/projects.cgi/web/i2c/overview).
4 *
5 * Peter Korsgaard <jacmet@sunsite.dk>
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/errno.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/wait.h>
20 #include <linux/i2c-ocores.h>
21 #include <asm/io.h>
22
23 struct ocores_i2c {
24 void __iomem *base;
25 int regstep;
26 wait_queue_head_t wait;
27 struct i2c_adapter adap;
28 struct i2c_msg *msg;
29 int pos;
30 int nmsgs;
31 int state; /* see STATE_ */
32 };
33
34 /* registers */
35 #define OCI2C_PRELOW 0
36 #define OCI2C_PREHIGH 1
37 #define OCI2C_CONTROL 2
38 #define OCI2C_DATA 3
39 #define OCI2C_CMD 4 /* write only */
40 #define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */
41
42 #define OCI2C_CTRL_IEN 0x40
43 #define OCI2C_CTRL_EN 0x80
44
45 #define OCI2C_CMD_START 0x91
46 #define OCI2C_CMD_STOP 0x41
47 #define OCI2C_CMD_READ 0x21
48 #define OCI2C_CMD_WRITE 0x11
49 #define OCI2C_CMD_READ_ACK 0x21
50 #define OCI2C_CMD_READ_NACK 0x29
51 #define OCI2C_CMD_IACK 0x01
52
53 #define OCI2C_STAT_IF 0x01
54 #define OCI2C_STAT_TIP 0x02
55 #define OCI2C_STAT_ARBLOST 0x20
56 #define OCI2C_STAT_BUSY 0x40
57 #define OCI2C_STAT_NACK 0x80
58
59 #define STATE_DONE 0
60 #define STATE_START 1
61 #define STATE_WRITE 2
62 #define STATE_READ 3
63 #define STATE_ERROR 4
64
65 static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
66 {
67 iowrite8(value, i2c->base + reg * i2c->regstep);
68 }
69
70 static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
71 {
72 return ioread8(i2c->base + reg * i2c->regstep);
73 }
74
75 static void ocores_process(struct ocores_i2c *i2c)
76 {
77 struct i2c_msg *msg = i2c->msg;
78 u8 stat = oc_getreg(i2c, OCI2C_STATUS);
79
80 if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
81 /* stop has been sent */
82 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
83 wake_up(&i2c->wait);
84 return;
85 }
86
87 /* error? */
88 if (stat & OCI2C_STAT_ARBLOST) {
89 i2c->state = STATE_ERROR;
90 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
91 return;
92 }
93
94 if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
95 i2c->state =
96 (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
97
98 if (stat & OCI2C_STAT_NACK) {
99 i2c->state = STATE_ERROR;
100 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
101 return;
102 }
103 } else
104 msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
105
106 /* end of msg? */
107 if (i2c->pos == msg->len) {
108 i2c->nmsgs--;
109 i2c->msg++;
110 i2c->pos = 0;
111 msg = i2c->msg;
112
113 if (i2c->nmsgs) { /* end? */
114 /* send start? */
115 if (!(msg->flags & I2C_M_NOSTART)) {
116 u8 addr = (msg->addr << 1);
117
118 if (msg->flags & I2C_M_RD)
119 addr |= 1;
120
121 i2c->state = STATE_START;
122
123 oc_setreg(i2c, OCI2C_DATA, addr);
124 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
125 return;
126 } else
127 i2c->state = (msg->flags & I2C_M_RD)
128 ? STATE_READ : STATE_WRITE;
129 } else {
130 i2c->state = STATE_DONE;
131 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
132 return;
133 }
134 }
135
136 if (i2c->state == STATE_READ) {
137 oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
138 OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
139 } else {
140 oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
141 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
142 }
143 }
144
145 static irqreturn_t ocores_isr(int irq, void *dev_id)
146 {
147 struct ocores_i2c *i2c = dev_id;
148
149 ocores_process(i2c);
150
151 return IRQ_HANDLED;
152 }
153
154 static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
155 {
156 struct ocores_i2c *i2c = i2c_get_adapdata(adap);
157
158 i2c->msg = msgs;
159 i2c->pos = 0;
160 i2c->nmsgs = num;
161 i2c->state = STATE_START;
162
163 oc_setreg(i2c, OCI2C_DATA,
164 (i2c->msg->addr << 1) |
165 ((i2c->msg->flags & I2C_M_RD) ? 1:0));
166
167 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
168
169 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
170 (i2c->state == STATE_DONE), HZ))
171 return (i2c->state == STATE_DONE) ? num : -EIO;
172 else
173 return -ETIMEDOUT;
174 }
175
176 static void ocores_init(struct ocores_i2c *i2c,
177 struct ocores_i2c_platform_data *pdata)
178 {
179 int prescale;
180 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
181
182 /* make sure the device is disabled */
183 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
184
185 prescale = (pdata->clock_khz / (5*100)) - 1;
186 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
187 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
188
189 /* Init the device */
190 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
191 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
192 }
193
194
195 static u32 ocores_func(struct i2c_adapter *adap)
196 {
197 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
198 }
199
200 static const struct i2c_algorithm ocores_algorithm = {
201 .master_xfer = ocores_xfer,
202 .functionality = ocores_func,
203 };
204
205 static struct i2c_adapter ocores_adapter = {
206 .owner = THIS_MODULE,
207 .name = "i2c-ocores",
208 .class = I2C_CLASS_HWMON,
209 .algo = &ocores_algorithm,
210 };
211
212
213 static int __devinit ocores_i2c_probe(struct platform_device *pdev)
214 {
215 struct ocores_i2c *i2c;
216 struct ocores_i2c_platform_data *pdata;
217 struct resource *res, *res2;
218 int ret;
219
220 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
221 if (!res)
222 return -ENODEV;
223
224 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
225 if (!res2)
226 return -ENODEV;
227
228 pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data;
229 if (!pdata)
230 return -ENODEV;
231
232 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
233 if (!i2c)
234 return -ENOMEM;
235
236 if (!request_mem_region(res->start, res->end - res->start + 1,
237 pdev->name)) {
238 dev_err(&pdev->dev, "Memory region busy\n");
239 ret = -EBUSY;
240 goto request_mem_failed;
241 }
242
243 i2c->base = ioremap(res->start, res->end - res->start + 1);
244 if (!i2c->base) {
245 dev_err(&pdev->dev, "Unable to map registers\n");
246 ret = -EIO;
247 goto map_failed;
248 }
249
250 i2c->regstep = pdata->regstep;
251 ocores_init(i2c, pdata);
252
253 init_waitqueue_head(&i2c->wait);
254 ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c);
255 if (ret) {
256 dev_err(&pdev->dev, "Cannot claim IRQ\n");
257 goto request_irq_failed;
258 }
259
260 /* hook up driver to tree */
261 platform_set_drvdata(pdev, i2c);
262 i2c->adap = ocores_adapter;
263 i2c_set_adapdata(&i2c->adap, i2c);
264 i2c->adap.dev.parent = &pdev->dev;
265
266 /* add i2c adapter to i2c tree */
267 ret = i2c_add_adapter(&i2c->adap);
268 if (ret) {
269 dev_err(&pdev->dev, "Failed to add adapter\n");
270 goto add_adapter_failed;
271 }
272
273 return 0;
274
275 add_adapter_failed:
276 free_irq(res2->start, i2c);
277 request_irq_failed:
278 iounmap(i2c->base);
279 map_failed:
280 release_mem_region(res->start, res->end - res->start + 1);
281 request_mem_failed:
282 kfree(i2c);
283
284 return ret;
285 }
286
287 static int __devexit ocores_i2c_remove(struct platform_device* pdev)
288 {
289 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
290 struct resource *res;
291
292 /* disable i2c logic */
293 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
294 & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
295
296 /* remove adapter & data */
297 i2c_del_adapter(&i2c->adap);
298 platform_set_drvdata(pdev, NULL);
299
300 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
301 if (res)
302 free_irq(res->start, i2c);
303
304 iounmap(i2c->base);
305
306 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
307 if (res)
308 release_mem_region(res->start, res->end - res->start + 1);
309
310 kfree(i2c);
311
312 return 0;
313 }
314
315 static struct platform_driver ocores_i2c_driver = {
316 .probe = ocores_i2c_probe,
317 .remove = __devexit_p(ocores_i2c_remove),
318 .driver = {
319 .owner = THIS_MODULE,
320 .name = "ocores-i2c",
321 },
322 };
323
324 static int __init ocores_i2c_init(void)
325 {
326 return platform_driver_register(&ocores_i2c_driver);
327 }
328
329 static void __exit ocores_i2c_exit(void)
330 {
331 platform_driver_unregister(&ocores_i2c_driver);
332 }
333
334 module_init(ocores_i2c_init);
335 module_exit(ocores_i2c_exit);
336
337 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
338 MODULE_DESCRIPTION("OpenCores I2C bus driver");
339 MODULE_LICENSE("GPL");
340
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