1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <linux/dmi.h>
31 #include <linux/i2c.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include <linux/acpi.h>
40
41 #define I915_LVDS "i915_lvds"
42
43 /*
44 * the following four scaling options are defined.
45 * #define DRM_MODE_SCALE_NON_GPU 0
46 * #define DRM_MODE_SCALE_FULLSCREEN 1
47 * #define DRM_MODE_SCALE_NO_SCALE 2
48 * #define DRM_MODE_SCALE_ASPECT 3
49 */
50
51 /* Private structure for the integrated LVDS support */
52 struct intel_lvds_priv {
53 int fitting_mode;
54 u32 pfit_control;
55 u32 pfit_pgm_ratios;
56 };
57
58 /**
59 * Sets the backlight level.
60 *
61 * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
62 */
63 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
64 {
65 struct drm_i915_private *dev_priv = dev->dev_private;
66 u32 blc_pwm_ctl, reg;
67
68 if (IS_IGDNG(dev))
69 reg = BLC_PWM_CPU_CTL;
70 else
71 reg = BLC_PWM_CTL;
72
73 blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
74 I915_WRITE(reg, (blc_pwm_ctl |
75 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
76 }
77
78 /**
79 * Returns the maximum level of the backlight duty cycle field.
80 */
81 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
82 {
83 struct drm_i915_private *dev_priv = dev->dev_private;
84 u32 reg;
85
86 if (IS_IGDNG(dev))
87 reg = BLC_PWM_PCH_CTL2;
88 else
89 reg = BLC_PWM_CTL;
90
91 return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
92 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
93 }
94
95 /**
96 * Sets the power state for the panel.
97 */
98 static void intel_lvds_set_power(struct drm_device *dev, bool on)
99 {
100 struct drm_i915_private *dev_priv = dev->dev_private;
101 u32 pp_status, ctl_reg, status_reg;
102
103 if (IS_IGDNG(dev)) {
104 ctl_reg = PCH_PP_CONTROL;
105 status_reg = PCH_PP_STATUS;
106 } else {
107 ctl_reg = PP_CONTROL;
108 status_reg = PP_STATUS;
109 }
110
111 if (on) {
112 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
113 POWER_TARGET_ON);
114 do {
115 pp_status = I915_READ(status_reg);
116 } while ((pp_status & PP_ON) == 0);
117
118 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
119 } else {
120 intel_lvds_set_backlight(dev, 0);
121
122 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
123 ~POWER_TARGET_ON);
124 do {
125 pp_status = I915_READ(status_reg);
126 } while (pp_status & PP_ON);
127 }
128 }
129
130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
131 {
132 struct drm_device *dev = encoder->dev;
133
134 if (mode == DRM_MODE_DPMS_ON)
135 intel_lvds_set_power(dev, true);
136 else
137 intel_lvds_set_power(dev, false);
138
139 /* XXX: We never power down the LVDS pairs. */
140 }
141
142 static void intel_lvds_save(struct drm_connector *connector)
143 {
144 struct drm_device *dev = connector->dev;
145 struct drm_i915_private *dev_priv = dev->dev_private;
146 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
147 u32 pwm_ctl_reg;
148
149 if (IS_IGDNG(dev)) {
150 pp_on_reg = PCH_PP_ON_DELAYS;
151 pp_off_reg = PCH_PP_OFF_DELAYS;
152 pp_ctl_reg = PCH_PP_CONTROL;
153 pp_div_reg = PCH_PP_DIVISOR;
154 pwm_ctl_reg = BLC_PWM_CPU_CTL;
155 } else {
156 pp_on_reg = PP_ON_DELAYS;
157 pp_off_reg = PP_OFF_DELAYS;
158 pp_ctl_reg = PP_CONTROL;
159 pp_div_reg = PP_DIVISOR;
160 pwm_ctl_reg = BLC_PWM_CTL;
161 }
162
163 dev_priv->savePP_ON = I915_READ(pp_on_reg);
164 dev_priv->savePP_OFF = I915_READ(pp_off_reg);
165 dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
166 dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
167 dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
168 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
169 BACKLIGHT_DUTY_CYCLE_MASK);
170
171 /*
172 * If the light is off at server startup, just make it full brightness
173 */
174 if (dev_priv->backlight_duty_cycle == 0)
175 dev_priv->backlight_duty_cycle =
176 intel_lvds_get_max_backlight(dev);
177 }
178
179 static void intel_lvds_restore(struct drm_connector *connector)
180 {
181 struct drm_device *dev = connector->dev;
182 struct drm_i915_private *dev_priv = dev->dev_private;
183 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
184 u32 pwm_ctl_reg;
185
186 if (IS_IGDNG(dev)) {
187 pp_on_reg = PCH_PP_ON_DELAYS;
188 pp_off_reg = PCH_PP_OFF_DELAYS;
189 pp_ctl_reg = PCH_PP_CONTROL;
190 pp_div_reg = PCH_PP_DIVISOR;
191 pwm_ctl_reg = BLC_PWM_CPU_CTL;
192 } else {
193 pp_on_reg = PP_ON_DELAYS;
194 pp_off_reg = PP_OFF_DELAYS;
195 pp_ctl_reg = PP_CONTROL;
196 pp_div_reg = PP_DIVISOR;
197 pwm_ctl_reg = BLC_PWM_CTL;
198 }
199
200 I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
201 I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
202 I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
203 I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
204 I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
205 if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
206 intel_lvds_set_power(dev, true);
207 else
208 intel_lvds_set_power(dev, false);
209 }
210
211 static int intel_lvds_mode_valid(struct drm_connector *connector,
212 struct drm_display_mode *mode)
213 {
214 struct drm_device *dev = connector->dev;
215 struct drm_i915_private *dev_priv = dev->dev_private;
216 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
217
218 if (fixed_mode) {
219 if (mode->hdisplay > fixed_mode->hdisplay)
220 return MODE_PANEL;
221 if (mode->vdisplay > fixed_mode->vdisplay)
222 return MODE_PANEL;
223 }
224
225 return MODE_OK;
226 }
227
228 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
229 struct drm_display_mode *mode,
230 struct drm_display_mode *adjusted_mode)
231 {
232 /*
233 * float point operation is not supported . So the PANEL_RATIO_FACTOR
234 * is defined, which can avoid the float point computation when
235 * calculating the panel ratio.
236 */
237 #define PANEL_RATIO_FACTOR 8192
238 struct drm_device *dev = encoder->dev;
239 struct drm_i915_private *dev_priv = dev->dev_private;
240 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
241 struct drm_encoder *tmp_encoder;
242 struct intel_output *intel_output = enc_to_intel_output(encoder);
243 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
244 u32 pfit_control = 0, pfit_pgm_ratios = 0;
245 int left_border = 0, right_border = 0, top_border = 0;
246 int bottom_border = 0;
247 bool border = 0;
248 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
249 int horiz_ratio, vert_ratio;
250 u32 hsync_width, vsync_width;
251 u32 hblank_width, vblank_width;
252 u32 hsync_pos, vsync_pos;
253
254 /* Should never happen!! */
255 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
256 DRM_ERROR("Can't support LVDS on pipe A\n");
257 return false;
258 }
259
260 /* Should never happen!! */
261 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
262 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
263 DRM_ERROR("Can't enable LVDS and another "
264 "encoder on the same pipe\n");
265 return false;
266 }
267 }
268 /* If we don't have a panel mode, there is nothing we can do */
269 if (dev_priv->panel_fixed_mode == NULL)
270 return true;
271 /*
272 * If we have timings from the BIOS for the panel, put them in
273 * to the adjusted mode. The CRTC will be set up for this mode,
274 * with the panel scaling set up to source from the H/VDisplay
275 * of the original mode.
276 */
277 if (dev_priv->panel_fixed_mode != NULL) {
278 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
279 adjusted_mode->hsync_start =
280 dev_priv->panel_fixed_mode->hsync_start;
281 adjusted_mode->hsync_end =
282 dev_priv->panel_fixed_mode->hsync_end;
283 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
284 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
285 adjusted_mode->vsync_start =
286 dev_priv->panel_fixed_mode->vsync_start;
287 adjusted_mode->vsync_end =
288 dev_priv->panel_fixed_mode->vsync_end;
289 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
290 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
291 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
292 }
293
294 /* Make sure pre-965s set dither correctly */
295 if (!IS_I965G(dev)) {
296 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
297 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
298 }
299
300 /* Native modes don't need fitting */
301 if (adjusted_mode->hdisplay == mode->hdisplay &&
302 adjusted_mode->vdisplay == mode->vdisplay) {
303 pfit_pgm_ratios = 0;
304 border = 0;
305 goto out;
306 }
307
308 /* full screen scale for now */
309 if (IS_IGDNG(dev))
310 goto out;
311
312 /* 965+ wants fuzzy fitting */
313 if (IS_I965G(dev))
314 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
315 PFIT_FILTER_FUZZY;
316
317 hsync_width = adjusted_mode->crtc_hsync_end -
318 adjusted_mode->crtc_hsync_start;
319 vsync_width = adjusted_mode->crtc_vsync_end -
320 adjusted_mode->crtc_vsync_start;
321 hblank_width = adjusted_mode->crtc_hblank_end -
322 adjusted_mode->crtc_hblank_start;
323 vblank_width = adjusted_mode->crtc_vblank_end -
324 adjusted_mode->crtc_vblank_start;
325 /*
326 * Deal with panel fitting options. Figure out how to stretch the
327 * image based on its aspect ratio & the current panel fitting mode.
328 */
329 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
330 adjusted_mode->vdisplay;
331 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
332 mode->vdisplay;
333 /*
334 * Enable automatic panel scaling for non-native modes so that they fill
335 * the screen. Should be enabled before the pipe is enabled, according
336 * to register description and PRM.
337 * Change the value here to see the borders for debugging
338 */
339 if (!IS_IGDNG(dev)) {
340 I915_WRITE(BCLRPAT_A, 0);
341 I915_WRITE(BCLRPAT_B, 0);
342 }
343
344 switch (lvds_priv->fitting_mode) {
345 case DRM_MODE_SCALE_NO_SCALE:
346 /*
347 * For centered modes, we have to calculate border widths &
348 * heights and modify the values programmed into the CRTC.
349 */
350 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
351 right_border = left_border;
352 if (mode->hdisplay & 1)
353 right_border++;
354 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
355 bottom_border = top_border;
356 if (mode->vdisplay & 1)
357 bottom_border++;
358 /* Set active & border values */
359 adjusted_mode->crtc_hdisplay = mode->hdisplay;
360 /* Keep the boder be even */
361 if (right_border & 1)
362 right_border++;
363 /* use the border directly instead of border minuse one */
364 adjusted_mode->crtc_hblank_start = mode->hdisplay +
365 right_border;
366 /* keep the blank width constant */
367 adjusted_mode->crtc_hblank_end =
368 adjusted_mode->crtc_hblank_start + hblank_width;
369 /* get the hsync pos relative to hblank start */
370 hsync_pos = (hblank_width - hsync_width) / 2;
371 /* keep the hsync pos be even */
372 if (hsync_pos & 1)
373 hsync_pos++;
374 adjusted_mode->crtc_hsync_start =
375 adjusted_mode->crtc_hblank_start + hsync_pos;
376 /* keep the hsync width constant */
377 adjusted_mode->crtc_hsync_end =
378 adjusted_mode->crtc_hsync_start + hsync_width;
379 adjusted_mode->crtc_vdisplay = mode->vdisplay;
380 /* use the border instead of border minus one */
381 adjusted_mode->crtc_vblank_start = mode->vdisplay +
382 bottom_border;
383 /* keep the vblank width constant */
384 adjusted_mode->crtc_vblank_end =
385 adjusted_mode->crtc_vblank_start + vblank_width;
386 /* get the vsync start postion relative to vblank start */
387 vsync_pos = (vblank_width - vsync_width) / 2;
388 adjusted_mode->crtc_vsync_start =
389 adjusted_mode->crtc_vblank_start + vsync_pos;
390 /* keep the vsync width constant */
391 adjusted_mode->crtc_vsync_end =
392 adjusted_mode->crtc_vblank_start + vsync_width;
393 border = 1;
394 break;
395 case DRM_MODE_SCALE_ASPECT:
396 /* Scale but preserve the spect ratio */
397 pfit_control |= PFIT_ENABLE;
398 if (IS_I965G(dev)) {
399 /* 965+ is easy, it does everything in hw */
400 if (panel_ratio > desired_ratio)
401 pfit_control |= PFIT_SCALING_PILLAR;
402 else if (panel_ratio < desired_ratio)
403 pfit_control |= PFIT_SCALING_LETTER;
404 else
405 pfit_control |= PFIT_SCALING_AUTO;
406 } else {
407 /*
408 * For earlier chips we have to calculate the scaling
409 * ratio by hand and program it into the
410 * PFIT_PGM_RATIO register
411 */
412 u32 horiz_bits, vert_bits, bits = 12;
413 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
414 adjusted_mode->hdisplay;
415 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
416 adjusted_mode->vdisplay;
417 horiz_scale = adjusted_mode->hdisplay *
418 PANEL_RATIO_FACTOR / mode->hdisplay;
419 vert_scale = adjusted_mode->vdisplay *
420 PANEL_RATIO_FACTOR / mode->vdisplay;
421
422 /* retain aspect ratio */
423 if (panel_ratio > desired_ratio) { /* Pillar */
424 u32 scaled_width;
425 scaled_width = mode->hdisplay * vert_scale /
426 PANEL_RATIO_FACTOR;
427 horiz_ratio = vert_ratio;
428 pfit_control |= (VERT_AUTO_SCALE |
429 VERT_INTERP_BILINEAR |
430 HORIZ_INTERP_BILINEAR);
431 /* Pillar will have left/right borders */
432 left_border = (adjusted_mode->hdisplay -
433 scaled_width) / 2;
434 right_border = left_border;
435 if (mode->hdisplay & 1) /* odd resolutions */
436 right_border++;
437 /* keep the border be even */
438 if (right_border & 1)
439 right_border++;
440 adjusted_mode->crtc_hdisplay = scaled_width;
441 /* use border instead of border minus one */
442 adjusted_mode->crtc_hblank_start =
443 scaled_width + right_border;
444 /* keep the hblank width constant */
445 adjusted_mode->crtc_hblank_end =
446 adjusted_mode->crtc_hblank_start +
447 hblank_width;
448 /*
449 * get the hsync start pos relative to
450 * hblank start
451 */
452 hsync_pos = (hblank_width - hsync_width) / 2;
453 /* keep the hsync_pos be even */
454 if (hsync_pos & 1)
455 hsync_pos++;
456 adjusted_mode->crtc_hsync_start =
457 adjusted_mode->crtc_hblank_start +
458 hsync_pos;
459 /* keept hsync width constant */
460 adjusted_mode->crtc_hsync_end =
461 adjusted_mode->crtc_hsync_start +
462 hsync_width;
463 border = 1;
464 } else if (panel_ratio < desired_ratio) { /* letter */
465 u32 scaled_height = mode->vdisplay *
466 horiz_scale / PANEL_RATIO_FACTOR;
467 vert_ratio = horiz_ratio;
468 pfit_control |= (HORIZ_AUTO_SCALE |
469 VERT_INTERP_BILINEAR |
470 HORIZ_INTERP_BILINEAR);
471 /* Letterbox will have top/bottom border */
472 top_border = (adjusted_mode->vdisplay -
473 scaled_height) / 2;
474 bottom_border = top_border;
475 if (mode->vdisplay & 1)
476 bottom_border++;
477 adjusted_mode->crtc_vdisplay = scaled_height;
478 /* use border instead of border minus one */
479 adjusted_mode->crtc_vblank_start =
480 scaled_height + bottom_border;
481 /* keep the vblank width constant */
482 adjusted_mode->crtc_vblank_end =
483 adjusted_mode->crtc_vblank_start +
484 vblank_width;
485 /*
486 * get the vsync start pos relative to
487 * vblank start
488 */
489 vsync_pos = (vblank_width - vsync_width) / 2;
490 adjusted_mode->crtc_vsync_start =
491 adjusted_mode->crtc_vblank_start +
492 vsync_pos;
493 /* keep the vsync width constant */
494 adjusted_mode->crtc_vsync_end =
495 adjusted_mode->crtc_vsync_start +
496 vsync_width;
497 border = 1;
498 } else {
499 /* Aspects match, Let hw scale both directions */
500 pfit_control |= (VERT_AUTO_SCALE |
501 HORIZ_AUTO_SCALE |
502 VERT_INTERP_BILINEAR |
503 HORIZ_INTERP_BILINEAR);
504 }
505 horiz_bits = (1 << bits) * horiz_ratio /
506 PANEL_RATIO_FACTOR;
507 vert_bits = (1 << bits) * vert_ratio /
508 PANEL_RATIO_FACTOR;
509 pfit_pgm_ratios =
510 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
511 PFIT_VERT_SCALE_MASK) |
512 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
513 PFIT_HORIZ_SCALE_MASK);
514 }
515 break;
516
517 case DRM_MODE_SCALE_FULLSCREEN:
518 /*
519 * Full scaling, even if it changes the aspect ratio.
520 * Fortunately this is all done for us in hw.
521 */
522 pfit_control |= PFIT_ENABLE;
523 if (IS_I965G(dev))
524 pfit_control |= PFIT_SCALING_AUTO;
525 else
526 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
527 VERT_INTERP_BILINEAR |
528 HORIZ_INTERP_BILINEAR);
529 break;
530 default:
531 break;
532 }
533
534 out:
535 lvds_priv->pfit_control = pfit_control;
536 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
537 /*
538 * XXX: It would be nice to support lower refresh rates on the
539 * panels to reduce power consumption, and perhaps match the
540 * user's requested refresh rate.
541 */
542
543 return true;
544 }
545
546 static void intel_lvds_prepare(struct drm_encoder *encoder)
547 {
548 struct drm_device *dev = encoder->dev;
549 struct drm_i915_private *dev_priv = dev->dev_private;
550 u32 reg;
551
552 if (IS_IGDNG(dev))
553 reg = BLC_PWM_CPU_CTL;
554 else
555 reg = BLC_PWM_CTL;
556
557 dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
558 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
559 BACKLIGHT_DUTY_CYCLE_MASK);
560
561 intel_lvds_set_power(dev, false);
562 }
563
564 static void intel_lvds_commit( struct drm_encoder *encoder)
565 {
566 struct drm_device *dev = encoder->dev;
567 struct drm_i915_private *dev_priv = dev->dev_private;
568
569 if (dev_priv->backlight_duty_cycle == 0)
570 dev_priv->backlight_duty_cycle =
571 intel_lvds_get_max_backlight(dev);
572
573 intel_lvds_set_power(dev, true);
574 }
575
576 static void intel_lvds_mode_set(struct drm_encoder *encoder,
577 struct drm_display_mode *mode,
578 struct drm_display_mode *adjusted_mode)
579 {
580 struct drm_device *dev = encoder->dev;
581 struct drm_i915_private *dev_priv = dev->dev_private;
582 struct intel_output *intel_output = enc_to_intel_output(encoder);
583 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
584
585 /*
586 * The LVDS pin pair will already have been turned on in the
587 * intel_crtc_mode_set since it has a large impact on the DPLL
588 * settings.
589 */
590
591 if (IS_IGDNG(dev))
592 return;
593
594 /*
595 * Enable automatic panel scaling so that non-native modes fill the
596 * screen. Should be enabled before the pipe is enabled, according to
597 * register description and PRM.
598 */
599 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
600 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
601 }
602
603 /**
604 * Detect the LVDS connection.
605 *
606 * This always returns CONNECTOR_STATUS_CONNECTED. This connector should only have
607 * been set up if the LVDS was actually connected anyway.
608 */
609 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
610 {
611 return connector_status_connected;
612 }
613
614 /**
615 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
616 */
617 static int intel_lvds_get_modes(struct drm_connector *connector)
618 {
619 struct drm_device *dev = connector->dev;
620 struct intel_output *intel_output = to_intel_output(connector);
621 struct drm_i915_private *dev_priv = dev->dev_private;
622 int ret = 0;
623
624 ret = intel_ddc_get_modes(intel_output);
625
626 if (ret)
627 return ret;
628
629 /* Didn't get an EDID, so
630 * Set wide sync ranges so we get all modes
631 * handed to valid_mode for checking
632 */
633 connector->display_info.min_vfreq = 0;
634 connector->display_info.max_vfreq = 200;
635 connector->display_info.min_hfreq = 0;
636 connector->display_info.max_hfreq = 200;
637
638 if (dev_priv->panel_fixed_mode != NULL) {
639 struct drm_display_mode *mode;
640
641 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
642 drm_mode_probed_add(connector, mode);
643
644 return 1;
645 }
646
647 return 0;
648 }
649
650 /**
651 * intel_lvds_destroy - unregister and free LVDS structures
652 * @connector: connector to free
653 *
654 * Unregister the DDC bus for this connector then free the driver private
655 * structure.
656 */
657 static void intel_lvds_destroy(struct drm_connector *connector)
658 {
659 struct intel_output *intel_output = to_intel_output(connector);
660
661 if (intel_output->ddc_bus)
662 intel_i2c_destroy(intel_output->ddc_bus);
663 drm_sysfs_connector_remove(connector);
664 drm_connector_cleanup(connector);
665 kfree(connector);
666 }
667
668 static int intel_lvds_set_property(struct drm_connector *connector,
669 struct drm_property *property,
670 uint64_t value)
671 {
672 struct drm_device *dev = connector->dev;
673 struct intel_output *intel_output =
674 to_intel_output(connector);
675
676 if (property == dev->mode_config.scaling_mode_property &&
677 connector->encoder) {
678 struct drm_crtc *crtc = connector->encoder->crtc;
679 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
680 if (value == DRM_MODE_SCALE_NON_GPU) {
681 DRM_DEBUG_KMS(I915_LVDS,
682 "non_GPU property is unsupported\n");
683 return 0;
684 }
685 if (lvds_priv->fitting_mode == value) {
686 /* the LVDS scaling property is not changed */
687 return 0;
688 }
689 lvds_priv->fitting_mode = value;
690 if (crtc && crtc->enabled) {
691 /*
692 * If the CRTC is enabled, the display will be changed
693 * according to the new panel fitting mode.
694 */
695 drm_crtc_helper_set_mode(crtc, &crtc->mode,
696 crtc->x, crtc->y, crtc->fb);
697 }
698 }
699
700 return 0;
701 }
702
703 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
704 .dpms = intel_lvds_dpms,
705 .mode_fixup = intel_lvds_mode_fixup,
706 .prepare = intel_lvds_prepare,
707 .mode_set = intel_lvds_mode_set,
708 .commit = intel_lvds_commit,
709 };
710
711 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
712 .get_modes = intel_lvds_get_modes,
713 .mode_valid = intel_lvds_mode_valid,
714 .best_encoder = intel_best_encoder,
715 };
716
717 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
718 .dpms = drm_helper_connector_dpms,
719 .save = intel_lvds_save,
720 .restore = intel_lvds_restore,
721 .detect = intel_lvds_detect,
722 .fill_modes = drm_helper_probe_single_connector_modes,
723 .set_property = intel_lvds_set_property,
724 .destroy = intel_lvds_destroy,
725 };
726
727
728 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
729 {
730 drm_encoder_cleanup(encoder);
731 }
732
733 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
734 .destroy = intel_lvds_enc_destroy,
735 };
736
737 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
738 {
739 DRM_DEBUG_KMS(I915_LVDS,
740 "Skipping LVDS initialization for %s\n", id->ident);
741 return 1;
742 }
743
744 /* These systems claim to have LVDS, but really don't */
745 static const struct dmi_system_id intel_no_lvds[] = {
746 {
747 .callback = intel_no_lvds_dmi_callback,
748 .ident = "Apple Mac Mini (Core series)",
749 .matches = {
750 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
751 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
752 },
753 },
754 {
755 .callback = intel_no_lvds_dmi_callback,
756 .ident = "Apple Mac Mini (Core 2 series)",
757 .matches = {
758 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
759 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
760 },
761 },
762 {
763 .callback = intel_no_lvds_dmi_callback,
764 .ident = "MSI IM-945GSE-A",
765 .matches = {
766 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
767 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
768 },
769 },
770 {
771 .callback = intel_no_lvds_dmi_callback,
772 .ident = "Dell Studio Hybrid",
773 .matches = {
774 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
775 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
776 },
777 },
778 {
779 .callback = intel_no_lvds_dmi_callback,
780 .ident = "AOpen Mini PC",
781 .matches = {
782 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
783 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
784 },
785 },
786 {
787 .callback = intel_no_lvds_dmi_callback,
788 .ident = "AOpen Mini PC MP915",
789 .matches = {
790 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
791 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
792 },
793 },
794 {
795 .callback = intel_no_lvds_dmi_callback,
796 .ident = "Aopen i945GTt-VFA",
797 .matches = {
798 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
799 },
800 },
801
802 { } /* terminating entry */
803 };
804
805 #ifdef CONFIG_ACPI
806 /*
807 * check_lid_device -- check whether @handle is an ACPI LID device.
808 * @handle: ACPI device handle
809 * @level : depth in the ACPI namespace tree
810 * @context: the number of LID device when we find the device
811 * @rv: a return value to fill if desired (Not use)
812 */
813 static acpi_status
814 check_lid_device(acpi_handle handle, u32 level, void *context,
815 void **return_value)
816 {
817 struct acpi_device *acpi_dev;
818 int *lid_present = context;
819
820 acpi_dev = NULL;
821 /* Get the acpi device for device handle */
822 if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
823 /* If there is no ACPI device for handle, return */
824 return AE_OK;
825 }
826
827 if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
828 *lid_present = 1;
829
830 return AE_OK;
831 }
832
833 /**
834 * check whether there exists the ACPI LID device by enumerating the ACPI
835 * device tree.
836 */
837 static int intel_lid_present(void)
838 {
839 int lid_present = 0;
840
841 if (acpi_disabled) {
842 /* If ACPI is disabled, there is no ACPI device tree to
843 * check, so assume the LID device would have been present.
844 */
845 return 1;
846 }
847
848 acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
849 ACPI_UINT32_MAX,
850 check_lid_device, &lid_present, NULL);
851
852 return lid_present;
853 }
854 #else
855 static int intel_lid_present(void)
856 {
857 /* In the absence of ACPI built in, assume that the LID device would
858 * have been present.
859 */
860 return 1;
861 }
862 #endif
863
864 /**
865 * intel_lvds_init - setup LVDS connectors on this device
866 * @dev: drm device
867 *
868 * Create the connector, register the LVDS DDC bus, and try to figure out what
869 * modes we can display on the LVDS panel (if present).
870 */
871 void intel_lvds_init(struct drm_device *dev)
872 {
873 struct drm_i915_private *dev_priv = dev->dev_private;
874 struct intel_output *intel_output;
875 struct drm_connector *connector;
876 struct drm_encoder *encoder;
877 struct drm_display_mode *scan; /* *modes, *bios_mode; */
878 struct drm_crtc *crtc;
879 struct intel_lvds_priv *lvds_priv;
880 u32 lvds;
881 int pipe, gpio = GPIOC;
882
883 /* Skip init on machines we know falsely report LVDS */
884 if (dmi_check_system(intel_no_lvds))
885 return;
886
887 /* Assume that any device without an ACPI LID device also doesn't
888 * have an integrated LVDS. We would be better off parsing the BIOS
889 * to get a reliable indicator, but that code isn't written yet.
890 *
891 * In the case of all-in-one desktops using LVDS that we've seen,
892 * they're using SDVO LVDS.
893 */
894 if (!intel_lid_present())
895 return;
896
897 if (IS_IGDNG(dev)) {
898 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
899 return;
900 if (dev_priv->edp_support) {
901 DRM_DEBUG("disable LVDS for eDP support\n");
902 return;
903 }
904 gpio = PCH_GPIOC;
905 }
906
907 intel_output = kzalloc(sizeof(struct intel_output) +
908 sizeof(struct intel_lvds_priv), GFP_KERNEL);
909 if (!intel_output) {
910 return;
911 }
912
913 connector = &intel_output->base;
914 encoder = &intel_output->enc;
915 drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
916 DRM_MODE_CONNECTOR_LVDS);
917
918 drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
919 DRM_MODE_ENCODER_LVDS);
920
921 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
922 intel_output->type = INTEL_OUTPUT_LVDS;
923
924 intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
925 intel_output->crtc_mask = (1 << 1);
926 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
927 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
928 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
929 connector->interlace_allowed = false;
930 connector->doublescan_allowed = false;
931
932 lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
933 intel_output->dev_priv = lvds_priv;
934 /* create the scaling mode property */
935 drm_mode_create_scaling_mode_property(dev);
936 /*
937 * the initial panel fitting mode will be FULL_SCREEN.
938 */
939
940 drm_connector_attach_property(&intel_output->base,
941 dev->mode_config.scaling_mode_property,
942 DRM_MODE_SCALE_FULLSCREEN);
943 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
944 /*
945 * LVDS discovery:
946 * 1) check for EDID on DDC
947 * 2) check for VBT data
948 * 3) check to see if LVDS is already on
949 * if none of the above, no panel
950 * 4) make sure lid is open
951 * if closed, act like it's not there for now
952 */
953
954 /* Set up the DDC bus. */
955 intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
956 if (!intel_output->ddc_bus) {
957 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
958 "failed.\n");
959 goto failed;
960 }
961
962 /*
963 * Attempt to get the fixed panel mode from DDC. Assume that the
964 * preferred mode is the right one.
965 */
966 intel_ddc_get_modes(intel_output);
967
968 list_for_each_entry(scan, &connector->probed_modes, head) {
969 mutex_lock(&dev->mode_config.mutex);
970 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
971 dev_priv->panel_fixed_mode =
972 drm_mode_duplicate(dev, scan);
973 mutex_unlock(&dev->mode_config.mutex);
974 goto out;
975 }
976 mutex_unlock(&dev->mode_config.mutex);
977 }
978
979 /* Failed to get EDID, what about VBT? */
980 if (dev_priv->lfp_lvds_vbt_mode) {
981 mutex_lock(&dev->mode_config.mutex);
982 dev_priv->panel_fixed_mode =
983 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
984 mutex_unlock(&dev->mode_config.mutex);
985 if (dev_priv->panel_fixed_mode) {
986 dev_priv->panel_fixed_mode->type |=
987 DRM_MODE_TYPE_PREFERRED;
988 goto out;
989 }
990 }
991
992 /*
993 * If we didn't get EDID, try checking if the panel is already turned
994 * on. If so, assume that whatever is currently programmed is the
995 * correct mode.
996 */
997
998 /* IGDNG: FIXME if still fail, not try pipe mode now */
999 if (IS_IGDNG(dev))
1000 goto failed;
1001
1002 lvds = I915_READ(LVDS);
1003 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1004 crtc = intel_get_crtc_from_pipe(dev, pipe);
1005
1006 if (crtc && (lvds & LVDS_PORT_EN)) {
1007 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1008 if (dev_priv->panel_fixed_mode) {
1009 dev_priv->panel_fixed_mode->type |=
1010 DRM_MODE_TYPE_PREFERRED;
1011 goto out;
1012 }
1013 }
1014
1015 /* If we still don't have a mode after all that, give up. */
1016 if (!dev_priv->panel_fixed_mode)
1017 goto failed;
1018
1019 out:
1020 if (IS_IGDNG(dev)) {
1021 u32 pwm;
1022 /* make sure PWM is enabled */
1023 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1024 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1025 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1026
1027 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1028 pwm |= PWM_PCH_ENABLE;
1029 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1030 }
1031 drm_sysfs_connector_add(connector);
1032 return;
1033
1034 failed:
1035 DRM_DEBUG_KMS(I915_LVDS, "No LVDS modes found, disabling.\n");
1036 if (intel_output->ddc_bus)
1037 intel_i2c_destroy(intel_output->ddc_bus);
1038 drm_connector_cleanup(connector);
1039 kfree(intel_output);
1040 }
1041
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