1 /*
2 * i8xx_tco: TCO timer driver for i8xx chipsets
3 *
4 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
5 * http://www.kernelconcepts.de
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * Neither kernel concepts nor Nils Faerber admit liability nor provide
13 * warranty for any of this software. This material is provided
14 * "AS-IS" and at no charge.
15 *
16 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
17 * developed for
18 * Jentro AG, Haar/Munich (Germany)
19 *
20 * TCO timer driver for i8xx chipsets
21 * based on softdog.c by Alan Cox <alan@redhat.com>
22 *
23 * For history and the complete list of supported I/O Controller Hub's
24 * see i8xx_tco.c
25 */
26
27
28 /*
29 * Some address definitions for the TCO
30 */
31
32 #define TCOBASE ACPIBASE + 0x60 /* TCO base address */
33 #define TCO1_RLD TCOBASE + 0x00 /* TCO Timer Reload and Current Value */
34 #define TCO1_TMR TCOBASE + 0x01 /* TCO Timer Initial Value */
35 #define TCO1_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */
36 #define TCO1_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */
37 #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */
38 #define TCO2_STS TCOBASE + 0x06 /* TCO2 Status Register */
39 #define TCO1_CNT TCOBASE + 0x08 /* TCO1 Control Register */
40 #define TCO2_CNT TCOBASE + 0x0a /* TCO2 Control Register */
41
42 #define SMI_EN ACPIBASE + 0x30 /* SMI Control and Enable Register */
43
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