1 /*
2 * Intel Multimedia Timer device implementation for SGI SN platforms.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
9 *
10 * This driver exports an API that should be supportable by any HPET or IA-PC
11 * multimedia timer. The code below is currently specific to the SGI Altix
12 * SHub RTC, however.
13 *
14 * 11/01/01 - jbarnes - initial revision
15 * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
16 * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
17 * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
18 * support via the posix timer interface
19 */
20
21 #include <linux/types.h>
22 #include <linux/kernel.h>
23 #include <linux/ioctl.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/errno.h>
27 #include <linux/mm.h>
28 #include <linux/devfs_fs_kernel.h>
29 #include <linux/mmtimer.h>
30 #include <linux/miscdevice.h>
31 #include <linux/posix-timers.h>
32 #include <linux/interrupt.h>
33
34 #include <asm/uaccess.h>
35 #include <asm/sn/addrs.h>
36 #include <asm/sn/intr.h>
37 #include <asm/sn/shub_mmr.h>
38 #include <asm/sn/nodepda.h>
39 #include <asm/sn/shubio.h>
40
41 MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
42 MODULE_DESCRIPTION("SGI Altix RTC Timer");
43 MODULE_LICENSE("GPL");
44
45 /* name of the device, usually in /dev */
46 #define MMTIMER_NAME "mmtimer"
47 #define MMTIMER_DESC "SGI Altix RTC Timer"
48 #define MMTIMER_VERSION "2.0"
49
50 #define RTC_BITS 55 /* 55 bits for this implementation */
51
52 extern unsigned long sn_rtc_cycles_per_second;
53
54 #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
55
56 #define rtc_time() (*RTC_COUNTER_ADDR)
57
58 static int mmtimer_ioctl(struct inode *inode, struct file *file,
59 unsigned int cmd, unsigned long arg);
60 static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
61
62 /*
63 * Period in femtoseconds (10^-15 s)
64 */
65 static unsigned long mmtimer_femtoperiod = 0;
66
67 static struct file_operations mmtimer_fops = {
68 .owner = THIS_MODULE,
69 .mmap = mmtimer_mmap,
70 .ioctl = mmtimer_ioctl,
71 };
72
73 /*
74 * Comparators and their associated info. Shub has
75 * three comparison registers.
76 */
77
78 /*
79 * We only have comparison registers RTC1-4 currently available per
80 * node. RTC0 is used by SAL.
81 */
82 #define NUM_COMPARATORS 3
83 /* Check for an RTC interrupt pending */
84 static int inline mmtimer_int_pending(int comparator)
85 {
86 if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
87 SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
88 return 1;
89 else
90 return 0;
91 }
92 /* Clear the RTC interrupt pending bit */
93 static void inline mmtimer_clr_int_pending(int comparator)
94 {
95 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
96 SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
97 }
98
99 /* Setup timer on comparator RTC1 */
100 static void inline mmtimer_setup_int_0(u64 expires)
101 {
102 u64 val;
103
104 /* Disable interrupt */
105 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
106
107 /* Initialize comparator value */
108 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
109
110 /* Clear pending bit */
111 mmtimer_clr_int_pending(0);
112
113 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
114 ((u64)cpu_physical_id(smp_processor_id()) <<
115 SH_RTC1_INT_CONFIG_PID_SHFT);
116
117 /* Set configuration */
118 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
119
120 /* Enable RTC interrupts */
121 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
122
123 /* Initialize comparator value */
124 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
125
126
127 }
128
129 /* Setup timer on comparator RTC2 */
130 static void inline mmtimer_setup_int_1(u64 expires)
131 {
132 u64 val;
133
134 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
135
136 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
137
138 mmtimer_clr_int_pending(1);
139
140 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
141 ((u64)cpu_physical_id(smp_processor_id()) <<
142 SH_RTC2_INT_CONFIG_PID_SHFT);
143
144 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
145
146 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
147
148 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
149 }
150
151 /* Setup timer on comparator RTC3 */
152 static void inline mmtimer_setup_int_2(u64 expires)
153 {
154 u64 val;
155
156 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
157
158 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
159
160 mmtimer_clr_int_pending(2);
161
162 val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
163 ((u64)cpu_physical_id(smp_processor_id()) <<
164 SH_RTC3_INT_CONFIG_PID_SHFT);
165
166 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
167
168 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
169
170 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
171 }
172
173 /*
174 * This function must be called with interrupts disabled and preemption off
175 * in order to insure that the setup succeeds in a deterministic time frame.
176 * It will check if the interrupt setup succeeded.
177 * mmtimer_setup will return the cycles that we were too late if the
178 * initialization failed.
179 */
180 static int inline mmtimer_setup(int comparator, unsigned long expires)
181 {
182
183 long diff;
184
185 switch (comparator) {
186 case 0:
187 mmtimer_setup_int_0(expires);
188 break;
189 case 1:
190 mmtimer_setup_int_1(expires);
191 break;
192 case 2:
193 mmtimer_setup_int_2(expires);
194 break;
195 }
196 /* We might've missed our expiration time */
197 diff = rtc_time() - expires;
198 if (diff > 0) {
199 if (mmtimer_int_pending(comparator)) {
200 /* We'll get an interrupt for this once we're done */
201 return 0;
202 }
203 /* Looks like we missed it */
204 return diff;
205 }
206
207 return 0;
208 }
209
210 static int inline mmtimer_disable_int(long nasid, int comparator)
211 {
212 switch (comparator) {
213 case 0:
214 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
215 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
216 break;
217 case 1:
218 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
219 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
220 break;
221 case 2:
222 nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
223 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
224 break;
225 default:
226 return -EFAULT;
227 }
228 return 0;
229 }
230
231 #define TIMER_OFF 0xbadcabLL
232
233 /* There is one of these for each comparator */
234 typedef struct mmtimer {
235 spinlock_t lock ____cacheline_aligned;
236 struct k_itimer *timer;
237 int i;
238 int cpu;
239 struct tasklet_struct tasklet;
240 } mmtimer_t;
241
242 /*
243 * Total number of comparators is comparators/node * MAX nodes/running kernel
244 */
245 static mmtimer_t timers[NUM_COMPARATORS*MAX_COMPACT_NODES];
246
247 /**
248 * mmtimer_ioctl - ioctl interface for /dev/mmtimer
249 * @inode: inode of the device
250 * @file: file structure for the device
251 * @cmd: command to execute
252 * @arg: optional argument to command
253 *
254 * Executes the command specified by @cmd. Returns 0 for success, < 0 for
255 * failure.
256 *
257 * Valid commands:
258 *
259 * %MMTIMER_GETOFFSET - Should return the offset (relative to the start
260 * of the page where the registers are mapped) for the counter in question.
261 *
262 * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
263 * seconds
264 *
265 * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
266 * specified by @arg
267 *
268 * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
269 *
270 * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
271 *
272 * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
273 * in the address specified by @arg.
274 */
275 static int mmtimer_ioctl(struct inode *inode, struct file *file,
276 unsigned int cmd, unsigned long arg)
277 {
278 int ret = 0;
279
280 switch (cmd) {
281 case MMTIMER_GETOFFSET: /* offset of the counter */
282 /*
283 * SN RTC registers are on their own 64k page
284 */
285 if(PAGE_SIZE <= (1 << 16))
286 ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
287 else
288 ret = -ENOSYS;
289 break;
290
291 case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
292 if(copy_to_user((unsigned long __user *)arg,
293 &mmtimer_femtoperiod, sizeof(unsigned long)))
294 return -EFAULT;
295 break;
296
297 case MMTIMER_GETFREQ: /* frequency in Hz */
298 if(copy_to_user((unsigned long __user *)arg,
299 &sn_rtc_cycles_per_second,
300 sizeof(unsigned long)))
301 return -EFAULT;
302 ret = 0;
303 break;
304
305 case MMTIMER_GETBITS: /* number of bits in the clock */
306 ret = RTC_BITS;
307 break;
308
309 case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
310 ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
311 break;
312
313 case MMTIMER_GETCOUNTER:
314 if(copy_to_user((unsigned long __user *)arg,
315 RTC_COUNTER_ADDR, sizeof(unsigned long)))
316 return -EFAULT;
317 break;
318 default:
319 ret = -ENOSYS;
320 break;
321 }
322
323 return ret;
324 }
325
326 /**
327 * mmtimer_mmap - maps the clock's registers into userspace
328 * @file: file structure for the device
329 * @vma: VMA to map the registers into
330 *
331 * Calls remap_pfn_range() to map the clock's registers into
332 * the calling process' address space.
333 */
334 static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
335 {
336 unsigned long mmtimer_addr;
337
338 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
339 return -EINVAL;
340
341 if (vma->vm_flags & VM_WRITE)
342 return -EPERM;
343
344 if (PAGE_SIZE > (1 << 16))
345 return -ENOSYS;
346
347 vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED );
348 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
349
350 mmtimer_addr = __pa(RTC_COUNTER_ADDR);
351 mmtimer_addr &= ~(PAGE_SIZE - 1);
352 mmtimer_addr &= 0xfffffffffffffffUL;
353
354 if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
355 PAGE_SIZE, vma->vm_page_prot)) {
356 printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
357 return -EAGAIN;
358 }
359
360 return 0;
361 }
362
363 static struct miscdevice mmtimer_miscdev = {
364 SGI_MMTIMER,
365 MMTIMER_NAME,
366 &mmtimer_fops
367 };
368
369 static struct timespec sgi_clock_offset;
370 static int sgi_clock_period;
371
372 /*
373 * Posix Timer Interface
374 */
375
376 static struct timespec sgi_clock_offset;
377 static int sgi_clock_period;
378
379 static int sgi_clock_get(struct timespec *tp)
380 {
381 u64 nsec;
382
383 nsec = rtc_time() * sgi_clock_period
384 + sgi_clock_offset.tv_nsec;
385 tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
386 + sgi_clock_offset.tv_sec;
387 return 0;
388 };
389
390 static int sgi_clock_set(struct timespec *tp)
391 {
392
393 u64 nsec;
394 u64 rem;
395
396 nsec = rtc_time() * sgi_clock_period;
397
398 sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
399
400 if (rem <= tp->tv_nsec)
401 sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
402 else {
403 sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
404 sgi_clock_offset.tv_sec--;
405 }
406 return 0;
407 }
408
409 /*
410 * Schedule the next periodic interrupt. This function will attempt
411 * to schedule a periodic interrupt later if necessary. If the scheduling
412 * of an interrupt fails then the time to skip is lengthened
413 * exponentially in order to ensure that the next interrupt
414 * can be properly scheduled..
415 */
416 static int inline reschedule_periodic_timer(mmtimer_t *x)
417 {
418 int n;
419 struct k_itimer *t = x->timer;
420
421 t->it_timer.magic = x->i;
422 t->it_overrun--;
423
424 n = 0;
425 do {
426
427 t->it_timer.expires += t->it_incr << n;
428 t->it_overrun += 1 << n;
429 n++;
430 if (n > 20)
431 return 1;
432
433 } while (mmtimer_setup(x->i, t->it_timer.expires));
434
435 return 0;
436 }
437
438 /**
439 * mmtimer_interrupt - timer interrupt handler
440 * @irq: irq received
441 * @dev_id: device the irq came from
442 * @regs: register state upon receipt of the interrupt
443 *
444 * Called when one of the comarators matches the counter, This
445 * routine will send signals to processes that have requested
446 * them.
447 *
448 * This interrupt is run in an interrupt context
449 * by the SHUB. It is therefore safe to locally access SHub
450 * registers.
451 */
452 static irqreturn_t
453 mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
454 {
455 int i;
456 mmtimer_t *base = timers + cpuid_to_cnodeid(smp_processor_id()) *
457 NUM_COMPARATORS;
458 unsigned long expires = 0;
459 int result = IRQ_NONE;
460
461 /*
462 * Do this once for each comparison register
463 */
464 for (i = 0; i < NUM_COMPARATORS; i++) {
465 /* Make sure this doesn't get reused before tasklet_sched */
466 spin_lock(&base[i].lock);
467 if (base[i].cpu == smp_processor_id()) {
468 if (base[i].timer)
469 expires = base[i].timer->it_timer.expires;
470 /* expires test won't work with shared irqs */
471 if ((mmtimer_int_pending(i) > 0) ||
472 (expires && (expires < rtc_time()))) {
473 mmtimer_clr_int_pending(i);
474 tasklet_schedule(&base[i].tasklet);
475 result = IRQ_HANDLED;
476 }
477 }
478 spin_unlock(&base[i].lock);
479 expires = 0;
480 }
481 return result;
482 }
483
484 void mmtimer_tasklet(unsigned long data) {
485 mmtimer_t *x = (mmtimer_t *)data;
486 struct k_itimer *t = x->timer;
487 unsigned long flags;
488
489 if (t == NULL)
490 return;
491
492 /* Send signal and deal with periodic signals */
493 spin_lock_irqsave(&t->it_lock, flags);
494 spin_lock(&x->lock);
495 /* If timer was deleted between interrupt and here, leave */
496 if (t != x->timer)
497 goto out;
498 t->it_overrun = 0;
499
500 if (tasklist_lock.write_lock || posix_timer_event(t, 0) != 0) {
501
502 // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");
503
504 t->it_overrun++;
505 }
506 if(t->it_incr) {
507 /* Periodic timer */
508 if (reschedule_periodic_timer(x)) {
509 printk(KERN_WARNING "mmtimer: unable to reschedule\n");
510 x->timer = NULL;
511 }
512 } else {
513 /* Ensure we don't false trigger in mmtimer_interrupt */
514 t->it_timer.expires = 0;
515 }
516 t->it_overrun_last = t->it_overrun;
517 out:
518 spin_unlock(&x->lock);
519 spin_unlock_irqrestore(&t->it_lock, flags);
520 }
521
522 static int sgi_timer_create(struct k_itimer *timer)
523 {
524 /* Insure that a newly created timer is off */
525 timer->it_timer.magic = TIMER_OFF;
526 return 0;
527 }
528
529 /* This does not really delete a timer. It just insures
530 * that the timer is not active
531 *
532 * Assumption: it_lock is already held with irq's disabled
533 */
534 static int sgi_timer_del(struct k_itimer *timr)
535 {
536 int i = timr->it_timer.magic;
537 cnodeid_t nodeid = timr->it_timer.data;
538 mmtimer_t *t = timers + nodeid * NUM_COMPARATORS +i;
539 unsigned long irqflags;
540
541 if (i != TIMER_OFF) {
542 spin_lock_irqsave(&t->lock, irqflags);
543 mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
544 t->timer = NULL;
545 timr->it_timer.magic = TIMER_OFF;
546 timr->it_timer.expires = 0;
547 spin_unlock_irqrestore(&t->lock, irqflags);
548 }
549 return 0;
550 }
551
552 #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
553 #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
554
555 /* Assumption: it_lock is already held with irq's disabled */
556 static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
557 {
558
559 if (timr->it_timer.magic == TIMER_OFF) {
560 cur_setting->it_interval.tv_nsec = 0;
561 cur_setting->it_interval.tv_sec = 0;
562 cur_setting->it_value.tv_nsec = 0;
563 cur_setting->it_value.tv_sec =0;
564 return;
565 }
566
567 ns_to_timespec(cur_setting->it_interval, timr->it_incr * sgi_clock_period);
568 ns_to_timespec(cur_setting->it_value, (timr->it_timer.expires - rtc_time())* sgi_clock_period);
569 return;
570 }
571
572
573 static int sgi_timer_set(struct k_itimer *timr, int flags,
574 struct itimerspec * new_setting,
575 struct itimerspec * old_setting)
576 {
577
578 int i;
579 unsigned long when, period, irqflags;
580 int err = 0;
581 cnodeid_t nodeid;
582 mmtimer_t *base;
583
584 if (old_setting)
585 sgi_timer_get(timr, old_setting);
586
587 sgi_timer_del(timr);
588 when = timespec_to_ns(new_setting->it_value);
589 period = timespec_to_ns(new_setting->it_interval);
590
591 if (when == 0)
592 /* Clear timer */
593 return 0;
594
595 if (flags & TIMER_ABSTIME) {
596 struct timespec n;
597
598 getnstimeofday(&n);
599 when -= timespec_to_ns(n);
600 }
601
602 /*
603 * Convert to sgi clock period. Need to keep rtc_time() as near as possible
604 * to getnstimeofday() in order to be as faithful as possible to the time
605 * specified.
606 */
607 when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
608 period = (period + sgi_clock_period - 1) / sgi_clock_period;
609
610 /*
611 * We are allocating a local SHub comparator. If we would be moved to another
612 * cpu then another SHub may be local to us. Prohibit that by switching off
613 * preemption.
614 */
615 preempt_disable();
616
617 nodeid = cpuid_to_cnodeid(smp_processor_id());
618 base = timers + nodeid * NUM_COMPARATORS;
619 retry:
620 /* Don't use an allocated timer, or a deleted one that's pending */
621 for(i = 0; i< NUM_COMPARATORS; i++) {
622 if (!base[i].timer && !base[i].tasklet.state) {
623 break;
624 }
625 }
626
627 if (i == NUM_COMPARATORS) {
628 preempt_enable();
629 return -EBUSY;
630 }
631
632 spin_lock_irqsave(&base[i].lock, irqflags);
633
634 if (base[i].timer || base[i].tasklet.state != 0) {
635 spin_unlock_irqrestore(&base[i].lock, irqflags);
636 goto retry;
637 }
638 base[i].timer = timr;
639 base[i].cpu = smp_processor_id();
640
641 timr->it_timer.magic = i;
642 timr->it_timer.data = nodeid;
643 timr->it_incr = period;
644 timr->it_timer.expires = when;
645
646 if (period == 0) {
647 if (mmtimer_setup(i, when)) {
648 mmtimer_disable_int(-1, i);
649 posix_timer_event(timr, 0);
650 timr->it_timer.expires = 0;
651 }
652 } else {
653 timr->it_timer.expires -= period;
654 if (reschedule_periodic_timer(base+i))
655 err = -EINVAL;
656 }
657
658 spin_unlock_irqrestore(&base[i].lock, irqflags);
659
660 preempt_enable();
661
662 return err;
663 }
664
665 static struct k_clock sgi_clock = {
666 .res = 0,
667 .clock_set = sgi_clock_set,
668 .clock_get = sgi_clock_get,
669 .timer_create = sgi_timer_create,
670 .nsleep = do_posix_clock_nonanosleep,
671 .timer_set = sgi_timer_set,
672 .timer_del = sgi_timer_del,
673 .timer_get = sgi_timer_get
674 };
675
676 /**
677 * mmtimer_init - device initialization routine
678 *
679 * Does initial setup for the mmtimer device.
680 */
681 static int __init mmtimer_init(void)
682 {
683 unsigned i;
684
685 if (!ia64_platform_is("sn2"))
686 return -1;
687
688 /*
689 * Sanity check the cycles/sec variable
690 */
691 if (sn_rtc_cycles_per_second < 100000) {
692 printk(KERN_ERR "%s: unable to determine clock frequency\n",
693 MMTIMER_NAME);
694 return -1;
695 }
696
697 mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
698 2) / sn_rtc_cycles_per_second;
699
700 for (i=0; i< NUM_COMPARATORS*MAX_COMPACT_NODES; i++) {
701 spin_lock_init(&timers[i].lock);
702 timers[i].timer = NULL;
703 timers[i].cpu = 0;
704 timers[i].i = i % NUM_COMPARATORS;
705 tasklet_init(&timers[i].tasklet, mmtimer_tasklet, (unsigned long) (timers+i));
706 }
707
708 if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) {
709 printk(KERN_WARNING "%s: unable to allocate interrupt.",
710 MMTIMER_NAME);
711 return -1;
712 }
713
714 strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME);
715 if (misc_register(&mmtimer_miscdev)) {
716 printk(KERN_ERR "%s: failed to register device\n",
717 MMTIMER_NAME);
718 return -1;
719 }
720
721 sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
722 register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
723
724 printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
725 sn_rtc_cycles_per_second/(unsigned long)1E6);
726
727 return 0;
728 }
729
730 module_init(mmtimer_init);
731
732
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