1 /* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Rickard E. (Rik) Faith <faith@valinux.com>
29 * Jeff Hartmann <jhartmann@valinux.com>
30 * Keith Whitwell <keith@tungstengraphics.com>
31 *
32 * Rewritten by:
33 * Gareth Hughes <gareth@valinux.com>
34 */
35
36 #include "drmP.h"
37 #include "drm.h"
38 #include "mga_drm.h"
39 #include "mga_drv.h"
40
41 #define MGA_DEFAULT_USEC_TIMEOUT 10000
42 #define MGA_FREELIST_DEBUG 0
43
44
45 /* ================================================================
46 * Engine control
47 */
48
49 int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
50 {
51 u32 status = 0;
52 int i;
53 DRM_DEBUG( "\n" );
54
55 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
56 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
57 if ( status == MGA_ENDPRDMASTS ) {
58 MGA_WRITE8( MGA_CRTC_INDEX, 0 );
59 return 0;
60 }
61 DRM_UDELAY( 1 );
62 }
63
64 #if MGA_DMA_DEBUG
65 DRM_ERROR( "failed!\n" );
66 DRM_INFO( " status=0x%08x\n", status );
67 #endif
68 return DRM_ERR(EBUSY);
69 }
70
71 int mga_do_dma_idle( drm_mga_private_t *dev_priv )
72 {
73 u32 status = 0;
74 int i;
75 DRM_DEBUG( "\n" );
76
77 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
78 status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
79 if ( status == MGA_ENDPRDMASTS ) return 0;
80 DRM_UDELAY( 1 );
81 }
82
83 #if MGA_DMA_DEBUG
84 DRM_ERROR( "failed! status=0x%08x\n", status );
85 #endif
86 return DRM_ERR(EBUSY);
87 }
88
89 int mga_do_dma_reset( drm_mga_private_t *dev_priv )
90 {
91 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
92 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
93
94 DRM_DEBUG( "\n" );
95
96 /* The primary DMA stream should look like new right about now.
97 */
98 primary->tail = 0;
99 primary->space = primary->size;
100 primary->last_flush = 0;
101
102 sarea_priv->last_wrap = 0;
103
104 /* FIXME: Reset counters, buffer ages etc...
105 */
106
107 /* FIXME: What else do we need to reinitialize? WARP stuff?
108 */
109
110 return 0;
111 }
112
113 int mga_do_engine_reset( drm_mga_private_t *dev_priv )
114 {
115 DRM_DEBUG( "\n" );
116
117 /* Okay, so we've completely screwed up and locked the engine.
118 * How about we clean up after ourselves?
119 */
120 MGA_WRITE( MGA_RST, MGA_SOFTRESET );
121 DRM_UDELAY( 15 ); /* Wait at least 10 usecs */
122 MGA_WRITE( MGA_RST, 0 );
123
124 /* Initialize the registers that get clobbered by the soft
125 * reset. Many of the core register values survive a reset,
126 * but the drawing registers are basically all gone.
127 *
128 * 3D clients should probably die after calling this. The X
129 * server should reset the engine state to known values.
130 */
131 #if 0
132 MGA_WRITE( MGA_PRIMPTR,
133 virt_to_bus((void *)dev_priv->prim.status_page) |
134 MGA_PRIMPTREN0 |
135 MGA_PRIMPTREN1 );
136 #endif
137
138 MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
139 MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN );
140
141 /* The primary DMA stream should look like new right about now.
142 */
143 mga_do_dma_reset( dev_priv );
144
145 /* This bad boy will never fail.
146 */
147 return 0;
148 }
149
150
151 /* ================================================================
152 * Primary DMA stream
153 */
154
155 void mga_do_dma_flush( drm_mga_private_t *dev_priv )
156 {
157 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
158 u32 head, tail;
159 u32 status = 0;
160 int i;
161 DMA_LOCALS;
162 DRM_DEBUG( "\n" );
163
164 /* We need to wait so that we can do an safe flush */
165 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
166 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
167 if ( status == MGA_ENDPRDMASTS ) break;
168 DRM_UDELAY( 1 );
169 }
170
171 if ( primary->tail == primary->last_flush ) {
172 DRM_DEBUG( " bailing out...\n" );
173 return;
174 }
175
176 tail = primary->tail + dev_priv->primary->offset;
177
178 /* We need to pad the stream between flushes, as the card
179 * actually (partially?) reads the first of these commands.
180 * See page 4-16 in the G400 manual, middle of the page or so.
181 */
182 BEGIN_DMA( 1 );
183
184 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
185 MGA_DMAPAD, 0x00000000,
186 MGA_DMAPAD, 0x00000000,
187 MGA_DMAPAD, 0x00000000 );
188
189 ADVANCE_DMA();
190
191 primary->last_flush = primary->tail;
192
193 head = MGA_READ( MGA_PRIMADDRESS );
194
195 if ( head <= tail ) {
196 primary->space = primary->size - primary->tail;
197 } else {
198 primary->space = head - tail;
199 }
200
201 DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset );
202 DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset );
203 DRM_DEBUG( " space = 0x%06x\n", primary->space );
204
205 mga_flush_write_combine();
206 MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
207
208 DRM_DEBUG( "done.\n" );
209 }
210
211 void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
212 {
213 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
214 u32 head, tail;
215 DMA_LOCALS;
216 DRM_DEBUG( "\n" );
217
218 BEGIN_DMA_WRAP();
219
220 DMA_BLOCK( MGA_DMAPAD, 0x00000000,
221 MGA_DMAPAD, 0x00000000,
222 MGA_DMAPAD, 0x00000000,
223 MGA_DMAPAD, 0x00000000 );
224
225 ADVANCE_DMA();
226
227 tail = primary->tail + dev_priv->primary->offset;
228
229 primary->tail = 0;
230 primary->last_flush = 0;
231 primary->last_wrap++;
232
233 head = MGA_READ( MGA_PRIMADDRESS );
234
235 if ( head == dev_priv->primary->offset ) {
236 primary->space = primary->size;
237 } else {
238 primary->space = head - dev_priv->primary->offset;
239 }
240
241 DRM_DEBUG( " head = 0x%06lx\n",
242 head - dev_priv->primary->offset );
243 DRM_DEBUG( " tail = 0x%06x\n", primary->tail );
244 DRM_DEBUG( " wrap = %d\n", primary->last_wrap );
245 DRM_DEBUG( " space = 0x%06x\n", primary->space );
246
247 mga_flush_write_combine();
248 MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
249
250 set_bit( 0, &primary->wrapped );
251 DRM_DEBUG( "done.\n" );
252 }
253
254 void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
255 {
256 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
257 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
258 u32 head = dev_priv->primary->offset;
259 DRM_DEBUG( "\n" );
260
261 sarea_priv->last_wrap++;
262 DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap );
263
264 mga_flush_write_combine();
265 MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
266
267 clear_bit( 0, &primary->wrapped );
268 DRM_DEBUG( "done.\n" );
269 }
270
271
272 /* ================================================================
273 * Freelist management
274 */
275
276 #define MGA_BUFFER_USED ~0
277 #define MGA_BUFFER_FREE 0
278
279 #if MGA_FREELIST_DEBUG
280 static void mga_freelist_print( drm_device_t *dev )
281 {
282 drm_mga_private_t *dev_priv = dev->dev_private;
283 drm_mga_freelist_t *entry;
284
285 DRM_INFO( "\n" );
286 DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
287 dev_priv->sarea_priv->last_dispatch,
288 (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
289 dev_priv->primary->offset) );
290 DRM_INFO( "current freelist:\n" );
291
292 for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
293 DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n",
294 entry, entry->buf->idx, entry->age.head,
295 entry->age.head - dev_priv->primary->offset );
296 }
297 DRM_INFO( "\n" );
298 }
299 #endif
300
301 static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
302 {
303 drm_device_dma_t *dma = dev->dma;
304 drm_buf_t *buf;
305 drm_mga_buf_priv_t *buf_priv;
306 drm_mga_freelist_t *entry;
307 int i;
308 DRM_DEBUG( "count=%d\n", dma->buf_count );
309
310 dev_priv->head = drm_alloc( sizeof(drm_mga_freelist_t),
311 DRM_MEM_DRIVER );
312 if ( dev_priv->head == NULL )
313 return DRM_ERR(ENOMEM);
314
315 memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
316 SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
317
318 for ( i = 0 ; i < dma->buf_count ; i++ ) {
319 buf = dma->buflist[i];
320 buf_priv = buf->dev_private;
321
322 entry = drm_alloc( sizeof(drm_mga_freelist_t),
323 DRM_MEM_DRIVER );
324 if ( entry == NULL )
325 return DRM_ERR(ENOMEM);
326
327 memset( entry, 0, sizeof(drm_mga_freelist_t) );
328
329 entry->next = dev_priv->head->next;
330 entry->prev = dev_priv->head;
331 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
332 entry->buf = buf;
333
334 if ( dev_priv->head->next != NULL )
335 dev_priv->head->next->prev = entry;
336 if ( entry->next == NULL )
337 dev_priv->tail = entry;
338
339 buf_priv->list_entry = entry;
340 buf_priv->discard = 0;
341 buf_priv->dispatched = 0;
342
343 dev_priv->head->next = entry;
344 }
345
346 return 0;
347 }
348
349 static void mga_freelist_cleanup( drm_device_t *dev )
350 {
351 drm_mga_private_t *dev_priv = dev->dev_private;
352 drm_mga_freelist_t *entry;
353 drm_mga_freelist_t *next;
354 DRM_DEBUG( "\n" );
355
356 entry = dev_priv->head;
357 while ( entry ) {
358 next = entry->next;
359 drm_free( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
360 entry = next;
361 }
362
363 dev_priv->head = dev_priv->tail = NULL;
364 }
365
366 #if 0
367 /* FIXME: Still needed?
368 */
369 static void mga_freelist_reset( drm_device_t *dev )
370 {
371 drm_device_dma_t *dma = dev->dma;
372 drm_buf_t *buf;
373 drm_mga_buf_priv_t *buf_priv;
374 int i;
375
376 for ( i = 0 ; i < dma->buf_count ; i++ ) {
377 buf = dma->buflist[i];
378 buf_priv = buf->dev_private;
379 SET_AGE( &buf_priv->list_entry->age,
380 MGA_BUFFER_FREE, 0 );
381 }
382 }
383 #endif
384
385 static drm_buf_t *mga_freelist_get( drm_device_t *dev )
386 {
387 drm_mga_private_t *dev_priv = dev->dev_private;
388 drm_mga_freelist_t *next;
389 drm_mga_freelist_t *prev;
390 drm_mga_freelist_t *tail = dev_priv->tail;
391 u32 head, wrap;
392 DRM_DEBUG( "\n" );
393
394 head = MGA_READ( MGA_PRIMADDRESS );
395 wrap = dev_priv->sarea_priv->last_wrap;
396
397 DRM_DEBUG( " tail=0x%06lx %d\n",
398 tail->age.head ?
399 tail->age.head - dev_priv->primary->offset : 0,
400 tail->age.wrap );
401 DRM_DEBUG( " head=0x%06lx %d\n",
402 head - dev_priv->primary->offset, wrap );
403
404 if ( TEST_AGE( &tail->age, head, wrap ) ) {
405 prev = dev_priv->tail->prev;
406 next = dev_priv->tail;
407 prev->next = NULL;
408 next->prev = next->next = NULL;
409 dev_priv->tail = prev;
410 SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
411 return next->buf;
412 }
413
414 DRM_DEBUG( "returning NULL!\n" );
415 return NULL;
416 }
417
418 int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
419 {
420 drm_mga_private_t *dev_priv = dev->dev_private;
421 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
422 drm_mga_freelist_t *head, *entry, *prev;
423
424 DRM_DEBUG( "age=0x%06lx wrap=%d\n",
425 buf_priv->list_entry->age.head -
426 dev_priv->primary->offset,
427 buf_priv->list_entry->age.wrap );
428
429 entry = buf_priv->list_entry;
430 head = dev_priv->head;
431
432 if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
433 SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
434 prev = dev_priv->tail;
435 prev->next = entry;
436 entry->prev = prev;
437 entry->next = NULL;
438 } else {
439 prev = head->next;
440 head->next = entry;
441 prev->prev = entry;
442 entry->prev = head;
443 entry->next = prev;
444 }
445
446 return 0;
447 }
448
449
450 /* ================================================================
451 * DMA initialization, cleanup
452 */
453
454 static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
455 {
456 drm_mga_private_t *dev_priv;
457 int ret;
458 DRM_DEBUG( "\n" );
459
460 dev_priv = drm_alloc( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
461 if ( !dev_priv )
462 return DRM_ERR(ENOMEM);
463
464 memset( dev_priv, 0, sizeof(drm_mga_private_t) );
465
466 dev_priv->chipset = init->chipset;
467
468 dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
469
470 if ( init->sgram ) {
471 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
472 } else {
473 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
474 }
475 dev_priv->maccess = init->maccess;
476
477 dev_priv->fb_cpp = init->fb_cpp;
478 dev_priv->front_offset = init->front_offset;
479 dev_priv->front_pitch = init->front_pitch;
480 dev_priv->back_offset = init->back_offset;
481 dev_priv->back_pitch = init->back_pitch;
482
483 dev_priv->depth_cpp = init->depth_cpp;
484 dev_priv->depth_offset = init->depth_offset;
485 dev_priv->depth_pitch = init->depth_pitch;
486
487 /* FIXME: Need to support AGP textures...
488 */
489 dev_priv->texture_offset = init->texture_offset[0];
490 dev_priv->texture_size = init->texture_size[0];
491
492 DRM_GETSAREA();
493
494 if(!dev_priv->sarea) {
495 DRM_ERROR( "failed to find sarea!\n" );
496 /* Assign dev_private so we can do cleanup. */
497 dev->dev_private = (void *)dev_priv;
498 mga_do_cleanup_dma( dev );
499 return DRM_ERR(EINVAL);
500 }
501
502 dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
503 if(!dev_priv->mmio) {
504 DRM_ERROR( "failed to find mmio region!\n" );
505 /* Assign dev_private so we can do cleanup. */
506 dev->dev_private = (void *)dev_priv;
507 mga_do_cleanup_dma( dev );
508 return DRM_ERR(EINVAL);
509 }
510 dev_priv->status = drm_core_findmap(dev, init->status_offset);
511 if(!dev_priv->status) {
512 DRM_ERROR( "failed to find status page!\n" );
513 /* Assign dev_private so we can do cleanup. */
514 dev->dev_private = (void *)dev_priv;
515 mga_do_cleanup_dma( dev );
516 return DRM_ERR(EINVAL);
517 }
518 dev_priv->warp = drm_core_findmap(dev, init->warp_offset);
519 if(!dev_priv->warp) {
520 DRM_ERROR( "failed to find warp microcode region!\n" );
521 /* Assign dev_private so we can do cleanup. */
522 dev->dev_private = (void *)dev_priv;
523 mga_do_cleanup_dma( dev );
524 return DRM_ERR(EINVAL);
525 }
526 dev_priv->primary = drm_core_findmap(dev, init->primary_offset);
527 if(!dev_priv->primary) {
528 DRM_ERROR( "failed to find primary dma region!\n" );
529 /* Assign dev_private so we can do cleanup. */
530 dev->dev_private = (void *)dev_priv;
531 mga_do_cleanup_dma( dev );
532 return DRM_ERR(EINVAL);
533 }
534 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
535 if(!dev->agp_buffer_map) {
536 DRM_ERROR( "failed to find dma buffer region!\n" );
537 /* Assign dev_private so we can do cleanup. */
538 dev->dev_private = (void *)dev_priv;
539 mga_do_cleanup_dma( dev );
540 return DRM_ERR(EINVAL);
541 }
542
543 dev_priv->sarea_priv =
544 (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
545 init->sarea_priv_offset);
546
547 drm_core_ioremap( dev_priv->warp, dev );
548 drm_core_ioremap( dev_priv->primary, dev );
549 drm_core_ioremap( dev->agp_buffer_map, dev );
550
551 if(!dev_priv->warp->handle ||
552 !dev_priv->primary->handle ||
553 !dev->agp_buffer_map->handle ) {
554 DRM_ERROR( "failed to ioremap agp regions!\n" );
555 /* Assign dev_private so we can do cleanup. */
556 dev->dev_private = (void *)dev_priv;
557 mga_do_cleanup_dma( dev );
558 return DRM_ERR(ENOMEM);
559 }
560
561 ret = mga_warp_install_microcode( dev_priv );
562 if ( ret < 0 ) {
563 DRM_ERROR( "failed to install WARP ucode!\n" );
564 /* Assign dev_private so we can do cleanup. */
565 dev->dev_private = (void *)dev_priv;
566 mga_do_cleanup_dma( dev );
567 return ret;
568 }
569
570 ret = mga_warp_init( dev_priv );
571 if ( ret < 0 ) {
572 DRM_ERROR( "failed to init WARP engine!\n" );
573 /* Assign dev_private so we can do cleanup. */
574 dev->dev_private = (void *)dev_priv;
575 mga_do_cleanup_dma( dev );
576 return ret;
577 }
578
579 dev_priv->prim.status = (u32 *)dev_priv->status->handle;
580
581 mga_do_wait_for_idle( dev_priv );
582
583 /* Init the primary DMA registers.
584 */
585 MGA_WRITE( MGA_PRIMADDRESS,
586 dev_priv->primary->offset | MGA_DMA_GENERAL );
587 #if 0
588 MGA_WRITE( MGA_PRIMPTR,
589 virt_to_bus((void *)dev_priv->prim.status) |
590 MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */
591 MGA_PRIMPTREN1 ); /* DWGSYNC */
592 #endif
593
594 dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
595 dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
596 + dev_priv->primary->size);
597 dev_priv->prim.size = dev_priv->primary->size;
598
599 dev_priv->prim.tail = 0;
600 dev_priv->prim.space = dev_priv->prim.size;
601 dev_priv->prim.wrapped = 0;
602
603 dev_priv->prim.last_flush = 0;
604 dev_priv->prim.last_wrap = 0;
605
606 dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
607
608 dev_priv->prim.status[0] = dev_priv->primary->offset;
609 dev_priv->prim.status[1] = 0;
610
611 dev_priv->sarea_priv->last_wrap = 0;
612 dev_priv->sarea_priv->last_frame.head = 0;
613 dev_priv->sarea_priv->last_frame.wrap = 0;
614
615 if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
616 DRM_ERROR( "could not initialize freelist\n" );
617 /* Assign dev_private so we can do cleanup. */
618 dev->dev_private = (void *)dev_priv;
619 mga_do_cleanup_dma( dev );
620 return DRM_ERR(ENOMEM);
621 }
622
623 /* Make dev_private visable to others. */
624 dev->dev_private = (void *)dev_priv;
625 return 0;
626 }
627
628 int mga_do_cleanup_dma( drm_device_t *dev )
629 {
630 DRM_DEBUG( "\n" );
631
632 /* Make sure interrupts are disabled here because the uninstall ioctl
633 * may not have been called from userspace and after dev_private
634 * is freed, it's too late.
635 */
636 if ( dev->irq_enabled ) drm_irq_uninstall(dev);
637
638 if ( dev->dev_private ) {
639 drm_mga_private_t *dev_priv = dev->dev_private;
640
641 if ( dev_priv->warp != NULL )
642 drm_core_ioremapfree( dev_priv->warp, dev );
643 if ( dev_priv->primary != NULL )
644 drm_core_ioremapfree( dev_priv->primary, dev );
645 if ( dev->agp_buffer_map != NULL )
646 drm_core_ioremapfree( dev->agp_buffer_map, dev );
647
648 if ( dev_priv->head != NULL ) {
649 mga_freelist_cleanup( dev );
650 }
651
652 drm_free( dev->dev_private, sizeof(drm_mga_private_t),
653 DRM_MEM_DRIVER );
654 dev->dev_private = NULL;
655 }
656
657 return 0;
658 }
659
660 int mga_dma_init( DRM_IOCTL_ARGS )
661 {
662 DRM_DEVICE;
663 drm_mga_init_t init;
664
665 LOCK_TEST_WITH_RETURN( dev, filp );
666
667 DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t __user *)data, sizeof(init) );
668
669 switch ( init.func ) {
670 case MGA_INIT_DMA:
671 return mga_do_init_dma( dev, &init );
672 case MGA_CLEANUP_DMA:
673 return mga_do_cleanup_dma( dev );
674 }
675
676 return DRM_ERR(EINVAL);
677 }
678
679
680 /* ================================================================
681 * Primary DMA stream management
682 */
683
684 int mga_dma_flush( DRM_IOCTL_ARGS )
685 {
686 DRM_DEVICE;
687 drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
688 drm_lock_t lock;
689
690 LOCK_TEST_WITH_RETURN( dev, filp );
691
692 DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t __user *)data, sizeof(lock) );
693
694 DRM_DEBUG( "%s%s%s\n",
695 (lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "",
696 (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
697 (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" );
698
699 WRAP_WAIT_WITH_RETURN( dev_priv );
700
701 if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
702 mga_do_dma_flush( dev_priv );
703 }
704
705 if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
706 #if MGA_DMA_DEBUG
707 int ret = mga_do_wait_for_idle( dev_priv );
708 if ( ret < 0 )
709 DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
710 return ret;
711 #else
712 return mga_do_wait_for_idle( dev_priv );
713 #endif
714 } else {
715 return 0;
716 }
717 }
718
719 int mga_dma_reset( DRM_IOCTL_ARGS )
720 {
721 DRM_DEVICE;
722 drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
723
724 LOCK_TEST_WITH_RETURN( dev, filp );
725
726 return mga_do_dma_reset( dev_priv );
727 }
728
729
730 /* ================================================================
731 * DMA buffer management
732 */
733
734 static int mga_dma_get_buffers( DRMFILE filp,
735 drm_device_t *dev, drm_dma_t *d )
736 {
737 drm_buf_t *buf;
738 int i;
739
740 for ( i = d->granted_count ; i < d->request_count ; i++ ) {
741 buf = mga_freelist_get( dev );
742 if ( !buf ) return DRM_ERR(EAGAIN);
743
744 buf->filp = filp;
745
746 if ( DRM_COPY_TO_USER( &d->request_indices[i],
747 &buf->idx, sizeof(buf->idx) ) )
748 return DRM_ERR(EFAULT);
749 if ( DRM_COPY_TO_USER( &d->request_sizes[i],
750 &buf->total, sizeof(buf->total) ) )
751 return DRM_ERR(EFAULT);
752
753 d->granted_count++;
754 }
755 return 0;
756 }
757
758 int mga_dma_buffers( DRM_IOCTL_ARGS )
759 {
760 DRM_DEVICE;
761 drm_device_dma_t *dma = dev->dma;
762 drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
763 drm_dma_t __user *argp = (void __user *)data;
764 drm_dma_t d;
765 int ret = 0;
766
767 LOCK_TEST_WITH_RETURN( dev, filp );
768
769 DRM_COPY_FROM_USER_IOCTL( d, argp, sizeof(d) );
770
771 /* Please don't send us buffers.
772 */
773 if ( d.send_count != 0 ) {
774 DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
775 DRM_CURRENTPID, d.send_count );
776 return DRM_ERR(EINVAL);
777 }
778
779 /* We'll send you buffers.
780 */
781 if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
782 DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
783 DRM_CURRENTPID, d.request_count, dma->buf_count );
784 return DRM_ERR(EINVAL);
785 }
786
787 WRAP_TEST_WITH_RETURN( dev_priv );
788
789 d.granted_count = 0;
790
791 if ( d.request_count ) {
792 ret = mga_dma_get_buffers( filp, dev, &d );
793 }
794
795 DRM_COPY_TO_USER_IOCTL( argp, d, sizeof(d) );
796
797 return ret;
798 }
799
800 void mga_driver_pretakedown(drm_device_t *dev)
801 {
802 mga_do_cleanup_dma( dev );
803 }
804
805 int mga_driver_dma_quiescent(drm_device_t *dev)
806 {
807 drm_mga_private_t *dev_priv = dev->dev_private;
808 return mga_do_wait_for_idle( dev_priv );
809 }
810
|
This page was automatically generated by the
LXR engine.
|