1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
40
41 #define I810_BUF_FREE 2
42 #define I810_BUF_CLIENT 1
43 #define I810_BUF_HARDWARE 0
44
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED 1
47
48 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
49 #define down_write down
50 #define up_write up
51 #endif
52
53 drm_ioctl_desc_t i810_ioctls[] = {
54 [DRM_IOCTL_NR(DRM_I810_INIT)] = { i810_dma_init, 1, 1 },
55 [DRM_IOCTL_NR(DRM_I810_VERTEX)] = { i810_dma_vertex, 1, 0 },
56 [DRM_IOCTL_NR(DRM_I810_CLEAR)] = { i810_clear_bufs, 1, 0 },
57 [DRM_IOCTL_NR(DRM_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 },
58 [DRM_IOCTL_NR(DRM_I810_GETAGE)] = { i810_getage, 1, 0 },
59 [DRM_IOCTL_NR(DRM_I810_GETBUF)] = { i810_getbuf, 1, 0 },
60 [DRM_IOCTL_NR(DRM_I810_SWAP)] = { i810_swap_bufs, 1, 0 },
61 [DRM_IOCTL_NR(DRM_I810_COPY)] = { i810_copybuf, 1, 0 },
62 [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = { i810_docopy, 1, 0 },
63 [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = { i810_ov0_info, 1, 0 },
64 [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = { i810_fstatus, 1, 0 },
65 [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 },
66 [DRM_IOCTL_NR(DRM_I810_MC)] = { i810_dma_mc, 1, 1 },
67 [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = { i810_rstatus, 1, 0 },
68 [DRM_IOCTL_NR(DRM_I810_FLIP)] = { i810_flip_bufs, 1, 0 }
69 };
70
71 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
72
73 static drm_buf_t *i810_freelist_get(drm_device_t *dev)
74 {
75 drm_device_dma_t *dma = dev->dma;
76 int i;
77 int used;
78
79 /* Linear search might not be the best solution */
80
81 for (i = 0; i < dma->buf_count; i++) {
82 drm_buf_t *buf = dma->buflist[ i ];
83 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
84 /* In use is already a pointer */
85 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
86 I810_BUF_CLIENT);
87 if (used == I810_BUF_FREE) {
88 return buf;
89 }
90 }
91 return NULL;
92 }
93
94 /* This should only be called if the buffer is not sent to the hardware
95 * yet, the hardware updates in use for us once its on the ring buffer.
96 */
97
98 static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
99 {
100 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
101 int used;
102
103 /* In use is already a pointer */
104 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
105 if (used != I810_BUF_CLIENT) {
106 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
107 return -EINVAL;
108 }
109
110 return 0;
111 }
112
113 static struct file_operations i810_buffer_fops = {
114 .open = drm_open,
115 .flush = drm_flush,
116 .release = drm_release,
117 .ioctl = drm_ioctl,
118 .mmap = i810_mmap_buffers,
119 .fasync = drm_fasync,
120 };
121
122 int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
123 {
124 drm_file_t *priv = filp->private_data;
125 drm_device_t *dev;
126 drm_i810_private_t *dev_priv;
127 drm_buf_t *buf;
128 drm_i810_buf_priv_t *buf_priv;
129
130 lock_kernel();
131 dev = priv->dev;
132 dev_priv = dev->dev_private;
133 buf = dev_priv->mmap_buffer;
134 buf_priv = buf->dev_private;
135
136 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
137 vma->vm_file = filp;
138
139 buf_priv->currently_mapped = I810_BUF_MAPPED;
140 unlock_kernel();
141
142 if (remap_pfn_range(DRM_RPR_ARG(vma) vma->vm_start,
143 VM_OFFSET(vma) >> PAGE_SHIFT,
144 vma->vm_end - vma->vm_start,
145 vma->vm_page_prot)) return -EAGAIN;
146 return 0;
147 }
148
149 static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
150 {
151 drm_file_t *priv = filp->private_data;
152 drm_device_t *dev = priv->dev;
153 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
154 drm_i810_private_t *dev_priv = dev->dev_private;
155 struct file_operations *old_fops;
156 int retcode = 0;
157
158 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
159 return -EINVAL;
160
161 down_write( ¤t->mm->mmap_sem );
162 old_fops = filp->f_op;
163 filp->f_op = &i810_buffer_fops;
164 dev_priv->mmap_buffer = buf;
165 buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
166 PROT_READ|PROT_WRITE,
167 MAP_SHARED,
168 buf->bus_address);
169 dev_priv->mmap_buffer = NULL;
170 filp->f_op = old_fops;
171 if ((unsigned long)buf_priv->virtual > -1024UL) {
172 /* Real error */
173 DRM_ERROR("mmap error\n");
174 retcode = (signed int)buf_priv->virtual;
175 buf_priv->virtual = NULL;
176 }
177 up_write( ¤t->mm->mmap_sem );
178
179 return retcode;
180 }
181
182 static int i810_unmap_buffer(drm_buf_t *buf)
183 {
184 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
185 int retcode = 0;
186
187 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
188 return -EINVAL;
189
190 down_write(¤t->mm->mmap_sem);
191 retcode = do_munmap(current->mm,
192 (unsigned long)buf_priv->virtual,
193 (size_t) buf->total);
194 up_write(¤t->mm->mmap_sem);
195
196 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
197 buf_priv->virtual = NULL;
198
199 return retcode;
200 }
201
202 static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
203 struct file *filp)
204 {
205 drm_buf_t *buf;
206 drm_i810_buf_priv_t *buf_priv;
207 int retcode = 0;
208
209 buf = i810_freelist_get(dev);
210 if (!buf) {
211 retcode = -ENOMEM;
212 DRM_DEBUG("retcode=%d\n", retcode);
213 return retcode;
214 }
215
216 retcode = i810_map_buffer(buf, filp);
217 if (retcode) {
218 i810_freelist_put(dev, buf);
219 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
220 return retcode;
221 }
222 buf->filp = filp;
223 buf_priv = buf->dev_private;
224 d->granted = 1;
225 d->request_idx = buf->idx;
226 d->request_size = buf->total;
227 d->virtual = buf_priv->virtual;
228
229 return retcode;
230 }
231
232 int i810_dma_cleanup(drm_device_t *dev)
233 {
234 drm_device_dma_t *dma = dev->dma;
235
236 /* Make sure interrupts are disabled here because the uninstall ioctl
237 * may not have been called from userspace and after dev_private
238 * is freed, it's too late.
239 */
240 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
241 drm_irq_uninstall(dev);
242
243 if (dev->dev_private) {
244 int i;
245 drm_i810_private_t *dev_priv =
246 (drm_i810_private_t *) dev->dev_private;
247
248 if (dev_priv->ring.virtual_start) {
249 drm_ioremapfree((void *) dev_priv->ring.virtual_start,
250 dev_priv->ring.Size, dev);
251 }
252 if (dev_priv->hw_status_page) {
253 pci_free_consistent(dev->pdev, PAGE_SIZE,
254 dev_priv->hw_status_page,
255 dev_priv->dma_status_page);
256 /* Need to rewrite hardware status page */
257 I810_WRITE(0x02080, 0x1ffff000);
258 }
259 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
260 DRM_MEM_DRIVER);
261 dev->dev_private = NULL;
262
263 for (i = 0; i < dma->buf_count; i++) {
264 drm_buf_t *buf = dma->buflist[ i ];
265 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
266 if ( buf_priv->kernel_virtual && buf->total )
267 drm_ioremapfree(buf_priv->kernel_virtual, buf->total, dev);
268 }
269 }
270 return 0;
271 }
272
273 static int i810_wait_ring(drm_device_t *dev, int n)
274 {
275 drm_i810_private_t *dev_priv = dev->dev_private;
276 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
277 int iters = 0;
278 unsigned long end;
279 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
280
281 end = jiffies + (HZ*3);
282 while (ring->space < n) {
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->space = ring->head - (ring->tail+8);
285 if (ring->space < 0) ring->space += ring->Size;
286
287 if (ring->head != last_head) {
288 end = jiffies + (HZ*3);
289 last_head = ring->head;
290 }
291
292 iters++;
293 if (time_before(end, jiffies)) {
294 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
295 DRM_ERROR("lockup\n");
296 goto out_wait_ring;
297 }
298 udelay(1);
299 }
300
301 out_wait_ring:
302 return iters;
303 }
304
305 static void i810_kernel_lost_context(drm_device_t *dev)
306 {
307 drm_i810_private_t *dev_priv = dev->dev_private;
308 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
309
310 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
311 ring->tail = I810_READ(LP_RING + RING_TAIL);
312 ring->space = ring->head - (ring->tail+8);
313 if (ring->space < 0) ring->space += ring->Size;
314 }
315
316 static int i810_freelist_init(drm_device_t *dev, drm_i810_private_t *dev_priv)
317 {
318 drm_device_dma_t *dma = dev->dma;
319 int my_idx = 24;
320 u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
321 int i;
322
323 if (dma->buf_count > 1019) {
324 /* Not enough space in the status page for the freelist */
325 return -EINVAL;
326 }
327
328 for (i = 0; i < dma->buf_count; i++) {
329 drm_buf_t *buf = dma->buflist[ i ];
330 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
331
332 buf_priv->in_use = hw_status++;
333 buf_priv->my_use_idx = my_idx;
334 my_idx += 4;
335
336 *buf_priv->in_use = I810_BUF_FREE;
337
338 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
339 buf->total, dev);
340 }
341 return 0;
342 }
343
344 static int i810_dma_initialize(drm_device_t *dev,
345 drm_i810_private_t *dev_priv,
346 drm_i810_init_t *init)
347 {
348 struct list_head *list;
349
350 memset(dev_priv, 0, sizeof(drm_i810_private_t));
351
352 list_for_each(list, &dev->maplist->head) {
353 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
354 if (r_list->map &&
355 r_list->map->type == _DRM_SHM &&
356 r_list->map->flags & _DRM_CONTAINS_LOCK ) {
357 dev_priv->sarea_map = r_list->map;
358 break;
359 }
360 }
361 if (!dev_priv->sarea_map) {
362 dev->dev_private = (void *)dev_priv;
363 i810_dma_cleanup(dev);
364 DRM_ERROR("can not find sarea!\n");
365 return -EINVAL;
366 }
367 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
368 if (!dev_priv->mmio_map) {
369 dev->dev_private = (void *)dev_priv;
370 i810_dma_cleanup(dev);
371 DRM_ERROR("can not find mmio map!\n");
372 return -EINVAL;
373 }
374 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
375 if (!dev->agp_buffer_map) {
376 dev->dev_private = (void *)dev_priv;
377 i810_dma_cleanup(dev);
378 DRM_ERROR("can not find dma buffer map!\n");
379 return -EINVAL;
380 }
381
382 dev_priv->sarea_priv = (drm_i810_sarea_t *)
383 ((u8 *)dev_priv->sarea_map->handle +
384 init->sarea_priv_offset);
385
386 dev_priv->ring.Start = init->ring_start;
387 dev_priv->ring.End = init->ring_end;
388 dev_priv->ring.Size = init->ring_size;
389
390 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
391 init->ring_start,
392 init->ring_size, dev);
393
394 if (dev_priv->ring.virtual_start == NULL) {
395 dev->dev_private = (void *) dev_priv;
396 i810_dma_cleanup(dev);
397 DRM_ERROR("can not ioremap virtual address for"
398 " ring buffer\n");
399 return -ENOMEM;
400 }
401
402 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
403
404 dev_priv->w = init->w;
405 dev_priv->h = init->h;
406 dev_priv->pitch = init->pitch;
407 dev_priv->back_offset = init->back_offset;
408 dev_priv->depth_offset = init->depth_offset;
409 dev_priv->front_offset = init->front_offset;
410
411 dev_priv->overlay_offset = init->overlay_offset;
412 dev_priv->overlay_physical = init->overlay_physical;
413
414 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
415 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
416 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
417
418 /* Program Hardware Status Page */
419 dev_priv->hw_status_page =
420 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
421 &dev_priv->dma_status_page);
422 if (!dev_priv->hw_status_page) {
423 dev->dev_private = (void *)dev_priv;
424 i810_dma_cleanup(dev);
425 DRM_ERROR("Can not allocate hardware status page\n");
426 return -ENOMEM;
427 }
428 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
429 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
430
431 I810_WRITE(0x02080, dev_priv->dma_status_page);
432 DRM_DEBUG("Enabled hardware status page\n");
433
434 /* Now we need to init our freelist */
435 if (i810_freelist_init(dev, dev_priv) != 0) {
436 dev->dev_private = (void *)dev_priv;
437 i810_dma_cleanup(dev);
438 DRM_ERROR("Not enough space in the status page for"
439 " the freelist\n");
440 return -ENOMEM;
441 }
442 dev->dev_private = (void *)dev_priv;
443
444 return 0;
445 }
446
447 /* i810 DRM version 1.1 used a smaller init structure with different
448 * ordering of values than is currently used (drm >= 1.2). There is
449 * no defined way to detect the XFree version to correct this problem,
450 * however by checking using this procedure we can detect the correct
451 * thing to do.
452 *
453 * #1 Read the Smaller init structure from user-space
454 * #2 Verify the overlay_physical is a valid physical address, or NULL
455 * If it isn't then we have a v1.1 client. Fix up params.
456 * If it is, then we have a 1.2 client... get the rest of the data.
457 */
458 int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg)
459 {
460
461 /* Get v1.1 init data */
462 if (copy_from_user(init, (drm_i810_pre12_init_t __user *)arg,
463 sizeof(drm_i810_pre12_init_t))) {
464 return -EFAULT;
465 }
466
467 if ((!init->overlay_physical) || (init->overlay_physical > 4096)) {
468
469 /* This is a v1.2 client, just get the v1.2 init data */
470 DRM_INFO("Using POST v1.2 init.\n");
471 if (copy_from_user(init, (drm_i810_init_t __user *)arg,
472 sizeof(drm_i810_init_t))) {
473 return -EFAULT;
474 }
475 } else {
476
477 /* This is a v1.1 client, fix the params */
478 DRM_INFO("Using PRE v1.2 init.\n");
479 init->pitch_bits = init->h;
480 init->pitch = init->w;
481 init->h = init->overlay_physical;
482 init->w = init->overlay_offset;
483 init->overlay_physical = 0;
484 init->overlay_offset = 0;
485 }
486
487 return 0;
488 }
489
490 int i810_dma_init(struct inode *inode, struct file *filp,
491 unsigned int cmd, unsigned long arg)
492 {
493 drm_file_t *priv = filp->private_data;
494 drm_device_t *dev = priv->dev;
495 drm_i810_private_t *dev_priv;
496 drm_i810_init_t init;
497 int retcode = 0;
498
499 /* Get only the init func */
500 if (copy_from_user(&init, (void __user *)arg, sizeof(drm_i810_init_func_t)))
501 return -EFAULT;
502
503 switch(init.func) {
504 case I810_INIT_DMA:
505 /* This case is for backward compatibility. It
506 * handles XFree 4.1.0 and 4.2.0, and has to
507 * do some parameter checking as described below.
508 * It will someday go away.
509 */
510 retcode = i810_dma_init_compat(&init, arg);
511 if (retcode)
512 return retcode;
513
514 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
515 DRM_MEM_DRIVER);
516 if (dev_priv == NULL)
517 return -ENOMEM;
518 retcode = i810_dma_initialize(dev, dev_priv, &init);
519 break;
520
521 default:
522 case I810_INIT_DMA_1_4:
523 DRM_INFO("Using v1.4 init.\n");
524 if (copy_from_user(&init, (drm_i810_init_t __user *)arg,
525 sizeof(drm_i810_init_t))) {
526 return -EFAULT;
527 }
528 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
529 DRM_MEM_DRIVER);
530 if (dev_priv == NULL)
531 return -ENOMEM;
532 retcode = i810_dma_initialize(dev, dev_priv, &init);
533 break;
534
535 case I810_CLEANUP_DMA:
536 DRM_INFO("DMA Cleanup\n");
537 retcode = i810_dma_cleanup(dev);
538 break;
539 }
540
541 return retcode;
542 }
543
544
545
546 /* Most efficient way to verify state for the i810 is as it is
547 * emitted. Non-conformant state is silently dropped.
548 *
549 * Use 'volatile' & local var tmp to force the emitted values to be
550 * identical to the verified ones.
551 */
552 static void i810EmitContextVerified( drm_device_t *dev,
553 volatile unsigned int *code )
554 {
555 drm_i810_private_t *dev_priv = dev->dev_private;
556 int i, j = 0;
557 unsigned int tmp;
558 RING_LOCALS;
559
560 BEGIN_LP_RING( I810_CTX_SETUP_SIZE );
561
562 OUT_RING( GFX_OP_COLOR_FACTOR );
563 OUT_RING( code[I810_CTXREG_CF1] );
564
565 OUT_RING( GFX_OP_STIPPLE );
566 OUT_RING( code[I810_CTXREG_ST1] );
567
568 for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) {
569 tmp = code[i];
570
571 if ((tmp & (7<<29)) == (3<<29) &&
572 (tmp & (0x1f<<24)) < (0x1d<<24))
573 {
574 OUT_RING( tmp );
575 j++;
576 }
577 else printk("constext state dropped!!!\n");
578 }
579
580 if (j & 1)
581 OUT_RING( 0 );
582
583 ADVANCE_LP_RING();
584 }
585
586 static void i810EmitTexVerified( drm_device_t *dev,
587 volatile unsigned int *code )
588 {
589 drm_i810_private_t *dev_priv = dev->dev_private;
590 int i, j = 0;
591 unsigned int tmp;
592 RING_LOCALS;
593
594 BEGIN_LP_RING( I810_TEX_SETUP_SIZE );
595
596 OUT_RING( GFX_OP_MAP_INFO );
597 OUT_RING( code[I810_TEXREG_MI1] );
598 OUT_RING( code[I810_TEXREG_MI2] );
599 OUT_RING( code[I810_TEXREG_MI3] );
600
601 for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) {
602 tmp = code[i];
603
604 if ((tmp & (7<<29)) == (3<<29) &&
605 (tmp & (0x1f<<24)) < (0x1d<<24))
606 {
607 OUT_RING( tmp );
608 j++;
609 }
610 else printk("texture state dropped!!!\n");
611 }
612
613 if (j & 1)
614 OUT_RING( 0 );
615
616 ADVANCE_LP_RING();
617 }
618
619
620 /* Need to do some additional checking when setting the dest buffer.
621 */
622 static void i810EmitDestVerified( drm_device_t *dev,
623 volatile unsigned int *code )
624 {
625 drm_i810_private_t *dev_priv = dev->dev_private;
626 unsigned int tmp;
627 RING_LOCALS;
628
629 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 );
630
631 tmp = code[I810_DESTREG_DI1];
632 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
633 OUT_RING( CMD_OP_DESTBUFFER_INFO );
634 OUT_RING( tmp );
635 } else
636 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
637 tmp, dev_priv->front_di1, dev_priv->back_di1);
638
639 /* invarient:
640 */
641 OUT_RING( CMD_OP_Z_BUFFER_INFO );
642 OUT_RING( dev_priv->zi1 );
643
644 OUT_RING( GFX_OP_DESTBUFFER_VARS );
645 OUT_RING( code[I810_DESTREG_DV1] );
646
647 OUT_RING( GFX_OP_DRAWRECT_INFO );
648 OUT_RING( code[I810_DESTREG_DR1] );
649 OUT_RING( code[I810_DESTREG_DR2] );
650 OUT_RING( code[I810_DESTREG_DR3] );
651 OUT_RING( code[I810_DESTREG_DR4] );
652 OUT_RING( 0 );
653
654 ADVANCE_LP_RING();
655 }
656
657
658
659 static void i810EmitState( drm_device_t *dev )
660 {
661 drm_i810_private_t *dev_priv = dev->dev_private;
662 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
663 unsigned int dirty = sarea_priv->dirty;
664
665 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
666
667 if (dirty & I810_UPLOAD_BUFFERS) {
668 i810EmitDestVerified( dev, sarea_priv->BufferState );
669 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
670 }
671
672 if (dirty & I810_UPLOAD_CTX) {
673 i810EmitContextVerified( dev, sarea_priv->ContextState );
674 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
675 }
676
677 if (dirty & I810_UPLOAD_TEX0) {
678 i810EmitTexVerified( dev, sarea_priv->TexState[0] );
679 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
680 }
681
682 if (dirty & I810_UPLOAD_TEX1) {
683 i810EmitTexVerified( dev, sarea_priv->TexState[1] );
684 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
685 }
686 }
687
688
689
690 /* need to verify
691 */
692 static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
693 unsigned int clear_color,
694 unsigned int clear_zval )
695 {
696 drm_i810_private_t *dev_priv = dev->dev_private;
697 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
698 int nbox = sarea_priv->nbox;
699 drm_clip_rect_t *pbox = sarea_priv->boxes;
700 int pitch = dev_priv->pitch;
701 int cpp = 2;
702 int i;
703 RING_LOCALS;
704
705 if ( dev_priv->current_page == 1 ) {
706 unsigned int tmp = flags;
707
708 flags &= ~(I810_FRONT | I810_BACK);
709 if (tmp & I810_FRONT) flags |= I810_BACK;
710 if (tmp & I810_BACK) flags |= I810_FRONT;
711 }
712
713 i810_kernel_lost_context(dev);
714
715 if (nbox > I810_NR_SAREA_CLIPRECTS)
716 nbox = I810_NR_SAREA_CLIPRECTS;
717
718 for (i = 0 ; i < nbox ; i++, pbox++) {
719 unsigned int x = pbox->x1;
720 unsigned int y = pbox->y1;
721 unsigned int width = (pbox->x2 - x) * cpp;
722 unsigned int height = pbox->y2 - y;
723 unsigned int start = y * pitch + x * cpp;
724
725 if (pbox->x1 > pbox->x2 ||
726 pbox->y1 > pbox->y2 ||
727 pbox->x2 > dev_priv->w ||
728 pbox->y2 > dev_priv->h)
729 continue;
730
731 if ( flags & I810_FRONT ) {
732 BEGIN_LP_RING( 6 );
733 OUT_RING( BR00_BITBLT_CLIENT |
734 BR00_OP_COLOR_BLT | 0x3 );
735 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
736 OUT_RING( (height << 16) | width );
737 OUT_RING( start );
738 OUT_RING( clear_color );
739 OUT_RING( 0 );
740 ADVANCE_LP_RING();
741 }
742
743 if ( flags & I810_BACK ) {
744 BEGIN_LP_RING( 6 );
745 OUT_RING( BR00_BITBLT_CLIENT |
746 BR00_OP_COLOR_BLT | 0x3 );
747 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
748 OUT_RING( (height << 16) | width );
749 OUT_RING( dev_priv->back_offset + start );
750 OUT_RING( clear_color );
751 OUT_RING( 0 );
752 ADVANCE_LP_RING();
753 }
754
755 if ( flags & I810_DEPTH ) {
756 BEGIN_LP_RING( 6 );
757 OUT_RING( BR00_BITBLT_CLIENT |
758 BR00_OP_COLOR_BLT | 0x3 );
759 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
760 OUT_RING( (height << 16) | width );
761 OUT_RING( dev_priv->depth_offset + start );
762 OUT_RING( clear_zval );
763 OUT_RING( 0 );
764 ADVANCE_LP_RING();
765 }
766 }
767 }
768
769 static void i810_dma_dispatch_swap( drm_device_t *dev )
770 {
771 drm_i810_private_t *dev_priv = dev->dev_private;
772 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
773 int nbox = sarea_priv->nbox;
774 drm_clip_rect_t *pbox = sarea_priv->boxes;
775 int pitch = dev_priv->pitch;
776 int cpp = 2;
777 int i;
778 RING_LOCALS;
779
780 DRM_DEBUG("swapbuffers\n");
781
782 i810_kernel_lost_context(dev);
783
784 if (nbox > I810_NR_SAREA_CLIPRECTS)
785 nbox = I810_NR_SAREA_CLIPRECTS;
786
787 for (i = 0 ; i < nbox; i++, pbox++)
788 {
789 unsigned int w = pbox->x2 - pbox->x1;
790 unsigned int h = pbox->y2 - pbox->y1;
791 unsigned int dst = pbox->x1*cpp + pbox->y1*pitch;
792 unsigned int start = dst;
793
794 if (pbox->x1 > pbox->x2 ||
795 pbox->y1 > pbox->y2 ||
796 pbox->x2 > dev_priv->w ||
797 pbox->y2 > dev_priv->h)
798 continue;
799
800 BEGIN_LP_RING( 6 );
801 OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 );
802 OUT_RING( pitch | (0xCC << 16));
803 OUT_RING( (h << 16) | (w * cpp));
804 if (dev_priv->current_page == 0)
805 OUT_RING(dev_priv->front_offset + start);
806 else
807 OUT_RING(dev_priv->back_offset + start);
808 OUT_RING( pitch );
809 if (dev_priv->current_page == 0)
810 OUT_RING(dev_priv->back_offset + start);
811 else
812 OUT_RING(dev_priv->front_offset + start);
813 ADVANCE_LP_RING();
814 }
815 }
816
817
818 static void i810_dma_dispatch_vertex(drm_device_t *dev,
819 drm_buf_t *buf,
820 int discard,
821 int used)
822 {
823 drm_i810_private_t *dev_priv = dev->dev_private;
824 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
825 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
826 drm_clip_rect_t *box = sarea_priv->boxes;
827 int nbox = sarea_priv->nbox;
828 unsigned long address = (unsigned long)buf->bus_address;
829 unsigned long start = address - dev->agp->base;
830 int i = 0;
831 RING_LOCALS;
832
833 i810_kernel_lost_context(dev);
834
835 if (nbox > I810_NR_SAREA_CLIPRECTS)
836 nbox = I810_NR_SAREA_CLIPRECTS;
837
838 if (used > 4*1024)
839 used = 0;
840
841 if (sarea_priv->dirty)
842 i810EmitState( dev );
843
844 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
845 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
846
847 *(u32 *)buf_priv->kernel_virtual = ((GFX_OP_PRIMITIVE | prim | ((used/4)-2)));
848
849 if (used & 4) {
850 *(u32 *)((u32)buf_priv->kernel_virtual + used) = 0;
851 used += 4;
852 }
853
854 i810_unmap_buffer(buf);
855 }
856
857 if (used) {
858 do {
859 if (i < nbox) {
860 BEGIN_LP_RING(4);
861 OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
862 SC_ENABLE );
863 OUT_RING( GFX_OP_SCISSOR_INFO );
864 OUT_RING( box[i].x1 | (box[i].y1<<16) );
865 OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) );
866 ADVANCE_LP_RING();
867 }
868
869 BEGIN_LP_RING(4);
870 OUT_RING( CMD_OP_BATCH_BUFFER );
871 OUT_RING( start | BB1_PROTECTED );
872 OUT_RING( start + used - 4 );
873 OUT_RING( 0 );
874 ADVANCE_LP_RING();
875
876 } while (++i < nbox);
877 }
878
879 if (discard) {
880 dev_priv->counter++;
881
882 (void) cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
883 I810_BUF_HARDWARE);
884
885 BEGIN_LP_RING(8);
886 OUT_RING( CMD_STORE_DWORD_IDX );
887 OUT_RING( 20 );
888 OUT_RING( dev_priv->counter );
889 OUT_RING( CMD_STORE_DWORD_IDX );
890 OUT_RING( buf_priv->my_use_idx );
891 OUT_RING( I810_BUF_FREE );
892 OUT_RING( CMD_REPORT_HEAD );
893 OUT_RING( 0 );
894 ADVANCE_LP_RING();
895 }
896 }
897
898 static void i810_dma_dispatch_flip( drm_device_t *dev )
899 {
900 drm_i810_private_t *dev_priv = dev->dev_private;
901 int pitch = dev_priv->pitch;
902 RING_LOCALS;
903
904 DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n",
905 __FUNCTION__,
906 dev_priv->current_page,
907 dev_priv->sarea_priv->pf_current_page);
908
909 i810_kernel_lost_context(dev);
910
911 BEGIN_LP_RING( 2 );
912 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
913 OUT_RING( 0 );
914 ADVANCE_LP_RING();
915
916 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 );
917 /* On i815 at least ASYNC is buggy */
918 /* pitch<<5 is from 11.2.8 p158,
919 its the pitch / 8 then left shifted 8,
920 so (pitch >> 3) << 8 */
921 OUT_RING( CMD_OP_FRONTBUFFER_INFO | (pitch<<5) /*| ASYNC_FLIP */ );
922 if ( dev_priv->current_page == 0 ) {
923 OUT_RING( dev_priv->back_offset );
924 dev_priv->current_page = 1;
925 } else {
926 OUT_RING( dev_priv->front_offset );
927 dev_priv->current_page = 0;
928 }
929 OUT_RING(0);
930 ADVANCE_LP_RING();
931
932 BEGIN_LP_RING(2);
933 OUT_RING( CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP );
934 OUT_RING( 0 );
935 ADVANCE_LP_RING();
936
937 /* Increment the frame counter. The client-side 3D driver must
938 * throttle the framerate by waiting for this value before
939 * performing the swapbuffer ioctl.
940 */
941 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
942
943 }
944
945 void i810_dma_quiescent(drm_device_t *dev)
946 {
947 drm_i810_private_t *dev_priv = dev->dev_private;
948 RING_LOCALS;
949
950 /* printk("%s\n", __FUNCTION__); */
951
952 i810_kernel_lost_context(dev);
953
954 BEGIN_LP_RING(4);
955 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
956 OUT_RING( CMD_REPORT_HEAD );
957 OUT_RING( 0 );
958 OUT_RING( 0 );
959 ADVANCE_LP_RING();
960
961 i810_wait_ring( dev, dev_priv->ring.Size - 8 );
962 }
963
964 static int i810_flush_queue(drm_device_t *dev)
965 {
966 drm_i810_private_t *dev_priv = dev->dev_private;
967 drm_device_dma_t *dma = dev->dma;
968 int i, ret = 0;
969 RING_LOCALS;
970
971 /* printk("%s\n", __FUNCTION__); */
972
973 i810_kernel_lost_context(dev);
974
975 BEGIN_LP_RING(2);
976 OUT_RING( CMD_REPORT_HEAD );
977 OUT_RING( 0 );
978 ADVANCE_LP_RING();
979
980 i810_wait_ring( dev, dev_priv->ring.Size - 8 );
981
982 for (i = 0; i < dma->buf_count; i++) {
983 drm_buf_t *buf = dma->buflist[ i ];
984 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
985
986 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
987 I810_BUF_FREE);
988
989 if (used == I810_BUF_HARDWARE)
990 DRM_DEBUG("reclaimed from HARDWARE\n");
991 if (used == I810_BUF_CLIENT)
992 DRM_DEBUG("still on client\n");
993 }
994
995 return ret;
996 }
997
998 /* Must be called with the lock held */
999 void i810_reclaim_buffers(drm_device_t *dev, struct file *filp)
1000 {
1001 drm_device_dma_t *dma = dev->dma;
1002 int i;
1003
1004 if (!dma) return;
1005 if (!dev->dev_private) return;
1006 if (!dma->buflist) return;
1007
1008 i810_flush_queue(dev);
1009
1010 for (i = 0; i < dma->buf_count; i++) {
1011 drm_buf_t *buf = dma->buflist[ i ];
1012 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1013
1014 if (buf->filp == filp && buf_priv) {
1015 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
1016 I810_BUF_FREE);
1017
1018 if (used == I810_BUF_CLIENT)
1019 DRM_DEBUG("reclaimed from client\n");
1020 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1021 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1022 }
1023 }
1024 }
1025
1026 int i810_flush_ioctl(struct inode *inode, struct file *filp,
1027 unsigned int cmd, unsigned long arg)
1028 {
1029 drm_file_t *priv = filp->private_data;
1030 drm_device_t *dev = priv->dev;
1031
1032 LOCK_TEST_WITH_RETURN(dev, filp);
1033
1034 i810_flush_queue(dev);
1035 return 0;
1036 }
1037
1038
1039 int i810_dma_vertex(struct inode *inode, struct file *filp,
1040 unsigned int cmd, unsigned long arg)
1041 {
1042 drm_file_t *priv = filp->private_data;
1043 drm_device_t *dev = priv->dev;
1044 drm_device_dma_t *dma = dev->dma;
1045 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1046 u32 *hw_status = dev_priv->hw_status_page;
1047 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1048 dev_priv->sarea_priv;
1049 drm_i810_vertex_t vertex;
1050
1051 if (copy_from_user(&vertex, (drm_i810_vertex_t __user *)arg, sizeof(vertex)))
1052 return -EFAULT;
1053
1054 LOCK_TEST_WITH_RETURN(dev, filp);
1055
1056 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1057 vertex.idx, vertex.used, vertex.discard);
1058
1059 if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1060 return -EINVAL;
1061
1062 i810_dma_dispatch_vertex( dev,
1063 dma->buflist[ vertex.idx ],
1064 vertex.discard, vertex.used );
1065
1066 atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
1067 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1068 sarea_priv->last_enqueue = dev_priv->counter-1;
1069 sarea_priv->last_dispatch = (int) hw_status[5];
1070
1071 return 0;
1072 }
1073
1074
1075
1076 int i810_clear_bufs(struct inode *inode, struct file *filp,
1077 unsigned int cmd, unsigned long arg)
1078 {
1079 drm_file_t *priv = filp->private_data;
1080 drm_device_t *dev = priv->dev;
1081 drm_i810_clear_t clear;
1082
1083 if (copy_from_user(&clear, (drm_i810_clear_t __user *)arg, sizeof(clear)))
1084 return -EFAULT;
1085
1086 LOCK_TEST_WITH_RETURN(dev, filp);
1087
1088 /* GH: Someone's doing nasty things... */
1089 if (!dev->dev_private) {
1090 return -EINVAL;
1091 }
1092
1093 i810_dma_dispatch_clear( dev, clear.flags,
1094 clear.clear_color,
1095 clear.clear_depth );
1096 return 0;
1097 }
1098
1099 int i810_swap_bufs(struct inode *inode, struct file *filp,
1100 unsigned int cmd, unsigned long arg)
1101 {
1102 drm_file_t *priv = filp->private_data;
1103 drm_device_t *dev = priv->dev;
1104
1105 DRM_DEBUG("i810_swap_bufs\n");
1106
1107 LOCK_TEST_WITH_RETURN(dev, filp);
1108
1109 i810_dma_dispatch_swap( dev );
1110 return 0;
1111 }
1112
1113 int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1114 unsigned long arg)
1115 {
1116 drm_file_t *priv = filp->private_data;
1117 drm_device_t *dev = priv->dev;
1118 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1119 u32 *hw_status = dev_priv->hw_status_page;
1120 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1121 dev_priv->sarea_priv;
1122
1123 sarea_priv->last_dispatch = (int) hw_status[5];
1124 return 0;
1125 }
1126
1127 int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1128 unsigned long arg)
1129 {
1130 drm_file_t *priv = filp->private_data;
1131 drm_device_t *dev = priv->dev;
1132 int retcode = 0;
1133 drm_i810_dma_t d;
1134 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1135 u32 *hw_status = dev_priv->hw_status_page;
1136 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1137 dev_priv->sarea_priv;
1138
1139 if (copy_from_user(&d, (drm_i810_dma_t __user *)arg, sizeof(d)))
1140 return -EFAULT;
1141
1142 LOCK_TEST_WITH_RETURN(dev, filp);
1143
1144 d.granted = 0;
1145
1146 retcode = i810_dma_get_buffer(dev, &d, filp);
1147
1148 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1149 current->pid, retcode, d.granted);
1150
1151 if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d)))
1152 return -EFAULT;
1153 sarea_priv->last_dispatch = (int) hw_status[5];
1154
1155 return retcode;
1156 }
1157
1158 int i810_copybuf(struct inode *inode,
1159 struct file *filp,
1160 unsigned int cmd,
1161 unsigned long arg)
1162 {
1163 /* Never copy - 2.4.x doesn't need it */
1164 return 0;
1165 }
1166
1167 int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1168 unsigned long arg)
1169 {
1170 /* Never copy - 2.4.x doesn't need it */
1171 return 0;
1172 }
1173
1174 static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used,
1175 unsigned int last_render)
1176 {
1177 drm_i810_private_t *dev_priv = dev->dev_private;
1178 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1179 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1180 unsigned long address = (unsigned long)buf->bus_address;
1181 unsigned long start = address - dev->agp->base;
1182 int u;
1183 RING_LOCALS;
1184
1185 i810_kernel_lost_context(dev);
1186
1187 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
1188 I810_BUF_HARDWARE);
1189 if (u != I810_BUF_CLIENT) {
1190 DRM_DEBUG("MC found buffer that isn't mine!\n");
1191 }
1192
1193 if (used > 4*1024)
1194 used = 0;
1195
1196 sarea_priv->dirty = 0x7f;
1197
1198 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n",
1199 address, used);
1200
1201 dev_priv->counter++;
1202 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1203 DRM_DEBUG("i810_dma_dispatch_mc\n");
1204 DRM_DEBUG("start : %lx\n", start);
1205 DRM_DEBUG("used : %d\n", used);
1206 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1207
1208 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1209 if (used & 4) {
1210 *(u32 *)((u32)buf_priv->virtual + used) = 0;
1211 used += 4;
1212 }
1213
1214 i810_unmap_buffer(buf);
1215 }
1216 BEGIN_LP_RING(4);
1217 OUT_RING( CMD_OP_BATCH_BUFFER );
1218 OUT_RING( start | BB1_PROTECTED );
1219 OUT_RING( start + used - 4 );
1220 OUT_RING( 0 );
1221 ADVANCE_LP_RING();
1222
1223
1224 BEGIN_LP_RING(8);
1225 OUT_RING( CMD_STORE_DWORD_IDX );
1226 OUT_RING( buf_priv->my_use_idx );
1227 OUT_RING( I810_BUF_FREE );
1228 OUT_RING( 0 );
1229
1230 OUT_RING( CMD_STORE_DWORD_IDX );
1231 OUT_RING( 16 );
1232 OUT_RING( last_render );
1233 OUT_RING( 0 );
1234 ADVANCE_LP_RING();
1235 }
1236
1237 int i810_dma_mc(struct inode *inode, struct file *filp,
1238 unsigned int cmd, unsigned long arg)
1239 {
1240 drm_file_t *priv = filp->private_data;
1241 drm_device_t *dev = priv->dev;
1242 drm_device_dma_t *dma = dev->dma;
1243 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1244 u32 *hw_status = dev_priv->hw_status_page;
1245 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1246 dev_priv->sarea_priv;
1247 drm_i810_mc_t mc;
1248
1249 if (copy_from_user(&mc, (drm_i810_mc_t __user *)arg, sizeof(mc)))
1250 return -EFAULT;
1251
1252 LOCK_TEST_WITH_RETURN(dev, filp);
1253
1254 if (mc.idx >= dma->buf_count || mc.idx < 0)
1255 return -EINVAL;
1256
1257 i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used,
1258 mc.last_render );
1259
1260 atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]);
1261 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1262 sarea_priv->last_enqueue = dev_priv->counter-1;
1263 sarea_priv->last_dispatch = (int) hw_status[5];
1264
1265 return 0;
1266 }
1267
1268 int i810_rstatus(struct inode *inode, struct file *filp,
1269 unsigned int cmd, unsigned long arg)
1270 {
1271 drm_file_t *priv = filp->private_data;
1272 drm_device_t *dev = priv->dev;
1273 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1274
1275 return (int)(((u32 *)(dev_priv->hw_status_page))[4]);
1276 }
1277
1278 int i810_ov0_info(struct inode *inode, struct file *filp,
1279 unsigned int cmd, unsigned long arg)
1280 {
1281 drm_file_t *priv = filp->private_data;
1282 drm_device_t *dev = priv->dev;
1283 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1284 drm_i810_overlay_t data;
1285
1286 data.offset = dev_priv->overlay_offset;
1287 data.physical = dev_priv->overlay_physical;
1288 if (copy_to_user((drm_i810_overlay_t __user *)arg,&data,sizeof(data)))
1289 return -EFAULT;
1290 return 0;
1291 }
1292
1293 int i810_fstatus(struct inode *inode, struct file *filp,
1294 unsigned int cmd, unsigned long arg)
1295 {
1296 drm_file_t *priv = filp->private_data;
1297 drm_device_t *dev = priv->dev;
1298 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1299
1300 LOCK_TEST_WITH_RETURN(dev, filp);
1301
1302 return I810_READ(0x30008);
1303 }
1304
1305 int i810_ov0_flip(struct inode *inode, struct file *filp,
1306 unsigned int cmd, unsigned long arg)
1307 {
1308 drm_file_t *priv = filp->private_data;
1309 drm_device_t *dev = priv->dev;
1310 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1311
1312 LOCK_TEST_WITH_RETURN(dev, filp);
1313
1314 //Tell the overlay to update
1315 I810_WRITE(0x30000,dev_priv->overlay_physical | 0x80000000);
1316
1317 return 0;
1318 }
1319
1320
1321 /* Not sure why this isn't set all the time:
1322 */
1323 static void i810_do_init_pageflip( drm_device_t *dev )
1324 {
1325 drm_i810_private_t *dev_priv = dev->dev_private;
1326
1327 DRM_DEBUG("%s\n", __FUNCTION__);
1328 dev_priv->page_flipping = 1;
1329 dev_priv->current_page = 0;
1330 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1331 }
1332
1333 int i810_do_cleanup_pageflip( drm_device_t *dev )
1334 {
1335 drm_i810_private_t *dev_priv = dev->dev_private;
1336
1337 DRM_DEBUG("%s\n", __FUNCTION__);
1338 if (dev_priv->current_page != 0)
1339 i810_dma_dispatch_flip( dev );
1340
1341 dev_priv->page_flipping = 0;
1342 return 0;
1343 }
1344
1345 int i810_flip_bufs(struct inode *inode, struct file *filp,
1346 unsigned int cmd, unsigned long arg)
1347 {
1348 drm_file_t *priv = filp->private_data;
1349 drm_device_t *dev = priv->dev;
1350 drm_i810_private_t *dev_priv = dev->dev_private;
1351
1352 DRM_DEBUG("%s\n", __FUNCTION__);
1353
1354 LOCK_TEST_WITH_RETURN(dev, filp);
1355
1356 if (!dev_priv->page_flipping)
1357 i810_do_init_pageflip( dev );
1358
1359 i810_dma_dispatch_flip( dev );
1360 return 0;
1361 }
1362
1363 void i810_driver_pretakedown(drm_device_t *dev)
1364 {
1365 i810_dma_cleanup( dev );
1366 }
1367
1368 void i810_driver_release(drm_device_t *dev, struct file *filp)
1369 {
1370 i810_reclaim_buffers(dev, filp);
1371 }
1372
1373 int i810_driver_dma_quiescent(drm_device_t *dev)
1374 {
1375 i810_dma_quiescent( dev );
1376 return 0;
1377 }
1378
1379
1380
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