Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ]
Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * This file is subject to the terms and conditions of the GNU General Public
  3  * License.  See the file "COPYING" in the main directory of this archive
  4  * for more details.
  5  *
  6  * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
  7  */
  8 
  9 /*
 10  * SGI TIOCA AGPGART routines.
 11  *
 12  */
 13 
 14 #include <linux/acpi.h>
 15 #include <linux/module.h>
 16 #include <linux/pci.h>
 17 #include <linux/init.h>
 18 #include <linux/agp_backend.h>
 19 #include <asm/sn/addrs.h>
 20 #include <asm/sn/io.h>
 21 #include <asm/sn/pcidev.h>
 22 #include <asm/sn/pcibus_provider_defs.h>
 23 #include <asm/sn/tioca_provider.h>
 24 #include "agp.h"
 25 
 26 extern int agp_memory_reserved;
 27 extern uint32_t tioca_gart_found;
 28 extern struct list_head tioca_list;
 29 static struct agp_bridge_data **sgi_tioca_agp_bridges;
 30 
 31 /*
 32  * The aperature size and related information is set up at TIOCA init time.
 33  * Values for this table will be extracted and filled in at
 34  * sgi_tioca_fetch_size() time.
 35  */
 36 
 37 static struct aper_size_info_fixed sgi_tioca_sizes[] = {
 38         {0, 0, 0},
 39 };
 40 
 41 static struct page *sgi_tioca_alloc_page(struct agp_bridge_data *bridge)
 42 {
 43         struct page *page;
 44         int nid;
 45         struct tioca_kernel *info =
 46             (struct tioca_kernel *)bridge->dev_private_data;
 47 
 48         nid = info->ca_closest_node;
 49         page = alloc_pages_node(nid, GFP_KERNEL, 0);
 50         if (!page)
 51                 return NULL;
 52 
 53         get_page(page);
 54         atomic_inc(&agp_bridge->current_memory_agp);
 55         return page;
 56 }
 57 
 58 /*
 59  * Flush GART tlb's.  Cannot selectively flush based on memory so the mem
 60  * arg is ignored.
 61  */
 62 
 63 static void sgi_tioca_tlbflush(struct agp_memory *mem)
 64 {
 65         tioca_tlbflush(mem->bridge->dev_private_data);
 66 }
 67 
 68 /*
 69  * Given an address of a host physical page, turn it into a valid gart
 70  * entry.
 71  */
 72 static unsigned long
 73 sgi_tioca_mask_memory(struct agp_bridge_data *bridge,
 74                       struct page *page, int type)
 75 {
 76         unsigned long addr = phys_to_gart(page_to_phys(page));
 77         return tioca_physpage_to_gart(addr);
 78 }
 79 
 80 static void sgi_tioca_agp_enable(struct agp_bridge_data *bridge, u32 mode)
 81 {
 82         tioca_fastwrite_enable(bridge->dev_private_data);
 83 }
 84 
 85 /*
 86  * sgi_tioca_configure() doesn't have anything to do since the base CA driver
 87  * has alreay set up the GART.
 88  */
 89 
 90 static int sgi_tioca_configure(void)
 91 {
 92         return 0;
 93 }
 94 
 95 /*
 96  * Determine gfx aperature size.  This has already been determined by the
 97  * CA driver init, so just need to set agp_bridge values accordingly.
 98  */
 99 
100 static int sgi_tioca_fetch_size(void)
101 {
102         struct tioca_kernel *info =
103             (struct tioca_kernel *)agp_bridge->dev_private_data;
104 
105         sgi_tioca_sizes[0].size = info->ca_gfxap_size / MB(1);
106         sgi_tioca_sizes[0].num_entries = info->ca_gfxgart_entries;
107 
108         return sgi_tioca_sizes[0].size;
109 }
110 
111 static int sgi_tioca_create_gatt_table(struct agp_bridge_data *bridge)
112 {
113         struct tioca_kernel *info =
114             (struct tioca_kernel *)bridge->dev_private_data;
115 
116         bridge->gatt_table_real = (u32 *) info->ca_gfxgart;
117         bridge->gatt_table = bridge->gatt_table_real;
118         bridge->gatt_bus_addr = info->ca_gfxgart_base;
119 
120         return 0;
121 }
122 
123 static int sgi_tioca_free_gatt_table(struct agp_bridge_data *bridge)
124 {
125         return 0;
126 }
127 
128 static int sgi_tioca_insert_memory(struct agp_memory *mem, off_t pg_start,
129                                    int type)
130 {
131         int num_entries;
132         size_t i;
133         off_t j;
134         void *temp;
135         struct agp_bridge_data *bridge;
136         u64 *table;
137 
138         bridge = mem->bridge;
139         if (!bridge)
140                 return -EINVAL;
141 
142         table = (u64 *)bridge->gatt_table;
143 
144         temp = bridge->current_size;
145 
146         switch (bridge->driver->size_type) {
147         case U8_APER_SIZE:
148                 num_entries = A_SIZE_8(temp)->num_entries;
149                 break;
150         case U16_APER_SIZE:
151                 num_entries = A_SIZE_16(temp)->num_entries;
152                 break;
153         case U32_APER_SIZE:
154                 num_entries = A_SIZE_32(temp)->num_entries;
155                 break;
156         case FIXED_APER_SIZE:
157                 num_entries = A_SIZE_FIX(temp)->num_entries;
158                 break;
159         case LVL2_APER_SIZE:
160                 return -EINVAL;
161                 break;
162         default:
163                 num_entries = 0;
164                 break;
165         }
166 
167         num_entries -= agp_memory_reserved / PAGE_SIZE;
168         if (num_entries < 0)
169                 num_entries = 0;
170 
171         if (type != 0 || mem->type != 0) {
172                 return -EINVAL;
173         }
174 
175         if ((pg_start + mem->page_count) > num_entries)
176                 return -EINVAL;
177 
178         j = pg_start;
179 
180         while (j < (pg_start + mem->page_count)) {
181                 if (table[j])
182                         return -EBUSY;
183                 j++;
184         }
185 
186         if (!mem->is_flushed) {
187                 bridge->driver->cache_flush();
188                 mem->is_flushed = true;
189         }
190 
191         for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
192                 table[j] =
193                     bridge->driver->mask_memory(bridge, mem->pages[i],
194                                                 mem->type);
195         }
196 
197         bridge->driver->tlb_flush(mem);
198         return 0;
199 }
200 
201 static int sgi_tioca_remove_memory(struct agp_memory *mem, off_t pg_start,
202                                    int type)
203 {
204         size_t i;
205         struct agp_bridge_data *bridge;
206         u64 *table;
207 
208         bridge = mem->bridge;
209         if (!bridge)
210                 return -EINVAL;
211 
212         if (type != 0 || mem->type != 0) {
213                 return -EINVAL;
214         }
215 
216         table = (u64 *)bridge->gatt_table;
217 
218         for (i = pg_start; i < (mem->page_count + pg_start); i++) {
219                 table[i] = 0;
220         }
221 
222         bridge->driver->tlb_flush(mem);
223         return 0;
224 }
225 
226 static void sgi_tioca_cache_flush(void)
227 {
228 }
229 
230 /*
231  * Cleanup.  Nothing to do as the CA driver owns the GART.
232  */
233 
234 static void sgi_tioca_cleanup(void)
235 {
236 }
237 
238 static struct agp_bridge_data *sgi_tioca_find_bridge(struct pci_dev *pdev)
239 {
240         struct agp_bridge_data *bridge;
241 
242         list_for_each_entry(bridge, &agp_bridges, list) {
243                 if (bridge->dev->bus == pdev->bus)
244                         break;
245         }
246         return bridge;
247 }
248 
249 const struct agp_bridge_driver sgi_tioca_driver = {
250         .owner = THIS_MODULE,
251         .size_type = U16_APER_SIZE,
252         .configure = sgi_tioca_configure,
253         .fetch_size = sgi_tioca_fetch_size,
254         .cleanup = sgi_tioca_cleanup,
255         .tlb_flush = sgi_tioca_tlbflush,
256         .mask_memory = sgi_tioca_mask_memory,
257         .agp_enable = sgi_tioca_agp_enable,
258         .cache_flush = sgi_tioca_cache_flush,
259         .create_gatt_table = sgi_tioca_create_gatt_table,
260         .free_gatt_table = sgi_tioca_free_gatt_table,
261         .insert_memory = sgi_tioca_insert_memory,
262         .remove_memory = sgi_tioca_remove_memory,
263         .alloc_by_type = agp_generic_alloc_by_type,
264         .free_by_type = agp_generic_free_by_type,
265         .agp_alloc_page = sgi_tioca_alloc_page,
266         .agp_destroy_page = agp_generic_destroy_page,
267         .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
268         .cant_use_aperture = true,
269         .needs_scratch_page = false,
270         .num_aperture_sizes = 1,
271 };
272 
273 static int __devinit agp_sgi_init(void)
274 {
275         unsigned int j;
276         struct tioca_kernel *info;
277         struct pci_dev *pdev = NULL;
278 
279         if (tioca_gart_found)
280                 printk(KERN_INFO PFX "SGI TIO CA GART driver initialized.\n");
281         else
282                 return 0;
283 
284         sgi_tioca_agp_bridges = kmalloc(tioca_gart_found *
285                                         sizeof(struct agp_bridge_data *),
286                                         GFP_KERNEL);
287         if (!sgi_tioca_agp_bridges)
288                 return -ENOMEM;
289 
290         j = 0;
291         list_for_each_entry(info, &tioca_list, ca_list) {
292                 struct list_head *tmp;
293                 if (list_empty(info->ca_devices))
294                         continue;
295                 list_for_each(tmp, info->ca_devices) {
296                         u8 cap_ptr;
297                         pdev = pci_dev_b(tmp);
298                         if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8))
299                                 continue;
300                         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
301                         if (!cap_ptr)
302                                 continue;
303                 }
304                 sgi_tioca_agp_bridges[j] = agp_alloc_bridge();
305                 printk(KERN_INFO PFX "bridge %d = 0x%p\n", j,
306                        sgi_tioca_agp_bridges[j]);
307                 if (sgi_tioca_agp_bridges[j]) {
308                         sgi_tioca_agp_bridges[j]->dev = pdev;
309                         sgi_tioca_agp_bridges[j]->dev_private_data = info;
310                         sgi_tioca_agp_bridges[j]->driver = &sgi_tioca_driver;
311                         sgi_tioca_agp_bridges[j]->gart_bus_addr =
312                             info->ca_gfxap_base;
313                         sgi_tioca_agp_bridges[j]->mode = (0x7D << 24) | /* 126 requests */
314                             (0x1 << 9) |        /* SBA supported */
315                             (0x1 << 5) |        /* 64-bit addresses supported */
316                             (0x1 << 4) |        /* FW supported */
317                             (0x1 << 3) |        /* AGP 3.0 mode */
318                             0x2;        /* 8x transfer only */
319                         sgi_tioca_agp_bridges[j]->current_size =
320                             sgi_tioca_agp_bridges[j]->previous_size =
321                             (void *)&sgi_tioca_sizes[0];
322                         agp_add_bridge(sgi_tioca_agp_bridges[j]);
323                 }
324                 j++;
325         }
326 
327         agp_find_bridge = &sgi_tioca_find_bridge;
328         return 0;
329 }
330 
331 static void __devexit agp_sgi_cleanup(void)
332 {
333         kfree(sgi_tioca_agp_bridges);
334         sgi_tioca_agp_bridges = NULL;
335 }
336 
337 module_init(agp_sgi_init);
338 module_exit(agp_sgi_cleanup);
339 
340 MODULE_LICENSE("GPL and additional rights");
341 
  This page was automatically generated by the LXR engine.