1 /*
2 * Suspend support specific for i386.
3 *
4 * Distribute under GPLv2
5 *
6 * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
7 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
8 */
9
10 #include <linux/module.h>
11 #include <linux/suspend.h>
12 #include <asm/mtrr.h>
13 #include <asm/mce.h>
14
15 static struct saved_context saved_context;
16
17 unsigned long saved_context_ebx;
18 unsigned long saved_context_esp, saved_context_ebp;
19 unsigned long saved_context_esi, saved_context_edi;
20 unsigned long saved_context_eflags;
21
22 static void __save_processor_state(struct saved_context *ctxt)
23 {
24 mtrr_save_fixed_ranges(NULL);
25 kernel_fpu_begin();
26
27 /*
28 * descriptor tables
29 */
30 store_gdt(&ctxt->gdt);
31 store_idt(&ctxt->idt);
32 store_tr(ctxt->tr);
33
34 /*
35 * segment registers
36 */
37 savesegment(es, ctxt->es);
38 savesegment(fs, ctxt->fs);
39 savesegment(gs, ctxt->gs);
40 savesegment(ss, ctxt->ss);
41
42 /*
43 * control registers
44 */
45 ctxt->cr0 = read_cr0();
46 ctxt->cr2 = read_cr2();
47 ctxt->cr3 = read_cr3();
48 ctxt->cr4 = read_cr4();
49 }
50
51 void save_processor_state(void)
52 {
53 __save_processor_state(&saved_context);
54 }
55
56 static void do_fpu_end(void)
57 {
58 /*
59 * Restore FPU regs if necessary.
60 */
61 kernel_fpu_end();
62 }
63
64 static void fix_processor_context(void)
65 {
66 int cpu = smp_processor_id();
67 struct tss_struct * t = &per_cpu(init_tss, cpu);
68
69 set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
70
71 load_TR_desc(); /* This does ltr */
72 load_LDT(¤t->active_mm->context); /* This does lldt */
73
74 /*
75 * Now maybe reload the debug registers
76 */
77 if (current->thread.debugreg7) {
78 set_debugreg(current->thread.debugreg0, 0);
79 set_debugreg(current->thread.debugreg1, 1);
80 set_debugreg(current->thread.debugreg2, 2);
81 set_debugreg(current->thread.debugreg3, 3);
82 /* no 4 and 5 */
83 set_debugreg(current->thread.debugreg6, 6);
84 set_debugreg(current->thread.debugreg7, 7);
85 }
86
87 }
88
89 static void __restore_processor_state(struct saved_context *ctxt)
90 {
91 /*
92 * control registers
93 */
94 write_cr4(ctxt->cr4);
95 write_cr3(ctxt->cr3);
96 write_cr2(ctxt->cr2);
97 write_cr0(ctxt->cr0);
98
99 /*
100 * now restore the descriptor tables to their proper values
101 * ltr is done i fix_processor_context().
102 */
103 load_gdt(&ctxt->gdt);
104 load_idt(&ctxt->idt);
105
106 /*
107 * segment registers
108 */
109 loadsegment(es, ctxt->es);
110 loadsegment(fs, ctxt->fs);
111 loadsegment(gs, ctxt->gs);
112 loadsegment(ss, ctxt->ss);
113
114 /*
115 * sysenter MSRs
116 */
117 if (boot_cpu_has(X86_FEATURE_SEP))
118 enable_sep_cpu();
119
120 fix_processor_context();
121 do_fpu_end();
122 mtrr_ap_init();
123 mcheck_init(&boot_cpu_data);
124 }
125
126 void restore_processor_state(void)
127 {
128 __restore_processor_state(&saved_context);
129 }
130
131 /* Needed by apm.c */
132 EXPORT_SYMBOL(save_processor_state);
133 EXPORT_SYMBOL(restore_processor_state);
134
|
This page was automatically generated by the
LXR engine.
|