1 /*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12
13 #include <asm/acpi.h>
14 #include <asm/segment.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
17
18 #include "pci.h"
19
20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF;
22
23 static int pci_bf_sort;
24 int pci_routeirq;
25 int pcibios_last_bus = -1;
26 unsigned long pirq_table_addr;
27 struct pci_bus *pci_root_bus;
28 struct pci_raw_ops *raw_pci_ops;
29 struct pci_raw_ops *raw_pci_ext_ops;
30
31 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
32 int reg, int len, u32 *val)
33 {
34 if (reg < 256 && raw_pci_ops)
35 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
36 if (raw_pci_ext_ops)
37 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
38 return -EINVAL;
39 }
40
41 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
42 int reg, int len, u32 val)
43 {
44 if (reg < 256 && raw_pci_ops)
45 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
46 if (raw_pci_ext_ops)
47 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
48 return -EINVAL;
49 }
50
51 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
52 {
53 return raw_pci_read(pci_domain_nr(bus), bus->number,
54 devfn, where, size, value);
55 }
56
57 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
58 {
59 return raw_pci_write(pci_domain_nr(bus), bus->number,
60 devfn, where, size, value);
61 }
62
63 struct pci_ops pci_root_ops = {
64 .read = pci_read,
65 .write = pci_write,
66 };
67
68 /*
69 * legacy, numa, and acpi all want to call pcibios_scan_root
70 * from their initcalls. This flag prevents that.
71 */
72 int pcibios_scanned;
73
74 /*
75 * This interrupt-safe spinlock protects all accesses to PCI
76 * configuration space.
77 */
78 DEFINE_RAW_SPINLOCK(pci_config_lock);
79
80 /*
81 * Several buggy motherboards address only 16 devices and mirror
82 * them to next 16 IDs. We try to detect this `feature' on all
83 * primary buses (those containing host bridges as they are
84 * expected to be unique) and remove the ghost devices.
85 */
86
87 static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
88 {
89 struct list_head *ln, *mn;
90 struct pci_dev *d, *e;
91 int mirror = PCI_DEVFN(16,0);
92 int seen_host_bridge = 0;
93 int i;
94
95 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
96 list_for_each(ln, &b->devices) {
97 d = pci_dev_b(ln);
98 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
99 seen_host_bridge++;
100 for (mn=ln->next; mn != &b->devices; mn=mn->next) {
101 e = pci_dev_b(mn);
102 if (e->devfn != d->devfn + mirror ||
103 e->vendor != d->vendor ||
104 e->device != d->device ||
105 e->class != d->class)
106 continue;
107 for(i=0; i<PCI_NUM_RESOURCES; i++)
108 if (e->resource[i].start != d->resource[i].start ||
109 e->resource[i].end != d->resource[i].end ||
110 e->resource[i].flags != d->resource[i].flags)
111 continue;
112 break;
113 }
114 if (mn == &b->devices)
115 return;
116 }
117 if (!seen_host_bridge)
118 return;
119 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
120
121 ln = &b->devices;
122 while (ln->next != &b->devices) {
123 d = pci_dev_b(ln->next);
124 if (d->devfn >= mirror) {
125 list_del(&d->global_list);
126 list_del(&d->bus_list);
127 kfree(d);
128 } else
129 ln = ln->next;
130 }
131 }
132
133 /*
134 * Called after each bus is probed, but before its children
135 * are examined.
136 */
137
138 void __devinit pcibios_fixup_bus(struct pci_bus *b)
139 {
140 pcibios_fixup_ghosts(b);
141 pci_read_bridge_bases(b);
142 }
143
144 /*
145 * Only use DMI information to set this if nothing was passed
146 * on the kernel command line (which was parsed earlier).
147 */
148
149 static int __devinit set_bf_sort(const struct dmi_system_id *d)
150 {
151 if (pci_bf_sort == pci_bf_sort_default) {
152 pci_bf_sort = pci_dmi_bf;
153 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
154 }
155 return 0;
156 }
157
158 /*
159 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
160 */
161 #ifdef __i386__
162 static int __devinit assign_all_busses(const struct dmi_system_id *d)
163 {
164 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
165 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
166 " (pci=assign-busses)\n", d->ident);
167 return 0;
168 }
169 #endif
170
171 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
172 #ifdef __i386__
173 /*
174 * Laptops which need pci=assign-busses to see Cardbus cards
175 */
176 {
177 .callback = assign_all_busses,
178 .ident = "Samsung X20 Laptop",
179 .matches = {
180 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
181 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
182 },
183 },
184 #endif /* __i386__ */
185 {
186 .callback = set_bf_sort,
187 .ident = "Dell PowerEdge 1950",
188 .matches = {
189 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
190 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
191 },
192 },
193 {
194 .callback = set_bf_sort,
195 .ident = "Dell PowerEdge 1955",
196 .matches = {
197 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
198 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
199 },
200 },
201 {
202 .callback = set_bf_sort,
203 .ident = "Dell PowerEdge 2900",
204 .matches = {
205 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
206 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
207 },
208 },
209 {
210 .callback = set_bf_sort,
211 .ident = "Dell PowerEdge 2950",
212 .matches = {
213 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
214 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
215 },
216 },
217 {
218 .callback = set_bf_sort,
219 .ident = "Dell PowerEdge R900",
220 .matches = {
221 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
222 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
223 },
224 },
225 {
226 .callback = set_bf_sort,
227 .ident = "HP ProLiant BL20p G3",
228 .matches = {
229 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
230 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
231 },
232 },
233 {
234 .callback = set_bf_sort,
235 .ident = "HP ProLiant BL20p G4",
236 .matches = {
237 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
238 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
239 },
240 },
241 {
242 .callback = set_bf_sort,
243 .ident = "HP ProLiant BL30p G1",
244 .matches = {
245 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
246 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
247 },
248 },
249 {
250 .callback = set_bf_sort,
251 .ident = "HP ProLiant BL25p G1",
252 .matches = {
253 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
254 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
255 },
256 },
257 {
258 .callback = set_bf_sort,
259 .ident = "HP ProLiant BL35p G1",
260 .matches = {
261 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
262 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
263 },
264 },
265 {
266 .callback = set_bf_sort,
267 .ident = "HP ProLiant BL45p G1",
268 .matches = {
269 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
270 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
271 },
272 },
273 {
274 .callback = set_bf_sort,
275 .ident = "HP ProLiant BL45p G2",
276 .matches = {
277 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
278 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
279 },
280 },
281 {
282 .callback = set_bf_sort,
283 .ident = "HP ProLiant BL460c G1",
284 .matches = {
285 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
286 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
287 },
288 },
289 {
290 .callback = set_bf_sort,
291 .ident = "HP ProLiant BL465c G1",
292 .matches = {
293 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
294 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
295 },
296 },
297 {
298 .callback = set_bf_sort,
299 .ident = "HP ProLiant BL480c G1",
300 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
302 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
303 },
304 },
305 {
306 .callback = set_bf_sort,
307 .ident = "HP ProLiant BL685c G1",
308 .matches = {
309 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
310 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
311 },
312 },
313 {
314 .callback = set_bf_sort,
315 .ident = "HP ProLiant DL385 G2",
316 .matches = {
317 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
318 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
319 },
320 },
321 {
322 .callback = set_bf_sort,
323 .ident = "HP ProLiant DL585 G2",
324 .matches = {
325 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
326 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
327 },
328 },
329 #ifdef __i386__
330 {
331 .callback = assign_all_busses,
332 .ident = "Compaq EVO N800c",
333 .matches = {
334 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
335 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
336 },
337 },
338 #endif
339 {
340 .callback = set_bf_sort,
341 .ident = "HP ProLiant DL385 G2",
342 .matches = {
343 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
344 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
345 },
346 },
347 {
348 .callback = set_bf_sort,
349 .ident = "HP ProLiant DL585 G2",
350 .matches = {
351 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
352 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
353 },
354 },
355 {}
356 };
357
358 void __init dmi_check_pciprobe(void)
359 {
360 dmi_check_system(pciprobe_dmi_table);
361 }
362
363 struct pci_bus * __devinit pcibios_scan_root(int busnum)
364 {
365 struct pci_bus *bus = NULL;
366 struct pci_sysdata *sd;
367
368 while ((bus = pci_find_next_bus(bus)) != NULL) {
369 if (bus->number == busnum) {
370 /* Already scanned */
371 return bus;
372 }
373 }
374
375 /* Allocate per-root-bus (not per bus) arch-specific data.
376 * TODO: leak; this memory is never freed.
377 * It's arguable whether it's worth the trouble to care.
378 */
379 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
380 if (!sd) {
381 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
382 return NULL;
383 }
384
385 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
386
387 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
388 }
389
390 extern u8 pci_cache_line_size;
391
392 static int __init pcibios_init(void)
393 {
394 struct cpuinfo_x86 *c = &boot_cpu_data;
395
396 if (!raw_pci_ops) {
397 printk(KERN_WARNING "PCI: System does not support PCI\n");
398 return 0;
399 }
400
401 /*
402 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
403 * and P4. It's also good for 386/486s (which actually have 16)
404 * as quite a few PCI devices do not support smaller values.
405 */
406 pci_cache_line_size = 32 >> 2;
407 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
408 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
409 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
410 pci_cache_line_size = 128 >> 2; /* P4 */
411
412 pcibios_resource_survey();
413
414 if (pci_bf_sort >= pci_force_bf)
415 pci_sort_breadthfirst();
416 #ifdef CONFIG_PCI_BIOS
417 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
418 pcibios_sort();
419 #endif
420 return 0;
421 }
422
423 subsys_initcall(pcibios_init);
424
425 char * __devinit pcibios_setup(char *str)
426 {
427 if (!strcmp(str, "off")) {
428 pci_probe = 0;
429 return NULL;
430 } else if (!strcmp(str, "bfsort")) {
431 pci_bf_sort = pci_force_bf;
432 return NULL;
433 } else if (!strcmp(str, "nobfsort")) {
434 pci_bf_sort = pci_force_nobf;
435 return NULL;
436 }
437 #ifdef CONFIG_PCI_BIOS
438 else if (!strcmp(str, "bios")) {
439 pci_probe = PCI_PROBE_BIOS;
440 return NULL;
441 } else if (!strcmp(str, "nobios")) {
442 pci_probe &= ~PCI_PROBE_BIOS;
443 return NULL;
444 } else if (!strcmp(str, "nosort")) {
445 pci_probe |= PCI_NO_SORT;
446 return NULL;
447 } else if (!strcmp(str, "biosirq")) {
448 pci_probe |= PCI_BIOS_IRQ_SCAN;
449 return NULL;
450 } else if (!strncmp(str, "pirqaddr=", 9)) {
451 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
452 return NULL;
453 }
454 #endif
455 #ifdef CONFIG_PCI_DIRECT
456 else if (!strcmp(str, "conf1")) {
457 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
458 return NULL;
459 }
460 else if (!strcmp(str, "conf2")) {
461 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
462 return NULL;
463 }
464 #endif
465 #ifdef CONFIG_PCI_MMCONFIG
466 else if (!strcmp(str, "nommconf")) {
467 pci_probe &= ~PCI_PROBE_MMCONF;
468 return NULL;
469 }
470 #endif
471 else if (!strcmp(str, "noacpi")) {
472 acpi_noirq_set();
473 return NULL;
474 }
475 else if (!strcmp(str, "noearly")) {
476 pci_probe |= PCI_PROBE_NOEARLY;
477 return NULL;
478 }
479 #ifndef CONFIG_X86_VISWS
480 else if (!strcmp(str, "usepirqmask")) {
481 pci_probe |= PCI_USE_PIRQ_MASK;
482 return NULL;
483 } else if (!strncmp(str, "irqmask=", 8)) {
484 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
485 return NULL;
486 } else if (!strncmp(str, "lastbus=", 8)) {
487 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
488 return NULL;
489 }
490 #endif
491 else if (!strcmp(str, "rom")) {
492 pci_probe |= PCI_ASSIGN_ROMS;
493 return NULL;
494 } else if (!strcmp(str, "assign-busses")) {
495 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
496 return NULL;
497 } else if (!strcmp(str, "use_crs")) {
498 pci_probe |= PCI_USE__CRS;
499 return NULL;
500 } else if (!strcmp(str, "routeirq")) {
501 pci_routeirq = 1;
502 return NULL;
503 }
504 return str;
505 }
506
507 unsigned int pcibios_assign_all_busses(void)
508 {
509 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
510 }
511
512 int pcibios_enable_device(struct pci_dev *dev, int mask)
513 {
514 int err;
515
516 if ((err = pcibios_enable_resources(dev, mask)) < 0)
517 return err;
518
519 if (!dev->msi_enabled)
520 return pcibios_enable_irq(dev);
521 return 0;
522 }
523
524 void pcibios_disable_device (struct pci_dev *dev)
525 {
526 if (!dev->msi_enabled && pcibios_disable_irq)
527 pcibios_disable_irq(dev);
528 }
529
530 struct pci_bus *__devinit pci_scan_bus_with_sysdata(int busno)
531 {
532 struct pci_bus *bus = NULL;
533 struct pci_sysdata *sd;
534
535 /*
536 * Allocate per-root-bus (not per bus) arch-specific data.
537 * TODO: leak; this memory is never freed.
538 * It's arguable whether it's worth the trouble to care.
539 */
540 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
541 if (!sd) {
542 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
543 return NULL;
544 }
545 sd->node = -1;
546 bus = pci_scan_bus(busno, &pci_root_ops, sd);
547 if (!bus)
548 kfree(sd);
549
550 return bus;
551 }
552
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