1 /*
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6 */
7
8 /*
9 * This file handles the architecture-dependent parts of process handling..
10 */
11
12 #include <stdarg.h>
13
14 #include <linux/cpu.h>
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/fs.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/elfcore.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/user.h>
26 #include <linux/interrupt.h>
27 #include <linux/utsname.h>
28 #include <linux/delay.h>
29 #include <linux/reboot.h>
30 #include <linux/init.h>
31 #include <linux/mc146818rtc.h>
32 #include <linux/module.h>
33 #include <linux/kallsyms.h>
34 #include <linux/ptrace.h>
35 #include <linux/random.h>
36 #include <linux/personality.h>
37 #include <linux/tick.h>
38 #include <linux/percpu.h>
39
40 #include <asm/uaccess.h>
41 #include <asm/pgtable.h>
42 #include <asm/system.h>
43 #include <asm/io.h>
44 #include <asm/ldt.h>
45 #include <asm/processor.h>
46 #include <asm/i387.h>
47 #include <asm/desc.h>
48 #include <asm/vm86.h>
49 #ifdef CONFIG_MATH_EMULATION
50 #include <asm/math_emu.h>
51 #endif
52
53 #include <linux/err.h>
54
55 #include <asm/tlbflush.h>
56 #include <asm/cpu.h>
57 #include <asm/kdebug.h>
58
59 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
60
61 static int hlt_counter;
62
63 unsigned long boot_option_idle_override = 0;
64 EXPORT_SYMBOL(boot_option_idle_override);
65
66 DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
67 EXPORT_PER_CPU_SYMBOL(current_task);
68
69 DEFINE_PER_CPU(int, cpu_number);
70 EXPORT_PER_CPU_SYMBOL(cpu_number);
71
72 /*
73 * Return saved PC of a blocked thread.
74 */
75 unsigned long thread_saved_pc(struct task_struct *tsk)
76 {
77 return ((unsigned long *)tsk->thread.sp)[3];
78 }
79
80 /*
81 * Powermanagement idle function, if any..
82 */
83 void (*pm_idle)(void);
84 EXPORT_SYMBOL(pm_idle);
85
86 void disable_hlt(void)
87 {
88 hlt_counter++;
89 }
90
91 EXPORT_SYMBOL(disable_hlt);
92
93 void enable_hlt(void)
94 {
95 hlt_counter--;
96 }
97
98 EXPORT_SYMBOL(enable_hlt);
99
100 /*
101 * We use this if we don't have any better
102 * idle routine..
103 */
104 void default_idle(void)
105 {
106 if (!hlt_counter && boot_cpu_data.hlt_works_ok) {
107 current_thread_info()->status &= ~TS_POLLING;
108 /*
109 * TS_POLLING-cleared state must be visible before we
110 * test NEED_RESCHED:
111 */
112 smp_mb();
113
114 local_irq_disable();
115 if (!need_resched() && !need_resched_delayed()) {
116 ktime_t t0, t1;
117 u64 t0n, t1n;
118
119 t0 = ktime_get();
120 t0n = ktime_to_ns(t0);
121 safe_halt(); /* enables interrupts racelessly */
122 local_irq_disable();
123 t1 = ktime_get();
124 t1n = ktime_to_ns(t1);
125 sched_clock_idle_wakeup_event(t1n - t0n);
126 }
127 local_irq_enable();
128 current_thread_info()->status |= TS_POLLING;
129 } else {
130 /* loop is done by the caller */
131 cpu_relax();
132 }
133 }
134 #ifdef CONFIG_APM_MODULE
135 EXPORT_SYMBOL(default_idle);
136 #endif
137
138 /*
139 * On SMP it's slightly faster (but much more power-consuming!)
140 * to poll the ->work.need_resched flag instead of waiting for the
141 * cross-CPU IPI to arrive. Use this option with caution.
142 */
143 static void poll_idle(void)
144 {
145 do {
146 cpu_relax();
147 } while (!need_resched() && !need_resched_delayed());
148 }
149
150 #ifdef CONFIG_HOTPLUG_CPU
151 #include <asm/nmi.h>
152 /* We don't actually take CPU down, just spin without interrupts. */
153 static inline void play_dead(void)
154 {
155 /* This must be done before dead CPU ack */
156 cpu_exit_clear();
157 wbinvd();
158 mb();
159 /* Ack it */
160 __get_cpu_var(cpu_state) = CPU_DEAD;
161
162 /*
163 * With physical CPU hotplug, we should halt the cpu
164 */
165 local_irq_disable();
166 while (1)
167 halt();
168 }
169 #else
170 static inline void play_dead(void)
171 {
172 BUG();
173 }
174 #endif /* CONFIG_HOTPLUG_CPU */
175
176 /*
177 * The idle thread. There's no useful work to be
178 * done, so just try to conserve power and have a
179 * low exit latency (ie sit in a loop waiting for
180 * somebody to say that they'd like to reschedule)
181 */
182 void cpu_idle(void)
183 {
184 int cpu = smp_processor_id();
185
186 current_thread_info()->status |= TS_POLLING;
187
188 /* endless idle loop with no priority at all */
189 while (1) {
190 tick_nohz_stop_sched_tick();
191 while (!need_resched() && !need_resched_delayed()) {
192 void (*idle)(void);
193
194 rmb();
195 idle = pm_idle;
196
197 if (rcu_pending(cpu))
198 rcu_check_callbacks(cpu, 0);
199
200 if (!idle)
201 idle = default_idle;
202
203 if (cpu_is_offline(cpu))
204 play_dead();
205
206 __get_cpu_var(irq_stat).idle_timestamp = jiffies;
207 /* Don't trace irqs off for idle */
208 stop_critical_timings();
209 idle();
210 start_critical_timings();
211 }
212 local_irq_disable();
213 tick_nohz_restart_sched_tick();
214 __preempt_enable_no_resched();
215 __schedule();
216 preempt_disable();
217 local_irq_enable();
218 }
219 }
220
221 static void do_nothing(void *unused)
222 {
223 }
224
225 /*
226 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
227 * pm_idle and update to new pm_idle value. Required while changing pm_idle
228 * handler on SMP systems.
229 *
230 * Caller must have changed pm_idle to the new value before the call. Old
231 * pm_idle value will not be used by any CPU after the return of this function.
232 */
233 void cpu_idle_wait(void)
234 {
235 smp_mb();
236 /* kick all the CPUs so that they exit out of pm_idle */
237 smp_call_function(do_nothing, NULL, 0, 1);
238 }
239 EXPORT_SYMBOL_GPL(cpu_idle_wait);
240
241 /*
242 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
243 * which can obviate IPI to trigger checking of need_resched.
244 * We execute MONITOR against need_resched and enter optimized wait state
245 * through MWAIT. Whenever someone changes need_resched, we would be woken
246 * up from MWAIT (without an IPI).
247 *
248 * New with Core Duo processors, MWAIT can take some hints based on CPU
249 * capability.
250 */
251 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
252 {
253 if (!need_resched() && !need_resched_delayed()) {
254 __monitor((void *)¤t_thread_info()->flags, 0, 0);
255 smp_mb();
256 if (!need_resched() && !need_resched_delayed())
257 __mwait(ax, cx);
258 }
259 }
260
261 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
262 static void mwait_idle(void)
263 {
264 local_irq_enable();
265 mwait_idle_with_hints(0, 0);
266 }
267
268 /*
269 * mwait selection logic:
270 *
271 * It depends on the CPU. For AMD CPUs that support MWAIT this is
272 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
273 * then depend on a clock divisor and current Pstate of the core. If
274 * all cores of a processor are in halt state (C1) the processor can
275 * enter the C1E (C1 enhanced) state. If mwait is used this will never
276 * happen.
277 *
278 * idle=mwait overrides this decision and forces the usage of mwait.
279 */
280 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
281 {
282 if (force_mwait)
283 return 1;
284
285 if (c->x86_vendor == X86_VENDOR_AMD) {
286 switch(c->x86) {
287 case 0x10:
288 case 0x11:
289 return 0;
290 }
291 }
292 return 1;
293 }
294
295 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
296 {
297 static int selected;
298
299 if (selected)
300 return;
301 #ifdef CONFIG_X86_SMP
302 if (pm_idle == poll_idle && smp_num_siblings > 1) {
303 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
304 " performance may degrade.\n");
305 }
306 #endif
307 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
308 /*
309 * Skip, if setup has overridden idle.
310 * One CPU supports mwait => All CPUs supports mwait
311 */
312 if (!pm_idle) {
313 printk(KERN_INFO "using mwait in idle threads.\n");
314 pm_idle = mwait_idle;
315 }
316 }
317 selected = 1;
318 }
319
320 static int __init idle_setup(char *str)
321 {
322 if (!strcmp(str, "poll")) {
323 printk("using polling idle threads.\n");
324 pm_idle = poll_idle;
325 } else if (!strcmp(str, "mwait"))
326 force_mwait = 1;
327 else
328 return -1;
329
330 boot_option_idle_override = 1;
331 return 0;
332 }
333 early_param("idle", idle_setup);
334
335 void __show_registers(struct pt_regs *regs, int all)
336 {
337 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
338 unsigned long d0, d1, d2, d3, d6, d7;
339 unsigned long sp;
340 unsigned short ss, gs;
341
342 if (user_mode_vm(regs)) {
343 sp = regs->sp;
344 ss = regs->ss & 0xffff;
345 savesegment(gs, gs);
346 } else {
347 sp = (unsigned long) (®s->sp);
348 savesegment(ss, ss);
349 savesegment(gs, gs);
350 }
351
352 printk("\n");
353 printk("Pid: %d, comm: %s %s (%s %.*s)\n",
354 task_pid_nr(current), current->comm,
355 print_tainted(), init_utsname()->release,
356 (int)strcspn(init_utsname()->version, " "),
357 init_utsname()->version);
358
359 printk("EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",
360 0xffff & regs->cs, regs->ip, regs->flags,
361 smp_processor_id());
362 print_symbol("EIP is at %s\n", regs->ip);
363
364 printk("EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
365 regs->ax, regs->bx, regs->cx, regs->dx);
366 printk("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
367 regs->si, regs->di, regs->bp, sp);
368 printk(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x"
369 " preempt:%08x\n",
370 regs->ds & 0xffff, regs->es & 0xffff,
371 regs->fs & 0xffff, gs, ss, preempt_count());
372
373 if (!all)
374 return;
375
376 cr0 = read_cr0();
377 cr2 = read_cr2();
378 cr3 = read_cr3();
379 cr4 = read_cr4_safe();
380 printk("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
381 cr0, cr2, cr3, cr4);
382
383 get_debugreg(d0, 0);
384 get_debugreg(d1, 1);
385 get_debugreg(d2, 2);
386 get_debugreg(d3, 3);
387 printk("DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
388 d0, d1, d2, d3);
389
390 get_debugreg(d6, 6);
391 get_debugreg(d7, 7);
392 printk("DR6: %08lx DR7: %08lx\n",
393 d6, d7);
394 }
395
396 void show_regs(struct pt_regs *regs)
397 {
398 __show_registers(regs, 1);
399 show_trace(NULL, regs, ®s->sp, regs->bp);
400 }
401
402 /*
403 * This gets run with %bx containing the
404 * function to call, and %dx containing
405 * the "args".
406 */
407 extern void kernel_thread_helper(void);
408
409 /*
410 * Create a kernel thread
411 */
412 int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
413 {
414 struct pt_regs regs;
415
416 memset(®s, 0, sizeof(regs));
417
418 regs.bx = (unsigned long) fn;
419 regs.dx = (unsigned long) arg;
420
421 regs.ds = __USER_DS;
422 regs.es = __USER_DS;
423 regs.fs = __KERNEL_PERCPU;
424 regs.orig_ax = -1;
425 regs.ip = (unsigned long) kernel_thread_helper;
426 regs.cs = __KERNEL_CS | get_kernel_rpl();
427 regs.flags = X86_EFLAGS_IF | X86_EFLAGS_SF | X86_EFLAGS_PF | 0x2;
428
429 /* Ok, create the new process.. */
430 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
431 }
432 EXPORT_SYMBOL(kernel_thread);
433
434 /*
435 * Free current thread data structures etc..
436 */
437 void exit_thread(void)
438 {
439 /* The process may have allocated an io port bitmap... nuke it. */
440 if (unlikely(test_thread_flag(TIF_IO_BITMAP))) {
441 struct task_struct *tsk = current;
442 struct thread_struct *t = &tsk->thread;
443 void *io_bitmap_ptr = t->io_bitmap_ptr;
444 int cpu;
445 struct tss_struct *tss;
446
447 /*
448 * On PREEMPT_RT we must not call kfree() with
449 * preemption disabled, so we first zap the pointer:
450 */
451 t->io_bitmap_ptr = NULL;
452 kfree(io_bitmap_ptr);
453
454 clear_thread_flag(TIF_IO_BITMAP);
455 /*
456 * Careful, clear this in the TSS too:
457 */
458 cpu = get_cpu();
459 tss = &per_cpu(init_tss, cpu);
460 memset(tss->io_bitmap, 0xff, tss->io_bitmap_max);
461 t->io_bitmap_max = 0;
462 tss->io_bitmap_owner = NULL;
463 tss->io_bitmap_max = 0;
464 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
465 put_cpu();
466 }
467 }
468
469 void flush_thread(void)
470 {
471 struct task_struct *tsk = current;
472
473 tsk->thread.debugreg0 = 0;
474 tsk->thread.debugreg1 = 0;
475 tsk->thread.debugreg2 = 0;
476 tsk->thread.debugreg3 = 0;
477 tsk->thread.debugreg6 = 0;
478 tsk->thread.debugreg7 = 0;
479 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
480 clear_tsk_thread_flag(tsk, TIF_DEBUG);
481 /*
482 * Forget coprocessor state..
483 */
484 clear_fpu(tsk);
485 clear_used_math();
486 }
487
488 void release_thread(struct task_struct *dead_task)
489 {
490 BUG_ON(dead_task->mm);
491 release_vm86_irqs(dead_task);
492 }
493
494 /*
495 * This gets called before we allocate a new thread and copy
496 * the current task into it.
497 */
498 void prepare_to_copy(struct task_struct *tsk)
499 {
500 unlazy_fpu(tsk);
501 }
502
503 int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
504 unsigned long unused,
505 struct task_struct * p, struct pt_regs * regs)
506 {
507 struct pt_regs * childregs;
508 struct task_struct *tsk;
509 int err;
510
511 childregs = task_pt_regs(p);
512 *childregs = *regs;
513 childregs->ax = 0;
514 childregs->sp = sp;
515
516 p->thread.sp = (unsigned long) childregs;
517 p->thread.sp0 = (unsigned long) (childregs+1);
518
519 p->thread.ip = (unsigned long) ret_from_fork;
520
521 savesegment(gs, p->thread.gs);
522
523 tsk = current;
524 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
525 p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr,
526 IO_BITMAP_BYTES, GFP_KERNEL);
527 if (!p->thread.io_bitmap_ptr) {
528 p->thread.io_bitmap_max = 0;
529 return -ENOMEM;
530 }
531 set_tsk_thread_flag(p, TIF_IO_BITMAP);
532 }
533
534 err = 0;
535
536 /*
537 * Set a new TLS for the child thread?
538 */
539 if (clone_flags & CLONE_SETTLS)
540 err = do_set_thread_area(p, -1,
541 (struct user_desc __user *)childregs->si, 0);
542
543 if (err && p->thread.io_bitmap_ptr) {
544 kfree(p->thread.io_bitmap_ptr);
545 p->thread.io_bitmap_max = 0;
546 }
547 return err;
548 }
549
550 #ifdef CONFIG_SECCOMP
551 static void hard_disable_TSC(void)
552 {
553 write_cr4(read_cr4() | X86_CR4_TSD);
554 }
555 void disable_TSC(void)
556 {
557 preempt_disable();
558 if (!test_and_set_thread_flag(TIF_NOTSC))
559 /*
560 * Must flip the CPU state synchronously with
561 * TIF_NOTSC in the current running context.
562 */
563 hard_disable_TSC();
564 preempt_enable();
565 }
566 static void hard_enable_TSC(void)
567 {
568 write_cr4(read_cr4() & ~X86_CR4_TSD);
569 }
570 #endif /* CONFIG_SECCOMP */
571
572 static noinline void
573 __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
574 struct tss_struct *tss)
575 {
576 struct thread_struct *prev, *next;
577 unsigned long debugctl;
578
579 prev = &prev_p->thread;
580 next = &next_p->thread;
581
582 debugctl = prev->debugctlmsr;
583 if (next->ds_area_msr != prev->ds_area_msr) {
584 /* we clear debugctl to make sure DS
585 * is not in use when we change it */
586 debugctl = 0;
587 wrmsrl(MSR_IA32_DEBUGCTLMSR, 0);
588 wrmsr(MSR_IA32_DS_AREA, next->ds_area_msr, 0);
589 }
590
591 if (next->debugctlmsr != debugctl)
592 wrmsr(MSR_IA32_DEBUGCTLMSR, next->debugctlmsr, 0);
593
594 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
595 set_debugreg(next->debugreg0, 0);
596 set_debugreg(next->debugreg1, 1);
597 set_debugreg(next->debugreg2, 2);
598 set_debugreg(next->debugreg3, 3);
599 /* no 4 and 5 */
600 set_debugreg(next->debugreg6, 6);
601 set_debugreg(next->debugreg7, 7);
602 }
603
604 #ifdef CONFIG_SECCOMP
605 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
606 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
607 /* prev and next are different */
608 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
609 hard_disable_TSC();
610 else
611 hard_enable_TSC();
612 }
613 #endif
614
615 #ifdef X86_BTS
616 if (test_tsk_thread_flag(prev_p, TIF_BTS_TRACE_TS))
617 ptrace_bts_take_timestamp(prev_p, BTS_TASK_DEPARTS);
618
619 if (test_tsk_thread_flag(next_p, TIF_BTS_TRACE_TS))
620 ptrace_bts_take_timestamp(next_p, BTS_TASK_ARRIVES);
621 #endif
622
623
624 if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
625 /*
626 * Disable the bitmap via an invalid offset. We still cache
627 * the previous bitmap owner and the IO bitmap contents:
628 */
629 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
630 return;
631 }
632
633 if (likely(next == tss->io_bitmap_owner)) {
634 /*
635 * Previous owner of the bitmap (hence the bitmap content)
636 * matches the next task, we dont have to do anything but
637 * to set a valid offset in the TSS:
638 */
639 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
640 return;
641 }
642 /*
643 * Lazy TSS's I/O bitmap copy. We set an invalid offset here
644 * and we let the task to get a GPF in case an I/O instruction
645 * is performed. The handler of the GPF will verify that the
646 * faulting task has a valid I/O bitmap and, it true, does the
647 * real copy and restart the instruction. This will save us
648 * redundant copies when the currently switched task does not
649 * perform any I/O during its timeslice.
650 */
651 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY;
652 }
653
654 /*
655 * switch_to(x,yn) should switch tasks from x to y.
656 *
657 * We fsave/fwait so that an exception goes off at the right time
658 * (as a call from the fsave or fwait in effect) rather than to
659 * the wrong process. Lazy FP saving no longer makes any sense
660 * with modern CPU's, and this simplifies a lot of things (SMP
661 * and UP become the same).
662 *
663 * NOTE! We used to use the x86 hardware context switching. The
664 * reason for not using it any more becomes apparent when you
665 * try to recover gracefully from saved state that is no longer
666 * valid (stale segment register values in particular). With the
667 * hardware task-switch, there is no way to fix up bad state in
668 * a reasonable manner.
669 *
670 * The fact that Intel documents the hardware task-switching to
671 * be slow is a fairly red herring - this code is not noticeably
672 * faster. However, there _is_ some room for improvement here,
673 * so the performance issues may eventually be a valid point.
674 * More important, however, is the fact that this allows us much
675 * more flexibility.
676 *
677 * The return value (in %ax) will be the "prev" task after
678 * the task-switch, and shows up in ret_from_fork in entry.S,
679 * for example.
680 */
681 struct task_struct * __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
682 {
683 struct thread_struct *prev = &prev_p->thread,
684 *next = &next_p->thread;
685 int cpu = smp_processor_id();
686 struct tss_struct *tss = &per_cpu(init_tss, cpu);
687
688 /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
689
690 __unlazy_fpu(prev_p);
691
692
693 /* we're going to use this soon, after a few expensive things */
694 if (next_p->fpu_counter > 5)
695 prefetch(&next->i387.fxsave);
696
697 /*
698 * Reload esp0.
699 */
700 load_sp0(tss, next);
701
702 /*
703 * Save away %gs. No need to save %fs, as it was saved on the
704 * stack on entry. No need to save %es and %ds, as those are
705 * always kernel segments while inside the kernel. Doing this
706 * before setting the new TLS descriptors avoids the situation
707 * where we temporarily have non-reloadable segments in %fs
708 * and %gs. This could be an issue if the NMI handler ever
709 * used %fs or %gs (it does not today), or if the kernel is
710 * running inside of a hypervisor layer.
711 */
712 savesegment(gs, prev->gs);
713
714 /*
715 * Load the per-thread Thread-Local Storage descriptor.
716 */
717 load_TLS(next, cpu);
718
719 /*
720 * Restore IOPL if needed. In normal use, the flags restore
721 * in the switch assembly will handle this. But if the kernel
722 * is running virtualized at a non-zero CPL, the popf will
723 * not restore flags, so it must be done in a separate step.
724 */
725 if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
726 set_iopl_mask(next->iopl);
727
728 /*
729 * Now maybe handle debug registers and/or IO bitmaps
730 */
731 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
732 task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
733 __switch_to_xtra(prev_p, next_p, tss);
734
735 /*
736 * Leave lazy mode, flushing any hypercalls made here.
737 * This must be done before restoring TLS segments so
738 * the GDT and LDT are properly updated, and must be
739 * done before math_state_restore, so the TS bit is up
740 * to date.
741 */
742 arch_leave_lazy_cpu_mode();
743
744 /* If the task has used fpu the last 5 timeslices, just do a full
745 * restore of the math state immediately to avoid the trap; the
746 * chances of needing FPU soon are obviously high now
747 *
748 * tsk_used_math() checks prevent calling math_state_restore(),
749 * which can sleep in the case of !tsk_used_math()
750 */
751 if (tsk_used_math(next_p) && next_p->fpu_counter > 5)
752 math_state_restore();
753
754 /*
755 * Restore %gs if needed (which is common)
756 */
757 if (prev->gs | next->gs)
758 loadsegment(gs, next->gs);
759
760 x86_write_percpu(current_task, next_p);
761
762 return prev_p;
763 }
764
765 asmlinkage int sys_fork(struct pt_regs regs)
766 {
767 return do_fork(SIGCHLD, regs.sp, ®s, 0, NULL, NULL);
768 }
769
770 asmlinkage int sys_clone(struct pt_regs regs)
771 {
772 unsigned long clone_flags;
773 unsigned long newsp;
774 int __user *parent_tidptr, *child_tidptr;
775
776 clone_flags = regs.bx;
777 newsp = regs.cx;
778 parent_tidptr = (int __user *)regs.dx;
779 child_tidptr = (int __user *)regs.di;
780 if (!newsp)
781 newsp = regs.sp;
782 return do_fork(clone_flags, newsp, ®s, 0, parent_tidptr, child_tidptr);
783 }
784
785 /*
786 * This is trivial, and on the face of it looks like it
787 * could equally well be done in user mode.
788 *
789 * Not so, for quite unobvious reasons - register pressure.
790 * In user mode vfork() cannot have a stack frame, and if
791 * done by calling the "clone()" system call directly, you
792 * do not have enough call-clobbered registers to hold all
793 * the information you need.
794 */
795 asmlinkage int sys_vfork(struct pt_regs regs)
796 {
797 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs.sp, ®s, 0, NULL, NULL);
798 }
799
800 /*
801 * sys_execve() executes a new program.
802 */
803 asmlinkage int sys_execve(struct pt_regs regs)
804 {
805 int error;
806 char * filename;
807
808 filename = getname((char __user *) regs.bx);
809 error = PTR_ERR(filename);
810 if (IS_ERR(filename))
811 goto out;
812 error = do_execve(filename,
813 (char __user * __user *) regs.cx,
814 (char __user * __user *) regs.dx,
815 ®s);
816 if (error == 0) {
817 /* Make sure we don't return using sysenter.. */
818 set_thread_flag(TIF_IRET);
819 }
820 putname(filename);
821 out:
822 return error;
823 }
824
825 #define top_esp (THREAD_SIZE - sizeof(unsigned long))
826 #define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long))
827
828 unsigned long get_wchan(struct task_struct *p)
829 {
830 unsigned long bp, sp, ip;
831 unsigned long stack_page;
832 int count = 0;
833 if (!p || p == current || p->state == TASK_RUNNING)
834 return 0;
835 stack_page = (unsigned long)task_stack_page(p);
836 sp = p->thread.sp;
837 if (!stack_page || sp < stack_page || sp > top_esp+stack_page)
838 return 0;
839 /* include/asm-i386/system.h:switch_to() pushes bp last. */
840 bp = *(unsigned long *) sp;
841 do {
842 if (bp < stack_page || bp > top_ebp+stack_page)
843 return 0;
844 ip = *(unsigned long *) (bp+4);
845 if (!in_sched_functions(ip))
846 return ip;
847 bp = *(unsigned long *) bp;
848 } while (count++ < 16);
849 return 0;
850 }
851
852 unsigned long arch_align_stack(unsigned long sp)
853 {
854 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
855 sp -= get_random_int() % 8192;
856 return sp & ~0xf;
857 }
858
859 unsigned long arch_randomize_brk(struct mm_struct *mm)
860 {
861 unsigned long range_end = mm->brk + 0x02000000;
862 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
863 }
864
|
This page was automatically generated by the
LXR engine.
|