1 /*
2 * 8253/PIT functions
3 *
4 */
5 #include <linux/clockchips.h>
6 #include <linux/init.h>
7 #include <linux/interrupt.h>
8 #include <linux/jiffies.h>
9 #include <linux/module.h>
10 #include <linux/spinlock.h>
11
12 #include <asm/smp.h>
13 #include <asm/delay.h>
14 #include <asm/i8253.h>
15 #include <asm/io.h>
16 #include <asm/hpet.h>
17
18 DEFINE_RAW_SPINLOCK(i8253_lock);
19 EXPORT_SYMBOL(i8253_lock);
20
21 #ifdef CONFIG_X86_32
22 static void pit_disable_clocksource(void);
23 #else
24 static inline void pit_disable_clocksource(void) { }
25 #endif
26
27 /*
28 * HPET replaces the PIT, when enabled. So we need to know, which of
29 * the two timers is used
30 */
31 struct clock_event_device *global_clock_event;
32
33 /*
34 * Initialize the PIT timer.
35 *
36 * This is also called after resume to bring the PIT into operation again.
37 */
38 static void init_pit_timer(enum clock_event_mode mode,
39 struct clock_event_device *evt)
40 {
41 spin_lock(&i8253_lock);
42
43 switch(mode) {
44 case CLOCK_EVT_MODE_PERIODIC:
45 /* binary, mode 2, LSB/MSB, ch 0 */
46 outb_pit(0x34, PIT_MODE);
47 outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */
48 outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */
49 break;
50
51 case CLOCK_EVT_MODE_SHUTDOWN:
52 case CLOCK_EVT_MODE_UNUSED:
53 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
54 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
55 outb_pit(0x30, PIT_MODE);
56 outb_pit(0, PIT_CH0);
57 outb_pit(0, PIT_CH0);
58 }
59 pit_disable_clocksource();
60 break;
61
62 case CLOCK_EVT_MODE_ONESHOT:
63 /* One shot setup */
64 pit_disable_clocksource();
65 outb_pit(0x38, PIT_MODE);
66 break;
67
68 case CLOCK_EVT_MODE_RESUME:
69 /* Nothing to do here */
70 break;
71 }
72 spin_unlock(&i8253_lock);
73 }
74
75 /*
76 * Program the next event in oneshot mode
77 *
78 * Delta is given in PIT ticks
79 */
80 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
81 {
82 spin_lock(&i8253_lock);
83 outb_pit(delta & 0xff , PIT_CH0); /* LSB */
84 outb_pit(delta >> 8 , PIT_CH0); /* MSB */
85 spin_unlock(&i8253_lock);
86
87 return 0;
88 }
89
90 /*
91 * On UP the PIT can serve all of the possible timer functions. On SMP systems
92 * it can be solely used for the global tick.
93 *
94 * The profiling and update capabilities are switched off once the local apic is
95 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
96 * !using_apic_timer decisions in do_timer_interrupt_hook()
97 */
98 static struct clock_event_device pit_clockevent = {
99 .name = "pit",
100 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
101 .set_mode = init_pit_timer,
102 .set_next_event = pit_next_event,
103 .shift = 32,
104 .irq = 0,
105 };
106
107 /*
108 * Initialize the conversion factor and the min/max deltas of the clock event
109 * structure and register the clock event source with the framework.
110 */
111 void __init setup_pit_timer(void)
112 {
113 /*
114 * Start pit with the boot cpu mask and make it global after the
115 * IO_APIC has been initialized.
116 */
117 pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
118 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32);
119 pit_clockevent.max_delta_ns =
120 clockevent_delta2ns(0x7FFF, &pit_clockevent);
121 pit_clockevent.min_delta_ns =
122 clockevent_delta2ns(0xF, &pit_clockevent);
123 clockevents_register_device(&pit_clockevent);
124 global_clock_event = &pit_clockevent;
125 }
126
127 #ifndef CONFIG_X86_64
128 /*
129 * Since the PIT overflows every tick, its not very useful
130 * to just read by itself. So use jiffies to emulate a free
131 * running counter:
132 */
133 static cycle_t pit_read(void)
134 {
135 unsigned long flags;
136 int count;
137 u32 jifs;
138 static int old_count;
139 static u32 old_jifs;
140
141 spin_lock_irqsave(&i8253_lock, flags);
142 /*
143 * Although our caller may have the read side of xtime_lock,
144 * this is now a seqlock, and we are cheating in this routine
145 * by having side effects on state that we cannot undo if
146 * there is a collision on the seqlock and our caller has to
147 * retry. (Namely, old_jifs and old_count.) So we must treat
148 * jiffies as volatile despite the lock. We read jiffies
149 * before latching the timer count to guarantee that although
150 * the jiffies value might be older than the count (that is,
151 * the counter may underflow between the last point where
152 * jiffies was incremented and the point where we latch the
153 * count), it cannot be newer.
154 */
155 jifs = jiffies;
156 outb_pit(0x00, PIT_MODE); /* latch the count ASAP */
157 count = inb_pit(PIT_CH0); /* read the latched count */
158 count |= inb_pit(PIT_CH0) << 8;
159
160 /* VIA686a test code... reset the latch if count > max + 1 */
161 if (count > LATCH) {
162 outb_pit(0x34, PIT_MODE);
163 outb_pit(LATCH & 0xff, PIT_CH0);
164 outb_pit(LATCH >> 8, PIT_CH0);
165 count = LATCH - 1;
166 }
167
168 /*
169 * It's possible for count to appear to go the wrong way for a
170 * couple of reasons:
171 *
172 * 1. The timer counter underflows, but we haven't handled the
173 * resulting interrupt and incremented jiffies yet.
174 * 2. Hardware problem with the timer, not giving us continuous time,
175 * the counter does small "jumps" upwards on some Pentium systems,
176 * (see c't 95/10 page 335 for Neptun bug.)
177 *
178 * Previous attempts to handle these cases intelligently were
179 * buggy, so we just do the simple thing now.
180 */
181 if (count > old_count && jifs == old_jifs) {
182 count = old_count;
183 }
184 old_count = count;
185 old_jifs = jifs;
186
187 spin_unlock_irqrestore(&i8253_lock, flags);
188
189 count = (LATCH - 1) - count;
190
191 return (cycle_t)(jifs * LATCH) + count;
192 }
193
194 static struct clocksource clocksource_pit = {
195 .name = "pit",
196 .rating = 110,
197 .read = pit_read,
198 .mask = CLOCKSOURCE_MASK(32),
199 .mult = 0,
200 .shift = 20,
201 };
202
203 static void pit_disable_clocksource(void)
204 {
205 /*
206 * Use mult to check whether it is registered or not
207 */
208 if (clocksource_pit.mult) {
209 clocksource_unregister(&clocksource_pit);
210 clocksource_pit.mult = 0;
211 }
212 }
213
214 static int __init init_pit_clocksource(void)
215 {
216 /*
217 * Several reasons not to register PIT as a clocksource:
218 *
219 * - On SMP PIT does not scale due to i8253_lock
220 * - when HPET is enabled
221 * - when local APIC timer is active (PIT is switched off)
222 */
223 if (num_possible_cpus() > 1 || is_hpet_enabled() ||
224 pit_clockevent.mode != CLOCK_EVT_MODE_PERIODIC)
225 return 0;
226
227 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
228 return clocksource_register(&clocksource_pit);
229 }
230 arch_initcall(init_pit_clocksource);
231
232 #endif
233
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