1
2 /*
3 * (c) 2003-2006 Advanced Micro Devices, Inc.
4 * Your use of this code is subject to the terms and conditions of the
5 * GNU general public license version 2. See "COPYING" or
6 * http://www.gnu.org/licenses/gpl.html
7 *
8 * Support : mark.langsdorf@amd.com
9 *
10 * Based on the powernow-k7.c module written by Dave Jones.
11 * (C) 2003 Dave Jones on behalf of SuSE Labs
12 * (C) 2004 Dominik Brodowski <linux@brodo.de>
13 * (C) 2004 Pavel Machek <pavel@suse.cz>
14 * Licensed under the terms of the GNU GPL License version 2.
15 * Based upon datasheets & sample CPUs kindly provided by AMD.
16 *
17 * Valuable input gratefully received from Dave Jones, Pavel Machek,
18 * Dominik Brodowski, Jacob Shin, and others.
19 * Originally developed by Paul Devriendt.
20 * Processor information obtained from Chapter 9 (Power and Thermal Management)
21 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
22 * Opteron Processors" available for download from www.amd.com
23 *
24 * Tables for specific CPUs can be inferred from
25 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
26 */
27
28 #include <linux/kernel.h>
29 #include <linux/smp.h>
30 #include <linux/module.h>
31 #include <linux/init.h>
32 #include <linux/cpufreq.h>
33 #include <linux/slab.h>
34 #include <linux/string.h>
35 #include <linux/cpumask.h>
36 #include <linux/sched.h> /* for current / set_cpus_allowed() */
37 #include <linux/io.h>
38 #include <linux/delay.h>
39
40 #include <asm/msr.h>
41
42 #include <linux/acpi.h>
43 #include <linux/mutex.h>
44 #include <acpi/processor.h>
45
46 #define PFX "powernow-k8: "
47 #define VERSION "version 2.20.00"
48 #include "powernow-k8.h"
49
50 /* serialize freq changes */
51 static DEFINE_MUTEX(fidvid_mutex);
52
53 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
54
55 static int cpu_family = CPU_OPTERON;
56
57 #ifndef CONFIG_SMP
58 static inline const struct cpumask *cpu_core_mask(int cpu)
59 {
60 return cpumask_of(0);
61 }
62 #endif
63
64 /* Return a frequency in MHz, given an input fid */
65 static u32 find_freq_from_fid(u32 fid)
66 {
67 return 800 + (fid * 100);
68 }
69
70 /* Return a frequency in KHz, given an input fid */
71 static u32 find_khz_freq_from_fid(u32 fid)
72 {
73 return 1000 * find_freq_from_fid(fid);
74 }
75
76 static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
77 u32 pstate)
78 {
79 return data[pstate].frequency;
80 }
81
82 /* Return the vco fid for an input fid
83 *
84 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
85 * only from corresponding high fids. This returns "high" fid corresponding to
86 * "low" one.
87 */
88 static u32 convert_fid_to_vco_fid(u32 fid)
89 {
90 if (fid < HI_FID_TABLE_BOTTOM)
91 return 8 + (2 * fid);
92 else
93 return fid;
94 }
95
96 /*
97 * Return 1 if the pending bit is set. Unless we just instructed the processor
98 * to transition to a new state, seeing this bit set is really bad news.
99 */
100 static int pending_bit_stuck(void)
101 {
102 u32 lo, hi;
103
104 if (cpu_family == CPU_HW_PSTATE)
105 return 0;
106
107 rdmsr(MSR_FIDVID_STATUS, lo, hi);
108 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
109 }
110
111 /*
112 * Update the global current fid / vid values from the status msr.
113 * Returns 1 on error.
114 */
115 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
116 {
117 u32 lo, hi;
118 u32 i = 0;
119
120 if (cpu_family == CPU_HW_PSTATE) {
121 rdmsr(MSR_PSTATE_STATUS, lo, hi);
122 i = lo & HW_PSTATE_MASK;
123 data->currpstate = i;
124
125 /*
126 * a workaround for family 11h erratum 311 might cause
127 * an "out-of-range Pstate if the core is in Pstate-0
128 */
129 if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
130 data->currpstate = HW_PSTATE_0;
131
132 return 0;
133 }
134 do {
135 if (i++ > 10000) {
136 dprintk("detected change pending stuck\n");
137 return 1;
138 }
139 rdmsr(MSR_FIDVID_STATUS, lo, hi);
140 } while (lo & MSR_S_LO_CHANGE_PENDING);
141
142 data->currvid = hi & MSR_S_HI_CURRENT_VID;
143 data->currfid = lo & MSR_S_LO_CURRENT_FID;
144
145 return 0;
146 }
147
148 /* the isochronous relief time */
149 static void count_off_irt(struct powernow_k8_data *data)
150 {
151 udelay((1 << data->irt) * 10);
152 return;
153 }
154
155 /* the voltage stabilization time */
156 static void count_off_vst(struct powernow_k8_data *data)
157 {
158 udelay(data->vstable * VST_UNITS_20US);
159 return;
160 }
161
162 /* need to init the control msr to a safe value (for each cpu) */
163 static void fidvid_msr_init(void)
164 {
165 u32 lo, hi;
166 u8 fid, vid;
167
168 rdmsr(MSR_FIDVID_STATUS, lo, hi);
169 vid = hi & MSR_S_HI_CURRENT_VID;
170 fid = lo & MSR_S_LO_CURRENT_FID;
171 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
172 hi = MSR_C_HI_STP_GNT_BENIGN;
173 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
174 wrmsr(MSR_FIDVID_CTL, lo, hi);
175 }
176
177 /* write the new fid value along with the other control fields to the msr */
178 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
179 {
180 u32 lo;
181 u32 savevid = data->currvid;
182 u32 i = 0;
183
184 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
185 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
186 return 1;
187 }
188
189 lo = fid;
190 lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
191 lo |= MSR_C_LO_INIT_FID_VID;
192
193 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
194 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
195
196 do {
197 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
198 if (i++ > 100) {
199 printk(KERN_ERR PFX
200 "Hardware error - pending bit very stuck - "
201 "no further pstate changes possible\n");
202 return 1;
203 }
204 } while (query_current_values_with_pending_wait(data));
205
206 count_off_irt(data);
207
208 if (savevid != data->currvid) {
209 printk(KERN_ERR PFX
210 "vid change on fid trans, old 0x%x, new 0x%x\n",
211 savevid, data->currvid);
212 return 1;
213 }
214
215 if (fid != data->currfid) {
216 printk(KERN_ERR PFX
217 "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
218 data->currfid);
219 return 1;
220 }
221
222 return 0;
223 }
224
225 /* Write a new vid to the hardware */
226 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
227 {
228 u32 lo;
229 u32 savefid = data->currfid;
230 int i = 0;
231
232 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
233 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
234 return 1;
235 }
236
237 lo = data->currfid;
238 lo |= (vid << MSR_C_LO_VID_SHIFT);
239 lo |= MSR_C_LO_INIT_FID_VID;
240
241 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
242 vid, lo, STOP_GRANT_5NS);
243
244 do {
245 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
246 if (i++ > 100) {
247 printk(KERN_ERR PFX "internal error - pending bit "
248 "very stuck - no further pstate "
249 "changes possible\n");
250 return 1;
251 }
252 } while (query_current_values_with_pending_wait(data));
253
254 if (savefid != data->currfid) {
255 printk(KERN_ERR PFX "fid changed on vid trans, old "
256 "0x%x new 0x%x\n",
257 savefid, data->currfid);
258 return 1;
259 }
260
261 if (vid != data->currvid) {
262 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
263 "curr 0x%x\n",
264 vid, data->currvid);
265 return 1;
266 }
267
268 return 0;
269 }
270
271 /*
272 * Reduce the vid by the max of step or reqvid.
273 * Decreasing vid codes represent increasing voltages:
274 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
275 */
276 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
277 u32 reqvid, u32 step)
278 {
279 if ((data->currvid - reqvid) > step)
280 reqvid = data->currvid - step;
281
282 if (write_new_vid(data, reqvid))
283 return 1;
284
285 count_off_vst(data);
286
287 return 0;
288 }
289
290 /* Change hardware pstate by single MSR write */
291 static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
292 {
293 wrmsr(MSR_PSTATE_CTRL, pstate, 0);
294 data->currpstate = pstate;
295 return 0;
296 }
297
298 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
299 static int transition_fid_vid(struct powernow_k8_data *data,
300 u32 reqfid, u32 reqvid)
301 {
302 if (core_voltage_pre_transition(data, reqvid, reqfid))
303 return 1;
304
305 if (core_frequency_transition(data, reqfid))
306 return 1;
307
308 if (core_voltage_post_transition(data, reqvid))
309 return 1;
310
311 if (query_current_values_with_pending_wait(data))
312 return 1;
313
314 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
315 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
316 "curr 0x%x 0x%x\n",
317 smp_processor_id(),
318 reqfid, reqvid, data->currfid, data->currvid);
319 return 1;
320 }
321
322 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
323 smp_processor_id(), data->currfid, data->currvid);
324
325 return 0;
326 }
327
328 /* Phase 1 - core voltage transition ... setup voltage */
329 static int core_voltage_pre_transition(struct powernow_k8_data *data,
330 u32 reqvid, u32 reqfid)
331 {
332 u32 rvosteps = data->rvo;
333 u32 savefid = data->currfid;
334 u32 maxvid, lo, rvomult = 1;
335
336 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
337 "reqvid 0x%x, rvo 0x%x\n",
338 smp_processor_id(),
339 data->currfid, data->currvid, reqvid, data->rvo);
340
341 if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
342 rvomult = 2;
343 rvosteps *= rvomult;
344 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
345 maxvid = 0x1f & (maxvid >> 16);
346 dprintk("ph1 maxvid=0x%x\n", maxvid);
347 if (reqvid < maxvid) /* lower numbers are higher voltages */
348 reqvid = maxvid;
349
350 while (data->currvid > reqvid) {
351 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
352 data->currvid, reqvid);
353 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
354 return 1;
355 }
356
357 while ((rvosteps > 0) &&
358 ((rvomult * data->rvo + data->currvid) > reqvid)) {
359 if (data->currvid == maxvid) {
360 rvosteps = 0;
361 } else {
362 dprintk("ph1: changing vid for rvo, req 0x%x\n",
363 data->currvid - 1);
364 if (decrease_vid_code_by_step(data, data->currvid-1, 1))
365 return 1;
366 rvosteps--;
367 }
368 }
369
370 if (query_current_values_with_pending_wait(data))
371 return 1;
372
373 if (savefid != data->currfid) {
374 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
375 data->currfid);
376 return 1;
377 }
378
379 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
380 data->currfid, data->currvid);
381
382 return 0;
383 }
384
385 /* Phase 2 - core frequency transition */
386 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
387 {
388 u32 vcoreqfid, vcocurrfid, vcofiddiff;
389 u32 fid_interval, savevid = data->currvid;
390
391 if (data->currfid == reqfid) {
392 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
393 data->currfid);
394 return 0;
395 }
396
397 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
398 "reqfid 0x%x\n",
399 smp_processor_id(),
400 data->currfid, data->currvid, reqfid);
401
402 vcoreqfid = convert_fid_to_vco_fid(reqfid);
403 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
404 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
405 : vcoreqfid - vcocurrfid;
406
407 if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
408 vcofiddiff = 0;
409
410 while (vcofiddiff > 2) {
411 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
412
413 if (reqfid > data->currfid) {
414 if (data->currfid > LO_FID_TABLE_TOP) {
415 if (write_new_fid(data,
416 data->currfid + fid_interval))
417 return 1;
418 } else {
419 if (write_new_fid
420 (data,
421 2 + convert_fid_to_vco_fid(data->currfid)))
422 return 1;
423 }
424 } else {
425 if (write_new_fid(data, data->currfid - fid_interval))
426 return 1;
427 }
428
429 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
430 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
431 : vcoreqfid - vcocurrfid;
432 }
433
434 if (write_new_fid(data, reqfid))
435 return 1;
436
437 if (query_current_values_with_pending_wait(data))
438 return 1;
439
440 if (data->currfid != reqfid) {
441 printk(KERN_ERR PFX
442 "ph2: mismatch, failed fid transition, "
443 "curr 0x%x, req 0x%x\n",
444 data->currfid, reqfid);
445 return 1;
446 }
447
448 if (savevid != data->currvid) {
449 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
450 savevid, data->currvid);
451 return 1;
452 }
453
454 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
455 data->currfid, data->currvid);
456
457 return 0;
458 }
459
460 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
461 static int core_voltage_post_transition(struct powernow_k8_data *data,
462 u32 reqvid)
463 {
464 u32 savefid = data->currfid;
465 u32 savereqvid = reqvid;
466
467 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
468 smp_processor_id(),
469 data->currfid, data->currvid);
470
471 if (reqvid != data->currvid) {
472 if (write_new_vid(data, reqvid))
473 return 1;
474
475 if (savefid != data->currfid) {
476 printk(KERN_ERR PFX
477 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
478 savefid, data->currfid);
479 return 1;
480 }
481
482 if (data->currvid != reqvid) {
483 printk(KERN_ERR PFX
484 "ph3: failed vid transition\n, "
485 "req 0x%x, curr 0x%x",
486 reqvid, data->currvid);
487 return 1;
488 }
489 }
490
491 if (query_current_values_with_pending_wait(data))
492 return 1;
493
494 if (savereqvid != data->currvid) {
495 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
496 return 1;
497 }
498
499 if (savefid != data->currfid) {
500 dprintk("ph3 failed, currfid changed 0x%x\n",
501 data->currfid);
502 return 1;
503 }
504
505 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
506 data->currfid, data->currvid);
507
508 return 0;
509 }
510
511 static void check_supported_cpu(void *_rc)
512 {
513 u32 eax, ebx, ecx, edx;
514 int *rc = _rc;
515
516 *rc = -ENODEV;
517
518 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
519 return;
520
521 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
522 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
523 ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
524 return;
525
526 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
527 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
528 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
529 printk(KERN_INFO PFX
530 "Processor cpuid %x not supported\n", eax);
531 return;
532 }
533
534 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
535 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
536 printk(KERN_INFO PFX
537 "No frequency change capabilities detected\n");
538 return;
539 }
540
541 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
542 if ((edx & P_STATE_TRANSITION_CAPABLE)
543 != P_STATE_TRANSITION_CAPABLE) {
544 printk(KERN_INFO PFX
545 "Power state transitions not supported\n");
546 return;
547 }
548 } else { /* must be a HW Pstate capable processor */
549 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
550 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
551 cpu_family = CPU_HW_PSTATE;
552 else
553 return;
554 }
555
556 *rc = 0;
557 }
558
559 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
560 u8 maxvid)
561 {
562 unsigned int j;
563 u8 lastfid = 0xff;
564
565 for (j = 0; j < data->numps; j++) {
566 if (pst[j].vid > LEAST_VID) {
567 printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
568 j, pst[j].vid);
569 return -EINVAL;
570 }
571 if (pst[j].vid < data->rvo) {
572 /* vid + rvo >= 0 */
573 printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
574 " %d\n", j);
575 return -ENODEV;
576 }
577 if (pst[j].vid < maxvid + data->rvo) {
578 /* vid + rvo >= maxvid */
579 printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
580 " %d\n", j);
581 return -ENODEV;
582 }
583 if (pst[j].fid > MAX_FID) {
584 printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
585 " %d\n", j);
586 return -ENODEV;
587 }
588 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
589 /* Only first fid is allowed to be in "low" range */
590 printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
591 "0x%x\n", j, pst[j].fid);
592 return -EINVAL;
593 }
594 if (pst[j].fid < lastfid)
595 lastfid = pst[j].fid;
596 }
597 if (lastfid & 1) {
598 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
599 return -EINVAL;
600 }
601 if (lastfid > LO_FID_TABLE_TOP)
602 printk(KERN_INFO FW_BUG PFX
603 "first fid not from lo freq table\n");
604
605 return 0;
606 }
607
608 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
609 unsigned int entry)
610 {
611 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
612 }
613
614 static void print_basics(struct powernow_k8_data *data)
615 {
616 int j;
617 for (j = 0; j < data->numps; j++) {
618 if (data->powernow_table[j].frequency !=
619 CPUFREQ_ENTRY_INVALID) {
620 if (cpu_family == CPU_HW_PSTATE) {
621 printk(KERN_INFO PFX
622 " %d : pstate %d (%d MHz)\n", j,
623 data->powernow_table[j].index,
624 data->powernow_table[j].frequency/1000);
625 } else {
626 printk(KERN_INFO PFX
627 " %d : fid 0x%x (%d MHz), vid 0x%x\n",
628 j,
629 data->powernow_table[j].index & 0xff,
630 data->powernow_table[j].frequency/1000,
631 data->powernow_table[j].index >> 8);
632 }
633 }
634 }
635 if (data->batps)
636 printk(KERN_INFO PFX "Only %d pstates on battery\n",
637 data->batps);
638 }
639
640 static u32 freq_from_fid_did(u32 fid, u32 did)
641 {
642 u32 mhz = 0;
643
644 if (boot_cpu_data.x86 == 0x10)
645 mhz = (100 * (fid + 0x10)) >> did;
646 else if (boot_cpu_data.x86 == 0x11)
647 mhz = (100 * (fid + 8)) >> did;
648 else
649 BUG();
650
651 return mhz * 1000;
652 }
653
654 static int fill_powernow_table(struct powernow_k8_data *data,
655 struct pst_s *pst, u8 maxvid)
656 {
657 struct cpufreq_frequency_table *powernow_table;
658 unsigned int j;
659
660 if (data->batps) {
661 /* use ACPI support to get full speed on mains power */
662 printk(KERN_WARNING PFX
663 "Only %d pstates usable (use ACPI driver for full "
664 "range\n", data->batps);
665 data->numps = data->batps;
666 }
667
668 for (j = 1; j < data->numps; j++) {
669 if (pst[j-1].fid >= pst[j].fid) {
670 printk(KERN_ERR PFX "PST out of sequence\n");
671 return -EINVAL;
672 }
673 }
674
675 if (data->numps < 2) {
676 printk(KERN_ERR PFX "no p states to transition\n");
677 return -ENODEV;
678 }
679
680 if (check_pst_table(data, pst, maxvid))
681 return -EINVAL;
682
683 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
684 * (data->numps + 1)), GFP_KERNEL);
685 if (!powernow_table) {
686 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
687 return -ENOMEM;
688 }
689
690 for (j = 0; j < data->numps; j++) {
691 int freq;
692 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
693 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
694 freq = find_khz_freq_from_fid(pst[j].fid);
695 powernow_table[j].frequency = freq;
696 }
697 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
698 powernow_table[data->numps].index = 0;
699
700 if (query_current_values_with_pending_wait(data)) {
701 kfree(powernow_table);
702 return -EIO;
703 }
704
705 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
706 data->powernow_table = powernow_table;
707 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
708 print_basics(data);
709
710 for (j = 0; j < data->numps; j++)
711 if ((pst[j].fid == data->currfid) &&
712 (pst[j].vid == data->currvid))
713 return 0;
714
715 dprintk("currfid/vid do not match PST, ignoring\n");
716 return 0;
717 }
718
719 /* Find and validate the PSB/PST table in BIOS. */
720 static int find_psb_table(struct powernow_k8_data *data)
721 {
722 struct psb_s *psb;
723 unsigned int i;
724 u32 mvs;
725 u8 maxvid;
726 u32 cpst = 0;
727 u32 thiscpuid;
728
729 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
730 /* Scan BIOS looking for the signature. */
731 /* It can not be at ffff0 - it is too big. */
732
733 psb = phys_to_virt(i);
734 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
735 continue;
736
737 dprintk("found PSB header at 0x%p\n", psb);
738
739 dprintk("table vers: 0x%x\n", psb->tableversion);
740 if (psb->tableversion != PSB_VERSION_1_4) {
741 printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
742 return -ENODEV;
743 }
744
745 dprintk("flags: 0x%x\n", psb->flags1);
746 if (psb->flags1) {
747 printk(KERN_ERR FW_BUG PFX "unknown flags\n");
748 return -ENODEV;
749 }
750
751 data->vstable = psb->vstable;
752 dprintk("voltage stabilization time: %d(*20us)\n",
753 data->vstable);
754
755 dprintk("flags2: 0x%x\n", psb->flags2);
756 data->rvo = psb->flags2 & 3;
757 data->irt = ((psb->flags2) >> 2) & 3;
758 mvs = ((psb->flags2) >> 4) & 3;
759 data->vidmvs = 1 << mvs;
760 data->batps = ((psb->flags2) >> 6) & 3;
761
762 dprintk("ramp voltage offset: %d\n", data->rvo);
763 dprintk("isochronous relief time: %d\n", data->irt);
764 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
765
766 dprintk("numpst: 0x%x\n", psb->num_tables);
767 cpst = psb->num_tables;
768 if ((psb->cpuid == 0x00000fc0) ||
769 (psb->cpuid == 0x00000fe0)) {
770 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
771 if ((thiscpuid == 0x00000fc0) ||
772 (thiscpuid == 0x00000fe0))
773 cpst = 1;
774 }
775 if (cpst != 1) {
776 printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
777 return -ENODEV;
778 }
779
780 data->plllock = psb->plllocktime;
781 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
782 dprintk("maxfid: 0x%x\n", psb->maxfid);
783 dprintk("maxvid: 0x%x\n", psb->maxvid);
784 maxvid = psb->maxvid;
785
786 data->numps = psb->numps;
787 dprintk("numpstates: 0x%x\n", data->numps);
788 return fill_powernow_table(data,
789 (struct pst_s *)(psb+1), maxvid);
790 }
791 /*
792 * If you see this message, complain to BIOS manufacturer. If
793 * he tells you "we do not support Linux" or some similar
794 * nonsense, remember that Windows 2000 uses the same legacy
795 * mechanism that the old Linux PSB driver uses. Tell them it
796 * is broken with Windows 2000.
797 *
798 * The reference to the AMD documentation is chapter 9 in the
799 * BIOS and Kernel Developer's Guide, which is available on
800 * www.amd.com
801 */
802 printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
803 return -ENODEV;
804 }
805
806 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
807 unsigned int index)
808 {
809 acpi_integer control;
810
811 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
812 return;
813
814 control = data->acpi_data.states[index].control;
815 data->irt = (control >> IRT_SHIFT) & IRT_MASK;
816 data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
817 data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
818 data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
819 data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
820 data->vstable = (control >> VST_SHIFT) & VST_MASK;
821 }
822
823 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
824 {
825 struct cpufreq_frequency_table *powernow_table;
826 int ret_val = -ENODEV;
827 acpi_integer control, status;
828
829 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
830 dprintk("register performance failed: bad ACPI data\n");
831 return -EIO;
832 }
833
834 /* verify the data contained in the ACPI structures */
835 if (data->acpi_data.state_count <= 1) {
836 dprintk("No ACPI P-States\n");
837 goto err_out;
838 }
839
840 control = data->acpi_data.control_register.space_id;
841 status = data->acpi_data.status_register.space_id;
842
843 if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
844 (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
845 dprintk("Invalid control/status registers (%x - %x)\n",
846 control, status);
847 goto err_out;
848 }
849
850 /* fill in data->powernow_table */
851 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
852 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
853 if (!powernow_table) {
854 dprintk("powernow_table memory alloc failure\n");
855 goto err_out;
856 }
857
858 if (cpu_family == CPU_HW_PSTATE)
859 ret_val = fill_powernow_table_pstate(data, powernow_table);
860 else
861 ret_val = fill_powernow_table_fidvid(data, powernow_table);
862 if (ret_val)
863 goto err_out_mem;
864
865 powernow_table[data->acpi_data.state_count].frequency =
866 CPUFREQ_TABLE_END;
867 powernow_table[data->acpi_data.state_count].index = 0;
868 data->powernow_table = powernow_table;
869
870 /* fill in data */
871 data->numps = data->acpi_data.state_count;
872 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
873 print_basics(data);
874 powernow_k8_acpi_pst_values(data, 0);
875
876 /* notify BIOS that we exist */
877 acpi_processor_notify_smm(THIS_MODULE);
878
879 if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
880 printk(KERN_ERR PFX
881 "unable to alloc powernow_k8_data cpumask\n");
882 ret_val = -ENOMEM;
883 goto err_out_mem;
884 }
885
886 return 0;
887
888 err_out_mem:
889 kfree(powernow_table);
890
891 err_out:
892 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
893
894 /* data->acpi_data.state_count informs us at ->exit()
895 * whether ACPI was used */
896 data->acpi_data.state_count = 0;
897
898 return ret_val;
899 }
900
901 static int fill_powernow_table_pstate(struct powernow_k8_data *data,
902 struct cpufreq_frequency_table *powernow_table)
903 {
904 int i;
905 u32 hi = 0, lo = 0;
906 rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
907 data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
908
909 for (i = 0; i < data->acpi_data.state_count; i++) {
910 u32 index;
911
912 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
913 if (index > data->max_hw_pstate) {
914 printk(KERN_ERR PFX "invalid pstate %d - "
915 "bad value %d.\n", i, index);
916 printk(KERN_ERR PFX "Please report to BIOS "
917 "manufacturer\n");
918 invalidate_entry(powernow_table, i);
919 continue;
920 }
921 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
922 if (!(hi & HW_PSTATE_VALID_MASK)) {
923 dprintk("invalid pstate %d, ignoring\n", index);
924 invalidate_entry(powernow_table, i);
925 continue;
926 }
927
928 powernow_table[i].index = index;
929
930 /* Frequency may be rounded for these */
931 if (boot_cpu_data.x86 == 0x10 || boot_cpu_data.x86 == 0x11) {
932 powernow_table[i].frequency =
933 freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
934 } else
935 powernow_table[i].frequency =
936 data->acpi_data.states[i].core_frequency * 1000;
937 }
938 return 0;
939 }
940
941 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
942 struct cpufreq_frequency_table *powernow_table)
943 {
944 int i;
945 int cntlofreq = 0;
946
947 for (i = 0; i < data->acpi_data.state_count; i++) {
948 u32 fid;
949 u32 vid;
950 u32 freq, index;
951 acpi_integer status, control;
952
953 if (data->exttype) {
954 status = data->acpi_data.states[i].status;
955 fid = status & EXT_FID_MASK;
956 vid = (status >> VID_SHIFT) & EXT_VID_MASK;
957 } else {
958 control = data->acpi_data.states[i].control;
959 fid = control & FID_MASK;
960 vid = (control >> VID_SHIFT) & VID_MASK;
961 }
962
963 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
964
965 index = fid | (vid<<8);
966 powernow_table[i].index = index;
967
968 freq = find_khz_freq_from_fid(fid);
969 powernow_table[i].frequency = freq;
970
971 /* verify frequency is OK */
972 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
973 dprintk("invalid freq %u kHz, ignoring\n", freq);
974 invalidate_entry(powernow_table, i);
975 continue;
976 }
977
978 /* verify voltage is OK -
979 * BIOSs are using "off" to indicate invalid */
980 if (vid == VID_OFF) {
981 dprintk("invalid vid %u, ignoring\n", vid);
982 invalidate_entry(powernow_table, i);
983 continue;
984 }
985
986 /* verify only 1 entry from the lo frequency table */
987 if (fid < HI_FID_TABLE_BOTTOM) {
988 if (cntlofreq) {
989 /* if both entries are the same,
990 * ignore this one ... */
991 if ((freq != powernow_table[cntlofreq].frequency) ||
992 (index != powernow_table[cntlofreq].index)) {
993 printk(KERN_ERR PFX
994 "Too many lo freq table "
995 "entries\n");
996 return 1;
997 }
998
999 dprintk("double low frequency table entry, "
1000 "ignoring it.\n");
1001 invalidate_entry(powernow_table, i);
1002 continue;
1003 } else
1004 cntlofreq = i;
1005 }
1006
1007 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
1008 printk(KERN_INFO PFX "invalid freq entries "
1009 "%u kHz vs. %u kHz\n", freq,
1010 (unsigned int)
1011 (data->acpi_data.states[i].core_frequency
1012 * 1000));
1013 invalidate_entry(powernow_table, i);
1014 continue;
1015 }
1016 }
1017 return 0;
1018 }
1019
1020 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
1021 {
1022 if (data->acpi_data.state_count)
1023 acpi_processor_unregister_performance(&data->acpi_data,
1024 data->cpu);
1025 free_cpumask_var(data->acpi_data.shared_cpu_map);
1026 }
1027
1028 static int get_transition_latency(struct powernow_k8_data *data)
1029 {
1030 int max_latency = 0;
1031 int i;
1032 for (i = 0; i < data->acpi_data.state_count; i++) {
1033 int cur_latency = data->acpi_data.states[i].transition_latency
1034 + data->acpi_data.states[i].bus_master_latency;
1035 if (cur_latency > max_latency)
1036 max_latency = cur_latency;
1037 }
1038 if (max_latency == 0) {
1039 /*
1040 * Fam 11h always returns 0 as transition latency.
1041 * This is intended and means "very fast". While cpufreq core
1042 * and governors currently can handle that gracefully, better
1043 * set it to 1 to avoid problems in the future.
1044 * For all others it's a BIOS bug.
1045 */
1046 if (!boot_cpu_data.x86 == 0x11)
1047 printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
1048 "latency\n");
1049 max_latency = 1;
1050 }
1051 /* value in usecs, needs to be in nanoseconds */
1052 return 1000 * max_latency;
1053 }
1054
1055 /* Take a frequency, and issue the fid/vid transition command */
1056 static int transition_frequency_fidvid(struct powernow_k8_data *data,
1057 unsigned int index)
1058 {
1059 u32 fid = 0;
1060 u32 vid = 0;
1061 int res, i;
1062 struct cpufreq_freqs freqs;
1063
1064 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
1065
1066 /* fid/vid correctness check for k8 */
1067 /* fid are the lower 8 bits of the index we stored into
1068 * the cpufreq frequency table in find_psb_table, vid
1069 * are the upper 8 bits.
1070 */
1071 fid = data->powernow_table[index].index & 0xFF;
1072 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
1073
1074 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
1075
1076 if (query_current_values_with_pending_wait(data))
1077 return 1;
1078
1079 if ((data->currvid == vid) && (data->currfid == fid)) {
1080 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
1081 fid, vid);
1082 return 0;
1083 }
1084
1085 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
1086 smp_processor_id(), fid, vid);
1087 freqs.old = find_khz_freq_from_fid(data->currfid);
1088 freqs.new = find_khz_freq_from_fid(fid);
1089
1090 for_each_cpu(i, data->available_cores) {
1091 freqs.cpu = i;
1092 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1093 }
1094
1095 res = transition_fid_vid(data, fid, vid);
1096 freqs.new = find_khz_freq_from_fid(data->currfid);
1097
1098 for_each_cpu(i, data->available_cores) {
1099 freqs.cpu = i;
1100 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1101 }
1102 return res;
1103 }
1104
1105 /* Take a frequency, and issue the hardware pstate transition command */
1106 static int transition_frequency_pstate(struct powernow_k8_data *data,
1107 unsigned int index)
1108 {
1109 u32 pstate = 0;
1110 int res, i;
1111 struct cpufreq_freqs freqs;
1112
1113 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
1114
1115 /* get MSR index for hardware pstate transition */
1116 pstate = index & HW_PSTATE_MASK;
1117 if (pstate > data->max_hw_pstate)
1118 return 0;
1119 freqs.old = find_khz_freq_from_pstate(data->powernow_table,
1120 data->currpstate);
1121 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1122
1123 for_each_cpu(i, data->available_cores) {
1124 freqs.cpu = i;
1125 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1126 }
1127
1128 res = transition_pstate(data, pstate);
1129 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1130
1131 for_each_cpu(i, data->available_cores) {
1132 freqs.cpu = i;
1133 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1134 }
1135 return res;
1136 }
1137
1138 /* Driver entry point to switch to the target frequency */
1139 static int powernowk8_target(struct cpufreq_policy *pol,
1140 unsigned targfreq, unsigned relation)
1141 {
1142 cpumask_t oldmask;
1143 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1144 u32 checkfid;
1145 u32 checkvid;
1146 unsigned int newstate;
1147 int ret = -EIO;
1148
1149 if (!data)
1150 return -EINVAL;
1151
1152 checkfid = data->currfid;
1153 checkvid = data->currvid;
1154
1155 /* only run on specific CPU from here on */
1156 oldmask = current->cpus_allowed;
1157 set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu));
1158
1159 if (smp_processor_id() != pol->cpu) {
1160 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1161 goto err_out;
1162 }
1163
1164 if (pending_bit_stuck()) {
1165 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1166 goto err_out;
1167 }
1168
1169 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1170 pol->cpu, targfreq, pol->min, pol->max, relation);
1171
1172 if (query_current_values_with_pending_wait(data))
1173 goto err_out;
1174
1175 if (cpu_family != CPU_HW_PSTATE) {
1176 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
1177 data->currfid, data->currvid);
1178
1179 if ((checkvid != data->currvid) ||
1180 (checkfid != data->currfid)) {
1181 printk(KERN_INFO PFX
1182 "error - out of sync, fix 0x%x 0x%x, "
1183 "vid 0x%x 0x%x\n",
1184 checkfid, data->currfid,
1185 checkvid, data->currvid);
1186 }
1187 }
1188
1189 if (cpufreq_frequency_table_target(pol, data->powernow_table,
1190 targfreq, relation, &newstate))
1191 goto err_out;
1192
1193 mutex_lock(&fidvid_mutex);
1194
1195 powernow_k8_acpi_pst_values(data, newstate);
1196
1197 if (cpu_family == CPU_HW_PSTATE)
1198 ret = transition_frequency_pstate(data, newstate);
1199 else
1200 ret = transition_frequency_fidvid(data, newstate);
1201 if (ret) {
1202 printk(KERN_ERR PFX "transition frequency failed\n");
1203 ret = 1;
1204 mutex_unlock(&fidvid_mutex);
1205 goto err_out;
1206 }
1207 mutex_unlock(&fidvid_mutex);
1208
1209 if (cpu_family == CPU_HW_PSTATE)
1210 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1211 newstate);
1212 else
1213 pol->cur = find_khz_freq_from_fid(data->currfid);
1214 ret = 0;
1215
1216 err_out:
1217 set_cpus_allowed_ptr(current, &oldmask);
1218 return ret;
1219 }
1220
1221 /* Driver entry point to verify the policy and range of frequencies */
1222 static int powernowk8_verify(struct cpufreq_policy *pol)
1223 {
1224 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1225
1226 if (!data)
1227 return -EINVAL;
1228
1229 return cpufreq_frequency_table_verify(pol, data->powernow_table);
1230 }
1231
1232 struct init_on_cpu {
1233 struct powernow_k8_data *data;
1234 int rc;
1235 };
1236
1237 static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1238 {
1239 struct init_on_cpu *init_on_cpu = _init_on_cpu;
1240
1241 if (pending_bit_stuck()) {
1242 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1243 init_on_cpu->rc = -ENODEV;
1244 return;
1245 }
1246
1247 if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1248 init_on_cpu->rc = -ENODEV;
1249 return;
1250 }
1251
1252 if (cpu_family == CPU_OPTERON)
1253 fidvid_msr_init();
1254
1255 init_on_cpu->rc = 0;
1256 }
1257
1258 /* per CPU init entry point to the driver */
1259 static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1260 {
1261 static const char ACPI_PSS_BIOS_BUG_MSG[] =
1262 KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
1263 FW_BUG PFX "Try again with latest BIOS.\n";
1264 struct powernow_k8_data *data;
1265 struct init_on_cpu init_on_cpu;
1266 int rc;
1267
1268 if (!cpu_online(pol->cpu))
1269 return -ENODEV;
1270
1271 smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1272 if (rc)
1273 return -ENODEV;
1274
1275 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1276 if (!data) {
1277 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1278 return -ENOMEM;
1279 }
1280
1281 data->cpu = pol->cpu;
1282 data->currpstate = HW_PSTATE_INVALID;
1283
1284 if (powernow_k8_cpu_init_acpi(data)) {
1285 /*
1286 * Use the PSB BIOS structure. This is only availabe on
1287 * an UP version, and is deprecated by AMD.
1288 */
1289 if (num_online_cpus() != 1) {
1290 printk_once(ACPI_PSS_BIOS_BUG_MSG);
1291 goto err_out;
1292 }
1293 if (pol->cpu != 0) {
1294 printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1295 "CPU other than CPU0. Complain to your BIOS "
1296 "vendor.\n");
1297 goto err_out;
1298 }
1299 rc = find_psb_table(data);
1300 if (rc)
1301 goto err_out;
1302
1303 /* Take a crude guess here.
1304 * That guess was in microseconds, so multiply with 1000 */
1305 pol->cpuinfo.transition_latency = (
1306 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1307 ((1 << data->irt) * 30)) * 1000;
1308 } else /* ACPI _PSS objects available */
1309 pol->cpuinfo.transition_latency = get_transition_latency(data);
1310
1311 /* only run on specific CPU from here on */
1312 init_on_cpu.data = data;
1313 smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1314 &init_on_cpu, 1);
1315 rc = init_on_cpu.rc;
1316 if (rc != 0)
1317 goto err_out_exit_acpi;
1318
1319 if (cpu_family == CPU_HW_PSTATE)
1320 cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
1321 else
1322 cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
1323 data->available_cores = pol->cpus;
1324
1325 if (cpu_family == CPU_HW_PSTATE)
1326 pol->cur = find_khz_freq_from_pstate(data->powernow_table,
1327 data->currpstate);
1328 else
1329 pol->cur = find_khz_freq_from_fid(data->currfid);
1330 dprintk("policy current frequency %d kHz\n", pol->cur);
1331
1332 /* min/max the cpu is capable of */
1333 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1334 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1335 powernow_k8_cpu_exit_acpi(data);
1336 kfree(data->powernow_table);
1337 kfree(data);
1338 return -EINVAL;
1339 }
1340
1341 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1342
1343 if (cpu_family == CPU_HW_PSTATE)
1344 dprintk("cpu_init done, current pstate 0x%x\n",
1345 data->currpstate);
1346 else
1347 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1348 data->currfid, data->currvid);
1349
1350 per_cpu(powernow_data, pol->cpu) = data;
1351
1352 return 0;
1353
1354 err_out_exit_acpi:
1355 powernow_k8_cpu_exit_acpi(data);
1356
1357 err_out:
1358 kfree(data);
1359 return -ENODEV;
1360 }
1361
1362 static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
1363 {
1364 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1365
1366 if (!data)
1367 return -EINVAL;
1368
1369 powernow_k8_cpu_exit_acpi(data);
1370
1371 cpufreq_frequency_table_put_attr(pol->cpu);
1372
1373 kfree(data->powernow_table);
1374 kfree(data);
1375 per_cpu(powernow_data, pol->cpu) = NULL;
1376
1377 return 0;
1378 }
1379
1380 static void query_values_on_cpu(void *_err)
1381 {
1382 int *err = _err;
1383 struct powernow_k8_data *data = __get_cpu_var(powernow_data);
1384
1385 *err = query_current_values_with_pending_wait(data);
1386 }
1387
1388 static unsigned int powernowk8_get(unsigned int cpu)
1389 {
1390 struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1391 unsigned int khz = 0;
1392 int err;
1393
1394 if (!data)
1395 return 0;
1396
1397 smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1398 if (err)
1399 goto out;
1400
1401 if (cpu_family == CPU_HW_PSTATE)
1402 khz = find_khz_freq_from_pstate(data->powernow_table,
1403 data->currpstate);
1404 else
1405 khz = find_khz_freq_from_fid(data->currfid);
1406
1407
1408 out:
1409 return khz;
1410 }
1411
1412 static struct freq_attr *powernow_k8_attr[] = {
1413 &cpufreq_freq_attr_scaling_available_freqs,
1414 NULL,
1415 };
1416
1417 static struct cpufreq_driver cpufreq_amd64_driver = {
1418 .verify = powernowk8_verify,
1419 .target = powernowk8_target,
1420 .init = powernowk8_cpu_init,
1421 .exit = __devexit_p(powernowk8_cpu_exit),
1422 .get = powernowk8_get,
1423 .name = "powernow-k8",
1424 .owner = THIS_MODULE,
1425 .attr = powernow_k8_attr,
1426 };
1427
1428 /* driver entry point for init */
1429 static int __cpuinit powernowk8_init(void)
1430 {
1431 unsigned int i, supported_cpus = 0;
1432
1433 for_each_online_cpu(i) {
1434 int rc;
1435 smp_call_function_single(i, check_supported_cpu, &rc, 1);
1436 if (rc == 0)
1437 supported_cpus++;
1438 }
1439
1440 if (supported_cpus == num_online_cpus()) {
1441 printk(KERN_INFO PFX "Found %d %s "
1442 "processors (%d cpu cores) (" VERSION ")\n",
1443 num_online_nodes(),
1444 boot_cpu_data.x86_model_id, supported_cpus);
1445 return cpufreq_register_driver(&cpufreq_amd64_driver);
1446 }
1447
1448 return -ENODEV;
1449 }
1450
1451 /* driver entry point for term */
1452 static void __exit powernowk8_exit(void)
1453 {
1454 dprintk("exit\n");
1455
1456 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1457 }
1458
1459 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
1460 "Mark Langsdorf <mark.langsdorf@amd.com>");
1461 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1462 MODULE_LICENSE("GPL");
1463
1464 late_initcall(powernowk8_init);
1465 module_exit(powernowk8_exit);
1466
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