1 /*
2 * Cyrix MediaGX and NatSemi Geode Suspend Modulation
3 * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
4 * (C) 2002 Hiroshi Miura <miura@da-cha.org>
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation
10 *
11 * The author(s) of this software shall not be held liable for damages
12 * of any nature resulting due to the use of this software. This
13 * software is provided AS-IS with no warranties.
14 *
15 * Theoretical note:
16 *
17 * (see Geode(tm) CS5530 manual (rev.4.1) page.56)
18 *
19 * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
20 * are based on Suspend Modulation.
21 *
22 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
23 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
24 * the CPU enters an idle state. GX1 stops its core clock when SUSP# is
25 * asserted then power consumption is reduced.
26 *
27 * Suspend Modulation's OFF/ON duration are configurable
28 * with 'Suspend Modulation OFF Count Register'
29 * and 'Suspend Modulation ON Count Register'.
30 * These registers are 8bit counters that represent the number of
31 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
32 * to the processor.
33 *
34 * These counters define a ratio which is the effective frequency
35 * of operation of the system.
36 *
37 * OFF Count
38 * F_eff = Fgx * ----------------------
39 * OFF Count + ON Count
40 *
41 * 0 <= On Count, Off Count <= 255
42 *
43 * From these limits, we can get register values
44 *
45 * off_duration + on_duration <= MAX_DURATION
46 * on_duration = off_duration * (stock_freq - freq) / freq
47 *
48 * off_duration = (freq * DURATION) / stock_freq
49 * on_duration = DURATION - off_duration
50 *
51 *
52 *---------------------------------------------------------------------------
53 *
54 * ChangeLog:
55 * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
56 * - fix on/off register mistake
57 * - fix cpu_khz calc when it stops cpu modulation.
58 *
59 * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
60 * - rewrite for Cyrix MediaGX Cx5510/5520 and
61 * NatSemi Geode Cs5530(A).
62 *
63 * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
64 * - cs5530_mod patch for 2.4.19-rc1.
65 *
66 *---------------------------------------------------------------------------
67 *
68 * Todo
69 * Test on machines with 5510, 5530, 5530A
70 */
71
72 /************************************************************************
73 * Suspend Modulation - Definitions *
74 ************************************************************************/
75
76 #include <linux/kernel.h>
77 #include <linux/module.h>
78 #include <linux/init.h>
79 #include <linux/smp.h>
80 #include <linux/cpufreq.h>
81 #include <linux/pci.h>
82 #include <asm/processor-cyrix.h>
83 #include <asm/errno.h>
84
85 /* PCI config registers, all at F0 */
86 #define PCI_PMER1 0x80 /* power management enable register 1 */
87 #define PCI_PMER2 0x81 /* power management enable register 2 */
88 #define PCI_PMER3 0x82 /* power management enable register 3 */
89 #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
90 #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
91 #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
92 #define PCI_MODON 0x95 /* suspend modulation ON counter register */
93 #define PCI_SUSCFG 0x96 /* suspend configuration register */
94
95 /* PMER1 bits */
96 #define GPM (1<<0) /* global power management */
97 #define GIT (1<<1) /* globally enable PM device idle timers */
98 #define GTR (1<<2) /* globally enable IO traps */
99 #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
100 #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
101
102 /* SUSCFG bits */
103 #define SUSMOD (1<<0) /* enable/disable suspend modulation */
104 /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
105 #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
106 /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
107 #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
108 /* the below is supported only with cs5530A */
109 #define PWRSVE_ISA (1<<3) /* stop ISA clock */
110 #define PWRSVE (1<<4) /* active idle */
111
112 struct gxfreq_params {
113 u8 on_duration;
114 u8 off_duration;
115 u8 pci_suscfg;
116 u8 pci_pmer1;
117 u8 pci_pmer2;
118 struct pci_dev *cs55x0;
119 };
120
121 static struct gxfreq_params *gx_params;
122 static int stock_freq;
123
124 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
125 static int pci_busclk = 0;
126 module_param (pci_busclk, int, 0444);
127
128 /* maximum duration for which the cpu may be suspended
129 * (32us * MAX_DURATION). If no parameter is given, this defaults
130 * to 255.
131 * Note that this leads to a maximum of 8 ms(!) where the CPU clock
132 * is suspended -- processing power is just 0.39% of what it used to be,
133 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
134 static int max_duration = 255;
135 module_param (max_duration, int, 0444);
136
137 /* For the default policy, we want at least some processing power
138 * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
139 */
140 #define POLICY_MIN_DIV 20
141
142
143 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg)
144
145 /**
146 * we can detect a core multipiler from dir0_lsb
147 * from GX1 datasheet p.56,
148 * MULT[3:0]:
149 * 0000 = SYSCLK multiplied by 4 (test only)
150 * 0001 = SYSCLK multiplied by 10
151 * 0010 = SYSCLK multiplied by 4
152 * 0011 = SYSCLK multiplied by 6
153 * 0100 = SYSCLK multiplied by 9
154 * 0101 = SYSCLK multiplied by 5
155 * 0110 = SYSCLK multiplied by 7
156 * 0111 = SYSCLK multiplied by 8
157 * of 33.3MHz
158 **/
159 static int gx_freq_mult[16] = {
160 4, 10, 4, 6, 9, 5, 7, 8,
161 0, 0, 0, 0, 0, 0, 0, 0
162 };
163
164
165 /****************************************************************
166 * Low Level chipset interface *
167 ****************************************************************/
168 static struct pci_device_id gx_chipset_tbl[] __initdata = {
169 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID },
170 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID },
171 { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID },
172 { 0, },
173 };
174
175 /**
176 * gx_detect_chipset:
177 *
178 **/
179 static __init struct pci_dev *gx_detect_chipset(void)
180 {
181 struct pci_dev *gx_pci = NULL;
182
183 /* check if CPU is a MediaGX or a Geode. */
184 if ((boot_cpu_data.x86_vendor != X86_VENDOR_NSC) &&
185 (boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX)) {
186 dprintk("error: no MediaGX/Geode processor found!\n");
187 return NULL;
188 }
189
190 /* detect which companion chip is used */
191 while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {
192 if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
193 return gx_pci;
194 }
195
196 dprintk("error: no supported chipset found!\n");
197 return NULL;
198 }
199
200 /**
201 * gx_get_cpuspeed:
202 *
203 * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs.
204 */
205 static unsigned int gx_get_cpuspeed(unsigned int cpu)
206 {
207 if ((gx_params->pci_suscfg & SUSMOD) == 0)
208 return stock_freq;
209
210 return (stock_freq * gx_params->off_duration)
211 / (gx_params->on_duration + gx_params->off_duration);
212 }
213
214 /**
215 * gx_validate_speed:
216 * determine current cpu speed
217 *
218 **/
219
220 static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration)
221 {
222 unsigned int i;
223 u8 tmp_on, tmp_off;
224 int old_tmp_freq = stock_freq;
225 int tmp_freq;
226
227 *off_duration=1;
228 *on_duration=0;
229
230 for (i=max_duration; i>0; i--) {
231 tmp_off = ((khz * i) / stock_freq) & 0xff;
232 tmp_on = i - tmp_off;
233 tmp_freq = (stock_freq * tmp_off) / i;
234 /* if this relation is closer to khz, use this. If it's equal,
235 * prefer it, too - lower latency */
236 if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
237 *on_duration = tmp_on;
238 *off_duration = tmp_off;
239 old_tmp_freq = tmp_freq;
240 }
241 }
242
243 return old_tmp_freq;
244 }
245
246
247 /**
248 * gx_set_cpuspeed:
249 * set cpu speed in khz.
250 **/
251
252 static void gx_set_cpuspeed(unsigned int khz)
253 {
254 u8 suscfg, pmer1;
255 unsigned int new_khz;
256 unsigned long flags;
257 struct cpufreq_freqs freqs;
258
259 freqs.cpu = 0;
260 freqs.old = gx_get_cpuspeed(0);
261
262 new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration);
263
264 freqs.new = new_khz;
265
266 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
267 local_irq_save(flags);
268
269 if (new_khz != stock_freq) { /* if new khz == 100% of CPU speed, it is special case */
270 switch (gx_params->cs55x0->device) {
271 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
272 pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
273 /* FIXME: need to test other values -- Zwane,Miura */
274 pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */
275 pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
276 pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
277
278 if (gx_params->cs55x0->revision < 0x10) { /* CS5530(rev 1.2, 1.3) */
279 suscfg = gx_params->pci_suscfg | SUSMOD;
280 } else { /* CS5530A,B.. */
281 suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
282 }
283 break;
284 case PCI_DEVICE_ID_CYRIX_5520:
285 case PCI_DEVICE_ID_CYRIX_5510:
286 suscfg = gx_params->pci_suscfg | SUSMOD;
287 break;
288 default:
289 local_irq_restore(flags);
290 dprintk("fatal: try to set unknown chipset.\n");
291 return;
292 }
293 } else {
294 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
295 gx_params->off_duration = 0;
296 gx_params->on_duration = 0;
297 dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n");
298 }
299
300 pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration);
301 pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration);
302
303 pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg);
304 pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
305
306 local_irq_restore(flags);
307
308 gx_params->pci_suscfg = suscfg;
309
310 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
311
312 dprintk("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
313 gx_params->on_duration * 32, gx_params->off_duration * 32);
314 dprintk("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
315 }
316
317 /****************************************************************
318 * High level functions *
319 ****************************************************************/
320
321 /*
322 * cpufreq_gx_verify: test if frequency range is valid
323 *
324 * This function checks if a given frequency range in kHz is valid
325 * for the hardware supported by the driver.
326 */
327
328 static int cpufreq_gx_verify(struct cpufreq_policy *policy)
329 {
330 unsigned int tmp_freq = 0;
331 u8 tmp1, tmp2;
332
333 if (!stock_freq || !policy)
334 return -EINVAL;
335
336 policy->cpu = 0;
337 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
338
339 /* it needs to be assured that at least one supported frequency is
340 * within policy->min and policy->max. If it is not, policy->max
341 * needs to be increased until one freuqency is supported.
342 * policy->min may not be decreased, though. This way we guarantee a
343 * specific processing capacity.
344 */
345 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
346 if (tmp_freq < policy->min)
347 tmp_freq += stock_freq / max_duration;
348 policy->min = tmp_freq;
349 if (policy->min > policy->max)
350 policy->max = tmp_freq;
351 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
352 if (tmp_freq > policy->max)
353 tmp_freq -= stock_freq / max_duration;
354 policy->max = tmp_freq;
355 if (policy->max < policy->min)
356 policy->max = policy->min;
357 cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
358
359 return 0;
360 }
361
362 /*
363 * cpufreq_gx_target:
364 *
365 */
366 static int cpufreq_gx_target(struct cpufreq_policy *policy,
367 unsigned int target_freq,
368 unsigned int relation)
369 {
370 u8 tmp1, tmp2;
371 unsigned int tmp_freq;
372
373 if (!stock_freq || !policy)
374 return -EINVAL;
375
376 policy->cpu = 0;
377
378 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
379 while (tmp_freq < policy->min) {
380 tmp_freq += stock_freq / max_duration;
381 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
382 }
383 while (tmp_freq > policy->max) {
384 tmp_freq -= stock_freq / max_duration;
385 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
386 }
387
388 gx_set_cpuspeed(tmp_freq);
389
390 return 0;
391 }
392
393 static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
394 {
395 unsigned int maxfreq, curfreq;
396
397 if (!policy || policy->cpu != 0)
398 return -ENODEV;
399
400 /* determine maximum frequency */
401 if (pci_busclk) {
402 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
403 } else if (cpu_khz) {
404 maxfreq = cpu_khz;
405 } else {
406 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
407 }
408 stock_freq = maxfreq;
409 curfreq = gx_get_cpuspeed(0);
410
411 dprintk("cpu max frequency is %d.\n", maxfreq);
412 dprintk("cpu current frequency is %dkHz.\n",curfreq);
413
414 /* setup basic struct for cpufreq API */
415 policy->cpu = 0;
416
417 if (max_duration < POLICY_MIN_DIV)
418 policy->min = maxfreq / max_duration;
419 else
420 policy->min = maxfreq / POLICY_MIN_DIV;
421 policy->max = maxfreq;
422 policy->cur = curfreq;
423 policy->cpuinfo.min_freq = maxfreq / max_duration;
424 policy->cpuinfo.max_freq = maxfreq;
425 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
426
427 return 0;
428 }
429
430 /*
431 * cpufreq_gx_init:
432 * MediaGX/Geode GX initialize cpufreq driver
433 */
434 static struct cpufreq_driver gx_suspmod_driver = {
435 .get = gx_get_cpuspeed,
436 .verify = cpufreq_gx_verify,
437 .target = cpufreq_gx_target,
438 .init = cpufreq_gx_cpu_init,
439 .name = "gx-suspmod",
440 .owner = THIS_MODULE,
441 };
442
443 static int __init cpufreq_gx_init(void)
444 {
445 int ret;
446 struct gxfreq_params *params;
447 struct pci_dev *gx_pci;
448
449 /* Test if we have the right hardware */
450 if ((gx_pci = gx_detect_chipset()) == NULL)
451 return -ENODEV;
452
453 /* check whether module parameters are sane */
454 if (max_duration > 0xff)
455 max_duration = 0xff;
456
457 dprintk("geode suspend modulation available.\n");
458
459 params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);
460 if (params == NULL)
461 return -ENOMEM;
462
463 params->cs55x0 = gx_pci;
464 gx_params = params;
465
466 /* keep cs55x0 configurations */
467 pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
468 pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
469 pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
470 pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
471 pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
472
473 if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
474 kfree(params);
475 return ret; /* register error! */
476 }
477
478 return 0;
479 }
480
481 static void __exit cpufreq_gx_exit(void)
482 {
483 cpufreq_unregister_driver(&gx_suspmod_driver);
484 pci_dev_put(gx_params->cs55x0);
485 kfree(gx_params);
486 }
487
488 MODULE_AUTHOR ("Hiroshi Miura <miura@da-cha.org>");
489 MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
490 MODULE_LICENSE ("GPL");
491
492 module_init(cpufreq_gx_init);
493 module_exit(cpufreq_gx_exit);
494
495
|
This page was automatically generated by the
LXR engine.
|