1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
5
6 #ifdef CONFIG_PARAVIRT
7 #include <asm/pgtable_types.h>
8 #include <asm/asm.h>
9
10 /* Bitmask of what can be clobbered: usually at least eax. */
11 #define CLBR_NONE 0
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
15 #define CLBR_EDI (1 << 3)
16
17 #ifdef CONFIG_X86_32
18 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
19 #define CLBR_ANY ((1 << 4) - 1)
20
21 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
22 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
23 #define CLBR_SCRATCH (0)
24 #else
25 #define CLBR_RAX CLBR_EAX
26 #define CLBR_RCX CLBR_ECX
27 #define CLBR_RDX CLBR_EDX
28 #define CLBR_RDI CLBR_EDI
29 #define CLBR_RSI (1 << 4)
30 #define CLBR_R8 (1 << 5)
31 #define CLBR_R9 (1 << 6)
32 #define CLBR_R10 (1 << 7)
33 #define CLBR_R11 (1 << 8)
34
35 #define CLBR_ANY ((1 << 9) - 1)
36
37 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
38 CLBR_RCX | CLBR_R8 | CLBR_R9)
39 #define CLBR_RET_REG (CLBR_RAX)
40 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
41
42 #include <asm/desc_defs.h>
43 #endif /* X86_64 */
44
45 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
46
47 #ifndef __ASSEMBLY__
48 #include <linux/types.h>
49 #include <linux/cpumask.h>
50 #include <asm/kmap_types.h>
51 #include <asm/desc_defs.h>
52
53 struct page;
54 struct thread_struct;
55 struct desc_ptr;
56 struct tss_struct;
57 struct mm_struct;
58 struct desc_struct;
59 struct task_struct;
60
61 /*
62 * Wrapper type for pointers to code which uses the non-standard
63 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
64 */
65 struct paravirt_callee_save {
66 void *func;
67 };
68
69 /* general info */
70 struct pv_info {
71 unsigned int kernel_rpl;
72 int shared_kernel_pmd;
73 int paravirt_enabled;
74 const char *name;
75 };
76
77 struct pv_init_ops {
78 /*
79 * Patch may replace one of the defined code sequences with
80 * arbitrary code, subject to the same register constraints.
81 * This generally means the code is not free to clobber any
82 * registers other than EAX. The patch function should return
83 * the number of bytes of code generated, as we nop pad the
84 * rest in generic code.
85 */
86 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
87 unsigned long addr, unsigned len);
88
89 /* Basic arch-specific setup */
90 void (*arch_setup)(void);
91 char *(*memory_setup)(void);
92 void (*post_allocator_init)(void);
93
94 /* Print a banner to identify the environment */
95 void (*banner)(void);
96 };
97
98
99 struct pv_lazy_ops {
100 /* Set deferred update mode, used for batching operations. */
101 void (*enter)(void);
102 void (*leave)(void);
103 };
104
105 struct pv_time_ops {
106 void (*time_init)(void);
107
108 /* Set and set time of day */
109 unsigned long (*get_wallclock)(void);
110 int (*set_wallclock)(unsigned long);
111
112 unsigned long long (*sched_clock)(void);
113 unsigned long (*get_tsc_khz)(void);
114 };
115
116 struct pv_cpu_ops {
117 /* hooks for various privileged instructions */
118 unsigned long (*get_debugreg)(int regno);
119 void (*set_debugreg)(int regno, unsigned long value);
120
121 void (*clts)(void);
122
123 unsigned long (*read_cr0)(void);
124 void (*write_cr0)(unsigned long);
125
126 unsigned long (*read_cr4_safe)(void);
127 unsigned long (*read_cr4)(void);
128 void (*write_cr4)(unsigned long);
129
130 #ifdef CONFIG_X86_64
131 unsigned long (*read_cr8)(void);
132 void (*write_cr8)(unsigned long);
133 #endif
134
135 /* Segment descriptor handling */
136 void (*load_tr_desc)(void);
137 void (*load_gdt)(const struct desc_ptr *);
138 void (*load_idt)(const struct desc_ptr *);
139 void (*store_gdt)(struct desc_ptr *);
140 void (*store_idt)(struct desc_ptr *);
141 void (*set_ldt)(const void *desc, unsigned entries);
142 unsigned long (*store_tr)(void);
143 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
144 #ifdef CONFIG_X86_64
145 void (*load_gs_index)(unsigned int idx);
146 #endif
147 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
148 const void *desc);
149 void (*write_gdt_entry)(struct desc_struct *,
150 int entrynum, const void *desc, int size);
151 void (*write_idt_entry)(gate_desc *,
152 int entrynum, const gate_desc *gate);
153 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
154 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
155
156 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
157
158 void (*set_iopl_mask)(unsigned mask);
159
160 void (*wbinvd)(void);
161 void (*io_delay)(void);
162
163 /* cpuid emulation, mostly so that caps bits can be disabled */
164 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
165 unsigned int *ecx, unsigned int *edx);
166
167 /* MSR, PMC and TSR operations.
168 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
169 u64 (*read_msr_amd)(unsigned int msr, int *err);
170 u64 (*read_msr)(unsigned int msr, int *err);
171 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
172
173 u64 (*read_tsc)(void);
174 u64 (*read_pmc)(int counter);
175 unsigned long long (*read_tscp)(unsigned int *aux);
176
177 /*
178 * Atomically enable interrupts and return to userspace. This
179 * is only ever used to return to 32-bit processes; in a
180 * 64-bit kernel, it's used for 32-on-64 compat processes, but
181 * never native 64-bit processes. (Jump, not call.)
182 */
183 void (*irq_enable_sysexit)(void);
184
185 /*
186 * Switch to usermode gs and return to 64-bit usermode using
187 * sysret. Only used in 64-bit kernels to return to 64-bit
188 * processes. Usermode register state, including %rsp, must
189 * already be restored.
190 */
191 void (*usergs_sysret64)(void);
192
193 /*
194 * Switch to usermode gs and return to 32-bit usermode using
195 * sysret. Used to return to 32-on-64 compat processes.
196 * Other usermode register state, including %esp, must already
197 * be restored.
198 */
199 void (*usergs_sysret32)(void);
200
201 /* Normal iret. Jump to this with the standard iret stack
202 frame set up. */
203 void (*iret)(void);
204
205 void (*swapgs)(void);
206
207 void (*start_context_switch)(struct task_struct *prev);
208 void (*end_context_switch)(struct task_struct *next);
209 };
210
211 struct pv_irq_ops {
212 void (*init_IRQ)(void);
213
214 /*
215 * Get/set interrupt state. save_fl and restore_fl are only
216 * expected to use X86_EFLAGS_IF; all other bits
217 * returned from save_fl are undefined, and may be ignored by
218 * restore_fl.
219 *
220 * NOTE: These functions callers expect the callee to preserve
221 * more registers than the standard C calling convention.
222 */
223 struct paravirt_callee_save save_fl;
224 struct paravirt_callee_save restore_fl;
225 struct paravirt_callee_save irq_disable;
226 struct paravirt_callee_save irq_enable;
227
228 void (*safe_halt)(void);
229 void (*halt)(void);
230
231 #ifdef CONFIG_X86_64
232 void (*adjust_exception_frame)(void);
233 #endif
234 };
235
236 struct pv_apic_ops {
237 #ifdef CONFIG_X86_LOCAL_APIC
238 void (*setup_boot_clock)(void);
239 void (*setup_secondary_clock)(void);
240
241 void (*startup_ipi_hook)(int phys_apicid,
242 unsigned long start_eip,
243 unsigned long start_esp);
244 #endif
245 };
246
247 struct pv_mmu_ops {
248 /*
249 * Called before/after init_mm pagetable setup. setup_start
250 * may reset %cr3, and may pre-install parts of the pagetable;
251 * pagetable setup is expected to preserve any existing
252 * mapping.
253 */
254 void (*pagetable_setup_start)(pgd_t *pgd_base);
255 void (*pagetable_setup_done)(pgd_t *pgd_base);
256
257 unsigned long (*read_cr2)(void);
258 void (*write_cr2)(unsigned long);
259
260 unsigned long (*read_cr3)(void);
261 void (*write_cr3)(unsigned long);
262
263 /*
264 * Hooks for intercepting the creation/use/destruction of an
265 * mm_struct.
266 */
267 void (*activate_mm)(struct mm_struct *prev,
268 struct mm_struct *next);
269 void (*dup_mmap)(struct mm_struct *oldmm,
270 struct mm_struct *mm);
271 void (*exit_mmap)(struct mm_struct *mm);
272
273
274 /* TLB operations */
275 void (*flush_tlb_user)(void);
276 void (*flush_tlb_kernel)(void);
277 void (*flush_tlb_single)(unsigned long addr);
278 void (*flush_tlb_others)(const struct cpumask *cpus,
279 struct mm_struct *mm,
280 unsigned long va);
281
282 /* Hooks for allocating and freeing a pagetable top-level */
283 int (*pgd_alloc)(struct mm_struct *mm);
284 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
285
286 /*
287 * Hooks for allocating/releasing pagetable pages when they're
288 * attached to a pagetable
289 */
290 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
291 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
292 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
293 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
294 void (*release_pte)(unsigned long pfn);
295 void (*release_pmd)(unsigned long pfn);
296 void (*release_pud)(unsigned long pfn);
297
298 /* Pagetable manipulation functions */
299 void (*set_pte)(pte_t *ptep, pte_t pteval);
300 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
301 pte_t *ptep, pte_t pteval);
302 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
303 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
304 pte_t *ptep);
305 void (*pte_update_defer)(struct mm_struct *mm,
306 unsigned long addr, pte_t *ptep);
307
308 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
309 pte_t *ptep);
310 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
311 pte_t *ptep, pte_t pte);
312
313 struct paravirt_callee_save pte_val;
314 struct paravirt_callee_save make_pte;
315
316 struct paravirt_callee_save pgd_val;
317 struct paravirt_callee_save make_pgd;
318
319 #if PAGETABLE_LEVELS >= 3
320 #ifdef CONFIG_X86_PAE
321 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
322 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
323 pte_t *ptep);
324 void (*pmd_clear)(pmd_t *pmdp);
325
326 #endif /* CONFIG_X86_PAE */
327
328 void (*set_pud)(pud_t *pudp, pud_t pudval);
329
330 struct paravirt_callee_save pmd_val;
331 struct paravirt_callee_save make_pmd;
332
333 #if PAGETABLE_LEVELS == 4
334 struct paravirt_callee_save pud_val;
335 struct paravirt_callee_save make_pud;
336
337 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
338 #endif /* PAGETABLE_LEVELS == 4 */
339 #endif /* PAGETABLE_LEVELS >= 3 */
340
341 #ifdef CONFIG_HIGHPTE
342 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
343 #endif
344
345 struct pv_lazy_ops lazy_mode;
346
347 /* dom0 ops */
348
349 /* Sometimes the physical address is a pfn, and sometimes its
350 an mfn. We can tell which is which from the index. */
351 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
352 phys_addr_t phys, pgprot_t flags);
353 };
354
355 struct raw_spinlock;
356 struct pv_lock_ops {
357 int (*spin_is_locked)(struct raw_spinlock *lock);
358 int (*spin_is_contended)(struct raw_spinlock *lock);
359 void (*spin_lock)(struct raw_spinlock *lock);
360 void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
361 int (*spin_trylock)(struct raw_spinlock *lock);
362 void (*spin_unlock)(struct raw_spinlock *lock);
363 };
364
365 /* This contains all the paravirt structures: we get a convenient
366 * number for each function using the offset which we use to indicate
367 * what to patch. */
368 struct paravirt_patch_template {
369 struct pv_init_ops pv_init_ops;
370 struct pv_time_ops pv_time_ops;
371 struct pv_cpu_ops pv_cpu_ops;
372 struct pv_irq_ops pv_irq_ops;
373 struct pv_apic_ops pv_apic_ops;
374 struct pv_mmu_ops pv_mmu_ops;
375 struct pv_lock_ops pv_lock_ops;
376 };
377
378 extern struct pv_info pv_info;
379 extern struct pv_init_ops pv_init_ops;
380 extern struct pv_time_ops pv_time_ops;
381 extern struct pv_cpu_ops pv_cpu_ops;
382 extern struct pv_irq_ops pv_irq_ops;
383 extern struct pv_apic_ops pv_apic_ops;
384 extern struct pv_mmu_ops pv_mmu_ops;
385 extern struct pv_lock_ops pv_lock_ops;
386
387 #define PARAVIRT_PATCH(x) \
388 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
389
390 #define paravirt_type(op) \
391 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
392 [paravirt_opptr] "i" (&(op))
393 #define paravirt_clobber(clobber) \
394 [paravirt_clobber] "i" (clobber)
395
396 /*
397 * Generate some code, and mark it as patchable by the
398 * apply_paravirt() alternate instruction patcher.
399 */
400 #define _paravirt_alt(insn_string, type, clobber) \
401 "771:\n\t" insn_string "\n" "772:\n" \
402 ".pushsection .parainstructions,\"a\"\n" \
403 _ASM_ALIGN "\n" \
404 _ASM_PTR " 771b\n" \
405 " .byte " type "\n" \
406 " .byte 772b-771b\n" \
407 " .short " clobber "\n" \
408 ".popsection\n"
409
410 /* Generate patchable code, with the default asm parameters. */
411 #define paravirt_alt(insn_string) \
412 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
413
414 /* Simple instruction patching code. */
415 #define DEF_NATIVE(ops, name, code) \
416 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
417 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
418
419 unsigned paravirt_patch_nop(void);
420 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
421 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
422 unsigned paravirt_patch_ignore(unsigned len);
423 unsigned paravirt_patch_call(void *insnbuf,
424 const void *target, u16 tgt_clobbers,
425 unsigned long addr, u16 site_clobbers,
426 unsigned len);
427 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
428 unsigned long addr, unsigned len);
429 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
430 unsigned long addr, unsigned len);
431
432 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
433 const char *start, const char *end);
434
435 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
436 unsigned long addr, unsigned len);
437
438 int paravirt_disable_iospace(void);
439
440 /*
441 * This generates an indirect call based on the operation type number.
442 * The type number, computed in PARAVIRT_PATCH, is derived from the
443 * offset into the paravirt_patch_template structure, and can therefore be
444 * freely converted back into a structure offset.
445 */
446 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
447
448 /*
449 * These macros are intended to wrap calls through one of the paravirt
450 * ops structs, so that they can be later identified and patched at
451 * runtime.
452 *
453 * Normally, a call to a pv_op function is a simple indirect call:
454 * (pv_op_struct.operations)(args...).
455 *
456 * Unfortunately, this is a relatively slow operation for modern CPUs,
457 * because it cannot necessarily determine what the destination
458 * address is. In this case, the address is a runtime constant, so at
459 * the very least we can patch the call to e a simple direct call, or
460 * ideally, patch an inline implementation into the callsite. (Direct
461 * calls are essentially free, because the call and return addresses
462 * are completely predictable.)
463 *
464 * For i386, these macros rely on the standard gcc "regparm(3)" calling
465 * convention, in which the first three arguments are placed in %eax,
466 * %edx, %ecx (in that order), and the remaining arguments are placed
467 * on the stack. All caller-save registers (eax,edx,ecx) are expected
468 * to be modified (either clobbered or used for return values).
469 * X86_64, on the other hand, already specifies a register-based calling
470 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
471 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
472 * special handling for dealing with 4 arguments, unlike i386.
473 * However, x86_64 also have to clobber all caller saved registers, which
474 * unfortunately, are quite a bit (r8 - r11)
475 *
476 * The call instruction itself is marked by placing its start address
477 * and size into the .parainstructions section, so that
478 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
479 * appropriate patching under the control of the backend pv_init_ops
480 * implementation.
481 *
482 * Unfortunately there's no way to get gcc to generate the args setup
483 * for the call, and then allow the call itself to be generated by an
484 * inline asm. Because of this, we must do the complete arg setup and
485 * return value handling from within these macros. This is fairly
486 * cumbersome.
487 *
488 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
489 * It could be extended to more arguments, but there would be little
490 * to be gained from that. For each number of arguments, there are
491 * the two VCALL and CALL variants for void and non-void functions.
492 *
493 * When there is a return value, the invoker of the macro must specify
494 * the return type. The macro then uses sizeof() on that type to
495 * determine whether its a 32 or 64 bit value, and places the return
496 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
497 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
498 * the return value size.
499 *
500 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
501 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
502 * in low,high order
503 *
504 * Small structures are passed and returned in registers. The macro
505 * calling convention can't directly deal with this, so the wrapper
506 * functions must do this.
507 *
508 * These PVOP_* macros are only defined within this header. This
509 * means that all uses must be wrapped in inline functions. This also
510 * makes sure the incoming and outgoing types are always correct.
511 */
512 #ifdef CONFIG_X86_32
513 #define PVOP_VCALL_ARGS \
514 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
515 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
516
517 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
518 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
519 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
520
521 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
522 "=c" (__ecx)
523 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
524
525 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
526 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
527
528 #define EXTRA_CLOBBERS
529 #define VEXTRA_CLOBBERS
530 #else /* CONFIG_X86_64 */
531 /* [re]ax isn't an arg, but the return val */
532 #define PVOP_VCALL_ARGS \
533 unsigned long __edi = __edi, __esi = __esi, \
534 __edx = __edx, __ecx = __ecx, __eax = __eax
535 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
536
537 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
538 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
539 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
540 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
541
542 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
543 "=S" (__esi), "=d" (__edx), \
544 "=c" (__ecx)
545 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
546
547 /* void functions are still allowed [re]ax for scratch */
548 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
549 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
550
551 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
552 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
553 #endif /* CONFIG_X86_32 */
554
555 #ifdef CONFIG_PARAVIRT_DEBUG
556 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
557 #else
558 #define PVOP_TEST_NULL(op) ((void)op)
559 #endif
560
561 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
562 pre, post, ...) \
563 ({ \
564 rettype __ret; \
565 PVOP_CALL_ARGS; \
566 PVOP_TEST_NULL(op); \
567 /* This is 32-bit specific, but is okay in 64-bit */ \
568 /* since this condition will never hold */ \
569 if (sizeof(rettype) > sizeof(unsigned long)) { \
570 asm volatile(pre \
571 paravirt_alt(PARAVIRT_CALL) \
572 post \
573 : call_clbr \
574 : paravirt_type(op), \
575 paravirt_clobber(clbr), \
576 ##__VA_ARGS__ \
577 : "memory", "cc" extra_clbr); \
578 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
579 } else { \
580 asm volatile(pre \
581 paravirt_alt(PARAVIRT_CALL) \
582 post \
583 : call_clbr \
584 : paravirt_type(op), \
585 paravirt_clobber(clbr), \
586 ##__VA_ARGS__ \
587 : "memory", "cc" extra_clbr); \
588 __ret = (rettype)__eax; \
589 } \
590 __ret; \
591 })
592
593 #define __PVOP_CALL(rettype, op, pre, post, ...) \
594 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
595 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
596
597 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
598 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
599 PVOP_CALLEE_CLOBBERS, , \
600 pre, post, ##__VA_ARGS__)
601
602
603 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
604 ({ \
605 PVOP_VCALL_ARGS; \
606 PVOP_TEST_NULL(op); \
607 asm volatile(pre \
608 paravirt_alt(PARAVIRT_CALL) \
609 post \
610 : call_clbr \
611 : paravirt_type(op), \
612 paravirt_clobber(clbr), \
613 ##__VA_ARGS__ \
614 : "memory", "cc" extra_clbr); \
615 })
616
617 #define __PVOP_VCALL(op, pre, post, ...) \
618 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
619 VEXTRA_CLOBBERS, \
620 pre, post, ##__VA_ARGS__)
621
622 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
623 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
624 PVOP_VCALLEE_CLOBBERS, , \
625 pre, post, ##__VA_ARGS__)
626
627
628
629 #define PVOP_CALL0(rettype, op) \
630 __PVOP_CALL(rettype, op, "", "")
631 #define PVOP_VCALL0(op) \
632 __PVOP_VCALL(op, "", "")
633
634 #define PVOP_CALLEE0(rettype, op) \
635 __PVOP_CALLEESAVE(rettype, op, "", "")
636 #define PVOP_VCALLEE0(op) \
637 __PVOP_VCALLEESAVE(op, "", "")
638
639
640 #define PVOP_CALL1(rettype, op, arg1) \
641 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
642 #define PVOP_VCALL1(op, arg1) \
643 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
644
645 #define PVOP_CALLEE1(rettype, op, arg1) \
646 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
647 #define PVOP_VCALLEE1(op, arg1) \
648 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
649
650
651 #define PVOP_CALL2(rettype, op, arg1, arg2) \
652 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
653 PVOP_CALL_ARG2(arg2))
654 #define PVOP_VCALL2(op, arg1, arg2) \
655 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
656 PVOP_CALL_ARG2(arg2))
657
658 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
659 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
660 PVOP_CALL_ARG2(arg2))
661 #define PVOP_VCALLEE2(op, arg1, arg2) \
662 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
663 PVOP_CALL_ARG2(arg2))
664
665
666 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
667 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
668 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
669 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
670 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
671 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
672
673 /* This is the only difference in x86_64. We can make it much simpler */
674 #ifdef CONFIG_X86_32
675 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
676 __PVOP_CALL(rettype, op, \
677 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
678 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
679 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
680 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
681 __PVOP_VCALL(op, \
682 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
683 "" ((u32)(arg1)), "1" ((u32)(arg2)), \
684 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
685 #else
686 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
687 __PVOP_CALL(rettype, op, "", "", \
688 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
689 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
690 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
691 __PVOP_VCALL(op, "", "", \
692 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
693 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
694 #endif
695
696 static inline int paravirt_enabled(void)
697 {
698 return pv_info.paravirt_enabled;
699 }
700
701 static inline void load_sp0(struct tss_struct *tss,
702 struct thread_struct *thread)
703 {
704 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
705 }
706
707 #define ARCH_SETUP pv_init_ops.arch_setup();
708 static inline unsigned long get_wallclock(void)
709 {
710 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
711 }
712
713 static inline int set_wallclock(unsigned long nowtime)
714 {
715 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
716 }
717
718 static inline void (*choose_time_init(void))(void)
719 {
720 return pv_time_ops.time_init;
721 }
722
723 /* The paravirtualized CPUID instruction. */
724 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
725 unsigned int *ecx, unsigned int *edx)
726 {
727 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
728 }
729
730 /*
731 * These special macros can be used to get or set a debugging register
732 */
733 static inline unsigned long paravirt_get_debugreg(int reg)
734 {
735 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
736 }
737 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
738 static inline void set_debugreg(unsigned long val, int reg)
739 {
740 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
741 }
742
743 static inline void clts(void)
744 {
745 PVOP_VCALL0(pv_cpu_ops.clts);
746 }
747
748 static inline unsigned long read_cr0(void)
749 {
750 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
751 }
752
753 static inline void write_cr0(unsigned long x)
754 {
755 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
756 }
757
758 static inline unsigned long read_cr2(void)
759 {
760 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
761 }
762
763 static inline void write_cr2(unsigned long x)
764 {
765 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
766 }
767
768 static inline unsigned long read_cr3(void)
769 {
770 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
771 }
772
773 static inline void write_cr3(unsigned long x)
774 {
775 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
776 }
777
778 static inline unsigned long read_cr4(void)
779 {
780 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
781 }
782 static inline unsigned long read_cr4_safe(void)
783 {
784 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
785 }
786
787 static inline void write_cr4(unsigned long x)
788 {
789 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
790 }
791
792 #ifdef CONFIG_X86_64
793 static inline unsigned long read_cr8(void)
794 {
795 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
796 }
797
798 static inline void write_cr8(unsigned long x)
799 {
800 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
801 }
802 #endif
803
804 static inline void raw_safe_halt(void)
805 {
806 PVOP_VCALL0(pv_irq_ops.safe_halt);
807 }
808
809 static inline void halt(void)
810 {
811 PVOP_VCALL0(pv_irq_ops.safe_halt);
812 }
813
814 static inline void wbinvd(void)
815 {
816 PVOP_VCALL0(pv_cpu_ops.wbinvd);
817 }
818
819 #define get_kernel_rpl() (pv_info.kernel_rpl)
820
821 static inline u64 paravirt_read_msr(unsigned msr, int *err)
822 {
823 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
824 }
825 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
826 {
827 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
828 }
829 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
830 {
831 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
832 }
833
834 /* These should all do BUG_ON(_err), but our headers are too tangled. */
835 #define rdmsr(msr, val1, val2) \
836 do { \
837 int _err; \
838 u64 _l = paravirt_read_msr(msr, &_err); \
839 val1 = (u32)_l; \
840 val2 = _l >> 32; \
841 } while (0)
842
843 #define wrmsr(msr, val1, val2) \
844 do { \
845 paravirt_write_msr(msr, val1, val2); \
846 } while (0)
847
848 #define rdmsrl(msr, val) \
849 do { \
850 int _err; \
851 val = paravirt_read_msr(msr, &_err); \
852 } while (0)
853
854 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
855 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
856
857 /* rdmsr with exception handling */
858 #define rdmsr_safe(msr, a, b) \
859 ({ \
860 int _err; \
861 u64 _l = paravirt_read_msr(msr, &_err); \
862 (*a) = (u32)_l; \
863 (*b) = _l >> 32; \
864 _err; \
865 })
866
867 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
868 {
869 int err;
870
871 *p = paravirt_read_msr(msr, &err);
872 return err;
873 }
874 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
875 {
876 int err;
877
878 *p = paravirt_read_msr_amd(msr, &err);
879 return err;
880 }
881
882 static inline u64 paravirt_read_tsc(void)
883 {
884 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
885 }
886
887 #define rdtscl(low) \
888 do { \
889 u64 _l = paravirt_read_tsc(); \
890 low = (int)_l; \
891 } while (0)
892
893 #define rdtscll(val) (val = paravirt_read_tsc())
894
895 static inline unsigned long long paravirt_sched_clock(void)
896 {
897 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
898 }
899 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
900
901 static inline unsigned long long paravirt_read_pmc(int counter)
902 {
903 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
904 }
905
906 #define rdpmc(counter, low, high) \
907 do { \
908 u64 _l = paravirt_read_pmc(counter); \
909 low = (u32)_l; \
910 high = _l >> 32; \
911 } while (0)
912
913 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
914 {
915 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
916 }
917
918 #define rdtscp(low, high, aux) \
919 do { \
920 int __aux; \
921 unsigned long __val = paravirt_rdtscp(&__aux); \
922 (low) = (u32)__val; \
923 (high) = (u32)(__val >> 32); \
924 (aux) = __aux; \
925 } while (0)
926
927 #define rdtscpll(val, aux) \
928 do { \
929 unsigned long __aux; \
930 val = paravirt_rdtscp(&__aux); \
931 (aux) = __aux; \
932 } while (0)
933
934 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
935 {
936 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
937 }
938
939 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
940 {
941 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
942 }
943
944 static inline void load_TR_desc(void)
945 {
946 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
947 }
948 static inline void load_gdt(const struct desc_ptr *dtr)
949 {
950 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
951 }
952 static inline void load_idt(const struct desc_ptr *dtr)
953 {
954 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
955 }
956 static inline void set_ldt(const void *addr, unsigned entries)
957 {
958 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
959 }
960 static inline void store_gdt(struct desc_ptr *dtr)
961 {
962 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
963 }
964 static inline void store_idt(struct desc_ptr *dtr)
965 {
966 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
967 }
968 static inline unsigned long paravirt_store_tr(void)
969 {
970 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
971 }
972 #define store_tr(tr) ((tr) = paravirt_store_tr())
973 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
974 {
975 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
976 }
977
978 #ifdef CONFIG_X86_64
979 static inline void load_gs_index(unsigned int gs)
980 {
981 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
982 }
983 #endif
984
985 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
986 const void *desc)
987 {
988 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
989 }
990
991 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
992 void *desc, int type)
993 {
994 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
995 }
996
997 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
998 {
999 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
1000 }
1001 static inline void set_iopl_mask(unsigned mask)
1002 {
1003 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
1004 }
1005
1006 /* The paravirtualized I/O functions */
1007 static inline void slow_down_io(void)
1008 {
1009 pv_cpu_ops.io_delay();
1010 #ifdef REALLY_SLOW_IO
1011 pv_cpu_ops.io_delay();
1012 pv_cpu_ops.io_delay();
1013 pv_cpu_ops.io_delay();
1014 #endif
1015 }
1016
1017 #ifdef CONFIG_X86_LOCAL_APIC
1018 static inline void setup_boot_clock(void)
1019 {
1020 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
1021 }
1022
1023 static inline void setup_secondary_clock(void)
1024 {
1025 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
1026 }
1027 #endif
1028
1029 static inline void paravirt_post_allocator_init(void)
1030 {
1031 if (pv_init_ops.post_allocator_init)
1032 (*pv_init_ops.post_allocator_init)();
1033 }
1034
1035 static inline void paravirt_pagetable_setup_start(pgd_t *base)
1036 {
1037 (*pv_mmu_ops.pagetable_setup_start)(base);
1038 }
1039
1040 static inline void paravirt_pagetable_setup_done(pgd_t *base)
1041 {
1042 (*pv_mmu_ops.pagetable_setup_done)(base);
1043 }
1044
1045 #ifdef CONFIG_SMP
1046 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
1047 unsigned long start_esp)
1048 {
1049 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
1050 phys_apicid, start_eip, start_esp);
1051 }
1052 #endif
1053
1054 static inline void paravirt_activate_mm(struct mm_struct *prev,
1055 struct mm_struct *next)
1056 {
1057 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
1058 }
1059
1060 static inline void arch_dup_mmap(struct mm_struct *oldmm,
1061 struct mm_struct *mm)
1062 {
1063 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
1064 }
1065
1066 static inline void arch_exit_mmap(struct mm_struct *mm)
1067 {
1068 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
1069 }
1070
1071 static inline void __flush_tlb(void)
1072 {
1073 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
1074 }
1075 static inline void __flush_tlb_global(void)
1076 {
1077 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
1078 }
1079 static inline void __flush_tlb_single(unsigned long addr)
1080 {
1081 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
1082 }
1083
1084 static inline void flush_tlb_others(const struct cpumask *cpumask,
1085 struct mm_struct *mm,
1086 unsigned long va)
1087 {
1088 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
1089 }
1090
1091 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
1092 {
1093 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
1094 }
1095
1096 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1097 {
1098 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1099 }
1100
1101 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1102 {
1103 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1104 }
1105 static inline void paravirt_release_pte(unsigned long pfn)
1106 {
1107 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1108 }
1109
1110 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1111 {
1112 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1113 }
1114
1115 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1116 unsigned long start, unsigned long count)
1117 {
1118 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1119 }
1120 static inline void paravirt_release_pmd(unsigned long pfn)
1121 {
1122 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1123 }
1124
1125 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1126 {
1127 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1128 }
1129 static inline void paravirt_release_pud(unsigned long pfn)
1130 {
1131 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1132 }
1133
1134 #ifdef CONFIG_HIGHPTE
1135 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1136 {
1137 unsigned long ret;
1138 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1139 return (void *)ret;
1140 }
1141 #endif
1142
1143 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1144 pte_t *ptep)
1145 {
1146 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1147 }
1148
1149 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1150 pte_t *ptep)
1151 {
1152 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1153 }
1154
1155 static inline pte_t __pte(pteval_t val)
1156 {
1157 pteval_t ret;
1158
1159 if (sizeof(pteval_t) > sizeof(long))
1160 ret = PVOP_CALLEE2(pteval_t,
1161 pv_mmu_ops.make_pte,
1162 val, (u64)val >> 32);
1163 else
1164 ret = PVOP_CALLEE1(pteval_t,
1165 pv_mmu_ops.make_pte,
1166 val);
1167
1168 return (pte_t) { .pte = ret };
1169 }
1170
1171 static inline pteval_t pte_val(pte_t pte)
1172 {
1173 pteval_t ret;
1174
1175 if (sizeof(pteval_t) > sizeof(long))
1176 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
1177 pte.pte, (u64)pte.pte >> 32);
1178 else
1179 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
1180 pte.pte);
1181
1182 return ret;
1183 }
1184
1185 static inline pgd_t __pgd(pgdval_t val)
1186 {
1187 pgdval_t ret;
1188
1189 if (sizeof(pgdval_t) > sizeof(long))
1190 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
1191 val, (u64)val >> 32);
1192 else
1193 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
1194 val);
1195
1196 return (pgd_t) { ret };
1197 }
1198
1199 static inline pgdval_t pgd_val(pgd_t pgd)
1200 {
1201 pgdval_t ret;
1202
1203 if (sizeof(pgdval_t) > sizeof(long))
1204 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
1205 pgd.pgd, (u64)pgd.pgd >> 32);
1206 else
1207 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
1208 pgd.pgd);
1209
1210 return ret;
1211 }
1212
1213 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1214 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1215 pte_t *ptep)
1216 {
1217 pteval_t ret;
1218
1219 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1220 mm, addr, ptep);
1221
1222 return (pte_t) { .pte = ret };
1223 }
1224
1225 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1226 pte_t *ptep, pte_t pte)
1227 {
1228 if (sizeof(pteval_t) > sizeof(long))
1229 /* 5 arg words */
1230 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1231 else
1232 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1233 mm, addr, ptep, pte.pte);
1234 }
1235
1236 static inline void set_pte(pte_t *ptep, pte_t pte)
1237 {
1238 if (sizeof(pteval_t) > sizeof(long))
1239 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1240 pte.pte, (u64)pte.pte >> 32);
1241 else
1242 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1243 pte.pte);
1244 }
1245
1246 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1247 pte_t *ptep, pte_t pte)
1248 {
1249 if (sizeof(pteval_t) > sizeof(long))
1250 /* 5 arg words */
1251 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1252 else
1253 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1254 }
1255
1256 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1257 {
1258 pmdval_t val = native_pmd_val(pmd);
1259
1260 if (sizeof(pmdval_t) > sizeof(long))
1261 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1262 else
1263 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1264 }
1265
1266 #if PAGETABLE_LEVELS >= 3
1267 static inline pmd_t __pmd(pmdval_t val)
1268 {
1269 pmdval_t ret;
1270
1271 if (sizeof(pmdval_t) > sizeof(long))
1272 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
1273 val, (u64)val >> 32);
1274 else
1275 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
1276 val);
1277
1278 return (pmd_t) { ret };
1279 }
1280
1281 static inline pmdval_t pmd_val(pmd_t pmd)
1282 {
1283 pmdval_t ret;
1284
1285 if (sizeof(pmdval_t) > sizeof(long))
1286 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
1287 pmd.pmd, (u64)pmd.pmd >> 32);
1288 else
1289 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
1290 pmd.pmd);
1291
1292 return ret;
1293 }
1294
1295 static inline void set_pud(pud_t *pudp, pud_t pud)
1296 {
1297 pudval_t val = native_pud_val(pud);
1298
1299 if (sizeof(pudval_t) > sizeof(long))
1300 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1301 val, (u64)val >> 32);
1302 else
1303 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1304 val);
1305 }
1306 #if PAGETABLE_LEVELS == 4
1307 static inline pud_t __pud(pudval_t val)
1308 {
1309 pudval_t ret;
1310
1311 if (sizeof(pudval_t) > sizeof(long))
1312 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
1313 val, (u64)val >> 32);
1314 else
1315 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
1316 val);
1317
1318 return (pud_t) { ret };
1319 }
1320
1321 static inline pudval_t pud_val(pud_t pud)
1322 {
1323 pudval_t ret;
1324
1325 if (sizeof(pudval_t) > sizeof(long))
1326 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
1327 pud.pud, (u64)pud.pud >> 32);
1328 else
1329 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
1330 pud.pud);
1331
1332 return ret;
1333 }
1334
1335 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1336 {
1337 pgdval_t val = native_pgd_val(pgd);
1338
1339 if (sizeof(pgdval_t) > sizeof(long))
1340 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1341 val, (u64)val >> 32);
1342 else
1343 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1344 val);
1345 }
1346
1347 static inline void pgd_clear(pgd_t *pgdp)
1348 {
1349 set_pgd(pgdp, __pgd(0));
1350 }
1351
1352 static inline void pud_clear(pud_t *pudp)
1353 {
1354 set_pud(pudp, __pud(0));
1355 }
1356
1357 #endif /* PAGETABLE_LEVELS == 4 */
1358
1359 #endif /* PAGETABLE_LEVELS >= 3 */
1360
1361 #ifdef CONFIG_X86_PAE
1362 /* Special-case pte-setting operations for PAE, which can't update a
1363 64-bit pte atomically */
1364 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1365 {
1366 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1367 pte.pte, pte.pte >> 32);
1368 }
1369
1370 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1371 pte_t *ptep)
1372 {
1373 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1374 }
1375
1376 static inline void pmd_clear(pmd_t *pmdp)
1377 {
1378 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1379 }
1380 #else /* !CONFIG_X86_PAE */
1381 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1382 {
1383 set_pte(ptep, pte);
1384 }
1385
1386 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1387 pte_t *ptep)
1388 {
1389 set_pte_at(mm, addr, ptep, __pte(0));
1390 }
1391
1392 static inline void pmd_clear(pmd_t *pmdp)
1393 {
1394 set_pmd(pmdp, __pmd(0));
1395 }
1396 #endif /* CONFIG_X86_PAE */
1397
1398 /* Lazy mode for batching updates / context switch */
1399 enum paravirt_lazy_mode {
1400 PARAVIRT_LAZY_NONE,
1401 PARAVIRT_LAZY_MMU,
1402 PARAVIRT_LAZY_CPU,
1403 };
1404
1405 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1406 void paravirt_start_context_switch(struct task_struct *prev);
1407 void paravirt_end_context_switch(struct task_struct *next);
1408
1409 void paravirt_enter_lazy_mmu(void);
1410 void paravirt_leave_lazy_mmu(void);
1411
1412 #define __HAVE_ARCH_START_CONTEXT_SWITCH
1413 static inline void arch_start_context_switch(struct task_struct *prev)
1414 {
1415 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
1416 }
1417
1418 static inline void arch_end_context_switch(struct task_struct *next)
1419 {
1420 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
1421 }
1422
1423 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1424 static inline void arch_enter_lazy_mmu_mode(void)
1425 {
1426 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1427 }
1428
1429 static inline void arch_leave_lazy_mmu_mode(void)
1430 {
1431 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1432 }
1433
1434 void arch_flush_lazy_mmu_mode(void);
1435
1436 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1437 phys_addr_t phys, pgprot_t flags)
1438 {
1439 pv_mmu_ops.set_fixmap(idx, phys, flags);
1440 }
1441
1442 void _paravirt_nop(void);
1443 u32 _paravirt_ident_32(u32);
1444 u64 _paravirt_ident_64(u64);
1445
1446 #define paravirt_nop ((void *)_paravirt_nop)
1447
1448 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
1449
1450 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1451 {
1452 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1453 }
1454
1455 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1456 {
1457 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1458 }
1459 #define __raw_spin_is_contended __raw_spin_is_contended
1460
1461 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1462 {
1463 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1464 }
1465
1466 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
1467 unsigned long flags)
1468 {
1469 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
1470 }
1471
1472 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1473 {
1474 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1475 }
1476
1477 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1478 {
1479 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1480 }
1481
1482 #endif
1483
1484 /* These all sit in the .parainstructions section to tell us what to patch. */
1485 struct paravirt_patch_site {
1486 u8 *instr; /* original instructions */
1487 u8 instrtype; /* type of this instruction */
1488 u8 len; /* length of original instruction */
1489 u16 clobbers; /* what registers you may clobber */
1490 };
1491
1492 extern struct paravirt_patch_site __parainstructions[],
1493 __parainstructions_end[];
1494
1495 #ifdef CONFIG_X86_32
1496 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1497 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
1498
1499 /* save and restore all caller-save registers, except return value */
1500 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
1501 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
1502
1503 #define PV_FLAGS_ARG ""
1504 #define PV_EXTRA_CLOBBERS
1505 #define PV_VEXTRA_CLOBBERS
1506 #else
1507 /* save and restore all caller-save registers, except return value */
1508 #define PV_SAVE_ALL_CALLER_REGS \
1509 "push %rcx;" \
1510 "push %rdx;" \
1511 "push %rsi;" \
1512 "push %rdi;" \
1513 "push %r8;" \
1514 "push %r9;" \
1515 "push %r10;" \
1516 "push %r11;"
1517 #define PV_RESTORE_ALL_CALLER_REGS \
1518 "pop %r11;" \
1519 "pop %r10;" \
1520 "pop %r9;" \
1521 "pop %r8;" \
1522 "pop %rdi;" \
1523 "pop %rsi;" \
1524 "pop %rdx;" \
1525 "pop %rcx;"
1526
1527 /* We save some registers, but all of them, that's too much. We clobber all
1528 * caller saved registers but the argument parameter */
1529 #define PV_SAVE_REGS "pushq %%rdi;"
1530 #define PV_RESTORE_REGS "popq %%rdi;"
1531 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1532 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1533 #define PV_FLAGS_ARG "D"
1534 #endif
1535
1536 /*
1537 * Generate a thunk around a function which saves all caller-save
1538 * registers except for the return value. This allows C functions to
1539 * be called from assembler code where fewer than normal registers are
1540 * available. It may also help code generation around calls from C
1541 * code if the common case doesn't use many registers.
1542 *
1543 * When a callee is wrapped in a thunk, the caller can assume that all
1544 * arg regs and all scratch registers are preserved across the
1545 * call. The return value in rax/eax will not be saved, even for void
1546 * functions.
1547 */
1548 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
1549 extern typeof(func) __raw_callee_save_##func; \
1550 static void *__##func##__ __used = func; \
1551 \
1552 asm(".pushsection .text;" \
1553 "__raw_callee_save_" #func ": " \
1554 PV_SAVE_ALL_CALLER_REGS \
1555 "call " #func ";" \
1556 PV_RESTORE_ALL_CALLER_REGS \
1557 "ret;" \
1558 ".popsection")
1559
1560 /* Get a reference to a callee-save function */
1561 #define PV_CALLEE_SAVE(func) \
1562 ((struct paravirt_callee_save) { __raw_callee_save_##func })
1563
1564 /* Promise that "func" already uses the right calling convention */
1565 #define __PV_IS_CALLEE_SAVE(func) \
1566 ((struct paravirt_callee_save) { func })
1567
1568 static inline unsigned long __raw_local_save_flags(void)
1569 {
1570 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
1571 }
1572
1573 static inline void raw_local_irq_restore(unsigned long f)
1574 {
1575 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
1576 }
1577
1578 static inline void raw_local_irq_disable(void)
1579 {
1580 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
1581 }
1582
1583 static inline void raw_local_irq_enable(void)
1584 {
1585 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
1586 }
1587
1588 static inline unsigned long __raw_local_irq_save(void)
1589 {
1590 unsigned long f;
1591
1592 f = __raw_local_save_flags();
1593 raw_local_irq_disable();
1594 return f;
1595 }
1596
1597
1598 /* Make sure as little as possible of this mess escapes. */
1599 #undef PARAVIRT_CALL
1600 #undef __PVOP_CALL
1601 #undef __PVOP_VCALL
1602 #undef PVOP_VCALL0
1603 #undef PVOP_CALL0
1604 #undef PVOP_VCALL1
1605 #undef PVOP_CALL1
1606 #undef PVOP_VCALL2
1607 #undef PVOP_CALL2
1608 #undef PVOP_VCALL3
1609 #undef PVOP_CALL3
1610 #undef PVOP_VCALL4
1611 #undef PVOP_CALL4
1612
1613 #else /* __ASSEMBLY__ */
1614
1615 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1616 771:; \
1617 ops; \
1618 772:; \
1619 .pushsection .parainstructions,"a"; \
1620 .align algn; \
1621 word 771b; \
1622 .byte ptype; \
1623 .byte 772b-771b; \
1624 .short clobbers; \
1625 .popsection
1626
1627
1628 #define COND_PUSH(set, mask, reg) \
1629 .if ((~(set)) & mask); push %reg; .endif
1630 #define COND_POP(set, mask, reg) \
1631 .if ((~(set)) & mask); pop %reg; .endif
1632
1633 #ifdef CONFIG_X86_64
1634
1635 #define PV_SAVE_REGS(set) \
1636 COND_PUSH(set, CLBR_RAX, rax); \
1637 COND_PUSH(set, CLBR_RCX, rcx); \
1638 COND_PUSH(set, CLBR_RDX, rdx); \
1639 COND_PUSH(set, CLBR_RSI, rsi); \
1640 COND_PUSH(set, CLBR_RDI, rdi); \
1641 COND_PUSH(set, CLBR_R8, r8); \
1642 COND_PUSH(set, CLBR_R9, r9); \
1643 COND_PUSH(set, CLBR_R10, r10); \
1644 COND_PUSH(set, CLBR_R11, r11)
1645 #define PV_RESTORE_REGS(set) \
1646 COND_POP(set, CLBR_R11, r11); \
1647 COND_POP(set, CLBR_R10, r10); \
1648 COND_POP(set, CLBR_R9, r9); \
1649 COND_POP(set, CLBR_R8, r8); \
1650 COND_POP(set, CLBR_RDI, rdi); \
1651 COND_POP(set, CLBR_RSI, rsi); \
1652 COND_POP(set, CLBR_RDX, rdx); \
1653 COND_POP(set, CLBR_RCX, rcx); \
1654 COND_POP(set, CLBR_RAX, rax)
1655
1656 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1657 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1658 #define PARA_INDIRECT(addr) *addr(%rip)
1659 #else
1660 #define PV_SAVE_REGS(set) \
1661 COND_PUSH(set, CLBR_EAX, eax); \
1662 COND_PUSH(set, CLBR_EDI, edi); \
1663 COND_PUSH(set, CLBR_ECX, ecx); \
1664 COND_PUSH(set, CLBR_EDX, edx)
1665 #define PV_RESTORE_REGS(set) \
1666 COND_POP(set, CLBR_EDX, edx); \
1667 COND_POP(set, CLBR_ECX, ecx); \
1668 COND_POP(set, CLBR_EDI, edi); \
1669 COND_POP(set, CLBR_EAX, eax)
1670
1671 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1672 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1673 #define PARA_INDIRECT(addr) *%cs:addr
1674 #endif
1675
1676 #define INTERRUPT_RETURN \
1677 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1678 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1679
1680 #define DISABLE_INTERRUPTS(clobbers) \
1681 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1682 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1683 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1684 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1685
1686 #define ENABLE_INTERRUPTS(clobbers) \
1687 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1688 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1689 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1690 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1691
1692 #define USERGS_SYSRET32 \
1693 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1694 CLBR_NONE, \
1695 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1696
1697 #ifdef CONFIG_X86_32
1698 #define GET_CR0_INTO_EAX \
1699 push %ecx; push %edx; \
1700 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1701 pop %edx; pop %ecx
1702
1703 #define ENABLE_INTERRUPTS_SYSEXIT \
1704 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1705 CLBR_NONE, \
1706 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1707
1708
1709 #else /* !CONFIG_X86_32 */
1710
1711 /*
1712 * If swapgs is used while the userspace stack is still current,
1713 * there's no way to call a pvop. The PV replacement *must* be
1714 * inlined, or the swapgs instruction must be trapped and emulated.
1715 */
1716 #define SWAPGS_UNSAFE_STACK \
1717 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1718 swapgs)
1719
1720 /*
1721 * Note: swapgs is very special, and in practise is either going to be
1722 * implemented with a single "swapgs" instruction or something very
1723 * special. Either way, we don't need to save any registers for
1724 * it.
1725 */
1726 #define SWAPGS \
1727 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1728 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1729 )
1730
1731 #define GET_CR2_INTO_RCX \
1732 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1733 movq %rax, %rcx; \
1734 xorq %rax, %rax;
1735
1736 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1737 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1738 CLBR_NONE, \
1739 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1740
1741 #define USERGS_SYSRET64 \
1742 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1743 CLBR_NONE, \
1744 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1745
1746 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1747 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1748 CLBR_NONE, \
1749 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1750 #endif /* CONFIG_X86_32 */
1751
1752 #endif /* __ASSEMBLY__ */
1753 #endif /* CONFIG_PARAVIRT */
1754 #endif /* _ASM_X86_PARAVIRT_H */
1755
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