1 /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
2 *
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
4 *
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9 #include <asm/head.h>
10
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/smp_lock.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/init.h>
19 #include <linux/spinlock.h>
20 #include <linux/mm.h>
21 #include <linux/swap.h>
22 #include <linux/profile.h>
23
24 #include <asm/ptrace.h>
25 #include <asm/atomic.h>
26
27 #include <asm/delay.h>
28 #include <asm/irq.h>
29 #include <asm/page.h>
30 #include <asm/pgalloc.h>
31 #include <asm/pgtable.h>
32 #include <asm/oplib.h>
33 #include <asm/sbus.h>
34 #include <asm/sbi.h>
35 #include <asm/tlbflush.h>
36 #include <asm/cacheflush.h>
37 #include <asm/cpudata.h>
38
39 #define IRQ_CROSS_CALL 15
40
41 extern ctxd_t *srmmu_ctx_table_phys;
42
43 extern void calibrate_delay(void);
44
45 extern volatile int smp_processors_ready;
46 extern int smp_num_cpus;
47 static int smp_highest_cpu;
48 extern int smp_threads_ready;
49 extern volatile unsigned long cpu_callin_map[NR_CPUS];
50 extern struct cpuinfo_sparc cpu_data[NR_CPUS];
51 extern unsigned char boot_cpu_id;
52 extern int smp_activated;
53 extern volatile int __cpu_number_map[NR_CPUS];
54 extern volatile int __cpu_logical_map[NR_CPUS];
55 extern volatile unsigned long ipi_count;
56 extern volatile int smp_process_available;
57 extern volatile int smp_commenced;
58 extern int __smp4d_processor_id(void);
59
60 /* #define SMP_DEBUG */
61
62 #ifdef SMP_DEBUG
63 #define SMP_PRINTK(x) printk x
64 #else
65 #define SMP_PRINTK(x)
66 #endif
67
68 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
69 {
70 __asm__ __volatile__("swap [%1], %0\n\t" :
71 "=&r" (val), "=&r" (ptr) :
72 "" (val), "1" (ptr));
73 return val;
74 }
75
76 static void smp_setup_percpu_timer(void);
77 extern void cpu_probe(void);
78 extern void sun4d_distribute_irqs(void);
79
80 void __init smp4d_callin(void)
81 {
82 int cpuid = hard_smp4d_processor_id();
83 extern spinlock_t sun4d_imsk_lock;
84 unsigned long flags;
85
86 /* Show we are alive */
87 cpu_leds[cpuid] = 0x6;
88 show_leds(cpuid);
89
90 /* Enable level15 interrupt, disable level14 interrupt for now */
91 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
92
93 local_flush_cache_all();
94 local_flush_tlb_all();
95
96 /*
97 * Unblock the master CPU _only_ when the scheduler state
98 * of all secondary CPUs will be up-to-date, so after
99 * the SMP initialization the master will be just allowed
100 * to call the scheduler code.
101 */
102 /* Get our local ticker going. */
103 smp_setup_percpu_timer();
104
105 calibrate_delay();
106 smp_store_cpu_info(cpuid);
107 local_flush_cache_all();
108 local_flush_tlb_all();
109
110 /* Allow master to continue. */
111 swap((unsigned long *)&cpu_callin_map[cpuid], 1);
112 local_flush_cache_all();
113 local_flush_tlb_all();
114
115 cpu_probe();
116
117 while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
118 barrier();
119
120 while(current_set[cpuid]->cpu != cpuid)
121 barrier();
122
123 /* Fix idle thread fields. */
124 __asm__ __volatile__("ld [%0], %%g6\n\t"
125 : : "r" (¤t_set[cpuid])
126 : "memory" /* paranoid */);
127
128 cpu_leds[cpuid] = 0x9;
129 show_leds(cpuid);
130
131 /* Attach to the address space of init_task. */
132 atomic_inc(&init_mm.mm_count);
133 current->active_mm = &init_mm;
134
135 local_flush_cache_all();
136 local_flush_tlb_all();
137
138 local_irq_enable(); /* We don't allow PIL 14 yet */
139
140 while(!smp_commenced)
141 barrier();
142
143 spin_lock_irqsave(&sun4d_imsk_lock, flags);
144 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
145 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
146 }
147
148 extern void init_IRQ(void);
149 extern void cpu_panic(void);
150
151 /*
152 * Cycle through the processors asking the PROM to start each one.
153 */
154
155 extern struct linux_prom_registers smp_penguin_ctable;
156 extern unsigned long trapbase_cpu1[];
157 extern unsigned long trapbase_cpu2[];
158 extern unsigned long trapbase_cpu3[];
159
160 void __init smp4d_boot_cpus(void)
161 {
162 int cpucount = 0;
163 int i, mid;
164
165 printk("Entering SMP Mode...\n");
166
167 if (boot_cpu_id)
168 current_set[0] = NULL;
169
170 local_irq_enable();
171 cpus_clear(cpu_present_map);
172
173 /* XXX This whole thing has to go. See sparc64. */
174 for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
175 cpu_set(mid, cpu_present_map);
176 SMP_PRINTK(("cpu_present_map %08lx\n", cpus_addr(cpu_present_map)[0]));
177 for(i=0; i < NR_CPUS; i++)
178 __cpu_number_map[i] = -1;
179 for(i=0; i < NR_CPUS; i++)
180 __cpu_logical_map[i] = -1;
181 __cpu_number_map[boot_cpu_id] = 0;
182 __cpu_logical_map[0] = boot_cpu_id;
183 current_thread_info()->cpu = boot_cpu_id;
184 smp_store_cpu_info(boot_cpu_id);
185 smp_setup_percpu_timer();
186 local_flush_cache_all();
187 if (cpu_find_by_instance(1, NULL, NULL))
188 return; /* Not an MP box. */
189 SMP_PRINTK(("Iterating over CPUs\n"));
190 for(i = 0; i < NR_CPUS; i++) {
191 if(i == boot_cpu_id)
192 continue;
193
194 if (cpu_isset(i, cpu_present_map)) {
195 extern unsigned long sun4d_cpu_startup;
196 unsigned long *entry = &sun4d_cpu_startup;
197 struct task_struct *p;
198 int timeout;
199 int no;
200
201 /* Cook up an idler for this guy. */
202 p = fork_idle(i);
203 cpucount++;
204 current_set[i] = p->thread_info;
205 for (no = 0; !cpu_find_by_instance(no, NULL, &mid)
206 && mid != i; no++) ;
207
208 /*
209 * Initialize the contexts table
210 * Since the call to prom_startcpu() trashes the structure,
211 * we need to re-initialize it for each cpu
212 */
213 smp_penguin_ctable.which_io = 0;
214 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
215 smp_penguin_ctable.reg_size = 0;
216
217 /* whirrr, whirrr, whirrrrrrrrr... */
218 SMP_PRINTK(("Starting CPU %d at %p task %d node %08x\n", i, entry, cpucount, cpu_data(no).prom_node));
219 local_flush_cache_all();
220 prom_startcpu(cpu_data(no).prom_node,
221 &smp_penguin_ctable, 0, (char *)entry);
222
223 SMP_PRINTK(("prom_startcpu returned :)\n"));
224
225 /* wheee... it's going... */
226 for(timeout = 0; timeout < 10000; timeout++) {
227 if(cpu_callin_map[i])
228 break;
229 udelay(200);
230 }
231
232 if(cpu_callin_map[i]) {
233 /* Another "Red Snapper". */
234 __cpu_number_map[i] = cpucount;
235 __cpu_logical_map[cpucount] = i;
236 } else {
237 cpucount--;
238 printk("Processor %d is stuck.\n", i);
239 }
240 }
241 if(!(cpu_callin_map[i])) {
242 cpu_clear(i, cpu_present_map);
243 __cpu_number_map[i] = -1;
244 }
245 }
246 local_flush_cache_all();
247 if(cpucount == 0) {
248 printk("Error: only one Processor found.\n");
249 cpu_present_map = cpumask_of_cpu(hard_smp4d_processor_id());
250 } else {
251 unsigned long bogosum = 0;
252
253 for(i = 0; i < NR_CPUS; i++) {
254 if (cpu_isset(i, cpu_present_map)) {
255 bogosum += cpu_data(i).udelay_val;
256 smp_highest_cpu = i;
257 }
258 }
259 SMP_PRINTK(("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n", cpucount + 1, bogosum/(500000/HZ), (bogosum/(5000/HZ))%100));
260 printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
261 cpucount + 1,
262 bogosum/(500000/HZ),
263 (bogosum/(5000/HZ))%100);
264 smp_activated = 1;
265 smp_num_cpus = cpucount + 1;
266 }
267
268 /* Free unneeded trap tables */
269 ClearPageReserved(virt_to_page(trapbase_cpu1));
270 set_page_count(virt_to_page(trapbase_cpu1), 1);
271 free_page((unsigned long)trapbase_cpu1);
272 totalram_pages++;
273 num_physpages++;
274
275 ClearPageReserved(virt_to_page(trapbase_cpu2));
276 set_page_count(virt_to_page(trapbase_cpu2), 1);
277 free_page((unsigned long)trapbase_cpu2);
278 totalram_pages++;
279 num_physpages++;
280
281 ClearPageReserved(virt_to_page(trapbase_cpu3));
282 set_page_count(virt_to_page(trapbase_cpu3), 1);
283 free_page((unsigned long)trapbase_cpu3);
284 totalram_pages++;
285 num_physpages++;
286
287 /* Ok, they are spinning and ready to go. */
288 smp_processors_ready = 1;
289 sun4d_distribute_irqs();
290 }
291
292 static struct smp_funcall {
293 smpfunc_t func;
294 unsigned long arg1;
295 unsigned long arg2;
296 unsigned long arg3;
297 unsigned long arg4;
298 unsigned long arg5;
299 unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
300 unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
301 } ccall_info __attribute__((aligned(8)));
302
303 static DEFINE_SPINLOCK(cross_call_lock);
304
305 /* Cross calls must be serialized, at least currently. */
306 void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
307 unsigned long arg3, unsigned long arg4, unsigned long arg5)
308 {
309 if(smp_processors_ready) {
310 register int high = smp_highest_cpu;
311 unsigned long flags;
312
313 spin_lock_irqsave(&cross_call_lock, flags);
314
315 {
316 /* If you make changes here, make sure gcc generates proper code... */
317 register smpfunc_t f asm("i0") = func;
318 register unsigned long a1 asm("i1") = arg1;
319 register unsigned long a2 asm("i2") = arg2;
320 register unsigned long a3 asm("i3") = arg3;
321 register unsigned long a4 asm("i4") = arg4;
322 register unsigned long a5 asm("i5") = arg5;
323
324 __asm__ __volatile__(
325 "std %0, [%6]\n\t"
326 "std %2, [%6 + 8]\n\t"
327 "std %4, [%6 + 16]\n\t" : :
328 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
329 "r" (&ccall_info.func));
330 }
331
332 /* Init receive/complete mapping, plus fire the IPI's off. */
333 {
334 cpumask_t mask;
335 register int i;
336
337 mask = cpumask_of_cpu(hard_smp4d_processor_id());
338 cpus_andnot(mask, cpu_present_map, mask);
339 for(i = 0; i <= high; i++) {
340 if (cpu_isset(i, mask)) {
341 ccall_info.processors_in[i] = 0;
342 ccall_info.processors_out[i] = 0;
343 sun4d_send_ipi(i, IRQ_CROSS_CALL);
344 }
345 }
346 }
347
348 {
349 register int i;
350
351 i = 0;
352 do {
353 while(!ccall_info.processors_in[i])
354 barrier();
355 } while(++i <= high);
356
357 i = 0;
358 do {
359 while(!ccall_info.processors_out[i])
360 barrier();
361 } while(++i <= high);
362 }
363
364 spin_unlock_irqrestore(&cross_call_lock, flags);
365 }
366 }
367
368 /* Running cross calls. */
369 void smp4d_cross_call_irq(void)
370 {
371 int i = hard_smp4d_processor_id();
372
373 ccall_info.processors_in[i] = 1;
374 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
375 ccall_info.arg4, ccall_info.arg5);
376 ccall_info.processors_out[i] = 1;
377 }
378
379 static int smp4d_stop_cpu_sender;
380
381 static void smp4d_stop_cpu(void)
382 {
383 int me = hard_smp4d_processor_id();
384
385 if (me != smp4d_stop_cpu_sender)
386 while(1) barrier();
387 }
388
389 /* Cross calls, in order to work efficiently and atomically do all
390 * the message passing work themselves, only stopcpu and reschedule
391 * messages come through here.
392 */
393 void smp4d_message_pass(int target, int msg, unsigned long data, int wait)
394 {
395 int me = hard_smp4d_processor_id();
396
397 SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target, msg, data, wait));
398 if (msg == MSG_STOP_CPU && target == MSG_ALL_BUT_SELF) {
399 unsigned long flags;
400 static DEFINE_SPINLOCK(stop_cpu_lock);
401 spin_lock_irqsave(&stop_cpu_lock, flags);
402 smp4d_stop_cpu_sender = me;
403 smp4d_cross_call((smpfunc_t)smp4d_stop_cpu, 0, 0, 0, 0, 0);
404 spin_unlock_irqrestore(&stop_cpu_lock, flags);
405 }
406 printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg, target, me);
407 panic("Bogon SMP message pass.");
408 }
409
410 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
411 {
412 int cpu = hard_smp4d_processor_id();
413 static int cpu_tick[NR_CPUS];
414 static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
415
416 bw_get_prof_limit(cpu);
417 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
418
419 cpu_tick[cpu]++;
420 if (!(cpu_tick[cpu] & 15)) {
421 if (cpu_tick[cpu] == 0x60)
422 cpu_tick[cpu] = 0;
423 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
424 show_leds(cpu);
425 }
426
427 profile_tick(CPU_PROFILING, regs);
428
429 if(!--prof_counter(cpu)) {
430 int user = user_mode(regs);
431
432 irq_enter();
433 update_process_times(user);
434 irq_exit();
435
436 prof_counter(cpu) = prof_multiplier(cpu);
437 }
438 }
439
440 extern unsigned int lvl14_resolution;
441
442 static void __init smp_setup_percpu_timer(void)
443 {
444 int cpu = hard_smp4d_processor_id();
445
446 prof_counter(cpu) = prof_multiplier(cpu) = 1;
447 load_profile_irq(cpu, lvl14_resolution);
448 }
449
450 void __init smp4d_blackbox_id(unsigned *addr)
451 {
452 int rd = *addr & 0x3e000000;
453
454 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
455 addr[1] = 0x01000000; /* nop */
456 addr[2] = 0x01000000; /* nop */
457 }
458
459 void __init smp4d_blackbox_current(unsigned *addr)
460 {
461 int rd = *addr & 0x3e000000;
462
463 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
464 addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
465 addr[4] = 0x01000000; /* nop */
466 }
467
468 void __init sun4d_init_smp(void)
469 {
470 int i;
471 extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
472
473 /* Patch ipi15 trap table */
474 t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
475
476 /* And set btfixup... */
477 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
478 BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
479 BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
480 BTFIXUPSET_CALL(smp_message_pass, smp4d_message_pass, BTFIXUPCALL_NORM);
481 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
482
483 for (i = 0; i < NR_CPUS; i++) {
484 ccall_info.processors_in[i] = 1;
485 ccall_info.processors_out[i] = 1;
486 }
487 }
488
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