1 /*
2 * linux/arch/i386/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 */
9
10 /*
11 * 'Traps.c' handles hardware traps and faults after we have saved some
12 * state in 'asm.s'.
13 */
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
20 #include <linux/mm.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/utsname.h>
29 #include <linux/kprobes.h>
30
31 #ifdef CONFIG_EISA
32 #include <linux/ioport.h>
33 #include <linux/eisa.h>
34 #endif
35
36 #ifdef CONFIG_MCA
37 #include <linux/mca.h>
38 #endif
39
40 #include <asm/processor.h>
41 #include <asm/system.h>
42 #include <asm/uaccess.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/debugreg.h>
46 #include <asm/desc.h>
47 #include <asm/i387.h>
48 #include <asm/nmi.h>
49
50 #include <asm/smp.h>
51 #include <asm/arch_hooks.h>
52 #include <asm/kdebug.h>
53
54 #include <linux/irq.h>
55 #include <linux/module.h>
56
57 #include "mach_traps.h"
58
59 asmlinkage int system_call(void);
60
61 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
62 { 0, 0 }, { 0, 0 } };
63
64 /* Do we ignore FPU interrupts ? */
65 char ignore_fpu_irq = 0;
66
67 /*
68 * The IDT has to be page-aligned to simplify the Pentium
69 * F0 0F bug workaround.. We have a special link segment
70 * for this.
71 */
72 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
73
74 asmlinkage void divide_error(void);
75 asmlinkage void debug(void);
76 asmlinkage void nmi(void);
77 asmlinkage void int3(void);
78 asmlinkage void overflow(void);
79 asmlinkage void bounds(void);
80 asmlinkage void invalid_op(void);
81 asmlinkage void device_not_available(void);
82 asmlinkage void coprocessor_segment_overrun(void);
83 asmlinkage void invalid_TSS(void);
84 asmlinkage void segment_not_present(void);
85 asmlinkage void stack_segment(void);
86 asmlinkage void general_protection(void);
87 asmlinkage void page_fault(void);
88 asmlinkage void coprocessor_error(void);
89 asmlinkage void simd_coprocessor_error(void);
90 asmlinkage void alignment_check(void);
91 asmlinkage void spurious_interrupt_bug(void);
92 asmlinkage void machine_check(void);
93
94 static int kstack_depth_to_print = 24;
95 struct notifier_block *i386die_chain;
96 static DEFINE_SPINLOCK(die_notifier_lock);
97
98 int register_die_notifier(struct notifier_block *nb)
99 {
100 int err = 0;
101 unsigned long flags;
102 spin_lock_irqsave(&die_notifier_lock, flags);
103 err = notifier_chain_register(&i386die_chain, nb);
104 spin_unlock_irqrestore(&die_notifier_lock, flags);
105 return err;
106 }
107
108 static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
109 {
110 return p > (void *)tinfo &&
111 p < (void *)tinfo + THREAD_SIZE - 3;
112 }
113
114 static inline unsigned long print_context_stack(struct thread_info *tinfo,
115 unsigned long *stack, unsigned long ebp)
116 {
117 unsigned long addr;
118
119 #ifdef CONFIG_FRAME_POINTER
120 while (valid_stack_ptr(tinfo, (void *)ebp)) {
121 addr = *(unsigned long *)(ebp + 4);
122 printk(" [<%08lx>] ", addr);
123 print_symbol("%s", addr);
124 printk("\n");
125 ebp = *(unsigned long *)ebp;
126 }
127 #else
128 while (valid_stack_ptr(tinfo, stack)) {
129 addr = *stack++;
130 if (__kernel_text_address(addr)) {
131 printk(" [<%08lx>]", addr);
132 print_symbol(" %s", addr);
133 printk("\n");
134 }
135 }
136 #endif
137 return ebp;
138 }
139
140 void show_trace(struct task_struct *task, unsigned long * stack)
141 {
142 unsigned long ebp;
143
144 if (!task)
145 task = current;
146
147 if (task == current) {
148 /* Grab ebp right from our regs */
149 asm ("movl %%ebp, %0" : "=r" (ebp) : );
150 } else {
151 /* ebp is the last reg pushed by switch_to */
152 ebp = *(unsigned long *) task->thread.esp;
153 }
154
155 while (1) {
156 struct thread_info *context;
157 context = (struct thread_info *)
158 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
159 ebp = print_context_stack(context, stack, ebp);
160 stack = (unsigned long*)context->previous_esp;
161 if (!stack)
162 break;
163 printk(" =======================\n");
164 }
165 }
166
167 void show_stack(struct task_struct *task, unsigned long *esp)
168 {
169 unsigned long *stack;
170 int i;
171
172 if (esp == NULL) {
173 if (task)
174 esp = (unsigned long*)task->thread.esp;
175 else
176 esp = (unsigned long *)&esp;
177 }
178
179 stack = esp;
180 for(i = 0; i < kstack_depth_to_print; i++) {
181 if (kstack_end(stack))
182 break;
183 if (i && ((i % 8) == 0))
184 printk("\n ");
185 printk("%08lx ", *stack++);
186 }
187 printk("\nCall Trace:\n");
188 show_trace(task, esp);
189 }
190
191 /*
192 * The architecture-independent dump_stack generator
193 */
194 void dump_stack(void)
195 {
196 unsigned long stack;
197
198 show_trace(current, &stack);
199 }
200
201 EXPORT_SYMBOL(dump_stack);
202
203 void show_registers(struct pt_regs *regs)
204 {
205 int i;
206 int in_kernel = 1;
207 unsigned long esp;
208 unsigned short ss;
209
210 esp = (unsigned long) (®s->esp);
211 ss = __KERNEL_DS;
212 if (regs->xcs & 3) {
213 in_kernel = 0;
214 esp = regs->esp;
215 ss = regs->xss & 0xffff;
216 }
217 print_modules();
218 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
219 " (%s) \n",
220 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
221 print_tainted(), regs->eflags, system_utsname.release);
222 print_symbol("EIP is at %s\n", regs->eip);
223 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
224 regs->eax, regs->ebx, regs->ecx, regs->edx);
225 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
226 regs->esi, regs->edi, regs->ebp, esp);
227 printk("ds: %04x es: %04x ss: %04x\n",
228 regs->xds & 0xffff, regs->xes & 0xffff, ss);
229 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
230 current->comm, current->pid, current_thread_info(), current);
231 /*
232 * When in-kernel, we also print out the stack and code at the
233 * time of the fault..
234 */
235 if (in_kernel) {
236 u8 *eip;
237
238 printk("\nStack: ");
239 show_stack(NULL, (unsigned long*)esp);
240
241 printk("Code: ");
242
243 eip = (u8 *)regs->eip - 43;
244 for (i = 0; i < 64; i++, eip++) {
245 unsigned char c;
246
247 if (eip < (u8 *)PAGE_OFFSET || __get_user(c, eip)) {
248 printk(" Bad EIP value.");
249 break;
250 }
251 if (eip == (u8 *)regs->eip)
252 printk("<%02x> ", c);
253 else
254 printk("%02x ", c);
255 }
256 }
257 printk("\n");
258 }
259
260 static void handle_BUG(struct pt_regs *regs)
261 {
262 unsigned short ud2;
263 unsigned short line;
264 char *file;
265 char c;
266 unsigned long eip;
267
268 if (regs->xcs & 3)
269 goto no_bug; /* Not in kernel */
270
271 eip = regs->eip;
272
273 if (eip < PAGE_OFFSET)
274 goto no_bug;
275 if (__get_user(ud2, (unsigned short *)eip))
276 goto no_bug;
277 if (ud2 != 0x0b0f)
278 goto no_bug;
279 if (__get_user(line, (unsigned short *)(eip + 2)))
280 goto bug;
281 if (__get_user(file, (char **)(eip + 4)) ||
282 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
283 file = "<bad filename>";
284
285 printk("------------[ cut here ]------------\n");
286 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
287
288 no_bug:
289 return;
290
291 /* Here we know it was a BUG but file-n-line is unavailable */
292 bug:
293 printk("Kernel BUG\n");
294 }
295
296 void die(const char * str, struct pt_regs * regs, long err)
297 {
298 static struct {
299 spinlock_t lock;
300 u32 lock_owner;
301 int lock_owner_depth;
302 } die = {
303 .lock = SPIN_LOCK_UNLOCKED,
304 .lock_owner = -1,
305 .lock_owner_depth = 0
306 };
307 static int die_counter;
308
309 if (die.lock_owner != _smp_processor_id()) {
310 console_verbose();
311 spin_lock_irq(&die.lock);
312 die.lock_owner = smp_processor_id();
313 die.lock_owner_depth = 0;
314 bust_spinlocks(1);
315 }
316
317 if (++die.lock_owner_depth < 3) {
318 int nl = 0;
319 handle_BUG(regs);
320 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
321 #ifdef CONFIG_PREEMPT
322 printk("PREEMPT ");
323 nl = 1;
324 #endif
325 #ifdef CONFIG_SMP
326 printk("SMP ");
327 nl = 1;
328 #endif
329 #ifdef CONFIG_DEBUG_PAGEALLOC
330 printk("DEBUG_PAGEALLOC");
331 nl = 1;
332 #endif
333 if (nl)
334 printk("\n");
335 notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
336 show_registers(regs);
337 } else
338 printk(KERN_ERR "Recursive die() failure, output suppressed\n");
339
340 bust_spinlocks(0);
341 die.lock_owner = -1;
342 spin_unlock_irq(&die.lock);
343 if (in_interrupt())
344 panic("Fatal exception in interrupt");
345
346 if (panic_on_oops) {
347 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
348 set_current_state(TASK_UNINTERRUPTIBLE);
349 schedule_timeout(5 * HZ);
350 panic("Fatal exception");
351 }
352 do_exit(SIGSEGV);
353 }
354
355 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
356 {
357 if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
358 die(str, regs, err);
359 }
360
361 static void do_trap(int trapnr, int signr, char *str, int vm86,
362 struct pt_regs * regs, long error_code, siginfo_t *info)
363 {
364 if (regs->eflags & VM_MASK) {
365 if (vm86)
366 goto vm86_trap;
367 goto trap_signal;
368 }
369
370 if (!(regs->xcs & 3))
371 goto kernel_trap;
372
373 trap_signal: {
374 struct task_struct *tsk = current;
375 tsk->thread.error_code = error_code;
376 tsk->thread.trap_no = trapnr;
377 if (info)
378 force_sig_info(signr, info, tsk);
379 else
380 force_sig(signr, tsk);
381 return;
382 }
383
384 kernel_trap: {
385 if (!fixup_exception(regs))
386 die(str, regs, error_code);
387 return;
388 }
389
390 vm86_trap: {
391 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
392 if (ret) goto trap_signal;
393 return;
394 }
395 }
396
397 #define DO_ERROR(trapnr, signr, str, name) \
398 fastcall void do_##name(struct pt_regs * regs, long error_code) \
399 { \
400 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
401 == NOTIFY_STOP) \
402 return; \
403 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
404 }
405
406 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
407 fastcall void do_##name(struct pt_regs * regs, long error_code) \
408 { \
409 siginfo_t info; \
410 info.si_signo = signr; \
411 info.si_errno = 0; \
412 info.si_code = sicode; \
413 info.si_addr = (void __user *)siaddr; \
414 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
415 == NOTIFY_STOP) \
416 return; \
417 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
418 }
419
420 #define DO_VM86_ERROR(trapnr, signr, str, name) \
421 fastcall void do_##name(struct pt_regs * regs, long error_code) \
422 { \
423 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
424 == NOTIFY_STOP) \
425 return; \
426 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
427 }
428
429 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
430 fastcall void do_##name(struct pt_regs * regs, long error_code) \
431 { \
432 siginfo_t info; \
433 info.si_signo = signr; \
434 info.si_errno = 0; \
435 info.si_code = sicode; \
436 info.si_addr = (void __user *)siaddr; \
437 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
438 == NOTIFY_STOP) \
439 return; \
440 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
441 }
442
443 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
444 #ifndef CONFIG_KPROBES
445 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
446 #endif
447 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
448 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
449 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
450 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
451 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
452 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
453 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
454 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
455
456 fastcall void do_general_protection(struct pt_regs * regs, long error_code)
457 {
458 int cpu = get_cpu();
459 struct tss_struct *tss = &per_cpu(init_tss, cpu);
460 struct thread_struct *thread = ¤t->thread;
461
462 /*
463 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
464 * invalid offset set (the LAZY one) and the faulting thread has
465 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
466 * and we set the offset field correctly. Then we let the CPU to
467 * restart the faulting instruction.
468 */
469 if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
470 thread->io_bitmap_ptr) {
471 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
472 thread->io_bitmap_max);
473 /*
474 * If the previously set map was extending to higher ports
475 * than the current one, pad extra space with 0xff (no access).
476 */
477 if (thread->io_bitmap_max < tss->io_bitmap_max)
478 memset((char *) tss->io_bitmap +
479 thread->io_bitmap_max, 0xff,
480 tss->io_bitmap_max - thread->io_bitmap_max);
481 tss->io_bitmap_max = thread->io_bitmap_max;
482 tss->io_bitmap_base = IO_BITMAP_OFFSET;
483 put_cpu();
484 return;
485 }
486 put_cpu();
487
488 if (regs->eflags & VM_MASK)
489 goto gp_in_vm86;
490
491 if (!(regs->xcs & 3))
492 goto gp_in_kernel;
493
494 current->thread.error_code = error_code;
495 current->thread.trap_no = 13;
496 force_sig(SIGSEGV, current);
497 return;
498
499 gp_in_vm86:
500 local_irq_enable();
501 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
502 return;
503
504 gp_in_kernel:
505 if (!fixup_exception(regs)) {
506 if (notify_die(DIE_GPF, "general protection fault", regs,
507 error_code, 13, SIGSEGV) == NOTIFY_STOP)
508 return;
509 die("general protection fault", regs, error_code);
510 }
511 }
512
513 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
514 {
515 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
516 printk("You probably have a hardware problem with your RAM chips\n");
517
518 /* Clear and disable the memory parity error line. */
519 clear_mem_error(reason);
520 }
521
522 static void io_check_error(unsigned char reason, struct pt_regs * regs)
523 {
524 unsigned long i;
525
526 printk("NMI: IOCK error (debug interrupt?)\n");
527 show_registers(regs);
528
529 /* Re-enable the IOCK line, wait for a few seconds */
530 reason = (reason & 0xf) | 8;
531 outb(reason, 0x61);
532 i = 2000;
533 while (--i) udelay(1000);
534 reason &= ~8;
535 outb(reason, 0x61);
536 }
537
538 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
539 {
540 #ifdef CONFIG_MCA
541 /* Might actually be able to figure out what the guilty party
542 * is. */
543 if( MCA_bus ) {
544 mca_handle_nmi();
545 return;
546 }
547 #endif
548 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
549 reason, smp_processor_id());
550 printk("Dazed and confused, but trying to continue\n");
551 printk("Do you have a strange power saving mode enabled?\n");
552 }
553
554 static DEFINE_SPINLOCK(nmi_print_lock);
555
556 void die_nmi (struct pt_regs *regs, const char *msg)
557 {
558 spin_lock(&nmi_print_lock);
559 /*
560 * We are in trouble anyway, lets at least try
561 * to get a message out.
562 */
563 bust_spinlocks(1);
564 printk(msg);
565 printk(" on CPU%d, eip %08lx, registers:\n",
566 smp_processor_id(), regs->eip);
567 show_registers(regs);
568 printk("console shuts up ...\n");
569 console_silent();
570 spin_unlock(&nmi_print_lock);
571 bust_spinlocks(0);
572 do_exit(SIGSEGV);
573 }
574
575 static void default_do_nmi(struct pt_regs * regs)
576 {
577 unsigned char reason = 0;
578
579 /* Only the BSP gets external NMIs from the system. */
580 if (!smp_processor_id())
581 reason = get_nmi_reason();
582
583 if (!(reason & 0xc0)) {
584 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
585 == NOTIFY_STOP)
586 return;
587 #ifdef CONFIG_X86_LOCAL_APIC
588 /*
589 * Ok, so this is none of the documented NMI sources,
590 * so it must be the NMI watchdog.
591 */
592 if (nmi_watchdog) {
593 nmi_watchdog_tick(regs);
594 return;
595 }
596 #endif
597 unknown_nmi_error(reason, regs);
598 return;
599 }
600 if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
601 return;
602 if (reason & 0x80)
603 mem_parity_error(reason, regs);
604 if (reason & 0x40)
605 io_check_error(reason, regs);
606 /*
607 * Reassert NMI in case it became active meanwhile
608 * as it's edge-triggered.
609 */
610 reassert_nmi();
611 }
612
613 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
614 {
615 return 0;
616 }
617
618 static nmi_callback_t nmi_callback = dummy_nmi_callback;
619
620 fastcall void do_nmi(struct pt_regs * regs, long error_code)
621 {
622 int cpu;
623
624 nmi_enter();
625
626 cpu = smp_processor_id();
627 ++nmi_count(cpu);
628
629 if (!nmi_callback(regs, cpu))
630 default_do_nmi(regs);
631
632 nmi_exit();
633 }
634
635 void set_nmi_callback(nmi_callback_t callback)
636 {
637 nmi_callback = callback;
638 }
639
640 void unset_nmi_callback(void)
641 {
642 nmi_callback = dummy_nmi_callback;
643 }
644
645 #ifdef CONFIG_KPROBES
646 fastcall int do_int3(struct pt_regs *regs, long error_code)
647 {
648 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
649 == NOTIFY_STOP)
650 return 1;
651 /* This is an interrupt gate, because kprobes wants interrupts
652 disabled. Normal trap handlers don't. */
653 restore_interrupts(regs);
654 do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
655 return 0;
656 }
657 #endif
658
659 /*
660 * Our handling of the processor debug registers is non-trivial.
661 * We do not clear them on entry and exit from the kernel. Therefore
662 * it is possible to get a watchpoint trap here from inside the kernel.
663 * However, the code in ./ptrace.c has ensured that the user can
664 * only set watchpoints on userspace addresses. Therefore the in-kernel
665 * watchpoint trap can only occur in code which is reading/writing
666 * from user space. Such code must not hold kernel locks (since it
667 * can equally take a page fault), therefore it is safe to call
668 * force_sig_info even though that claims and releases locks.
669 *
670 * Code in ./signal.c ensures that the debug control register
671 * is restored before we deliver any signal, and therefore that
672 * user code runs with the correct debug control register even though
673 * we clear it here.
674 *
675 * Being careful here means that we don't have to be as careful in a
676 * lot of more complicated places (task switching can be a bit lazy
677 * about restoring all the debug state, and ptrace doesn't have to
678 * find every occurrence of the TF bit that could be saved away even
679 * by user code)
680 */
681 fastcall void do_debug(struct pt_regs * regs, long error_code)
682 {
683 unsigned int condition;
684 struct task_struct *tsk = current;
685
686 __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
687
688 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
689 SIGTRAP) == NOTIFY_STOP)
690 return;
691 /* It's safe to allow irq's after DR6 has been saved */
692 if (regs->eflags & X86_EFLAGS_IF)
693 local_irq_enable();
694
695 /* Mask out spurious debug traps due to lazy DR7 setting */
696 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
697 if (!tsk->thread.debugreg[7])
698 goto clear_dr7;
699 }
700
701 if (regs->eflags & VM_MASK)
702 goto debug_vm86;
703
704 /* Save debug status register where ptrace can see it */
705 tsk->thread.debugreg[6] = condition;
706
707 /*
708 * Single-stepping through TF: make sure we ignore any events in
709 * kernel space (but re-enable TF when returning to user mode).
710 * And if the event was due to a debugger (PT_DTRACE), clear the
711 * TF flag so that register information is correct.
712 */
713 if (condition & DR_STEP) {
714 /*
715 * We already checked v86 mode above, so we can
716 * check for kernel mode by just checking the CPL
717 * of CS.
718 */
719 if ((regs->xcs & 3) == 0)
720 goto clear_TF_reenable;
721
722 if (likely(tsk->ptrace & PT_DTRACE)) {
723 tsk->ptrace &= ~PT_DTRACE;
724 regs->eflags &= ~TF_MASK;
725 }
726 }
727
728 /* Ok, finally something we can handle */
729 send_sigtrap(tsk, regs, error_code);
730
731 /* Disable additional traps. They'll be re-enabled when
732 * the signal is delivered.
733 */
734 clear_dr7:
735 __asm__("movl %0,%%db7"
736 : /* no output */
737 : "r" (0));
738 return;
739
740 debug_vm86:
741 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
742 return;
743
744 clear_TF_reenable:
745 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
746 regs->eflags &= ~TF_MASK;
747 return;
748 }
749
750 /*
751 * Note that we play around with the 'TS' bit in an attempt to get
752 * the correct behaviour even in the presence of the asynchronous
753 * IRQ13 behaviour
754 */
755 void math_error(void __user *eip)
756 {
757 struct task_struct * task;
758 siginfo_t info;
759 unsigned short cwd, swd;
760
761 /*
762 * Save the info for the exception handler and clear the error.
763 */
764 task = current;
765 save_init_fpu(task);
766 task->thread.trap_no = 16;
767 task->thread.error_code = 0;
768 info.si_signo = SIGFPE;
769 info.si_errno = 0;
770 info.si_code = __SI_FAULT;
771 info.si_addr = eip;
772 /*
773 * (~cwd & swd) will mask out exceptions that are not set to unmasked
774 * status. 0x3f is the exception bits in these regs, 0x200 is the
775 * C1 reg you need in case of a stack fault, 0x040 is the stack
776 * fault bit. We should only be taking one exception at a time,
777 * so if this combination doesn't produce any single exception,
778 * then we have a bad program that isn't syncronizing its FPU usage
779 * and it will suffer the consequences since we won't be able to
780 * fully reproduce the context of the exception
781 */
782 cwd = get_fpu_cwd(task);
783 swd = get_fpu_swd(task);
784 switch (((~cwd) & swd & 0x3f) | (swd & 0x240)) {
785 case 0x000:
786 default:
787 break;
788 case 0x001: /* Invalid Op */
789 case 0x041: /* Stack Fault */
790 case 0x241: /* Stack Fault | Direction */
791 info.si_code = FPE_FLTINV;
792 /* Should we clear the SF or let user space do it ???? */
793 break;
794 case 0x002: /* Denormalize */
795 case 0x010: /* Underflow */
796 info.si_code = FPE_FLTUND;
797 break;
798 case 0x004: /* Zero Divide */
799 info.si_code = FPE_FLTDIV;
800 break;
801 case 0x008: /* Overflow */
802 info.si_code = FPE_FLTOVF;
803 break;
804 case 0x020: /* Precision */
805 info.si_code = FPE_FLTRES;
806 break;
807 }
808 force_sig_info(SIGFPE, &info, task);
809 }
810
811 fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
812 {
813 ignore_fpu_irq = 1;
814 math_error((void __user *)regs->eip);
815 }
816
817 void simd_math_error(void __user *eip)
818 {
819 struct task_struct * task;
820 siginfo_t info;
821 unsigned short mxcsr;
822
823 /*
824 * Save the info for the exception handler and clear the error.
825 */
826 task = current;
827 save_init_fpu(task);
828 task->thread.trap_no = 19;
829 task->thread.error_code = 0;
830 info.si_signo = SIGFPE;
831 info.si_errno = 0;
832 info.si_code = __SI_FAULT;
833 info.si_addr = eip;
834 /*
835 * The SIMD FPU exceptions are handled a little differently, as there
836 * is only a single status/control register. Thus, to determine which
837 * unmasked exception was caught we must mask the exception mask bits
838 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
839 */
840 mxcsr = get_fpu_mxcsr(task);
841 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
842 case 0x000:
843 default:
844 break;
845 case 0x001: /* Invalid Op */
846 info.si_code = FPE_FLTINV;
847 break;
848 case 0x002: /* Denormalize */
849 case 0x010: /* Underflow */
850 info.si_code = FPE_FLTUND;
851 break;
852 case 0x004: /* Zero Divide */
853 info.si_code = FPE_FLTDIV;
854 break;
855 case 0x008: /* Overflow */
856 info.si_code = FPE_FLTOVF;
857 break;
858 case 0x020: /* Precision */
859 info.si_code = FPE_FLTRES;
860 break;
861 }
862 force_sig_info(SIGFPE, &info, task);
863 }
864
865 fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
866 long error_code)
867 {
868 if (cpu_has_xmm) {
869 /* Handle SIMD FPU exceptions on PIII+ processors. */
870 ignore_fpu_irq = 1;
871 simd_math_error((void __user *)regs->eip);
872 } else {
873 /*
874 * Handle strange cache flush from user space exception
875 * in all other cases. This is undocumented behaviour.
876 */
877 if (regs->eflags & VM_MASK) {
878 handle_vm86_fault((struct kernel_vm86_regs *)regs,
879 error_code);
880 return;
881 }
882 die_if_kernel("cache flush denied", regs, error_code);
883 current->thread.trap_no = 19;
884 current->thread.error_code = error_code;
885 force_sig(SIGSEGV, current);
886 }
887 }
888
889 fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
890 long error_code)
891 {
892 #if 0
893 /* No need to warn about this any longer. */
894 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
895 #endif
896 }
897
898 /*
899 * 'math_state_restore()' saves the current math information in the
900 * old math state array, and gets the new ones from the current task
901 *
902 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
903 * Don't touch unless you *really* know how it works.
904 *
905 * Must be called with kernel preemption disabled (in this case,
906 * local interrupts are disabled at the call-site in entry.S).
907 */
908 asmlinkage void math_state_restore(struct pt_regs regs)
909 {
910 struct thread_info *thread = current_thread_info();
911 struct task_struct *tsk = thread->task;
912
913 clts(); /* Allow maths ops (or we recurse) */
914 if (!tsk_used_math(tsk))
915 init_fpu(tsk);
916 restore_fpu(tsk);
917 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
918 }
919
920 #ifndef CONFIG_MATH_EMULATION
921
922 asmlinkage void math_emulate(long arg)
923 {
924 printk("math-emulation not enabled and no coprocessor found.\n");
925 printk("killing %s.\n",current->comm);
926 force_sig(SIGFPE,current);
927 schedule();
928 }
929
930 #endif /* CONFIG_MATH_EMULATION */
931
932 #ifdef CONFIG_X86_F00F_BUG
933 void __init trap_init_f00f_bug(void)
934 {
935 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
936
937 /*
938 * Update the IDT descriptor and reload the IDT so that
939 * it uses the read-only mapped virtual address.
940 */
941 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
942 __asm__ __volatile__("lidt %0" : : "m" (idt_descr));
943 }
944 #endif
945
946 #define _set_gate(gate_addr,type,dpl,addr,seg) \
947 do { \
948 int __d0, __d1; \
949 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
950 "movw %4,%%dx\n\t" \
951 "movl %%eax,%0\n\t" \
952 "movl %%edx,%1" \
953 :"=m" (*((long *) (gate_addr))), \
954 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
955 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
956 "3" ((char *) (addr)),"2" ((seg) << 16)); \
957 } while (0)
958
959
960 /*
961 * This needs to use 'idt_table' rather than 'idt', and
962 * thus use the _nonmapped_ version of the IDT, as the
963 * Pentium F0 0F bugfix can have resulted in the mapped
964 * IDT being write-protected.
965 */
966 void set_intr_gate(unsigned int n, void *addr)
967 {
968 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
969 }
970
971 /*
972 * This routine sets up an interrupt gate at directory privilege level 3.
973 */
974 static inline void set_system_intr_gate(unsigned int n, void *addr)
975 {
976 _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
977 }
978
979 static void __init set_trap_gate(unsigned int n, void *addr)
980 {
981 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
982 }
983
984 static void __init set_system_gate(unsigned int n, void *addr)
985 {
986 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
987 }
988
989 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
990 {
991 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
992 }
993
994
995 void __init trap_init(void)
996 {
997 #ifdef CONFIG_EISA
998 void __iomem *p = ioremap(0x0FFFD9, 4);
999 if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1000 EISA_bus = 1;
1001 }
1002 iounmap(p);
1003 #endif
1004
1005 #ifdef CONFIG_X86_LOCAL_APIC
1006 init_apic_mappings();
1007 #endif
1008
1009 set_trap_gate(0,÷_error);
1010 set_intr_gate(1,&debug);
1011 set_intr_gate(2,&nmi);
1012 set_system_intr_gate(3, &int3); /* int3-5 can be called from all */
1013 set_system_gate(4,&overflow);
1014 set_system_gate(5,&bounds);
1015 set_trap_gate(6,&invalid_op);
1016 set_trap_gate(7,&device_not_available);
1017 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1018 set_trap_gate(9,&coprocessor_segment_overrun);
1019 set_trap_gate(10,&invalid_TSS);
1020 set_trap_gate(11,&segment_not_present);
1021 set_trap_gate(12,&stack_segment);
1022 set_trap_gate(13,&general_protection);
1023 set_intr_gate(14,&page_fault);
1024 set_trap_gate(15,&spurious_interrupt_bug);
1025 set_trap_gate(16,&coprocessor_error);
1026 set_trap_gate(17,&alignment_check);
1027 #ifdef CONFIG_X86_MCE
1028 set_trap_gate(18,&machine_check);
1029 #endif
1030 set_trap_gate(19,&simd_coprocessor_error);
1031
1032 set_system_gate(SYSCALL_VECTOR,&system_call);
1033
1034 /*
1035 * Should be a barrier for any external CPU state.
1036 */
1037 cpu_init();
1038
1039 trap_init_hook();
1040 }
1041
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