Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /* linux/arch/arm/plat-s3c24xx/pm.c
  2  *
  3  * Copyright (c) 2004,2006 Simtec Electronics
  4  *      Ben Dooks <ben@simtec.co.uk>
  5  *
  6  * S3C24XX Power Manager (Suspend-To-RAM) support
  7  *
  8  * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License as published by
 12  * the Free Software Foundation; either version 2 of the License, or
 13  * (at your option) any later version.
 14  *
 15  * This program is distributed in the hope that it will be useful,
 16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18  * GNU General Public License for more details.
 19  *
 20  * You should have received a copy of the GNU General Public License
 21  * along with this program; if not, write to the Free Software
 22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 23  *
 24  * Parts based on arch/arm/mach-pxa/pm.c
 25  *
 26  * Thanks to Dimitry Andric for debugging
 27 */
 28 
 29 #include <linux/init.h>
 30 #include <linux/suspend.h>
 31 #include <linux/errno.h>
 32 #include <linux/time.h>
 33 #include <linux/gpio.h>
 34 #include <linux/interrupt.h>
 35 #include <linux/serial_core.h>
 36 #include <linux/io.h>
 37 
 38 #include <plat/regs-serial.h>
 39 #include <mach/regs-clock.h>
 40 #include <mach/regs-gpio.h>
 41 #include <mach/regs-mem.h>
 42 #include <mach/regs-irq.h>
 43 
 44 #include <asm/mach/time.h>
 45 
 46 #include <plat/pm.h>
 47 
 48 #define PFX "s3c24xx-pm: "
 49 
 50 static struct sleep_save core_save[] = {
 51         SAVE_ITEM(S3C2410_LOCKTIME),
 52         SAVE_ITEM(S3C2410_CLKCON),
 53 
 54         /* we restore the timings here, with the proviso that the board
 55          * brings the system up in an slower, or equal frequency setting
 56          * to the original system.
 57          *
 58          * if we cannot guarantee this, then things are going to go very
 59          * wrong here, as we modify the refresh and both pll settings.
 60          */
 61 
 62         SAVE_ITEM(S3C2410_BWSCON),
 63         SAVE_ITEM(S3C2410_BANKCON0),
 64         SAVE_ITEM(S3C2410_BANKCON1),
 65         SAVE_ITEM(S3C2410_BANKCON2),
 66         SAVE_ITEM(S3C2410_BANKCON3),
 67         SAVE_ITEM(S3C2410_BANKCON4),
 68         SAVE_ITEM(S3C2410_BANKCON5),
 69 
 70 #ifndef CONFIG_CPU_FREQ
 71         SAVE_ITEM(S3C2410_CLKDIVN),
 72         SAVE_ITEM(S3C2410_MPLLCON),
 73         SAVE_ITEM(S3C2410_REFRESH),
 74 #endif
 75         SAVE_ITEM(S3C2410_UPLLCON),
 76         SAVE_ITEM(S3C2410_CLKSLOW),
 77 };
 78 
 79 static struct sleep_save misc_save[] = {
 80         SAVE_ITEM(S3C2410_DCLKCON),
 81 };
 82 
 83 /* s3c_pm_check_resume_pin
 84  *
 85  * check to see if the pin is configured correctly for sleep mode, and
 86  * make any necessary adjustments if it is not
 87 */
 88 
 89 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
 90 {
 91         unsigned long irqstate;
 92         unsigned long pinstate;
 93         int irq = s3c2410_gpio_getirq(pin);
 94 
 95         if (irqoffs < 4)
 96                 irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
 97         else
 98                 irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
 99 
100         pinstate = s3c2410_gpio_getcfg(pin);
101 
102         if (!irqstate) {
103                 if (pinstate == S3C2410_GPIO_IRQ)
104                         S3C_PMDBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin);
105         } else {
106                 if (pinstate == S3C2410_GPIO_IRQ) {
107                         S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin);
108                         s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
109                 }
110         }
111 }
112 
113 /* s3c_pm_configure_extint
114  *
115  * configure all external interrupt pins
116 */
117 
118 void s3c_pm_configure_extint(void)
119 {
120         int pin;
121 
122         /* for each of the external interrupts (EINT0..EINT15) we
123          * need to check wether it is an external interrupt source,
124          * and then configure it as an input if it is not
125         */
126 
127         for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) {
128                 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0));
129         }
130 
131         for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) {
132                 s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8);
133         }
134 }
135 
136 
137 void s3c_pm_restore_core(void)
138 {
139         s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
140         s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
141 }
142 
143 void s3c_pm_save_core(void)
144 {
145         s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
146         s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
147 }
148 
149 
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