1 /* arch/arm/plat-s3c/include/plat/dma.h
2 *
3 * Copyright (C) 2003,2004,2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C DMA support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 enum s3c2410_dma_buffresult {
14 S3C2410_RES_OK,
15 S3C2410_RES_ERR,
16 S3C2410_RES_ABORT
17 };
18
19 enum s3c2410_dmasrc {
20 S3C2410_DMASRC_HW, /* source is memory */
21 S3C2410_DMASRC_MEM /* source is hardware */
22 };
23
24 /* enum s3c2410_chan_op
25 *
26 * operation codes passed to the DMA code by the user, and also used
27 * to inform the current channel owner of any changes to the system state
28 */
29
30 enum s3c2410_chan_op {
31 S3C2410_DMAOP_START,
32 S3C2410_DMAOP_STOP,
33 S3C2410_DMAOP_PAUSE,
34 S3C2410_DMAOP_RESUME,
35 S3C2410_DMAOP_FLUSH,
36 S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
37 S3C2410_DMAOP_STARTED, /* indicate channel started */
38 };
39
40 struct s3c2410_dma_client {
41 char *name;
42 };
43
44 struct s3c2410_dma_chan;
45
46 /* s3c2410_dma_cbfn_t
47 *
48 * buffer callback routine type
49 */
50
51 typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
52 void *buf, int size,
53 enum s3c2410_dma_buffresult result);
54
55 typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
56 enum s3c2410_chan_op );
57
58
59
60 /* s3c2410_dma_request
61 *
62 * request a dma channel exclusivley
63 */
64
65 extern int s3c2410_dma_request(unsigned int channel,
66 struct s3c2410_dma_client *, void *dev);
67
68
69 /* s3c2410_dma_ctrl
70 *
71 * change the state of the dma channel
72 */
73
74 extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
75
76 /* s3c2410_dma_setflags
77 *
78 * set the channel's flags to a given state
79 */
80
81 extern int s3c2410_dma_setflags(unsigned int channel,
82 unsigned int flags);
83
84 /* s3c2410_dma_free
85 *
86 * free the dma channel (will also abort any outstanding operations)
87 */
88
89 extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
90
91 /* s3c2410_dma_enqueue
92 *
93 * place the given buffer onto the queue of operations for the channel.
94 * The buffer must be allocated from dma coherent memory, or the Dcache/WB
95 * drained before the buffer is given to the DMA system.
96 */
97
98 extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
99 dma_addr_t data, int size);
100
101 /* s3c2410_dma_config
102 *
103 * configure the dma channel
104 */
105
106 extern int s3c2410_dma_config(unsigned int channel, int xferunit);
107
108 /* s3c2410_dma_devconfig
109 *
110 * configure the device we're talking to
111 */
112
113 extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
114 unsigned long devaddr);
115
116 /* s3c2410_dma_getposition
117 *
118 * get the position that the dma transfer is currently at
119 */
120
121 extern int s3c2410_dma_getposition(unsigned int channel,
122 dma_addr_t *src, dma_addr_t *dest);
123
124 extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
125 extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
126
127
128
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