1 /*
2 * linux/arch/arm/mach-sa1100/badge4.c
3 *
4 * BadgePAD 4 specific initialization
5 *
6 * Tim Connors <connors@hpl.hp.com>
7 * Christopher Hoover <ch@hpl.hp.com>
8 *
9 * Copyright (C) 2002 Hewlett-Packard Company
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/delay.h>
21 #include <linux/tty.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/errno.h>
25
26 #include <mach/hardware.h>
27 #include <asm/mach-types.h>
28 #include <asm/setup.h>
29 #include <mach/irqs.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/flash.h>
33 #include <asm/mach/map.h>
34 #include <asm/hardware/sa1111.h>
35 #include <asm/mach/serial_sa1100.h>
36
37 #include <mach/badge4.h>
38
39 #include "generic.h"
40
41 static struct resource sa1111_resources[] = {
42 [0] = {
43 .start = BADGE4_SA1111_BASE,
44 .end = BADGE4_SA1111_BASE + 0x00001fff,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = BADGE4_IRQ_GPIO_SA1111,
49 .end = BADGE4_IRQ_GPIO_SA1111,
50 .flags = IORESOURCE_IRQ,
51 },
52 };
53
54 static u64 sa1111_dmamask = 0xffffffffUL;
55
56 static struct platform_device sa1111_device = {
57 .name = "sa1111",
58 .id = 0,
59 .dev = {
60 .dma_mask = &sa1111_dmamask,
61 .coherent_dma_mask = 0xffffffff,
62 },
63 .num_resources = ARRAY_SIZE(sa1111_resources),
64 .resource = sa1111_resources,
65 };
66
67 static struct platform_device *devices[] __initdata = {
68 &sa1111_device,
69 };
70
71 static int __init badge4_sa1111_init(void)
72 {
73 /*
74 * Ensure that the memory bus request/grant signals are setup,
75 * and the grant is held in its inactive state
76 */
77 sa1110_mb_disable();
78
79 /*
80 * Probe for SA1111.
81 */
82 return platform_add_devices(devices, ARRAY_SIZE(devices));
83 }
84
85
86 /*
87 * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
88 * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
89 * Sixty-three 32 KiW Main Blocks (4032 Ki b)
90 *
91 * <or>
92 *
93 * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
94 * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
95 * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
96 */
97 static struct mtd_partition badge4_partitions[] = {
98 {
99 .name = "BLOB boot loader",
100 .offset = 0,
101 .size = 0x0000A000
102 }, {
103 .name = "params",
104 .offset = MTDPART_OFS_APPEND,
105 .size = 0x00006000
106 }, {
107 .name = "root",
108 .offset = MTDPART_OFS_APPEND,
109 .size = MTDPART_SIZ_FULL
110 }
111 };
112
113 static struct flash_platform_data badge4_flash_data = {
114 .map_name = "cfi_probe",
115 .parts = badge4_partitions,
116 .nr_parts = ARRAY_SIZE(badge4_partitions),
117 };
118
119 static struct resource badge4_flash_resource = {
120 .start = SA1100_CS0_PHYS,
121 .end = SA1100_CS0_PHYS + SZ_64M - 1,
122 .flags = IORESOURCE_MEM,
123 };
124
125 static int five_v_on __initdata = 0;
126
127 static int __init five_v_on_setup(char *ignore)
128 {
129 five_v_on = 1;
130 return 1;
131 }
132 __setup("five_v_on", five_v_on_setup);
133
134
135 static int __init badge4_init(void)
136 {
137 int ret;
138
139 if (!machine_is_badge4())
140 return -ENODEV;
141
142 /* LCD */
143 GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
144 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
145 BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
146 BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
147 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
148 BADGE4_GPIO_GPC_VID);
149 GPDR &= ~BADGE4_GPIO_INT_VID;
150 GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
151 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
152 BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
153 BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
154 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
155 BADGE4_GPIO_GPC_VID);
156
157 /* SDRAM SPD i2c */
158 GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
159 GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
160
161 /* uart */
162 GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
163 GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
164
165 /* CPLD muxsel0 input for mux/adc chip select */
166 GPCR = BADGE4_GPIO_MUXSEL0;
167 GPDR |= BADGE4_GPIO_MUXSEL0;
168
169 /* test points: J5, J6 as inputs, J7 outputs */
170 GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
171 GPCR = BADGE4_GPIO_TESTPT_J7;
172 GPDR |= BADGE4_GPIO_TESTPT_J7;
173
174 /* 5V supply rail. */
175 GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
176 GPDR |= BADGE4_GPIO_PCMEN5V;
177
178 /* CPLD sdram type inputs; set up by blob */
179 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
180 printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
181 !!(GPLR & BADGE4_GPIO_SDTYP1),
182 !!(GPLR & BADGE4_GPIO_SDTYP0));
183
184 /* SA1111 reset pin; set up by blob */
185 //GPSR = BADGE4_GPIO_SA1111_NRST;
186 //GPDR |= BADGE4_GPIO_SA1111_NRST;
187
188
189 /* power management cruft */
190 PGSR = 0;
191 PWER = 0;
192 PCFR = 0;
193 PSDR = 0;
194
195 PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
196 PWER |= PWER_RTC; /* wake up if rtc fires */
197
198 /* drive sa1111_nrst during sleep */
199 PGSR |= BADGE4_GPIO_SA1111_NRST;
200 /* drive CPLD as is during sleep */
201 PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
202
203
204 /* Now bring up the SA-1111. */
205 ret = badge4_sa1111_init();
206 if (ret < 0)
207 printk(KERN_ERR
208 "%s: SA-1111 initialization failed (%d)\n",
209 __func__, ret);
210
211
212 /* maybe turn on 5v0 from the start */
213 badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
214
215 sa11x0_set_flash_data(&badge4_flash_data, &badge4_flash_resource, 1);
216
217 return 0;
218 }
219
220 arch_initcall(badge4_init);
221
222
223 static unsigned badge4_5V_bitmap = 0;
224
225 void badge4_set_5V(unsigned subsystem, int on)
226 {
227 unsigned long flags;
228 unsigned old_5V_bitmap;
229
230 local_irq_save(flags);
231
232 old_5V_bitmap = badge4_5V_bitmap;
233
234 if (on) {
235 badge4_5V_bitmap |= subsystem;
236 } else {
237 badge4_5V_bitmap &= ~subsystem;
238 }
239
240 /* detect on->off and off->on transitions */
241 if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
242 /* was off, now on */
243 printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
244 GPSR = BADGE4_GPIO_PCMEN5V;
245 } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
246 /* was on, now off */
247 printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
248 GPCR = BADGE4_GPIO_PCMEN5V;
249 }
250
251 local_irq_restore(flags);
252 }
253 EXPORT_SYMBOL(badge4_set_5V);
254
255
256 static struct map_desc badge4_io_desc[] __initdata = {
257 { /* SRAM bank 1 */
258 .virtual = 0xf1000000,
259 .pfn = __phys_to_pfn(0x08000000),
260 .length = 0x00100000,
261 .type = MT_DEVICE
262 }, { /* SRAM bank 2 */
263 .virtual = 0xf2000000,
264 .pfn = __phys_to_pfn(0x10000000),
265 .length = 0x00100000,
266 .type = MT_DEVICE
267 }, { /* SA-1111 */
268 .virtual = 0xf4000000,
269 .pfn = __phys_to_pfn(0x48000000),
270 .length = 0x00100000,
271 .type = MT_DEVICE
272 }
273 };
274
275 static void
276 badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
277 {
278 if (!state) {
279 Ser1SDCR0 |= SDCR0_UART;
280 }
281 }
282
283 static struct sa1100_port_fns badge4_port_fns __initdata = {
284 //.get_mctrl = badge4_get_mctrl,
285 //.set_mctrl = badge4_set_mctrl,
286 .pm = badge4_uart_pm,
287 };
288
289 static void __init badge4_map_io(void)
290 {
291 sa1100_map_io();
292 iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
293
294 sa1100_register_uart_fns(&badge4_port_fns);
295 sa1100_register_uart(0, 3);
296 sa1100_register_uart(1, 1);
297 }
298
299 MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
300 .phys_io = 0x80000000,
301 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
302 .boot_params = 0xc0000100,
303 .map_io = badge4_map_io,
304 .init_irq = sa1100_init_irq,
305 .timer = &sa1100_timer,
306 MACHINE_END
307
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