1 /*
2 * arch/arm/mach-pnx4008/time.c
3 *
4 * PNX4008 Timers
5 *
6 * Authors: Vitaly Wool, Dmitry Chigirev, Grigory Tolstolytkin <source@mvista.com>
7 *
8 * 2005 (c) MontaVista Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
18 #include <linux/sched.h>
19 #include <linux/spinlock.h>
20 #include <linux/module.h>
21 #include <linux/kallsyms.h>
22 #include <linux/time.h>
23 #include <linux/timex.h>
24 #include <linux/irq.h>
25 #include <linux/io.h>
26
27 #include <asm/system.h>
28 #include <mach/hardware.h>
29 #include <asm/leds.h>
30 #include <asm/mach/time.h>
31 #include <asm/errno.h>
32
33 /*! Note: all timers are UPCOUNTING */
34
35 /*!
36 * Returns number of us since last clock interrupt. Note that interrupts
37 * will have been disabled by do_gettimeoffset()
38 */
39 static unsigned long pnx4008_gettimeoffset(void)
40 {
41 u32 ticks_to_match =
42 __raw_readl(HSTIM_MATCH0) - __raw_readl(HSTIM_COUNTER);
43 u32 elapsed = LATCH - ticks_to_match;
44 return (elapsed * (tick_nsec / 1000)) / LATCH;
45 }
46
47 /*!
48 * IRQ handler for the timer
49 */
50 static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id)
51 {
52 if (__raw_readl(HSTIM_INT) & MATCH0_INT) {
53
54 do {
55 timer_tick();
56
57 /*
58 * this algorithm takes care of possible delay
59 * for this interrupt handling longer than a normal
60 * timer period
61 */
62 __raw_writel(__raw_readl(HSTIM_MATCH0) + LATCH,
63 HSTIM_MATCH0);
64 __raw_writel(MATCH0_INT, HSTIM_INT); /* clear interrupt */
65
66 /*
67 * The goal is to keep incrementing HSTIM_MATCH0
68 * register until HSTIM_MATCH0 indicates time after
69 * what HSTIM_COUNTER indicates.
70 */
71 } while ((signed)
72 (__raw_readl(HSTIM_MATCH0) -
73 __raw_readl(HSTIM_COUNTER)) < 0);
74 }
75
76 return IRQ_HANDLED;
77 }
78
79 static struct irqaction pnx4008_timer_irq = {
80 .name = "PNX4008 Tick Timer",
81 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
82 .handler = pnx4008_timer_interrupt
83 };
84
85 /*!
86 * Set up timer and timer interrupt.
87 */
88 static __init void pnx4008_setup_timer(void)
89 {
90 __raw_writel(RESET_COUNT, MSTIM_CTRL);
91 while (__raw_readl(MSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */
92 __raw_writel(0, MSTIM_CTRL); /* stop the timer */
93 __raw_writel(0, MSTIM_MCTRL);
94
95 __raw_writel(RESET_COUNT, HSTIM_CTRL);
96 while (__raw_readl(HSTIM_COUNTER)) ; /* wait for reset to complete. 100% guarantee event */
97 __raw_writel(0, HSTIM_CTRL);
98 __raw_writel(0, HSTIM_MCTRL);
99 __raw_writel(0, HSTIM_CCR);
100 __raw_writel(12, HSTIM_PMATCH); /* scale down to 1 MHZ */
101 __raw_writel(LATCH, HSTIM_MATCH0);
102 __raw_writel(MR0_INT, HSTIM_MCTRL);
103
104 setup_irq(HSTIMER_INT, &pnx4008_timer_irq);
105
106 __raw_writel(COUNT_ENAB | DEBUG_EN, HSTIM_CTRL); /*start timer, stop when JTAG active */
107 }
108
109 /* Timer Clock Control in PM register */
110 #define TIMCLK_CTRL_REG IO_ADDRESS((PNX4008_PWRMAN_BASE + 0xBC))
111 #define WATCHDOG_CLK_EN 1
112 #define TIMER_CLK_EN 2 /* HS and MS timers? */
113
114 static u32 timclk_ctrl_reg_save;
115
116 void pnx4008_timer_suspend(void)
117 {
118 timclk_ctrl_reg_save = __raw_readl(TIMCLK_CTRL_REG);
119 __raw_writel(0, TIMCLK_CTRL_REG); /* disable timers */
120 }
121
122 void pnx4008_timer_resume(void)
123 {
124 __raw_writel(timclk_ctrl_reg_save, TIMCLK_CTRL_REG); /* enable timers */
125 }
126
127 struct sys_timer pnx4008_timer = {
128 .init = pnx4008_setup_timer,
129 .offset = pnx4008_gettimeoffset,
130 .suspend = pnx4008_timer_suspend,
131 .resume = pnx4008_timer_resume,
132 };
133
134
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