1 /*
2 * arch/arm/mach-kirkwood/irq.c
3 *
4 * Kirkwood IRQ handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/io.h>
15 #include <mach/bridge-regs.h>
16 #include <plat/irq.h>
17 #include <asm/gpio.h>
18 #include "common.h"
19
20 static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
21 {
22 BUG_ON(irq < IRQ_KIRKWOOD_GPIO_LOW_0_7);
23 BUG_ON(irq > IRQ_KIRKWOOD_GPIO_HIGH_16_23);
24
25 orion_gpio_irq_handler((irq - IRQ_KIRKWOOD_GPIO_LOW_0_7) << 3);
26 }
27
28 void __init kirkwood_init_irq(void)
29 {
30 int i;
31
32 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
33 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
34
35 /*
36 * Mask and clear GPIO IRQ interrupts.
37 */
38 writel(0, GPIO_LEVEL_MASK(0));
39 writel(0, GPIO_EDGE_MASK(0));
40 writel(0, GPIO_EDGE_CAUSE(0));
41 writel(0, GPIO_LEVEL_MASK(32));
42 writel(0, GPIO_EDGE_MASK(32));
43 writel(0, GPIO_EDGE_CAUSE(32));
44
45 for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) {
46 set_irq_chip(i, &orion_gpio_irq_chip);
47 set_irq_handler(i, handle_level_irq);
48 irq_desc[i].status |= IRQ_LEVEL;
49 set_irq_flags(i, IRQF_VALID);
50 }
51 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
52 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
53 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
54 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
55 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
56 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
57 set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
58 }
59
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