Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

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Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]
  1 /*
  2  * Utility to set the DAVINCI MUX register from a table in mux.h
  3  *
  4  * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
  5  *
  6  * Based on linux/arch/arm/plat-omap/mux.c:
  7  * Copyright (C) 2003 - 2005 Nokia Corporation
  8  *
  9  * Written by Tony Lindgren
 10  *
 11  * 2007 (c) MontaVista Software, Inc. This file is licensed under
 12  * the terms of the GNU General Public License version 2. This program
 13  * is licensed "as is" without any warranty of any kind, whether express
 14  * or implied.
 15  *
 16  * Copyright (C) 2008 Texas Instruments.
 17  */
 18 #include <linux/io.h>
 19 #include <linux/module.h>
 20 #include <linux/spinlock.h>
 21 
 22 #include <mach/hardware.h>
 23 #include <mach/mux.h>
 24 #include <mach/common.h>
 25 
 26 /*
 27  * Sets the DAVINCI MUX register based on the table
 28  */
 29 int __init_or_module davinci_cfg_reg(const unsigned long index)
 30 {
 31         static DEFINE_SPINLOCK(mux_spin_lock);
 32         struct davinci_soc_info *soc_info = &davinci_soc_info;
 33         void __iomem *base = soc_info->pinmux_base;
 34         unsigned long flags;
 35         const struct mux_config *cfg;
 36         unsigned int reg_orig = 0, reg = 0;
 37         unsigned int mask, warn = 0;
 38 
 39         if (!soc_info->pinmux_pins)
 40                 BUG();
 41 
 42         if (index >= soc_info->pinmux_pins_num) {
 43                 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
 44                        index, soc_info->pinmux_pins_num);
 45                 dump_stack();
 46                 return -ENODEV;
 47         }
 48 
 49         cfg = &soc_info->pinmux_pins[index];
 50 
 51         if (cfg->name == NULL) {
 52                 printk(KERN_ERR "No entry for the specified index\n");
 53                 return -ENODEV;
 54         }
 55 
 56         /* Update the mux register in question */
 57         if (cfg->mask) {
 58                 unsigned        tmp1, tmp2;
 59 
 60                 spin_lock_irqsave(&mux_spin_lock, flags);
 61                 reg_orig = __raw_readl(base + cfg->mux_reg);
 62 
 63                 mask = (cfg->mask << cfg->mask_offset);
 64                 tmp1 = reg_orig & mask;
 65                 reg = reg_orig & ~mask;
 66 
 67                 tmp2 = (cfg->mode << cfg->mask_offset);
 68                 reg |= tmp2;
 69 
 70                 if (tmp1 != tmp2)
 71                         warn = 1;
 72 
 73                 __raw_writel(reg, base + cfg->mux_reg);
 74                 spin_unlock_irqrestore(&mux_spin_lock, flags);
 75         }
 76 
 77         if (warn) {
 78 #ifdef CONFIG_DAVINCI_MUX_WARNINGS
 79                 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
 80 #endif
 81         }
 82 
 83 #ifdef CONFIG_DAVINCI_MUX_DEBUG
 84         if (cfg->debug || warn) {
 85                 printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
 86                 printk(KERN_WARNING "      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 87                        cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
 88         }
 89 #endif
 90 
 91         return 0;
 92 }
 93 EXPORT_SYMBOL(davinci_cfg_reg);
 94 
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