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6 comment @ * @;
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9 1.16
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88
89
90 desc
91 @@
92
93
94 1.16
95 log
96 @*** empty log message ***
97 @
98 text
99 @/*
100 * hrt_dev.c
101 *
102
103 WARNING:
104 -------
105 The current version of this code is incomplete. Only the device
106 probing and initialization code is believed to be correct.
107
108 This is a bare-bones device driver for the PixelSmart512-8 (greyscale)
109 and Video Gala (color) framegrabbers. For more information on these
110 devices, see http://www.pixelsmart.com.
111
112 Unlike earlier drivers for these cards from FSU, this driver does *not*
113 attempt to support the Video4Linux (V4L) API, nor does it use the generic
114 Linux I2C support code.
115
116 We have intentionally removed all dependencies of V4L, because:
117
118 (1) This board is so basic that most of the V4L API (e.g.,
119 tuning, audio) is not applicable..
120 (2) At this time, the V4L API seems sufficiently unstable to cause
121 us worries about backward and forward compatibility.
122 That is, we don't want to have to worry about differences in V4L
123 headers and kernel modules breaking this driver.
124 (3) Users of this card for embedded applications do not want to
125 waste kernel memory for the V4L code if they are not using it.
126 (4) We don't know of any demand for using these cards with
127 existing V4L applications.
128
129 We have intentionally removed all dependecies on the Linux generic I2C
130 core (i2c.h and i2c-dev.h) because:
131
132 (1) The Linux generic i2c support code added both logical
133 complexity and code size, and did not work reliably for this card.
134 (2) The Linux I2C core has changed enough over time, and we expect it
135 will change further. We don't want to have to worry about such
136 differences between versions breking this driver.
137 (3) this card has enough idiosyncracies that there is very little potential
138 reuse of code between this I2C bus and other I2C applications.
139 (4) Users of this card for embedded applications do not want to
140 waste kernel memory for the extra code.
141
142 -----------------------------------------
143
144 This version does only supports blocking reads.
145 I deleted the support for streaming, because it needs to be done
146 differently for single-ported and dual-ported cards,
147 and I did not have time to work out the best way to allow for
148 both cases within one framework.
149
150 Blocking read operation:
151
152 1. Initiate digitization, and start the timer/handler if necessary.
153 2. Wait for a frame to become available and frozen.
154 3. Copy frame to user memory.
155
156 Timer handler/Frame Interrupt Handler:
157
158 Keep track of fields, and when a full frame is captured,
159 freeze the card and unblock the reader at step (2) above.
160
161 Locking rules for direct I/O access to the device:
162
163 We cannot allow concurrent access to the device, lest
164 it be confused by sequences of commands that are interleaved.
165 Mutual exclusion is guaranteed as follows:
166
167 (1) The holder of dev->spinlock can do I/O on the device.
168 (2) The IRQ/timer handler uses spin_lock/unlock, and normally
169 scheduled code uses spin_lock/unlock_irqsave/restore.
170 (3) Since we don't want to keep interrupts disabled the whole
171 time we copy data from the device, we use an additional
172 variable, dev->is_locked, to keep the timer handler from
173 touching the device while copying is going on from a
174 process context.
175
176 */
177
178 #ifndef __KERNEL__
179 #define __KERNEL__
180 #endif
181
182 #include <linux/config.h>
183 #include <linux/delay.h> /* udelay */
184 #include <linux/errno.h> /* error codes */
185 #include <linux/file.h>
186 #include <linux/fs.h>
187 #include <linux/interrupt.h>
188 #include <linux/ioport.h>
189 #include <linux/kernel.h>
190 #include <linux/mm.h>
191 #include <linux/module.h>
192 #include <linux/pci.h>
193 #include <linux/proc_fs.h>
194 #include <linux/sched.h>
195 #include <linux/slab.h>
196 #include <linux/spinlock.h>
197 #include <linux/version.h>
198
199 #include <linux/config.h>
200 #include <linux/moduleparam.h>
201
202 #include <linux/interrupt.h>
203
204 #include <asm/io.h>
205 #include <asm/segment.h>
206 #include <asm/uaccess.h>
207
208 #include "hrt.h"
209
210 #define HRT_DEBUG
211
212 #define HRT_ERROR_MSG(args...) do{printk("<1>hrt: "); printk(args);\
213 printk("\n");}while(0)
214
215 /*********************
216 * Module Parameters *
217 *********************/
218
219 #ifndef module_param
220 #define hrt_parm(name, pstr, type, perm) MODULE_PARM(name, pstr)
221 #else
222 #define hrt_parm(name, pstr, type, perm) module_param(name, type, perm)
223 #endif
224
225 static
226 int major_number = 82;
227 hrt_parm(major_number, "i", int, 0);
228
229 #ifndef HRT_MAX_DEVICES
230 #define HRT_MAX_DEVICES 4
231 #endif
232
233 #ifndef HRT_IO_SIZE
234 #define HRT_IO_SIZE 0x4000
235 #endif
236
237 /**
238 * hrt_addresses - a list of possible jumper-selected addresses
239 * jumper A on = plug and play address (above one MB address)
240 * jumper A off = hardwired to 0xdc000 or 0xd4000
241 * jumper B on = address 0xd4000 (ignored if jumper A is on)
242 * jumper B off = address 0xdc000 (ignored if jumper A is on)
243 */
244 const unsigned long hrt_addresses[] = { 0xd4000, 0xdc000 };
245
246 /***************************
247 * Card-specific constants *
248 ***************************/
249
250 #define HRT_VENDOR_ID 0x0004
251 #define HRT_DEVICE_ID_GREY 0x0404
252 #define HRT_DEVICE_ID_COLOR 0x0408
253
254 /* Number of registers on the board- checked in i2c_init() */
255 #define HRT_SAA7110_MAXREG 0x34
256
257 /**
258 * HRT device descriptor
259 */
260 typedef struct {
261 int num;
262 int state;
263 /* minor device number, index in hrt_devices[] */
264 unsigned long virt_addr;
265 unsigned long phys_addr;
266 /* cannot be opened again until released */
267
268 /* spinlock and is_locked control access to the device */
269 spinlock_t spinlock;
270 int is_locked;
271 wait_queue_head_t wait_queue;
272 struct timer_list timer;
273 struct tasklet_struct tasklet;
274 int timer_active;
275 /* timer_active != 0 iff timer or irq is active */
276 int irq;
277 /* irq != 0 if board supports interrupts
278 = -irq if handler not installed
279 = irq if handler is installed */
280 volatile
281 int irq_count;
282 volatile
283 int i2c_bits;
284 /* last values written to i2c */
285 char saa7110_registers[HRT_SAA7110_MAXREG+1];
286 /* video data format, and dependent values */
287 int mode;
288 int rows, cols, bytes_per_pixel;
289 int win_row, win_col, win_width, win_height;
290 /* current field being digitized */
291 int field;
292 /* how many field changes we are waiting for */
293 int field_changes;
294 /* the device is either frozen or being frozen */
295 int is_frozen;
296 #ifdef CONFIG_PCI
297 struct pci_dev *pci_dev;
298 #endif
299 } hrt_t;
300
301 /* values for field hrt_t->state */
302 #define HRT_UNINITIALIZED_STATE 1
303 #define HRT_INITIALIZING_STATE 2
304 #define HRT_CLOSED_STATE 4
305 #define HRT_OPEN_STATE 8
306 #define HRT_FINALIZING_STATE 16
307
308 /* values for field hrt_t->mode */
309 #define HRT_DUAL_PORTED_MODE 1
310 #define HRT_COLOR_MODE 2
311 #define HRT_STREAMING_MODE 4
312 #define HRT_IRQ_MODE 8
313 #define HRT_ISA_MODE 16
314
315 /* values for global hrt_module_state */
316
317 #define HRT_MODULE_UNINITIALIZED_STATE 1
318 #define HRT_MODULE_INITIALIZING_STATE 2
319 #define HRT_MODULE_INITIALIZED_STATE 4
320 #define HRT_MODULE_FINALIZING_STATE 8
321
322 int hrt_module_state = HRT_MODULE_UNINITIALIZED_STATE;
323
324 int hrt_nonpci_devices = 0; /* number of non-pci devices detected */
325 /* non-pci devices have lower numbers */
326 int hrt_num_devices = 0; /* total number of devices detected */
327
328 #define HRT_IS_PCI(X) ((X) >= hrt_nonpci_devices)
329
330 /* ??? consider dynamically allocating the device
331 objects as they are probed and detectg, and
332 using a linked list here instead of an array */
333
334 hrt_t hrt_devices[HRT_MAX_DEVICES];
335
336
337 #ifdef HRT_DEBUG
338 /******************************
339 * optional debugging support *
340 ******************************/
341
342 #define HRT_DEBUG_LEVEL 3
343
344 #define HRT_CHECK(dev,states,msg) \
345 {if (dev->state & ~(states))\
346 {HRT_DEBUG_MSG(1, "* unexpected state 0x%2x (%s)", dev->state, msg);}}
347
348 #define HRT_MODULE_CHECK(states,msg) \
349 {if (hrt_module_state & ~(states))\
350 {HRT_DEBUG_MSG(1, "* unexpected state 0x%2x (%s)", hrt_module_state, msg);}}
351
352 #define HRT_DEBUG_MSG(level,args...) {if (level <= HRT_DEBUG_LEVEL)\
353 {printk("<1>hrt * "); printk(args); printk("\n");}}
354
355 struct proc_dir_entry *hrt_proc_read_entry = NULL;
356
357 #define write_buf(args...) \
358 do { \
359 n = snprintf(buf, count, args); \
360 buf += n; \
361 count -= n; \
362 } while(0)
363
364 int hrt_read_proc(char *buf, char **start, off_t offset,
365 int count, int *eof, void *data)
366 {
367 int n, i;
368 int ips, tps, rps;
369 char *org_buf = buf;
370
371 ips = 0;
372 tps = 0;
373 rps = 0;
374
375 /* dont excede count bytes when writing to buf */
376 /* just write to buf as a normal ptr to a file */
377
378 write_buf("dev HZ/10 int timer read int/s timer/s read/s\n");
379 for (i=0; i<HRT_MAX_DEVICES; i++) {
380 write_buf("%6i %6i %7i %9i %8i\n", i,
381 hrt_devices[i].irq_count,
382 ips, tps, rps);
383 }
384 *eof = 1;
385 return buf - org_buf;
386 }
387
388 #define hrt_debug_init()\
389 { hrt_proc_read_entry = create_proc_read_entry("hrt0", 0, 0, hrt_read_proc, 0);}
390
391 #define hrt_debug_cleanup()\
392 {if (hrt_proc_read_entry) remove_proc_entry("hrt", 0);}
393
394 #else
395 /* hrt debugging is off */
396
397 #define HRT_CHECK(dev,states,msg) do{}while(0)
398 #define HRT_MODULE_CHECK(states,msg) do{}while(0)
399 #define HRT_DEBUG_MSG(args...) do{}while(0)
400 #define hrt_debug_init() do{}while(0)
401 #define hrt_debug_cleanup() do{}while(0)
402 #endif
403
404 /****************************
405 * low-level device control *
406 ****************************/
407
408 /* I2C bits */
409 #define HRT_I2C_SCL 0x01
410 #define HRT_I2C_SDA 0x02
411
412 #define HRT_CONTROL(addr) (addr + HRT_CONTROL_REG)
413 #define I2C_CONTROL(addr) (addr + HRT_I2C_REG)
414 #define I2C_BUSY(addr) (!(ioread8((void *) HRT_CONTROL(addr)) & 0x80))
415
416 /* Bit 7 at 0x2000 (the HRT512-8 control register) tells whether
417 * the CPU is sending data across the I2C bus */
418
419 #define hrt_freeze_next(dev) \
420 dev->is_frozen = 1;\
421 iowrite8(HRT_FREEZE_NEXT_CMD, (void *) (dev->virt_addr + HRT_CONTROL_REG))
422 #define hrt_freeze_immediate(dev) \
423 dev->is_frozen = 1;\
424 iowrite8(HRT_FREEZE_IMM_CMD, (void *) (dev->virt_addr + HRT_CONTROL_REG))
425 #define hrt_go_live(dev) \
426 dev->is_frozen = 0;\
427 iowrite8(HRT_LIVE_CMD, (void *) (dev->virt_addr + HRT_CONTROL_REG))
428 #define hrt_get_field(dev) \
429 ioread8((void *) (dev->virt_addr + HRT_CONTROL_REG)) & 0x1
430 #define hrt_i2c_delay() udelay(5)
431
432 /* Unique I2C bus address of the SAA7110 (A/D) device */
433 #define HRT_AD_DEVICE_ID (128+16+8+4)
434
435 const unsigned char saa7110_default_init_regs[] = {
436 94, /* there are 94 bytes that follow */
437 0x00, 0x4c, /* increment delay (IDEL) */
438 0x01, 0x3c, /* HSY begin 50 Hz */
439 0x02, 0x0d, /* HSY stop 50 Hz */
440 0x03, 0xef, /* HCL begin 50 Hz */
441 0x04, 0xbd, /* HCL stop 50 Hz */
442 0x05, 0xf0, /* HSY after PHI1 50 Hz */
443 0x06, 0x00, /* luminance control */
444 0x07, 0x00, /* hue control */
445 0x08, 0xf8, /* colour killer threshold QUAM (PAL/NTSC) */
446 0x09, 0xf8, /* colour killer threshold SECAM */
447 0x0A, 0x60, /* PAL switch sensitivity */
448 0x0B, 0x50, /* SECAM switch sensitivity */
449 0x0C, 0x00, /* gain control chrominance */
450 0x0D, 0x86, /* standard/mode control */
451 /* 7 VTRC = 1 (VCR mode, not TV)
452 6 XXX
453 5 XXX
454 4 XXX
455 3 RTSE = 0 (PLIN switched to output)
456 2 HRMV = 1 (HREF normal position)
457 1 SSTB = 1 (status byte = 1)
458 0 SECS = 0 (other standards, not SECAM) */
459 0x0E, 0x18, /* I/O and clock control */
460 0x0F, 0x90, /* control #1 */
461 0x10, 0x00, /* control #2 */
462 0x11, 0x2c, /* chrominance gain reference */
463 0x12, 0x7f, /* chrominance saturation */
464 0x13, 0x5e, /* luminance contrast */
465 0x14, 0x42, /* HSY begin 60 Hz */
466 0x15, 0x1a, /* HSY stop 60 Hz */
467 0x16, 0xff, /* HCL begin 60 Hz */
468 0x17, 0xda, /* HCL stop 60 Hz */
469 0x18, 0xf0, /* HSY after PHI1 60 Hz */
470 0x19, 0x9b, /* luminance brightness */
471 /*
472 0x1A - not used
473 0x1B - not used
474 0x1C - not used
475 0x1D - not used
476 0x1E - not used
477 0x1F - not used
478 */
479 0x20, 0x7c, /* analog control #1 */
480 0x21, 0x03, /* analog control #2 */
481 0x22, 0xd2, /* mixer control #1 */
482 0x23, 0x41, /* clamping level control 21 */
483 0x24, 0x80, /* clamping level control 22 */
484 0x25, 0x41, /* clamping level control 31 */
485 0x26, 0x80, /* clamping level control 32 */
486 0x27, 0x4f, /* gain control #1 */
487 0x28, 0xfe, /* white peak control */
488 0x29, 0x01, /* sync bottom control */
489 0x2A, 0xcf, /* gain control analog #2 */
490 0x2B, 0x0f, /* gain control analog #3 */
491 0x2C, 0x83, /* mixer control #2 */
492 0x2D, 0x01, /* integration value gain */
493 0x2E, 0x81, /* vertical blanking pulse set */
494 0x2F, 0x03, /* vertical blanking pulse reset */
495 0x30, 0x60, /* ADCs gain control */
496 0x31, 0x71, /* mixer control #3 */
497 0x32, 0x02, /* integration value white peak */
498 0x33, 0x8c, /* mixer control #4 */
499 0x34, 0x03, /* gain update level */
500 };
501
502 /*
503 * sda = set data bit on I2C bus
504 * to the value given by parameter high
505 */
506 static inline
507 void hrt_sda(hrt_t *dev, unsigned long addr, int high)
508 {
509 if (high) dev->i2c_bits |= HRT_I2C_SDA;
510 else dev->i2c_bits &= ~HRT_I2C_SDA;
511 iowrite8(dev->i2c_bits, (void *) I2C_CONTROL(addr));
512 wmb();
513 }
514
515 /*
516 * scl = set clock bit on I2C bus
517 * to the value given by parameter high
518 */
519 static inline
520 void hrt_scl(hrt_t *dev, unsigned long addr, int high)
521 {
522 if (high) dev->i2c_bits |= HRT_I2C_SCL;
523 else dev->i2c_bits &= ~HRT_I2C_SCL;
524 iowrite8(dev->i2c_bits, (void *) I2C_CONTROL(addr));
525 wmb();
526 }
527
528 /*
529 * sda_scl = set data and clock bits on I2C bus
530 * to the values given by parameters sda_high and scl_high
531 */
532 static inline
533 void hrt_sda_scl(hrt_t *dev,
534 unsigned long addr, int sda_high, int scl_high)
535 {
536 if (sda_high) dev->i2c_bits |= HRT_I2C_SDA;
537 else dev->i2c_bits &= ~HRT_I2C_SDA;
538 if (scl_high) dev->i2c_bits |= HRT_I2C_SCL;
539 else dev->i2c_bits &= ~HRT_I2C_SCL;
540 iowrite8(dev->i2c_bits, (void *) I2C_CONTROL(addr));
541 wmb();
542 }
543
544 /*
545 * sda_read = read data bit from I2C control register
546 */
547 static inline
548 int hrt_sda_read(unsigned long addr)
549 { char c = ioread8((void *) I2C_CONTROL(addr)); return (c & HRT_I2C_SDA); }
550
551 /*
552 * hrt_i2c_start = start I2C data transmission
553 */
554 static inline
555 void hrt_i2c_start(hrt_t *dev, unsigned long addr)
556 {
557 hrt_sda_scl(dev, addr, 0, 0);
558 hrt_i2c_delay();
559 hrt_sda(dev, addr, 1);
560 hrt_i2c_delay();
561 hrt_scl(dev, addr, 1);
562 hrt_i2c_delay();
563 hrt_sda(dev, addr, 0);
564 hrt_i2c_delay();
565 hrt_scl(dev, addr, 0);
566 }
567
568 /*
569 * hrt_i2c_stop = end I2C data transmission
570 */
571 static inline
572 void hrt_i2c_stop(hrt_t *dev, unsigned long addr)
573 {
574 hrt_sda_scl(dev, addr, 0, 0);
575 hrt_i2c_delay();
576 hrt_scl(dev, addr, 1);
577 hrt_i2c_delay();
578 hrt_sda(dev, addr, 1);
579 hrt_i2c_delay();
580 hrt_scl(dev, addr, 0);
581 hrt_scl(dev, addr, 1);
582 }
583
584 /*
585 * hrt_i2c_send_bit
586 */
587 static
588 int hrt_i2c_send_bit(hrt_t *dev,
589 unsigned long addr, unsigned char bit)
590 {
591 unsigned long timeout;
592 if (bit) hrt_sda(dev, addr, 1);
593 else hrt_sda(dev, addr, 0);
594 hrt_i2c_delay();
595 iowrite8(dev->i2c_bits | 0x04, (void *) I2C_CONTROL(addr));
596 wmb();
597 hrt_i2c_delay();
598 if (I2C_BUSY(addr)) {
599 timeout = jiffies + HZ/10;
600 while (I2C_BUSY(addr)) {
601 if (jiffies > timeout) {
602 HRT_ERROR_MSG("i2c bus timeout");
603 return -1;
604 }
605 }
606 }
607 return 0;
608 }
609
610 /*
611 * hrt_i2c_send_byte
612 */
613 static
614 int hrt_i2c_send_byte(hrt_t *dev, unsigned long addr, unsigned char data)
615 {
616 char bitpos, bit;
617 for(bitpos = 0; bitpos < 8; bitpos++) {
618 bit = (data & 0x80) >> 7;
619 data <<= 1;
620 if(hrt_i2c_send_bit(dev, addr, bit)) goto failure;
621 }
622 hrt_i2c_delay();
623 hrt_sda_scl(dev, addr, 1, 0);
624 hrt_scl(dev, addr, 1); /* leave clock high */
625 udelay(10);
626 if (hrt_sda_read(addr)) {
627 HRT_ERROR_MSG("no i2c ack");
628 goto failure;
629 }
630 hrt_sda_scl(dev, addr, 1, 0);
631 return 0;
632 failure:
633 hrt_sda_scl(dev, addr, 1, 0);
634 hrt_i2c_stop(dev, addr);
635 return -1;
636 }
637
638 /*
639 * hrt_i2c_init_registers
640 *
641 * sends a sequence of values to the A/D converter device over the I2C bus.
642 * For an example of the format of "sequence" see the declaration of
643 * saa7110_default_init_regs[] above. The first byte is the number of
644 * data bytes that follow. The rest of the sequence is a series of pairs
645 * of a register number followed by a value. It is better if the values
646 * are sorted in increasing order of register number, but the sequence may
647 * have gaps and need not be in order.
648 */
649 int hrt_i2c_init_registers(hrt_t *dev, const char *sequence)
650 {
651 unsigned long addr;
652 int i, len, cur_reg;
653
654 len = (int) (*sequence++);
655 addr = dev->virt_addr;
656
657 if (len <= 2) {
658 HRT_ERROR_MSG("invalid register initialization sequence");
659 return -1;
660 }
661
662 hrt_i2c_start(dev, addr);
663
664 /* here we select the A/D Device on the i2c bus
665 * that should pay attention to the following bytes */
666 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
667 HRT_ERROR_MSG("send_byte failed");
668 return -1;
669 }
670
671 /* start at the first register and increment along the way */
672 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = sequence[0])) {
673 HRT_ERROR_MSG("send_byte failed(2)");
674 return -1;
675 }
676
677 for(i = 0; i < len; i += 2, sequence += 2) {
678 char reg = sequence[0];
679 char data = sequence[1];
680 if (reg > HRT_SAA7110_MAXREG) {
681 HRT_ERROR_MSG("register %02X out of range!", reg);
682 return -1;
683 }
684 if (reg != cur_reg) {
685
686 /* we're going to an entirely different register */
687 hrt_i2c_stop(dev, addr);
688 hrt_i2c_start(dev, addr);
689
690 /* select the chip/device on the bus */
691 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
692 HRT_ERROR_MSG("send_byte failed(3)");
693 return -1;
694 }
695
696 /* select the register */
697 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = reg)) {
698 HRT_ERROR_MSG("send_byte failed(4)");
699 return -1;
700 }
701 }
702
703 if (hrt_i2c_send_byte(dev, dev->virt_addr, data)) {
704 HRT_ERROR_MSG("send_byte failed(5)");
705 return -1;
706 }
707 dev->saa7110_registers[cur_reg++] = data;
708 }
709 /* free the i2c bus */
710 hrt_i2c_stop(dev, addr);
711 return 0;
712 }
713
714 int hrt_i2c_init_device(hrt_t *dev)
715 {
716 int result = 0;
717 HRT_DEBUG_MSG(2, "hrt_i2c_init_device entered"
718 " (virt_addr = %08X, addr = %08X)",
719 (unsigned) dev->virt_addr,
720 (unsigned) dev->phys_addr);
721
722 result = hrt_i2c_init_registers(dev, saa7110_default_init_regs);
723 if (result) {
724 HRT_ERROR_MSG("hrt_i2c_init_registers failed %d", result);
725 return result;
726 }
727 HRT_DEBUG_MSG(2, "hrt_i2c_init_device returning %d", result);
728 return result;
729 }
730
731 /***************************
732 * buffering, data copying *
733 ***************************/
734
735 /*
736 * hrt_copy_window
737 *
738 * copy entire window from video device to buffer
739 * assume frame is frozen
740 */
741
742 int hrt_copy_window(hrt_t *dev, char * buf)
743 {
744 unsigned long y_addr;
745 unsigned long in_addr;
746 int win_width, win_height, win_end, win_col, win_row;
747 int i, j, y;
748 int dev_line_length;
749
750 y_addr = dev->virt_addr + HRT_Y_LOW_REG;
751 win_width = dev->win_width;
752 win_height = dev->win_height;
753 win_row = dev->win_row;
754 win_col = dev->win_col;
755 in_addr = dev->virt_addr + win_col;
756
757 if (~(dev->mode & HRT_COLOR_MODE)) {
758 dev_line_length = 512;
759 win_end = dev->win_row + dev->win_height;
760 for (y = win_row * dev_line_length; y < win_end; y++) {
761 iowrite16(y, (void *) y_addr);
762 wmb();
763 if (copy_to_user(buf, (void *) in_addr, win_width)) {
764 HRT_ERROR_MSG("copy_to_user failed %lx %lx %d %d (1)",
765 (unsigned long) in_addr, (unsigned long) buf,
766 win_width, y);
767 return -EFAULT;
768 }
769 buf += win_width;
770 }
771 } else if (dev->mode & HRT_COLOR_MODE) {
772 dev_line_length = 2048;
773 win_end = dev->win_row + dev->win_height;
774 for (y = win_row * dev_line_length; y < win_end; y++) {
775 iowrite16(y, (void *) y_addr);
776 wmb();
777 if (copy_to_user(buf, (void *) in_addr, win_width)) {
778 HRT_ERROR_MSG("copy_to_user failed (2)");
779 return -EFAULT;
780 }
781 /* rearrange pixels into logical order */
782 for (i = 0; i < win_width; i++) {
783 j = i + win_col;
784 if (j < 512) {
785 buf[i] = buf[j];
786 buf[i+1] = buf[j+512];
787 } else {
788 buf[i] = buf[j+512];
789 buf[i+1] = buf[j+1024];
790 }
791 }
792 buf += win_width;
793 }
794 } else {
795 HRT_ERROR_MSG("unsupported format %x", dev->mode);
796 }
797 return 0;
798 }
799
800 /*************************************
801 * device initialization and cleanup *
802 *************************************/
803
804 static inline
805 void hrt_irq_enable(hrt_t *dev)
806 {
807 int val;
808 val = ioread8((void *)(dev->virt_addr + HRT_IRQ_ENABLE));
809 val |= 0x1;
810 iowrite8(val, (void *) (dev->virt_addr + HRT_IRQ_ENABLE));
811 }
812
813 static inline
814 void hrt_irq_disable(hrt_t *dev)
815 {
816 int val;
817 val = ioread8((void *)(dev->virt_addr + HRT_IRQ_ENABLE));
818 val &= ~0x1;
819 iowrite8(val, (void *) (dev->virt_addr + HRT_IRQ_ENABLE));
820 }
821
822 void hrt_tasklet(unsigned long);
823 void hrt_timer_init(hrt_t* dev);
824 void hrt_timer_cleanup(hrt_t* dev);
825 int hrt_timer_activate(hrt_t* dev);
826 void hrt_timer_deactivate(hrt_t* dev);
827
828 void hrt_cleanup(hrt_t* dev)
829 {
830 HRT_DEBUG_MSG(1, "shutting down hrt device %d at 0x%lx",
831 dev->num, dev->phys_addr);
832 HRT_MODULE_CHECK (HRT_MODULE_FINALIZING_STATE |
833 HRT_MODULE_INITIALIZING_STATE, "1");
834 HRT_CHECK (dev, HRT_INITIALIZING_STATE
835 | HRT_CLOSED_STATE | HRT_FINALIZING_STATE, "2");
836 dev->state = HRT_FINALIZING_STATE;
837
838 /* restore device to an inactive state */
839 hrt_freeze_next(dev);
840
841 /* deactivate and remove interrupt handler or timer */
842 hrt_timer_cleanup (dev);
843
844 if (dev->phys_addr) {
845 HRT_DEBUG_MSG(2, "release_mem_region 0x%lx, 0x%lx",
846 (unsigned long)dev, (unsigned long) dev->phys_addr);
847 release_mem_region(dev->phys_addr, HRT_IO_SIZE);
848 dev->phys_addr = 0;
849 }
850 if (dev->virt_addr) {
851 HRT_DEBUG_MSG(2, "iounmap %lx", (unsigned long) dev->virt_addr);
852 iounmap((void *)dev->virt_addr);
853 dev->virt_addr = 0;
854 }
855 #ifdef CONFIG_PCI
856 if (dev->pci_dev) {
857 pci_disable_device(dev->pci_dev);
858 dev->pci_dev = NULL;
859 }
860 #endif
861 dev->state = HRT_UNINITIALIZED_STATE;
862 }
863
864 void hrt_lock_init(hrt_t * dev) {
865 spin_lock_init(&dev->spinlock);
866 dev->is_locked = 0;
867 }
868
869 int hrt_trylock(hrt_t * dev) {
870 spin_lock(&dev->spinlock);
871 if (dev->is_locked) {
872 spin_unlock(&dev->spinlock);
873 return 1;
874 }
875 dev->is_locked = 1;
876 spin_unlock(&dev->spinlock);
877 return 0;
878 }
879
880 void hrt_lock(hrt_t * dev) {
881 unsigned long flags;
882 spin_lock_irqsave(&dev->spinlock, flags);
883 if (dev->is_locked) {
884 HRT_ERROR_MSG("locking an already-locked device");
885 }
886 dev->is_locked = 1;
887 spin_unlock_irqrestore(&dev->spinlock, flags);
888 }
889
890 void hrt_unlock(hrt_t * dev) {
891 spin_lock(&dev->spinlock);
892 if (!dev->is_locked) {
893 HRT_ERROR_MSG("unlocking unlocked device");
894 }
895 dev->is_locked = 0;
896 spin_unlock(&dev->spinlock);
897 }
898
899 int hrt_init(unsigned long phys_address, struct pci_dev * pci_dev)
900 {
901 hrt_t * dev = &hrt_devices[hrt_num_devices];
902 int i, result;
903 char *bus, *color, *ported;
904 unsigned int old_control, old_y_high, old_y_low;
905 unsigned char val1, val2;
906 unsigned long virt_address;
907
908 HRT_DEBUG_MSG(1, "probing device at 0x%lx", phys_address);
909
910 dev = &hrt_devices[hrt_num_devices];
911
912 memset(dev, 0, sizeof(hrt_t));
913 dev->state = HRT_INITIALIZING_STATE;
914 dev->num = hrt_num_devices;
915 hrt_lock_init (dev);
916
917 tasklet_init(&dev->tasklet, hrt_tasklet, (unsigned long) dev);
918
919 /* reserve the I/O address space for this device */
920 if (!request_mem_region(phys_address, HRT_IO_SIZE, "hrt")) {
921 HRT_ERROR_MSG("I/O memory at %lx already in use",
922 (unsigned long) phys_address);
923 return -EBUSY;
924 }
925 dev->phys_addr = phys_address;
926
927 /* map the device's I/O space into kernel memory */
928 virt_address = (unsigned long)
929 ioremap_nocache(phys_address, HRT_IO_SIZE);
930 if (!virt_address) {
931 HRT_ERROR_MSG("couldn't remap io memory!!");
932 hrt_cleanup(dev);
933 return -ENODEV;
934 }
935 dev->virt_addr = virt_address;
936
937 #ifdef CONFIG_PCI
938 /* pci-specific processing */
939 if (pci_dev) {
940 pci_set_drvdata (pci_dev, dev);
941 dev->pci_dev = pci_dev;
942 dev->irq = -pci_dev->irq;
943 dev->mode &= ~HRT_ISA_MODE;
944 /* make certain IRQ is disabled before enabling
945 device, or else we may get an IRQ we are not
946 prepared to handle? */
947 hrt_irq_disable(dev);
948 if (pci_enable_device(pci_dev)) {
949 HRT_ERROR_MSG("pci_enable_device failed");
950 hrt_cleanup(dev);
951 return -EIO;
952 }
953 }
954 #endif
955
956 /* find out whether there is an hrt device at this
957 address, and which type of device it is */
958
959 /* save the values we are about to modify */
960 old_control = ioread8((void *)(HRT_CONTROL_REG + virt_address));
961 old_y_low = ioread8((void *)(HRT_Y_LOW_REG + virt_address));
962 old_y_high = ioread8((void *)(HRT_Y_HIGH_REG + virt_address));
963
964 /* freeze the frame grabbing, immediately */
965 iowrite8(0x5B, (void *) (HRT_CONTROL_REG + virt_address));
966
967 /* complement pixel (0,0) */
968 iowrite16(0, (void *) (HRT_Y_LOW_REG + virt_address));
969 iowrite16(0, (void *) (HRT_Y_HIGH_REG + virt_address));
970 val1 = ioread8((void *) virt_address);
971 iowrite8(~val1, (void *) virt_address);
972
973 /* write old value of pixel (0,0) to (1,0) */
974 iowrite16(1, (void *) (HRT_Y_LOW_REG + virt_address));
975 iowrite8(val1, (void *) virt_address);
976
977 /* read the value at the previous raster/row */
978 iowrite16(0, (void *) (HRT_Y_LOW_REG + virt_address));
979 val2 = ioread8((void *) virt_address);
980
981 if (val2 != (unsigned char)~val1) {
982 HRT_DEBUG_MSG(1, "no hrt device at address 0x%lx",
983 virt_address);
984 /* restore the old values, and hope we did no
985 damage to some other device at this address;
986 this is pretty poor, since if there is
987 another device at that address the effects
988 of these writes could be harmful;
989 ideally, there should be a way to
990 identify the devices that only uses read
991 operations */
992 iowrite8(val1, (void *) virt_address);
993 iowrite8(old_y_low, (void *) (HRT_Y_LOW_REG + virt_address));
994 iowrite8(old_y_high, (void *) (HRT_Y_HIGH_REG + virt_address));
995 iowrite8(old_control, (void *) (HRT_CONTROL_REG + virt_address));
996
997 hrt_cleanup(dev);
998 return -ENODEV;
999 }
1000
1001 /* test whether we have a color or greyscale card:
1002 the color frame buffer has line of 2048 = 0x400
1003 pixels; greyscale has only 512 pixels/line, so
1004 the memory mapped row of frame buffer memory
1005 should wrap around at 0x200 and 0x400 on a greyscale card
1006 but should be good through 0x400 on a color card. */
1007
1008 iowrite8(HRT_FREEZE_IMM_CMD, (void *) (HRT_CONTROL_REG + virt_address));
1009 iowrite16(0, (void *) (HRT_Y_LOW_REG + virt_address));
1010 iowrite16(0, (void *) (HRT_Y_HIGH_REG + virt_address));
1011 val1 = ioread8((void *)(0x400 + virt_address));
1012 iowrite8(~val1, (void *) (0x400 + virt_address));
1013 /* in case greyscale addresses wrap around,
1014 refresh the value at offset zero */
1015 iowrite8(val1, (void *) (virt_address));
1016 val2 = ioread8((void *)(0x400 + virt_address));
1017 if (val2 == (unsigned char) ~val1) {
1018 dev->mode |= HRT_COLOR_MODE;
1019 /* infer the frame geometry from the device type */
1020 HRT_DEBUG_MSG(1, "COLOR device detected");
1021 dev->rows = 480;
1022 dev->cols = 640;
1023 dev->bytes_per_pixel = 2;
1024 } else {
1025 HRT_DEBUG_MSG(1, "GREYSCALE device detected");
1026 dev->cols = 512; /* is for NTSC, 512 for PAL */
1027 dev->rows = 480;
1028 dev->bytes_per_pixel = 1;
1029 }
1030
1031 /* try to initialize the device */
1032 result = hrt_i2c_init_device(dev);
1033 if (result) {
1034 HRT_ERROR_MSG("hrt_i2c_init_device %d failed",result);
1035 hrt_cleanup(dev);
1036 return -ENODEV;
1037 }
1038
1039 hrt_go_live(dev); /* delete this once driver is debugged */
1040
1041 /* find out whether the device has dual-ported memory*/
1042
1043 /* freeze the image */
1044 hrt_freeze_immediate(dev);
1045
1046 /* write zeros to horizontal raster line 500,
1047 a line that the A/D unit does not modify */
1048 iowrite16(0, (void *) (dev->virt_addr + HRT_Y_HIGH_REG));
1049 iowrite16(500, (void *) (dev->virt_addr + HRT_Y_LOW_REG));
1050 for (i = 0; i < 512; i++) {
1051 iowrite8(0, (void *)(dev->virt_addr + i));
1052 }
1053
1054 /* set capturing mode */
1055 hrt_go_live(dev);
1056
1057 /* try to overwrite the line with ones */
1058 for (i = 0; i < 512; i++) {
1059 iowrite8(255, (void *) (dev->virt_addr + i));
1060 }
1061
1062 /* freeze the image */
1063 hrt_freeze_immediate(dev);
1064
1065 /* read back the line;
1066 if some of the pixels are still zero the memory is
1067 not dual ported */
1068 result = 1;
1069 for (i = 0; i < 512; i++) {
1070 if (!ioread8((void *)(dev->virt_addr + i))) result = 0;
1071 }
1072 if (result) {
1073 HRT_DEBUG_MSG(1, "seems to be dual ported");
1074 dev->mode |= HRT_DUAL_PORTED_MODE;
1075 }
1076
1077 dev->mode |= HRT_ISA_MODE;
1078
1079 #ifdef CONFIG_PCI
1080 if ((pci_dev->device == HRT_DEVICE_ID_COLOR) !=
1081 ((dev->mode & HRT_COLOR_MODE) == HRT_COLOR_MODE))
1082 HRT_ERROR_MSG("PCI and probed types don't match");
1083 #endif
1084
1085 /* discover whether this device supports interrupts */
1086 hrt_timer_init(dev);
1087 if (dev->mode & HRT_IRQ_MODE) {
1088 dev->irq_count = 0;
1089 hrt_irq_enable(dev);
1090 hrt_go_live(dev);
1091 mdelay(20);
1092 hrt_freeze_immediate(dev);
1093 hrt_irq_disable(dev);
1094 if (dev->irq_count) {
1095 HRT_DEBUG_MSG(1, "counted %d irqs in 20 ms",
1096 dev->irq_count);
1097 HRT_ERROR_MSG("devices supports IRQs");
1098 } else {
1099 HRT_DEBUG_MSG(1, "no irqs in 10 ms");
1100 dev->irq = 0;
1101 dev->mode &= ~HRT_IRQ_MODE;
1102 }
1103 }
1104
1105 /* describe this device for the log */
1106 if (dev->mode & HRT_ISA_MODE) bus = "ISA";
1107 else bus = "PCI";
1108 if (dev->mode & HRT_COLOR_MODE) color = "COLOR";
1109 else color = "GREYSCALE";
1110 if (dev->mode & HRT_DUAL_PORTED_MODE) ported = "DUAL";
1111 else ported = "SINGLE";
1112 HRT_ERROR_MSG("found device %d at 0x%lx",
1113 dev->num, dev->phys_addr);
1114 HRT_ERROR_MSG("%s %s with %s-ported memory",
1115 bus, color, ported);
1116 if (dev->mode & HRT_IRQ_MODE)
1117 HRT_ERROR_MSG("using IRQ %d", dev->irq);
1118
1119 init_waitqueue_head(&dev->wait_queue);
1120
1121 /* set default window size
1122 to cover the entire frame buffer */
1123 HRT_DEBUG_MSG(1, "setting width, cols = %d", dev->cols);
1124 dev->win_row = 0;
1125 dev->win_width = dev->cols;
1126 dev->win_col = 0;
1127 dev->win_height = dev->rows;
1128 dev->field = -1;
1129 hrt_num_devices++;
1130 dev->state = HRT_CLOSED_STATE;
1131
1132 return 0;
1133 }
1134
1135 int hrt_isa_init(void)
1136 {
1137 int i;
1138 for (i = 0; i < ARRAY_SIZE(hrt_addresses); i++)
1139 hrt_init(hrt_addresses[i], NULL);
1140 hrt_nonpci_devices = hrt_num_devices;
1141 return 0;
1142 }
1143
1144 void hrt_isa_cleanup(void)
1145 { int i;
1146 for (i=0; i<hrt_nonpci_devices; i++) {
1147 HRT_DEBUG_MSG(2, "cleaning up device %d", i);
1148 hrt_cleanup(hrt_devices+i);
1149 }
1150 }
1151
1152 /*************************
1153 * interrupts and timers *
1154 *************************/
1155
1156 int hrt_irq_pending(hrt_t *dev)
1157 {
1158 int r = ioread8((void *)(dev->virt_addr + HRT_CONTROL_REG)) & 0x4;
1159 rmb();
1160 return r;
1161 }
1162
1163 irqreturn_t hrt_irq_handler(int irq, void* dev_id, struct pt_regs* regs)
1164 {
1165 hrt_t* dev = dev_id;
1166 if (!hrt_irq_pending(dev)) goto none;
1167 /* acknowledge the interrupt */
1168 hrt_irq_disable(dev);
1169 dev->irq_count++;
1170 /* do not try to do any I/O on the device here,
1171 or else risk race with last scheduled tasklet
1172 */
1173 tasklet_schedule(&dev->tasklet);
1174 /* enable the next interrupt */
1175 hrt_irq_enable(dev);
1176 #ifdef IRQ_HANDLED
1177 return IRQ_HANDLED;
1178 #endif
1179 none:
1180 #ifdef IRQ_NONE
1181 return IRQ_NONE;
1182 #endif
1183 }
1184
1185 void hrt_timer_handler(unsigned long data)
1186 {
1187 hrt_t* dev = (hrt_t*)data;
1188
1189 if (dev->timer_active) {
1190 tasklet_schedule(&dev->tasklet);
1191 dev->timer.expires = jiffies + HZ/100;
1192 add_timer(&dev->timer);
1193 }
1194 }
1195
1196 void hrt_irq_init(hrt_t* dev)
1197 {
1198 HRT_DEBUG_MSG(2, "hrt_irq_init");
1199 dev->irq_count = 0;
1200 if (dev->irq == 0) return;
1201 if ((dev->irq > 0) || (dev->mode & HRT_IRQ_MODE)) {
1202 HRT_ERROR_MSG("irq handler already installed");
1203 return;
1204 }
1205 hrt_irq_disable(dev); /* insurance */
1206 if (request_irq(-dev->irq, hrt_irq_handler,
1207 SA_SHIRQ, "hrt", (void*)dev)) {
1208 HRT_ERROR_MSG("unable to reserve IRQ");
1209 dev->irq = 0;
1210 } else {
1211 dev->irq = -dev->irq;
1212 dev->mode |= HRT_IRQ_MODE;
1213 }
1214 }
1215
1216 void hrt_irq_cleanup(hrt_t* dev)
1217 {
1218 HRT_DEBUG_MSG(2, "hrt_irq_cleanup");
1219 if (dev->mode & HRT_IRQ_MODE) {
1220 free_irq(dev->irq, dev);
1221 dev->mode &= ~HRT_IRQ_MODE;
1222 }
1223 }
1224
1225 void hrt_timer_init(hrt_t* dev)
1226 {
1227 HRT_DEBUG_MSG(1, "hrt_timer_init");
1228 HRT_CHECK(dev, HRT_INITIALIZING_STATE, "4");
1229 if (dev->timer_active) {
1230 HRT_ERROR_MSG("irq or timer already active");
1231 }
1232 hrt_irq_init(dev);
1233 if (!(dev->mode & HRT_IRQ_MODE)) {
1234 if (dev->timer.function) {
1235 HRT_ERROR_MSG("timer already initialized");
1236 return;
1237 }
1238 HRT_DEBUG_MSG(1, "installing timer");
1239 init_timer(&dev->timer);
1240 dev->timer.function = hrt_timer_handler;
1241 dev->timer.data = (unsigned long)dev;
1242 }
1243 }
1244
1245 void hrt_timer_cleanup(hrt_t* dev)
1246 {
1247 HRT_DEBUG_MSG(1, "hrt_timer_cleanup");
1248 HRT_CHECK(dev, HRT_FINALIZING_STATE, "3");
1249 hrt_timer_deactivate (dev);
1250 hrt_irq_cleanup(dev);
1251 dev->timer.function = NULL;
1252 }
1253
1254 void hrt_timer_deactivate(hrt_t* dev)
1255 {
1256 HRT_DEBUG_MSG(1, "hrt_timer_deactivate");
1257 if (dev->timer_active) {
1258 dev->timer_active = 0;
1259 if (dev->mode & HRT_IRQ_MODE) hrt_irq_disable(dev);
1260 else del_timer_sync(&dev->timer);
1261 tasklet_disable(&dev->tasklet);
1262 }
1263 }
1264
1265 /* hrt_time_activate
1266 -----------------
1267
1268 starts a task to monitor the state of the device.
1269 This may be driven by a timer or by an interrupt
1270 from the device.
1271 */
1272
1273 int hrt_timer_activate(hrt_t* dev)
1274 {
1275 int result = 0;
1276 HRT_DEBUG_MSG(1, "hrt_timer_activate");
1277 if (dev->timer_active) {
1278 HRT_ERROR_MSG("irq or timer already active");
1279 return 0;
1280 }
1281 dev->timer_active = 1;
1282 if (dev->mode & HRT_IRQ_MODE) {
1283 HRT_DEBUG_MSG(1, "enabling irq");
1284 hrt_irq_enable(dev);
1285 } else {
1286 if (!dev->timer.function) {
1287 HRT_ERROR_MSG("timer not initialized");
1288 return -1;
1289 }
1290 dev->timer.expires = jiffies + HZ/100;
1291 add_timer(&dev->timer);
1292 }
1293 return result;
1294 }
1295
1296 /* hrt_tasklet
1297 -----------
1298
1299 is called in response to either a timer interrupt
1300 or an interrupt generated by the device
1301
1302 */
1303
1304 void hrt_tasklet(unsigned long data)
1305 { int field;
1306 hrt_t *dev = (hrt_t *) data;
1307 if (hrt_trylock (dev)) { /* device is busy */
1308 /* could add a wakeup mechanism here */
1309 return;
1310 }
1311 field = hrt_get_field (dev);
1312 if (dev->field == -1) {
1313 /* just started; don't know previous state */
1314 dev->field = field;
1315 goto done;
1316 }
1317 if (field != dev->field) {
1318 /* field has changed */
1319 if (dev->field_changes == 1) {
1320 HRT_DEBUG_MSG(1, "field changes going to 0 %d", dev->num);
1321 wake_up_interruptible (&dev->wait_queue);
1322 }
1323 if (dev->field_changes) dev->field_changes--;
1324 }
1325 /* .... this code is incomplete
1326 Eventually, there should be code here to
1327 keep track of how many fields have been digitized,
1328 and arrange for buffering the data */
1329 done:
1330 hrt_unlock(dev);
1331 }
1332
1333 /********************************
1334 * basic file operations (fops) *
1335 ********************************/
1336
1337 int hrt_open (struct inode *inode, struct file *file);
1338 int hrt_release(struct inode *inode, struct file *file);
1339 int hrt_read (struct file *file, char *buf, size_t count, loff_t * ppos);
1340 int hrt_ioctl (struct inode *inode, struct file *filp,
1341 unsigned int cmd, unsigned long arg);
1342 int hrt_mmap (struct file *file, struct vm_area_struct *vma);
1343
1344 static struct file_operations hrt_fops = {
1345 .owner = THIS_MODULE,
1346 .open = hrt_open,
1347 .release = hrt_release,
1348 .read = hrt_read,
1349 .ioctl = hrt_ioctl,
1350 .mmap = hrt_mmap,
1351 };
1352
1353 /**
1354 * hrt_open
1355 *
1356 * checks minor number range, sets private_data,
1357 * starts timer if necessary, increments users
1358 */
1359 int hrt_open(struct inode *inode, struct file *file)
1360 {
1361 hrt_t* dev;
1362 unsigned int minor;
1363 int result = 0;
1364
1365 minor = MINOR(inode->i_rdev);
1366 if (minor >= HRT_MAX_DEVICES) return -ENODEV;
1367
1368 dev = hrt_devices + minor;
1369 HRT_DEBUG_MSG(1, "opening device %d at addr %lX", minor, (unsigned long)dev);
1370
1371 if (dev->state != HRT_CLOSED_STATE) {
1372 HRT_DEBUG_MSG(2, "already open");
1373 return -EBUSY;
1374 }
1375 HRT_DEBUG_MSG(2, "setting private data");
1376 file->private_data = (void*)dev;
1377 dev->state = HRT_OPEN_STATE;
1378 hrt_go_live(dev);
1379
1380 /* FIXME: shift responsibility for buffer allocation
1381 to open (here) and deallocation to the release operation;
1382 only do this later, when everything else is working. */
1383
1384 HRT_DEBUG_MSG(2, "installing timer/irq");
1385 result = hrt_timer_activate(dev);
1386
1387 return result;
1388 }
1389
1390 /* hrt_release should not need any lock, because
1391 it is only called by the system, on last close; at that
1392 point there should be no possibility of more calls that
1393 touch this device, unless they are from a timer
1394 or interrrupt handler */
1395
1396 int hrt_release(struct inode *inode, struct file *file)
1397 {
1398 hrt_t* dev = file->private_data;
1399 if (dev->state != HRT_OPEN_STATE) return -ENODEV;
1400 dev->state = HRT_CLOSED_STATE;
1401 hrt_timer_deactivate(dev);
1402 /* above should wait for active tasklet to finish */
1403 return 0;
1404 }
1405
1406 int hrt_read(struct file *file, char *buf, size_t count, loff_t * ppos)
1407 {
1408 hrt_t* dev = file->private_data;
1409 int max_count, result;
1410
1411 HRT_DEBUG_MSG(3, "hrt_read_proc (1) count = %d", count);
1412 if (dev->state != HRT_OPEN_STATE) return -ENODEV;
1413
1414 hrt_lock(dev);
1415 dev->field_changes = 2;
1416 if (dev->is_frozen) {
1417 hrt_go_live (dev);
1418 hrt_unlock(dev);
1419 if (wait_event_interruptible(dev->wait_queue, dev->field_changes == 0)) {
1420 return -ERESTARTSYS;
1421 }
1422 hrt_lock(dev);
1423 dev->field_changes = 2;
1424 }
1425
1426 hrt_freeze_next(dev);
1427 hrt_unlock(dev);
1428 if (wait_event_interruptible(dev->wait_queue, dev->field_changes == 0)) {
1429 return -ERESTARTSYS;
1430 }
1431
1432 HRT_DEBUG_MSG(3, "hrt_read_proc (3) bpp = %d width = %d height = %d",
1433 dev->bytes_per_pixel, dev->win_width, dev->win_height);
1434 max_count = dev->win_width * dev->win_height * dev->bytes_per_pixel;
1435 if (count > max_count) count = max_count;
1436 hrt_lock(dev);
1437 HRT_DEBUG_MSG(3, "hrt_read_proc (4) count = %d", count);
1438 if ((result = hrt_copy_window(dev, buf))) {
1439 HRT_DEBUG_MSG(3, "hrt_copy_window failed %d", result);
1440 hrt_unlock(dev);
1441 return -EFAULT;
1442 }
1443 hrt_unlock(dev);
1444 HRT_DEBUG_MSG(3, "hrt_read_proc (5)");
1445 return count;
1446 }
1447
1448 /*
1449 * ioctl operations
1450 */
1451
1452 int hrt_ioctl(struct inode *inode, struct file *file,
1453 unsigned int cmd, unsigned long arg)
1454 {
1455 int result = 0, iarg = *((int*)arg);
1456 hrt_t* dev = file->private_data;
1457
1458
1459 switch (cmd)
1460 {
1461 case IOC_HRT_FREEZE_FRAME:
1462 HRT_DEBUG_MSG(2, "IOC_HRT_FREEZE_FRAME: called");
1463 hrt_freeze_next(dev);
1464 break;
1465
1466 case IOC_HRT_GO_LIVE:
1467 HRT_DEBUG_MSG(2, "IOC_HRT_GO_LIVE: called");
1468 hrt_go_live(dev);
1469 break;
1470
1471 case IOC_HRT_WIN_SET_WIDTH:
1472 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_WIDTH: called with arg %d", iarg);
1473 dev->win_width = iarg;
1474 break;
1475 case IOC_HRT_WIN_SET_HEIGHT:
1476 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_HEIGHT: called with arg %d", iarg);
1477 dev->win_height = iarg;
1478 break;
1479 case IOC_HRT_WIN_SET_X:
1480 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_X: called with arg %d", iarg);
1481 dev->win_col = iarg;
1482 break;
1483 case IOC_HRT_WIN_SET_Y:
1484 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_Y: called with arg %d", iarg);
1485 dev->win_row = iarg;
1486 break;
1487
1488 default:
1489 result = -ENOSYS;
1490 break;
1491 }
1492
1493 return result;
1494 }
1495
1496 int hrt_mmap (struct file *file, struct vm_area_struct *vma)
1497 {
1498 return -ENOSYS;
1499 }
1500
1501 #ifdef CONFIG_PCI
1502
1503 /***************
1504 * PCI support *
1505 ***************/
1506
1507 MODULE_DEVICE_TABLE(pci, hrt_pci_tbl);
1508 int hrt_pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id);
1509 void hrt_pci_remove (struct pci_dev *pci_dev);
1510
1511 static struct pci_device_id hrt_pci_tbl[] __devinitdata = {
1512 {PCI_DEVICE(HRT_VENDOR_ID, HRT_DEVICE_ID_GREY)},
1513 {PCI_DEVICE(HRT_VENDOR_ID, HRT_DEVICE_ID_COLOR)},
1514 {0,}
1515 };
1516
1517 static struct pci_driver hrt_pci_driver = {
1518 .name = "hrt",
1519 .id_table = hrt_pci_tbl,
1520 .probe = hrt_pci_probe,
1521 .remove = __devexit_p(hrt_pci_remove)
1522 };
1523
1524 int hrt_pci_probe(struct pci_dev *pci_dev,
1525 const struct pci_device_id *pci_id)
1526 {
1527 HRT_DEBUG_MSG(2, "probing pci device");
1528
1529 /* check that this is a type of device we support */
1530 if ((pci_dev->device != HRT_DEVICE_ID_COLOR) &&
1531 (pci_dev->device != HRT_DEVICE_ID_GREY)) {
1532 HRT_ERROR_MSG("unknown device type 0x%hx",
1533 pci_dev->device);
1534 return -ENODEV;
1535 }
1536
1537 if (hrt_num_devices >= HRT_MAX_DEVICES) {
1538 HRT_ERROR_MSG("need to increase HRT_MAX_DEVICES");
1539 return -ENOMEM;
1540 }
1541
1542 return hrt_init(pci_resource_start(pci_dev, 0), pci_dev);
1543 }
1544
1545 /* since these cards are not intended to be hot-pluggable,
1546 we do not try to reuse hrt_t objects; we just use the remove
1547 operation for removal of the device driver module */
1548
1549 void hrt_pci_remove (struct pci_dev *pci_dev)
1550 {
1551 hrt_t *dev;
1552 HRT_DEBUG_MSG(2, "hrt_pci_remove");
1553 dev = (hrt_t *) pci_get_drvdata (pci_dev);
1554 hrt_cleanup(dev);
1555 pci_disable_device(pci_dev);
1556 }
1557
1558 void hrt_pci_init(void)
1559 {
1560 HRT_DEBUG_MSG(2, "pci_register_driver");
1561 pci_register_driver(&hrt_pci_driver);
1562 }
1563
1564 void hrt_pci_cleanup(void)
1565 {
1566 HRT_DEBUG_MSG(2, "pci_unregister_driver");
1567 pci_unregister_driver(&hrt_pci_driver);
1568 }
1569
1570 #else
1571
1572 /* no PCI support */
1573
1574 void hrt_pci_init(void)
1575 {
1576 }
1577
1578 void hrt_pci_cleanup(void)
1579 {
1580 }
1581
1582 #endif
1583
1584 /*************************************
1585 * module initialization and cleanup *
1586 *************************************/
1587
1588 int hrt_major_number = 0;
1589
1590 void hrt_cleanup_module(void)
1591 {
1592 HRT_MODULE_CHECK (HRT_MODULE_INITIALIZING_STATE |
1593 HRT_MODULE_INITIALIZED_STATE, "6");
1594 hrt_module_state = HRT_MODULE_FINALIZING_STATE;
1595 HRT_DEBUG_MSG(2, "hrt_cleanup_module");
1596 hrt_isa_cleanup();
1597 hrt_pci_cleanup();
1598 if (hrt_major_number) unregister_chrdev(hrt_major_number, "hrt");
1599 hrt_debug_cleanup();
1600 hrt_module_state = HRT_MODULE_UNINITIALIZED_STATE;
1601 }
1602
1603 int hrt_init_module(void)
1604 {
1605 int result = 0;
1606 hrt_module_state = HRT_MODULE_INITIALIZING_STATE;
1607 hrt_debug_init();
1608 result = register_chrdev(major_number, "hrt", &hrt_fops);
1609 if (result < 0) {
1610 HRT_ERROR_MSG("failed to register char device %d",
1611 major_number);
1612 goto failed;
1613 }
1614
1615 /* use major number returned by system if no
1616 major number is specified by this module */
1617 if (major_number == 0) hrt_major_number = result;
1618 else hrt_major_number = major_number;
1619 HRT_ERROR_MSG("module initializing with major number %d",
1620 hrt_major_number);
1621
1622 memset(hrt_devices, 0, sizeof(hrt_devices));
1623
1624 /* detect ISA/PC104 devices, and PCI devices that are
1625 jumpered to use the ISA/PC104 I/O address space */
1626 hrt_isa_init();
1627
1628 /* now detect regular PCI devices */
1629 hrt_pci_init();
1630
1631 if (hrt_num_devices == 0) {
1632 HRT_ERROR_MSG("no hrt devices detected");
1633 hrt_module_state = HRT_MODULE_UNINITIALIZED_STATE;
1634 return -ENODEV;
1635 } else {
1636 HRT_ERROR_MSG("found %d hrt devices", hrt_num_devices);
1637 }
1638 hrt_module_state = HRT_MODULE_INITIALIZED_STATE;
1639 return 0;
1640 failed:
1641 hrt_cleanup_module();
1642 HRT_DEBUG_MSG(2, "returning from failed init_module() with result %d",
1643 result);
1644 hrt_module_state = HRT_MODULE_UNINITIALIZED_STATE;
1645 return result;
1646 }
1647
1648 module_init(hrt_init_module);
1649 module_exit(hrt_cleanup_module);
1650
1651 MODULE_LICENSE("GPL");
1652 @
1653
1654
1655 1.15
1656 log
1657 @*** empty log message ***
1658 @
1659 text
1660 @d5 5
1661 d22 1
1662 a22 1
1663 (2) The V4L API is seems sufficiently unstable as to cause
1664 d77 1
1665 a101 2
1666 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
1667 #define KERNEL_2_6
1668 a102 9
1669 #define HRT_MOD_DEC_USE_COUNT
1670 #define HRT_MOD_INC_USE_COUNT
1671 #else
1672 #ifndef MODULE
1673 #define MODULE
1674 #define HRT_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT
1675 #define HRT_MOD_INC_USE_COUNT MOD_INC_USE_COUNT
1676 #endif
1677 #endif
1678 d194 3
1679 d232 4
1680 d316 1
1681 a316 1
1682 #define I2C_BUSY(addr) (!(ioread8((char *) HRT_CONTROL(addr)) & 0x80))
1683 d322 2
1684 a323 1
1685 iowrite8(HRT_FREEZE_NEXT_CMD, (char *) (dev->virt_addr + HRT_CONTROL_REG))
1686 d325 2
1687 a326 1
1688 iowrite8(HRT_FREEZE_IMM_CMD, (char *) (dev->virt_addr + HRT_CONTROL_REG))
1689 d328 2
1690 a329 1
1691 iowrite8(HRT_LIVE_CMD, (char *) (dev->virt_addr + HRT_CONTROL_REG))
1692 d331 1
1693 a331 1
1694 ioread8((char *) (dev->virt_addr + HRT_CONTROL_REG)) & 0x1
1695 d400 1
1696 a400 1
1697 0x33, 0x8c, /* mixer control #4 */
1698 d413 1
1699 a413 1
1700 iowrite8(dev->i2c_bits, (char *) I2C_CONTROL(addr));
1701 d426 1
1702 a426 1
1703 iowrite8(dev->i2c_bits, (char *) I2C_CONTROL(addr));
1704 d442 1
1705 a442 1
1706 iowrite8(dev->i2c_bits, (char *) I2C_CONTROL(addr));
1707 d451 1
1708 a451 1
1709 { char c = ioread8((char *) I2C_CONTROL(addr)); return (c & HRT_I2C_SDA); }
1710 d497 1
1711 a497 1
1712 iowrite8(dev->i2c_bits | 0x04, (char *) I2C_CONTROL(addr));
1713 d661 1
1714 a661 1
1715 win_end = (dev->win_row + dev->win_height) * dev_line_length;
1716 d663 1
1717 a663 1
1718 iowrite16(y, (int *) y_addr);
1719 d665 6
1720 a670 2
1721 if (copy_to_user(buf, (void *) in_addr, win_width))
1722 return -EFAULT;
1723 d675 1
1724 a675 1
1725 win_end = (dev->win_row + dev->win_height) * dev_line_length;
1726 d677 1
1727 a677 1
1728 iowrite16(y, (int *) y_addr);
1729 d679 2
1730 a680 1
1731 if (copy_to_user(buf, (void *) in_addr, win_width))
1732 d682 1
1733 d710 1
1734 a710 1
1735 val = ioread8((char *)(dev->virt_addr + HRT_IRQ_ENABLE));
1736 d712 1
1737 a712 1
1738 iowrite8(val, (char *) (dev->virt_addr + HRT_IRQ_ENABLE));
1739 d719 1
1740 a719 1
1741 val = ioread8((char *)(dev->virt_addr + HRT_IRQ_ENABLE));
1742 d721 1
1743 a721 1
1744 iowrite8(val, (char *) (dev->virt_addr + HRT_IRQ_ENABLE));
1745 d736 2
1746 a737 1
1747 HRT_CHECK (dev, HRT_INITIALIZING_STATE | HRT_FINALIZING_STATE, "2");
1748 a813 2
1749 /* dev->state = HRT_INITIALIZING_STATE;
1750 dev->mode = 0; ... */
1751 d815 1
1752 d818 1
1753 d839 19
1754 d862 4
1755 a865 4
1756 old_control = ioread8((char *)(HRT_CONTROL_REG + virt_address));
1757 old_y_low = ioread16((int *)(HRT_Y_LOW_REG + virt_address));
1758 old_y_high = ioread16((int *)(HRT_Y_HIGH_REG + virt_address));
1759
1760 d867 1
1761 a867 1
1762 iowrite8(0x5B, (char *) (HRT_CONTROL_REG + virt_address));
1763 d870 4
1764 a873 4
1765 iowrite16(0, (int *) (HRT_Y_LOW_REG + virt_address));
1766 iowrite16(0, (int *) (HRT_Y_HIGH_REG + virt_address));
1767 val1 = ioread8((char *) virt_address);
1768 iowrite8(~val1, (char *) virt_address);
1769 d876 2
1770 a877 2
1771 iowrite16(1, (int *) (HRT_Y_LOW_REG + virt_address));
1772 iowrite8(val1, (char *) virt_address);
1773 d880 2
1774 a881 2
1775 iowrite16(0, (int *) (HRT_Y_LOW_REG + virt_address));
1776 val2 = ioread8((char *) virt_address);
1777 d894 4
1778 a897 4
1779 iowrite8(val1, (char *) virt_address);
1780 iowrite8(old_y_low, (char *) (HRT_Y_LOW_REG + virt_address));
1781 iowrite8(old_y_high, (char *) (HRT_Y_HIGH_REG + virt_address));
1782 iowrite8(old_control, (char *) (HRT_CONTROL_REG + virt_address));
1783 d910 5
1784 a914 5
1785 iowrite8(HRT_FREEZE_IMM_CMD, (char *) (HRT_CONTROL_REG + virt_address));
1786 iowrite16(0, (int *) (HRT_Y_LOW_REG + virt_address));
1787 iowrite16(0, (int *) (HRT_Y_HIGH_REG + virt_address));
1788 val1 = ioread8((char *)(0x400 + virt_address));
1789 iowrite8(~val1, (char *) (0x400 + virt_address));
1790 d917 2
1791 a918 2
1792 iowrite8(val1, (char *) (virt_address));
1793 val2 = ioread8((char *)(0x400 + virt_address));
1794 d950 2
1795 a951 2
1796 iowrite16(0, (int *) (dev->virt_addr + HRT_Y_HIGH_REG));
1797 iowrite16(500, (int *) (dev->virt_addr + HRT_Y_LOW_REG));
1798 d953 1
1799 a953 1
1800 iowrite8(0, (char *)(dev->virt_addr + i));
1801 d961 1
1802 a961 1
1803 iowrite8(255, (char *) (dev->virt_addr + i));
1804 d972 1
1805 a972 1
1806 if (!ioread8((char *)(dev->virt_addr + i))) result = 0;
1807 d982 3
1808 a984 21
1809 /* pci-specific processing */
1810 if (pci_dev) {
1811 pci_set_drvdata (pci_dev, dev);
1812 dev->pci_dev = pci_dev;
1813 dev->irq = -pci_dev->irq;
1814 dev->mode &= ~HRT_ISA_MODE;
1815 if ((pci_dev->device == HRT_DEVICE_ID_COLOR) !=
1816 ((dev->mode & HRT_COLOR_MODE) == HRT_COLOR_MODE))
1817 HRT_ERROR_MSG("PCI and probed types don't match");
1818
1819 /* make certain IRQ is disabled before enabling
1820 device, or else we may get an IRQ we are not
1821 prepared to handle? */
1822 hrt_irq_disable(dev);
1823
1824 if (pci_enable_device(pci_dev)) {
1825 HRT_ERROR_MSG("pci_enable_device failed");
1826 hrt_cleanup(dev);
1827 return -EIO;
1828 }
1829 }
1830 d1060 1
1831 a1060 1
1832 int r = ioread8((char *)(dev->virt_addr + HRT_CONTROL_REG)) & 0x4;
1833 a1064 1
1834 #ifdef KERNEL_2_6
1835 a1065 3
1836 #else
1837 void hrt_irq_handler(int irq, void* dev_id, struct pt_regs* regs)
1838 #endif
1839 d1221 2
1840 a1222 3
1841 HRT_DEBUG_MSG(1, "field changed %d", dev->num);
1842 dev->is_frozen++;
1843 if (dev->is_frozen == 3)
1844 d1224 2
1845 a1252 1
1846
1847 d1282 3
1848 a1284 2
1849 /* consider shifting responsibility for buffer allocation
1850 to open (here) and deallocation to the release operation */
1851 a1285 1
1852 /* consider doing this later, and only when we need it */
1853 a1288 1
1854 HRT_MOD_INC_USE_COUNT;
1855 a1304 1
1856 HRT_MOD_DEC_USE_COUNT;
1857 d1311 1
1858 a1311 1
1859 int max_count;
1860 a1315 1
1861 /* assume the card is already live */
1862 d1317 11
1863 a1328 1
1864 dev->is_frozen = 0;
1865 d1330 1
1866 a1330 3
1867
1868 /* wait for handler to tell us a frame is ready */
1869 if (wait_event_interruptible(dev->wait_queue, dev->is_frozen)) {
1870 d1340 2
1871 a1341 1
1872 if (hrt_copy_window(dev, buf)) {
1873 d1414 2
1874 a1415 2
1875 {HRT_VENDOR_ID, HRT_DEVICE_ID_GREY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1876 {HRT_VENDOR_ID, HRT_DEVICE_ID_COLOR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1877 d1443 1
1878 a1443 1
1879
1880 @
1881
1882
1883 1.14
1884 log
1885 @*** empty log message ***
1886 @
1887 text
1888 @d314 1
1889 a314 1
1890 #define I2C_BUSY(addr) (!(readb(HRT_CONTROL(addr)) & 0x80))
1891 d320 1
1892 a320 1
1893 writeb(HRT_FREEZE_NEXT_CMD, dev->virt_addr + HRT_CONTROL_REG)
1894 d322 1
1895 a322 1
1896 writeb(HRT_FREEZE_IMM_CMD, dev->virt_addr + HRT_CONTROL_REG)
1897 d324 1
1898 a324 1
1899 writeb(HRT_LIVE_CMD, dev->virt_addr + HRT_CONTROL_REG)
1900 d326 1
1901 a326 1
1902 readb(dev->virt_addr + HRT_CONTROL_REG) & 0x1
1903 d408 1
1904 a408 1
1905 writeb(dev->i2c_bits, I2C_CONTROL(addr));
1906 d421 1
1907 a421 1
1908 writeb(dev->i2c_bits, I2C_CONTROL(addr));
1909 d437 1
1910 a437 1
1911 writeb(dev->i2c_bits, I2C_CONTROL(addr));
1912 d446 1
1913 a446 1
1914 { char c = readb(I2C_CONTROL(addr)); return (c & HRT_I2C_SDA); }
1915 d492 1
1916 a492 1
1917 writeb(dev->i2c_bits | 0x04, I2C_CONTROL(addr));
1918 d658 1
1919 a658 1
1920 writew(y, y_addr);
1921 d668 1
1922 a668 1
1923 writew(y, y_addr);
1924 d699 1
1925 a699 1
1926 val = readb(dev->virt_addr + HRT_IRQ_ENABLE);
1927 d701 1
1928 a701 1
1929 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
1930 d708 1
1931 a708 1
1932 val = readb(dev->virt_addr + HRT_IRQ_ENABLE);
1933 d710 1
1934 a710 1
1935 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
1936 d831 3
1937 a833 3
1938 old_control = readb(HRT_CONTROL_REG + virt_address);
1939 old_y_low = readw(HRT_Y_LOW_REG + virt_address);
1940 old_y_high = readw(HRT_Y_HIGH_REG + virt_address);
1941 d836 1
1942 a836 1
1943 writeb(0x5B, HRT_CONTROL_REG + virt_address);
1944 d839 4
1945 a842 4
1946 writew(0, HRT_Y_LOW_REG + virt_address);
1947 writew(0, HRT_Y_HIGH_REG + virt_address);
1948 val1 = readb(virt_address);
1949 writeb(~val1, virt_address);
1950 d845 2
1951 a846 2
1952 writew(1, HRT_Y_LOW_REG + virt_address);
1953 writeb(val1, virt_address);
1954 d849 2
1955 a850 2
1956 writew(0, HRT_Y_LOW_REG + virt_address);
1957 val2 = readb(virt_address);
1958 d863 4
1959 a866 4
1960 writeb(val1, virt_address);
1961 writeb(old_y_low, HRT_Y_LOW_REG + virt_address);
1962 writeb(old_y_high, HRT_Y_HIGH_REG + virt_address);
1963 writeb(old_control, HRT_CONTROL_REG + virt_address);
1964 d879 5
1965 a883 5
1966 writeb(HRT_FREEZE_IMM_CMD, HRT_CONTROL_REG + virt_address);
1967 writew(0, HRT_Y_LOW_REG + virt_address);
1968 writew(0, HRT_Y_HIGH_REG + virt_address);
1969 val1 = readb(0x400 + virt_address);
1970 writeb(~val1, 0x400 + virt_address);
1971 d886 2
1972 a887 2
1973 writeb(val1, virt_address);
1974 val2 = readb(0x400 + virt_address);
1975 d919 2
1976 a920 2
1977 writew(0, dev->virt_addr + HRT_Y_HIGH_REG);
1978 writew(500, dev->virt_addr + HRT_Y_LOW_REG);
1979 d922 1
1980 a922 1
1981 writeb(0, dev->virt_addr + i);
1982 d930 1
1983 a930 1
1984 writeb(255, dev->virt_addr + i);
1985 d941 1
1986 a941 1
1987 if (!readb(dev->virt_addr + i)) result = 0;
1988 d1047 1
1989 a1047 1
1990 int r = readb(dev->virt_addr + HRT_CONTROL_REG) & 0x4;
1991 @
1992
1993
1994 1.13
1995 log
1996 @*** empty log message ***
1997 @
1998 text
1999 @d39 33
2000 a160 3
2001 #define HRT_MAX_BUFFERS 3
2002 #define HRT_DEFAULT_BUFFER_COUNT HRT_MAX_BUFFERS
2003
2004 d175 1
2005 a175 2
2006 /* spinlock controls access to the device, in
2007 case we have more than one CPU */
2008 d177 1
2009 a177 1
2010 struct semaphore sem;
2011 a195 17
2012 /* tells us whether to stream */
2013 /* frame size and buffering information */
2014 char *buffers[HRT_MAX_BUFFERS];
2015 /* contains pointers to the actual buffers */
2016 int buffer_count;
2017 int buffer_size;
2018 /* the raw size of the buffer;
2019 must be at least as large as the number of
2020 bytes in the video format */
2021 int in_buffer;
2022 /* device may write to in_buffer
2023 may only advance in_buffer
2024 if read_buffer = old in_buffer */
2025 int out_buffer;
2026 /* user may read from out_buffer
2027 if out_buffer != in_buffer */
2028 /* current window of interest */
2029 d197 1
2030 d199 1
2031 a199 1
2032 /* current choice of interlaced frames */
2033 a202 1
2034 int debug_missed_frames;
2035 d242 1
2036 a242 1
2037 #define HRT_DEBUG_LEVEL 1
2038 d280 3
2039 a282 3
2040 write_buf("%6i %6i %7i %9i %8i\n", i,
2041 hrt_devices[i].irq_count,
2042 ips, tps, rps);
2043 a283 1
2044
2045 d636 1
2046 a636 1
2047 * ignoring field (assume frame is frozen)
2048 d639 1
2049 a639 1
2050 void hrt_copy_window(hrt_t *dev)
2051 a640 1
2052 char *buf;
2053 a646 4
2054 i = (dev->in_buffer + 1) % dev->buffer_count;
2055 if (i != dev->out_buffer) dev->in_buffer = i;
2056
2057 buf = dev->buffers[dev->in_buffer];
2058 d660 2
2059 a661 1
2060 memcpy_fromio(buf, in_addr, win_width);
2061 d670 2
2062 a671 1
2063 memcpy_fromio(buf, in_addr, win_width);
2064 d688 1
2065 a718 7
2066 /* hrt_cleanup does not bother locking dev->sem,
2067 because we assume it is only called either (a) during
2068 device initialization, when no one else should yet know
2069 about the device, or (b) during module cleanup, when
2070 the module reference count tells us that no one else
2071 should be active in the module */
2072
2073 a744 8
2074 {
2075 int i;
2076 HRT_DEBUG_MSG(2, "freeing frame buffer(s)");
2077 vfree(dev->buffers[0]);
2078 for (i = 0; i < dev->buffer_count; i++) dev->buffers[i] = NULL;
2079 dev->in_buffer = dev->out_buffer = 0;
2080 }
2081 dev->in_buffer = dev->out_buffer = 0;
2082 d754 35
2083 d806 1
2084 a806 1
2085 spin_lock_init(&dev->spinlock);
2086 d910 2
2087 d975 1
2088 a975 1
2089 if (dev->irq) hrt_timer_init(dev);
2090 a1007 3
2091 /* maybe we don't need this semaphore? */
2092 sema_init(&dev->sem, 1);
2093
2094 d1012 1
2095 a1016 1
2096
2097 a1017 26
2098
2099 /* allocate image buffers */
2100 dev->buffer_size = PAGE_ALIGN(dev->rows *
2101 dev->cols * dev->bytes_per_pixel);
2102 dev->buffer_count = HRT_DEFAULT_BUFFER_COUNT;
2103 if ((dev->buffer_count < 3) > (dev->buffer_count > HRT_MAX_BUFFERS)) {
2104 HRT_ERROR_MSG("unsupported buffer count");
2105 hrt_cleanup(dev);
2106 return -ENOMEM;
2107 }
2108 dev->buffers[0] = vmalloc(dev->buffer_size*dev->buffer_count);
2109 if (dev->buffers[0] == NULL) {
2110 HRT_ERROR_MSG("unable to allocate %d bytes of buffers",
2111 dev->buffer_size*dev->buffer_count);
2112 hrt_cleanup(dev);
2113 return -ENOMEM;
2114 }
2115 for (i = 1; i < dev->buffer_count; i++)
2116 dev->buffers[i] = dev->buffers[i-1] + dev->buffer_size;
2117 dev->in_buffer = dev->out_buffer = 0;
2118 HRT_DEBUG_MSG(1, "allocated %d buffers of size %d",
2119 dev->buffer_count, dev->buffer_size);
2120
2121 /* do we want to postpone this until open, or maybe read? */
2122 hrt_go_live(dev);
2123
2124 a1051 114
2125 /* video capture modes:
2126
2127 We support several different capture modes, depending on some
2128 of the bits in dev->mode.
2129
2130 (a) dev->mode & HRT_STREAMING_MODE
2131
2132 The intent is to capture a continuous video stream. For capturing
2133 continous video, we want to capture and buffer frames in advance of
2134 the read operation that fetches them. However, this could waste a log
2135 of PCI and CPU time if we are not interested in the frames. In the
2136 worst case, we could chew up so much PCI bus and CPU time bringing in
2137 frames that we do not have time to process the frames. Therefore, we
2138 should support both a single-shot mode and a streaming mode, and the
2139 streaming mode should have a capability of adjusting frame rate.
2140
2141 (b) dev->mode & HRT_DUAL_PORTED_MODE
2142
2143 The card supports reading from the card concurrently
2144 with digitization. Apparently, the greyscale card has dual-ported
2145 memory, and so we can read from the card while it is digitizing,
2146 but the color card does not have this capability. We want to use
2147 this capability when it is available.
2148
2149 Should we care whether we always get an even-odd pair of fields, or is
2150 odd-even also OK? Allowing variation between even-odd and odd-even
2151 may allow higher bandwidth, since we can skip forward by fields rather
2152 than pairs of fields, when we fall behind. On the other hand, the
2153 value of the data may be reduced, since the "sheer" between fields may
2154 vary in direction. For example, this could cause trouble for an
2155 algorithm that tries to determine the direction of motion from the
2156 sheer. For the moment, we insist on matching even-odd frames.
2157
2158 (c) dev->mode & HRT_IRQ_MODE
2159
2160 The card generates a vertical blanking interrupt. This enables us to
2161 more precisely determine when we have a complete frame. We want to
2162 use this capability when it is available.
2163
2164 (d) At some future point, we plan to add a mode that supports direct
2165 copying of data into user-provided buffers. For now, buffers are
2166 always allocated by the driver.
2167
2168 Nonblocking read operation:
2169
2170 1. Check whether a frame is available.
2171 2. If not, return failure.
2172 3. Else, copy frome to user memory.
2173 4. Advance buffer.
2174 (If streaming and buffers were full, advancing buffer reinitiates
2175 capture timer/interrupt.)
2176
2177 Blocking read operation:
2178
2179 1. Initiate digitization, if necessary.
2180 2. Wait for a frame to become available.
2181 3. Copy frame to user memory.
2182 4. Advance buffer.
2183 Advancing buffer reinitiates capture timer/interrupt
2184 if streaming and buffers were full.
2185
2186 Timer handler:
2187
2188 1. If dual-ported and copying is (still) active
2189 and field has changed, freeze frame.
2190 2. If there is no data ready to copy, reschedule timer and return.
2191 3. If there is no buffer space, return without rescheduling timer.
2192 4. If not dual-ported, freeze frame.
2193 5. Schedule buffering tasklet.
2194 6. If streaming, reschedule timer.
2195
2196 Frame interrupt handler:
2197
2198 1. If dual-ported and copying is (still) active
2199 and field has changed, freeze frame.
2200 2. If there is no data ready to copy, return.
2201 3. If there is no buffer space, return without reenabling interrupt.
2202 4. If not dual-ported, freeze frame.
2203 5. Schedule buffering tasklet.
2204 6. If streaming, Reenable interrupt.
2205
2206 Buffering tasklet:
2207
2208 1. a. If dual-ported
2209 1. Copy one field to buffer.
2210 2. If this is second (odd) field, advance buffer.
2211 Advancing buffer may wake up a blocked reader.
2212 b. Otherwise
2213 1. Copy both fields to buffer
2214 2. Advance buffer.
2215 3. Go live again
2216
2217 ...still working here
2218
2219 */
2220
2221 /*
2222 rules for direct I/O access to the device
2223
2224 We cannot allow concurrent access to the device, lest
2225 it be confused by sequences of commands that are interleaved.
2226 Mutual exclusion is guaranteed as follows:
2227
2228 (1) The holder of dev->spinlock can do I/O on the device.
2229 (2) The IRQ/timer handler uses spin_lock/unlock, and normally
2230 scheduled code uses spin_lock/unlock_irqsave/restore.
2231 (3) Since we don't want to hold interrupts disabled the whole
2232 time we copy data from the buffer, ...
2233
2234 ...can we assume that the tasklet cannot be interrupted by
2235 the handler? or, must the tasklet use spin_lock_irqsave? ...
2236
2237 */
2238
2239 a1061 1
2240
2241 a1062 4
2242 /*
2243 if (!dev->timer_active) goto done;
2244 if (dev->state != HRT_OPEN_STATE) goto done;
2245 */
2246 d1064 2
2247 a1065 1
2248 or else risk race with last scheduled tasklet */
2249 a1066 1
2250 done:
2251 d1126 1
2252 a1126 1
2253 if (!dev->mode & HRT_IRQ_MODE) {
2254 d1158 8
2255 d1180 1
2256 a1180 1
2257 HRT_ERROR_MSG("timer not intialized");
2258 d1189 8
2259 d1198 1
2260 a1198 1
2261 {
2262 d1200 4
2263 a1203 4
2264 spin_lock(&dev->spinlock);
2265 spin_lock(&dev->spinlock);
2266 /* ???? add code here to keep track of field, and
2267 fire off tasklet, as necessary */
2268 d1206 1
2269 a1206 1
2270 /* just started, need to wait for new frame */
2271 d1210 13
2272 a1222 1
2273 spin_unlock(&dev->spinlock);
2274 d1233 1
2275 a1233 1
2276 unsigned int cmd, unsigned long arg);
2277 d1239 1
2278 a1239 1
2279 .release = hrt_release,
2280 a1257 3
2281 /* consider shifting responsibility for buffer allocation
2282 to open and release operations */
2283
2284 d1264 4
2285 a1267 3
2286 if (dev->state != HRT_CLOSED_STATE) return -ENODEV;
2287 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
2288
2289 d1270 2
2290 d1273 2
2291 a1274 5
2292 if (dev->state != HRT_CLOSED_STATE) {
2293 HRT_DEBUG_MSG(2, "already open");
2294 up(&dev->sem);
2295 return -EBUSY;
2296 } else dev->state = HRT_OPEN_STATE;
2297 a1279 1
2298 up(&dev->sem);
2299 d1284 1
2300 a1284 1
2301 /* hrt_release should not need to lock dev->sem, because
2302 a1304 1
2303 unsigned long flags;
2304 d1306 1
2305 a1306 1
2306 HRT_DEBUG_MSG(3, "hrt_read_proc (1)");
2307 d1309 9
2308 a1317 26
2309 /* ???? do we really need the semaphore here? */
2310 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
2311
2312 /* check to see if the device is open */
2313 if (dev->state != HRT_OPEN_STATE) {
2314 up(&dev->sem);
2315 return -ENODEV;
2316 }
2317
2318 if (dev->in_buffer == dev->out_buffer) {
2319 /* there is no buffered frame */
2320 if (file->f_flags & O_NONBLOCK) return -EAGAIN;
2321 HRT_DEBUG_MSG(3, "hrt_read_proc (2)");
2322 /* start frame grabber */
2323 if (!(dev->mode & HRT_STREAMING_MODE)) {
2324 spin_lock_irqsave(&dev->spinlock, flags);
2325 hrt_go_live(dev);
2326 spin_unlock_irqrestore(&dev->spinlock, flags);
2327 hrt_timer_activate(dev);
2328 }
2329 up(&dev->sem);
2330 if (wait_event_interruptible(dev->wait_queue,
2331 (dev->in_buffer != dev->out_buffer)))
2332 return -ERESTARTSYS;
2333 if (down_interruptible(&dev->sem))
2334 return -ERESTARTSYS;
2335 d1320 2
2336 a1321 1
2337 HRT_DEBUG_MSG(3, "hrt_read_proc (3)");
2338 d1323 5
2339 a1327 4
2340 if (count > max_count)
2341 count = max_count;
2342 if (copy_to_user(buf, dev->buffers[dev->out_buffer], count)) {
2343 up(&dev->sem);
2344 d1330 2
2345 a1331 2
2346 dev->out_buffer = (dev->out_buffer + 1) % dev->buffer_count;
2347 up(&dev->sem);
2348 a1538 1
2349
2350 @
2351
2352
2353 1.12
2354 log
2355 @*** empty log message ***
2356 @
2357 text
2358 @a1170 1
2359 int field;
2360 d1183 1
2361 a1183 1
2362 done:
2363 d1299 1
2364 a1299 1
2365 { int i;
2366 @
2367
2368
2369 1.11
2370 log
2371 @*** empty log message ***
2372 @
2373 text
2374 @d152 1
2375 a152 1
2376 int timer_active;
2377 a157 1
2378 int irq_max_nest;
2379 d160 1
2380 d185 1
2381 a185 1
2382 int parity;
2383 d314 1
2384 a314 1
2385 #define hrt_get_parity(dev) \
2386 d625 1
2387 a625 1
2388 * ignoring parity (assume frame is frozen)
2389 a762 1
2390 DECLARE_TASKLET(temp_task, hrt_tasklet, (unsigned long) dev);
2391 a764 1
2392 unsigned char val1, val2, val3;
2393 d766 1
2394 d778 1
2395 a800 10
2396 /* output values we are thinking of using for a
2397 new test, that does not require writing:
2398 bits 2 and 3 at 0x2000 should be the same
2399 as bit 8 at 0x2002 and bit 0 at 0x2003 */
2400 val1 = readb(0x2000 + virt_address);
2401 val2 = readb(0x2002 + virt_address);
2402 val3 = readb(0x2003 + virt_address);
2403 HRT_DEBUG_MSG(1, "(0x2000) = 0x%x, (0x2003) = 0x%x, "
2404 "(0x2003) = 0x%x", val1, val2, val3);
2405
2406 d872 1
2407 a872 1
2408
2409 a951 1
2410 HRT_DEBUG_MSG(1, "irq_max_nest = %d", dev->irq_max_nest);
2411 d982 8
2412 a989 1
2413 memcpy(&dev->tasklet, &temp_task, sizeof(struct tasklet_struct));
2414 d1146 18
2415 d1171 1
2416 a1172 1
2417
2418 d1177 1
2419 d1180 4
2420 a1183 6
2421 spin_lock(&dev->spinlock);
2422 /* ???? add code here to keep track of parity, and
2423 fire off tasklet, as necessary
2424 tasklet_schedule(dev->tasklet);
2425 */
2426 spin_unlock(&dev->spinlock);
2427 a1298 1
2428
2429 d1300 13
2430 a1312 1
2431 {
2432 d1399 1
2433 d1417 6
2434 a1422 3
2435 if (dev->mode /* ...missing... */) {
2436 /* start frame grabber */
2437 /* ...working here... */
2438 @
2439
2440
2441 1.10
2442 log
2443 @*** empty log message ***
2444 @
2445 text
2446 @d59 1
2447 d145 3
2448 d152 1
2449 a152 1
2450 int timer_active;
2451 d155 5
2452 a159 1
2453 /* irq != 0 iff board supports interrupts */
2454 d686 18
2455 d705 1
2456 a705 2
2457 void hrt_pci_dev_cleanup(struct pci_dev* pci_dev);
2458 int hrt_timer_init(hrt_t* dev);
2459 a722 1
2460 HRT_DEBUG_MSG(1, "dev->state = 0x%x", dev->state);
2461 d751 1
2462 d753 1
2463 a753 1
2464 hrt_pci_dev_cleanup (dev->pci_dev);
2465 d756 1
2466 d760 1
2467 a760 166
2468 /**
2469 * hrt_probe - check that we have a device as the specified address.
2470 * Assume the memory region is already mapped.
2471 * The address has to be a virtual address mapped to the device I/O space.
2472 * return values:
2473 * -1 = no device at that address
2474 * 0 = greyscale device
2475 * HRT_COLOR_MODE = color device
2476 */
2477 int hrt_probe(unsigned long addr)
2478 {
2479 unsigned char val1, val2, val3, val4;
2480 unsigned int oldaddr, result;
2481 /* color frame buffer has line of 2048 = 0x400
2482 pixels; greyscale has only 512 pixels/line. */
2483 /* save the old values at the address */
2484 val1 = readb(HRT_CONTROL_REG + addr);
2485 rmb();
2486 oldaddr = readw(HRT_Y_LOW_REG + addr);
2487 rmb();
2488
2489 /* freeze the frame grabbing, immediately */
2490 writeb(0x5B, HRT_CONTROL_REG + addr);
2491 wmb();
2492
2493 /* write a new value to the first byte in the first raster/row */
2494 writew(0, HRT_Y_LOW_REG + addr);
2495 wmb();
2496 val2 = readb(addr);
2497 rmb();
2498 writeb(~val2, addr);
2499 wmb();
2500
2501 /* write val2 to the first byte of the next raster/row */
2502 writew(1, HRT_Y_LOW_REG + addr);
2503 wmb();
2504 val3 = readb(addr);
2505 rmb();
2506 writeb(val2, addr);
2507 wmb();
2508
2509 /* read the value at the previous raster/row */
2510 writew(0, HRT_Y_LOW_REG + addr);
2511 wmb();
2512 val4 = readb(addr);
2513 rmb();
2514
2515 /* restore the old values */
2516 writeb(val2, addr);
2517 wmb();
2518 writew(1, HRT_Y_LOW_REG + addr);
2519 wmb();
2520 writeb(val3, addr);
2521 wmb();
2522 writeb(oldaddr, HRT_Y_LOW_REG + addr);
2523 wmb();
2524 writeb(val1, HRT_CONTROL_REG + addr);
2525 wmb();
2526
2527 if (val4 != (unsigned char)~val2) return -1;
2528
2529 /* the memory mapped row of frame buffer memory
2530 should wrap around at 0x200 and 0x400 on a greyscale card
2531 but should be good through 0x400 on a color card. */
2532
2533 writeb(HRT_FREEZE_IMM_CMD, HRT_CONTROL_REG + addr);
2534 wmb();
2535 writew(0, HRT_Y_LOW_REG + addr);
2536 wmb();
2537 writew(0, HRT_Y_HIGH_REG + addr);
2538 writeb(0, addr);
2539 writeb(255, addr + 0x0400);
2540 val1 = readb(addr);
2541 val2 = readb(addr + 0x0400);
2542 if (((unsigned char) val1 != 0) ||
2543 ((unsigned char) val2 != 255)) result = 0;
2544 else result = HRT_COLOR_MODE;
2545 return result;
2546 }
2547
2548 void hrt_await_field_change(hrt_t *dev, int id)
2549 {
2550 int i, field;
2551 unsigned long timeout;
2552 /* wait for field to change, by polling the field bit */
2553 field = hrt_get_parity(dev);
2554 timeout = jiffies + HZ/10;
2555 while ((hrt_get_parity(dev)) == field) {
2556 i = readb(dev->virt_addr);
2557 if (jiffies > timeout) {
2558 HRT_DEBUG_MSG(1, "hrt_await_field_change"
2559 " timeout (%d)", id);
2560 break;
2561 }
2562 }
2563 }
2564
2565 int hrt_check_dual_porting(hrt_t *dev)
2566 { int i;
2567 /* freeze the image */
2568 hrt_freeze_immediate(dev);
2569 /* write zeroes to horizontal raster line 53 */
2570 writew(53, dev->virt_addr + HRT_Y_LOW_REG);
2571 wmb();
2572 for (i = 0; i < dev->cols; i++) {
2573 writeb(0, dev->virt_addr + i);
2574 }
2575 /* wait for one field transition */
2576 hrt_await_field_change(dev,1);
2577 /* set capturing mode */
2578 hrt_go_live(dev);
2579 /* wait for two field transitions */
2580 hrt_await_field_change(dev,2);
2581 hrt_await_field_change(dev,3);
2582 /* freeze the image */
2583 hrt_freeze_immediate(dev);
2584 /* read back the zeroed raster line */
2585 /* if some of the pixels are zero the memory is dual ported */
2586 for (i = 0; i < dev->cols; i++) {
2587 if (!readb(dev->virt_addr + i)) {
2588 HRT_DEBUG_MSG(1, "seems not to be dual ported");
2589 return 0;
2590 }
2591 }
2592 HRT_DEBUG_MSG(1, "seems to be dual ported");
2593 return HRT_DUAL_PORTED_MODE;
2594 }
2595
2596 void check_performance(hrt_t *dev)
2597 {
2598 unsigned int t1, t2;
2599 int i, y, n = 100;
2600 char buf[512];
2601 unsigned long y_addr, in_addr;
2602 HRT_DEBUG_MSG(1, "checking performance of device %d", dev->num);
2603 HRT_DEBUG_MSG(2, "freezing");
2604 y_addr = dev->virt_addr + HRT_Y_LOW_REG;
2605 in_addr = dev->virt_addr;
2606 hrt_freeze_immediate(dev);
2607 t1 = jiffies;
2608 for (i = 1; i < n; i++) {
2609 for (y = 0; y < 480; y++) {
2610 writew(y, y_addr);
2611 wmb();
2612 memcpy_fromio(buf, in_addr, 512);
2613 }
2614 hrt_copy_window(dev);
2615 }
2616 t2 = jiffies;
2617 HRT_DEBUG_MSG(1, "elapsed time for %d copies = %d/%d sec",
2618 n, t2-t1, HZ);
2619 hrt_go_live(dev);
2620 t1 = jiffies;
2621 for (i = 1; i < n; i++) {
2622 for (y = 0; y < 480; y++) {
2623 writew(y, y_addr);
2624 wmb();
2625 memcpy_fromio(buf, in_addr, 512);
2626 }
2627 }
2628 t2 = jiffies;
2629 HRT_DEBUG_MSG(1, "elapsed time for %d copies = %d/%d sec",
2630 n, t2-t1, HZ);
2631 }
2632
2633 int hrt_init(unsigned long address, struct pci_dev * pci_dev)
2634 d766 3
2635 d770 1
2636 a770 1
2637 HRT_DEBUG_MSG(1, "probing device at 0x%lx", address);
2638 d778 1
2639 d781 1
2640 a781 1
2641 if (!request_mem_region(address, HRT_IO_SIZE, "hrt")) {
2642 d783 1
2643 a783 1
2644 (unsigned long) address);
2645 d786 1
2646 a786 1
2647 dev->phys_addr = address;
2648 d789 3
2649 a791 2
2650 dev->virt_addr = (unsigned long)ioremap_nocache(address, HRT_IO_SIZE);
2651 if (!dev->virt_addr) {
2652 d796 52
2653 a848 6
2654 /* find out whether there is an hrt device at that address,
2655 and which type of device it is */
2656 result = hrt_probe(dev->virt_addr);
2657 if (result == -1) {
2658 HRT_DEBUG_MSG(1, "hrt_probe failed at address 0x%lx",
2659 address);
2660 a851 1
2661 dev->mode |= result;
2662 d853 19
2663 a871 2
2664 /* infer the frame geometry from the device type */
2665 if (dev->mode & HRT_COLOR_MODE) {
2666 d891 1
2667 a891 2
2668 /* find out whether the device has dual-ported memory */
2669 dev->mode |= hrt_check_dual_porting(dev);
2670 d893 13
2671 a905 1
2672 sema_init(&dev->sem, 1);
2673 d907 4
2674 a910 1
2675 init_waitqueue_head(&dev->wait_queue);
2676 d912 2
2677 a913 1
2678 memcpy(&dev->tasklet, &temp_task, sizeof(struct tasklet_struct));
2679 d915 6
2680 a920 8
2681 /* allocate image buffers */
2682 dev->buffer_size = PAGE_ALIGN(dev->rows *
2683 dev->cols * dev->bytes_per_pixel);
2684 dev->buffer_count = HRT_DEFAULT_BUFFER_COUNT;
2685 if ((dev->buffer_count < 3) > (dev->buffer_count > HRT_MAX_BUFFERS)) {
2686 HRT_ERROR_MSG("unsupported buffer count");
2687 hrt_cleanup(dev);
2688 return -ENOMEM;
2689 d922 3
2690 a924 6
2691 dev->buffers[0] = vmalloc(dev->buffer_size*dev->buffer_count);
2692 if (dev->buffers[0] == NULL) {
2693 HRT_ERROR_MSG("unable to allocate %d bytes of buffers",
2694 dev->buffer_size*dev->buffer_count);
2695 hrt_cleanup(dev);
2696 return -ENOMEM;
2697 a925 5
2698 for (i = 1; i < dev->buffer_count; i++)
2699 dev->buffers[i] = dev->buffers[i-1] + dev->buffer_size;
2700 dev->in_buffer = dev->out_buffer = 0;
2701
2702 check_performance(dev);
2703 d934 1
2704 a934 1
2705 dev->irq = pci_dev->irq;
2706 d937 1
2707 a937 1
2708 (dev->mode & HRT_COLOR_MODE))
2709 d939 11
2710 d954 4
2711 a957 2
2712 if (dev->irq && (!hrt_timer_init(dev))) {
2713 hrt_timer_activate(dev);
2714 d959 1
2715 a959 1
2716 mdelay(10);
2717 d961 2
2718 a962 1
2719 hrt_timer_deactivate(dev);
2720 d964 1
2721 a964 1
2722 HRT_DEBUG_MSG(1, "counted %d irqs in 10 ms",
2723 a966 1
2724 dev->mode |= HRT_IRQ_MODE;
2725 d988 29
2726 a1053 20
2727 void hrt_enable_irq(hrt_t *dev)
2728 {
2729 int val;
2730 val = readb(dev->virt_addr + HRT_IRQ_ENABLE);
2731 rmb();
2732 val |= 0x1;
2733 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
2734 rmb();
2735 }
2736
2737 void hrt_disable_irq(hrt_t *dev)
2738 {
2739 int val;
2740 val = readb(dev->virt_addr + HRT_IRQ_ENABLE);
2741 rmb();
2742 val &= ~0x1;
2743 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
2744 rmb();
2745 }
2746
2747 d1157 5
2748 a1161 1
2749 int val;
2750 d1163 3
2751 a1165 9
2752 if (!dev->timer_active) goto none;
2753 if (dev->state != HRT_OPEN_STATE) goto none;
2754 if (!hrt_irq_pending(dev)) goto none;
2755 /* disable irq generation ... why????? */
2756 val = readb(dev->virt_addr + HRT_IRQ_ENABLE);
2757 rmb();
2758 val &= ~0x1;
2759 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
2760 rmb();
2761 d1167 7
2762 a1173 5
2763 fire off tasklet, as necessary */
2764 /* reenable irq generation ... why????? */
2765 val |= 0x1;
2766 writeb(val, dev->virt_addr + HRT_IRQ_ENABLE);
2767 rmb();
2768 a1187 1
2769 dev->irq_count++;
2770 d1194 30
2771 a1223 1
2772 int hrt_timer_init(hrt_t* dev)
2773 a1228 1
2774 return 0;
2775 d1230 5
2776 a1234 8
2777 if (dev->irq) {
2778 HRT_DEBUG_MSG(2, "trying to install irq handler");
2779 if (request_irq(dev->irq, hrt_irq_handler,
2780 SA_SHIRQ, "hrt", (void*)dev)) {
2781 HRT_ERROR_MSG("unable to reserve IRQ");
2782 dev->irq = 0;
2783 dev->mode &= ~HRT_IRQ_MODE;
2784 return 1;
2785 a1235 1
2786 } else {
2787 a1240 1
2788 return 0;
2789 d1248 2
2790 a1249 2
2791 if (dev->mode & HRT_IRQ_MODE)
2792 free_irq(dev->irq, dev);
2793 d1257 3
2794 a1259 4
2795 if (dev->mode & HRT_IRQ_MODE)
2796 hrt_disable_irq(dev);
2797 else
2798 del_timer_sync(&dev->timer);
2799 d1271 1
2800 a1271 1
2801 dev->irq_count = 0;
2802 d1273 2
2803 a1274 1
2804 hrt_enable_irq(dev);
2805 d1276 4
2806 a1282 1
2807 dev->timer_active = 1;
2808 d1286 2
2809 a1287 2
2810 void
2811 hrt_tasklet(unsigned long data)
2812 a1288 22
2813 int parity;
2814 hrt_t *dev = (hrt_t *)data;
2815
2816 parity = hrt_get_parity(dev);
2817 /* if the HW reports a parity that we're still reading,
2818 * that means we're SLOW -- give up! */
2819 if ((parity == dev->parity) && (dev->parity >= 0)){
2820 /* ???? consider counting how often this occurs, for debugging */
2821 return;
2822 }
2823
2824 dev->parity = 0;
2825 /* ...working here... */
2826 hrt_copy_window(dev);
2827
2828 if (!dev->parity) {
2829 up(&dev->sem);
2830 wake_up(&dev->wait_queue);
2831 /* ....need to make sure we do not race ahead before process can copy frame,
2832 or else copy the data ourselves, right now.... */
2833 } else
2834 up(&dev->sem);
2835 d1345 1
2836 a1346 1
2837 /* consider doing this later, only when we need it */
2838 d1348 1
2839 d1366 1
2840 d1378 2
2841 a1380 1
2842 /* ???? do we really need the semaphore here? */
2843 d1389 1
2844 d1511 2
2845 a1512 4
2846 if (pci_enable_device(pci_dev)) {
2847 HRT_ERROR_MSG("pci_enable_device failed");
2848 return -EIO;
2849 }
2850 d1514 3
2851 a1516 7
2852 if (!hrt_init(pci_resource_start(pci_dev, 0), pci_dev)) {
2853 pci_disable_device(pci_dev);
2854 return -ENODEV;
2855 }
2856
2857 return 0;
2858 }
2859 a1538 6
2860 void hrt_pci_dev_cleanup(struct pci_dev* pci_dev)
2861 {
2862 HRT_DEBUG_MSG(2, "pci_disable_device");
2863 pci_disable_device(pci_dev);
2864 }
2865
2866 a1550 4
2867 void hrt_pci_dev_cleanup(struct pci_dev* pci_dev)
2868 {
2869 }
2870
2871 @
2872
2873
2874 1.9
2875 log
2876 @*** empty log message ***
2877 @
2878 text
2879 @d899 1
2880 a899 1
2881 int hrt_init(hrt_t* dev, int dev_num, unsigned long address, int mode)
2882 d901 1
2883 a903 1
2884 unsigned long virtual_addr;
2885 d907 5
2886 d913 3
2887 a915 1
2888 dev->mode = mode;
2889 a920 2
2890 HRT_DEBUG_MSG(1, "request_mem_region: 0x%lx, 0x%lx",
2891 (unsigned long) dev, address);
2892 d922 4
2893 a925 2
2894 virtual_addr = (unsigned long)ioremap_nocache(address, HRT_IO_SIZE);
2895 if (!virtual_addr) {
2896 a929 1
2897 dev->virt_addr = virtual_addr;
2898 d931 3
2899 a933 1
2900 result = hrt_probe(virtual_addr);
2901 d941 2
2902 d954 2
2903 d962 2
2904 d965 1
2905 d967 1
2906 d969 1
2907 a969 1
2908 init_timer(&dev->timer);
2909 d971 2
2910 a980 2
2911 HRT_DEBUG_MSG(2, "trying to allocate %d bytes",
2912 dev->buffer_size*dev->buffer_count);
2913 d983 2
2914 a984 1
2915 HRT_ERROR_MSG("unable to allocate frame buffer space");
2916 a990 1
2917 dev->num = dev_num;
2918 d994 34
2919 d1039 2
2920 d1045 3
2921 a1050 3
2922 void hrt_describe_device(hrt_t *dev)
2923 }
2924
2925 d1054 2
2926 a1055 15
2927 for (i = 0; i < ARRAY_SIZE(hrt_addresses); i++) {
2928 if (hrt_num_devices >= HRT_MAX_DEVICES) {
2929 HRT_ERROR_MSG("more than %d HRT devices",
2930 HRT_MAX_DEVICES);
2931 return -ENOMEM;
2932 }
2933 hrt_devices[hrt_num_devices].state = HRT_INITIALIZING_STATE;
2934 if (!hrt_init(&hrt_devices[hrt_num_devices],
2935 hrt_num_devices, hrt_addresses[i]),
2936 HRT_ISA_MODE) {
2937 hrt_num_devices++;
2938 dev->state = HRT_CLOSED_STATE;
2939 } else
2940 hrt_devices[hrt_num_devices].state = HRT_UNINITIALIZED_STATE;
2941 }
2942 d1250 3
2943 a1252 3
2944 if ((result = request_irq(dev->irq, hrt_irq_handler,
2945 SA_SHIRQ, "hrt", (void*)dev))) {
2946 HRT_ERROR_MSG("request_irq failed: %d", result);
2947 d1266 1
2948 a1266 1
2949 int hrt_timer_cleanup(hrt_t* dev)
2950 d1271 1
2951 a1271 1
2952 if (dev->mode & HRT_IRQ_MODE) {
2953 d1280 1
2954 a1280 1
2955 if (dev->mode & HRT_IRQ_MODE) {
2956 d1282 1
2957 a1282 1
2958 } else {
2959 a1283 1
2960 }
2961 d1532 1
2962 a1532 1
2963 const struct pci_device_id *pci_id)
2964 a1533 1
2965 hrt_t* dev = &hrt_devices[hrt_num_devices];
2966 d1535 9
2967 a1543 1
2968 dev->state = HRT_INITIALIZING_STATE;
2969 a1545 1
2970 dev->state = HRT_UNINITIALIZED_STATE;
2971 d1548 1
2972 a1550 1
2973 dev->state = HRT_UNINITIALIZED_STATE;
2974 a1552 20
2975 if (!hrt_init(dev, hrt_num_devices, pci_resource_start(pci_dev, 0), 0)) {
2976 /* device has been found so set data */
2977 pci_set_drvdata (pci_dev, dev);
2978 dev->pci_dev = pci_dev;
2979 dev->irq = pci_dev->irq;
2980 HRT_CHECK(dev, HRT_INITIALIZING_STATE, "5");
2981
2982 /* check that this is a type of device we support */
2983 if ((pci_dev->device != HRT_DEVICE_ID_COLOR) &&
2984 (pci_dev->device != HRT_DEVICE_ID_GREY)) {
2985 HRT_ERROR_MSG("unknown device type 0x%hx",
2986 pci_dev->device);
2987 dev->state = HRT_UNINITIALIZED_STATE;
2988 return -ENODEV;
2989 }
2990
2991 /* do sanity check on our own device detection */
2992 if ((pci_dev->device == HRT_DEVICE_ID_COLOR) !=
2993 (pci_dev->mod & HRT_COLOR_MODE))
2994 HRT_ERROR_MSG("PCI and probed types don't match");
2995 d1554 1
2996 a1554 23
2997 /* discover whether this device supports interrupts */
2998 if (dev->irq && (!hrt_timer_init(dev))) {
2999 hrt_timer_activate(dev);
3000 hrt_go_live(dev);
3001 mdelay(10);
3002 hrt_freeze_immediate(dev);
3003 hrt_timer_deactivate(dev);
3004 if (dev->irq_count) {
3005 HRT_DEBUG_MSG(1, "counted %d irqs in 10 ms",
3006 dev->irq_count);
3007 HRT_ERROR_MSG("devices supports IRQs");
3008 dev->mode |= HRT_IRQ_MODE;
3009 } else {
3010 HRT_DEBUG_MSG(1, "no irqs in 10 ms");
3011 dev->irq = 0;
3012 dev->mode &= ~HRT_IRQ_MODE;
3013 }
3014 }
3015 hrt_num_devices++;
3016 dev->state = HRT_CLOSED_STATE;
3017 return 0;
3018 } else {
3019 dev->state = HRT_UNINITIALIZED_STATE;
3020 d1558 2
3021 @
3022
3023
3024 1.8
3025 log
3026 @*** empty log message ***
3027 @
3028 text
3029 @d85 2
3030 a86 1
3031 #define HRT_ERROR_MSG(args...) do{printk("<1>hrt: "); printk(args);}while(0)
3032 d226 1
3033 a226 1
3034 {HRT_DEBUG_MSG(1, "* unexpected state 0x%2x (%s)\n", dev->state, msg);}}
3035 d230 1
3036 a230 1
3037 {HRT_DEBUG_MSG(1, "* unexpected state 0x%2x (%s)\n", hrt_module_state, msg);}}
3038 d233 1
3039 a233 1
3040 {printk("<1>hrt * "); printk(args);}}
3041 d480 1
3042 a480 1
3043 HRT_ERROR_MSG("i2c bus timeout\n");
3044 d505 1
3045 a505 1
3046 HRT_ERROR_MSG("no i2c ack\n");
3047 d536 1
3048 a536 1
3049 HRT_ERROR_MSG("invalid register initialization sequence\n");
3050 d545 1
3051 a545 1
3052 HRT_ERROR_MSG("send_byte failed\n");
3053 d551 1
3054 a551 1
3055 HRT_ERROR_MSG("send_byte failed(2)\n");
3056 d559 1
3057 a559 1
3058 HRT_ERROR_MSG("register %02X out of range!\n", reg);
3059 d570 1
3060 a570 1
3061 HRT_ERROR_MSG("send_byte failed(3)\n");
3062 d576 1
3063 a576 1
3064 HRT_ERROR_MSG("send_byte failed(4)\n");
3065 d582 1
3066 a582 1
3067 HRT_ERROR_MSG("send_byte failed(5)\n");
3068 d596 1
3069 a596 1
3070 " (virt_addr = %08X, addr = %08X)\n",
3071 d602 1
3072 a602 1
3073 HRT_ERROR_MSG("hrt_i2c_init_registers failed %d\n", result);
3074 d605 1
3075 a605 1
3076 HRT_DEBUG_MSG(2, "hrt_i2c_init_device returning %d\n", result);
3077 d670 1
3078 a670 1
3079 HRT_ERROR_MSG("unsupported format %x\n", dev->mode);
3080 d680 4
3081 a683 2
3082 int hrt_activate_timer(hrt_t* dev);
3083 void hrt_deactivate_timer(hrt_t* dev);
3084 d694 1
3085 a694 1
3086 HRT_DEBUG_MSG(1, "shutting down hrt device %d at 0x%lx\n",
3087 d698 1
3088 a698 1
3089 HRT_DEBUG_MSG(1, "dev->state = 0x%x\n", dev->state);
3090 d705 2
3091 a706 1
3092 hrt_deactivate_timer (dev);
3093 d709 1
3094 a709 1
3095 HRT_DEBUG_MSG(2, "release_mem_region 0x%lx, 0x%lx\n",
3096 d715 1
3097 a715 1
3098 HRT_DEBUG_MSG(2, "iounmap %lx\n", (unsigned long) dev->virt_addr);
3099 d721 1
3100 a721 1
3101 HRT_DEBUG_MSG(2, "freeing frame buffer(s)\n");
3102 d825 1
3103 a825 1
3104 " timeout (%d)\n", id);
3105 d854 1
3106 a854 1
3107 HRT_DEBUG_MSG(1, "seems not to be dual ported\n");
3108 d858 1
3109 a858 1
3110 HRT_DEBUG_MSG(1, "seems to be dual ported\n");
3111 d868 2
3112 a869 2
3113 HRT_DEBUG_MSG(1, "checking performance of device %d\n", dev->num);
3114 HRT_DEBUG_MSG(2, "freezing\n");
3115 d883 1
3116 a883 1
3117 HRT_DEBUG_MSG(1, "elapsed time for %d copies = %d/%d sec\n",
3118 d895 1
3119 a895 1
3120 HRT_DEBUG_MSG(1, "elapsed time for %d copies = %d/%d sec\n",
3121 d899 1
3122 a899 1
3123 int hrt_init(hrt_t* dev, int dev_num, unsigned long address)
3124 d904 1
3125 d906 1
3126 a906 1
3127 HRT_DEBUG_MSG(1, "probing device at 0x%lx\n", address);
3128 d908 1
3129 d910 1
3130 a910 1
3131 HRT_ERROR_MSG("I/O memory at %lx already in use\n",
3132 d914 1
3133 a914 1
3134 HRT_DEBUG_MSG(1, "request_mem_region: 0x%lx, 0x%lx\n",
3135 d919 1
3136 a919 1
3137 HRT_ERROR_MSG("couldn't remap io memory!!\n");
3138 d927 1
3139 a927 1
3140 HRT_DEBUG_MSG(1, "hrt_probe failed at address 0x%lx\n",
3141 d934 1
3142 a934 1
3143 HRT_DEBUG_MSG(1, "COLOR device detected\n");
3144 d939 1
3145 a939 1
3146 HRT_DEBUG_MSG(1, "GREYSCALE device detected\n");
3147 d946 1
3148 a946 1
3149 HRT_ERROR_MSG("hrt_i2c_init_device %d failed\n",result);
3150 d959 1
3151 a959 1
3152 HRT_ERROR_MSG("unsupported buffer count\n");
3153 d963 1
3154 a963 1
3155 HRT_DEBUG_MSG(2, "trying to allocate %d bytes\n",
3156 d967 1
3157 a967 1
3158 HRT_ERROR_MSG("unable to allocate frame buffer space\n");
3159 d977 13
3160 a989 1
3161
3162 d996 1
3163 a996 12
3164 void hrt_identify_device(hrt_t *dev)
3165 { char *bus, *color, *ported;
3166 if (dev->mode & HRT_ISA_MODE) bus = "ISA";
3167 else bus = "PCI";
3168 if (dev->mode & HRT_COLOR_MODE) color = "COLOR";
3169 else color = "GREYSCALE";
3170 if (dev->mode & HRT_DUAL_PORTED_MODE) ported = "DUAL";
3171 else ported = "SINGLE";
3172 HRT_ERROR_MSG("found device %d at 0x%lx\n",
3173 dev->num, dev->phys_addr);
3174 HRT_ERROR_MSG("%s %s with %s-ported memory\n",
3175 bus, color, ported);
3176 d1004 1
3177 a1004 1
3178 HRT_ERROR_MSG("more than %d HRT devices\n",
3179 d1010 2
3180 a1011 4
3181 hrt_num_devices, hrt_addresses[i])) {
3182 hrt_devices[hrt_num_devices].mode |= HRT_ISA_MODE;
3183 hrt_devices[hrt_num_devices].state = HRT_CLOSED_STATE;
3184 hrt_identify_device(&hrt_devices[hrt_num_devices]);
3185 d1013 1
3186 d1024 1
3187 a1024 1
3188 HRT_DEBUG_MSG(2, "cleaning up device %d\n", i);
3189 a1059 17
3190 /* hrt_deactivate_timer should be called only from hrt_cleanup */
3191
3192 void hrt_deactivate_timer(hrt_t* dev)
3193 {
3194 HRT_DEBUG_MSG(1, "entering hrt_deactivate_timer()\n");
3195 HRT_CHECK(dev, HRT_FINALIZING_STATE, "3");
3196 if (dev->timer_active) {
3197 dev->timer_active = 0;
3198 if (dev->mode & HRT_IRQ_MODE) {
3199 hrt_disable_irq(dev);
3200 free_irq(dev->irq, dev);
3201 } else {
3202 del_timer_sync(&dev->timer);
3203 }
3204 }
3205 }
3206
3207 d1062 2
3208 a1063 1
3209 We support several different capture modes, depending on:
3210 d1067 8
3211 a1074 9
3212 The intent is to capture a continuous video stream.
3213 For capturing continous video, we
3214 want to capture and buffer frames in advance of the read operation that
3215 fetches them. However, this could waste a log of PCI and CPU time
3216 if we are not interested in the frames. In the worst case, we could chew up so
3217 much PCI bus and CPU time bringing in frames that we do not have
3218 time to process the frames. Therefore, we should support
3219 both a single-shot mode and a streaming mode, and the streaming mode
3220 should have a capability of adjusting frame rate.
3221 d1095 7
3222 a1101 7
3223 The card generates a vertical blanking interrupt. This
3224 enables us to more precisely determine when we have a complete frame.
3225 We want to use this capability when it is available.
3226
3227 (d) At some future point, we may want to support direct copying of
3228 data into user-provided buffers. For now, buffers are allocated
3229 by the driver.
3230 d1201 3
3231 a1203 5
3232 int hrt_activate_timer(hrt_t* dev)
3233 {
3234 /* assumes caller is holding dev->sem locked */
3235 int result = 0;
3236 HRT_DEBUG_MSG(1, "entering hrt_activate_timer()\n");
3237 d1206 1
3238 a1206 1
3239 HRT_ERROR_MSG("irq or timer already active\n");
3240 a1208 1
3241 dev->irq_count = 0;
3242 d1210 4
3243 a1213 8
3244 HRT_DEBUG_MSG(2, "trying to install irq handler\n");
3245 result = request_irq(dev->irq, hrt_irq_handler,
3246 SA_SHIRQ, "hrt", (void*)dev);
3247 if (result == 0) {
3248 hrt_enable_irq(dev);
3249 dev->timer_active = 1;
3250 } else {
3251 HRT_ERROR_MSG("request_irq failed: %d\n", result);
3252 d1216 1
3253 d1219 1
3254 a1219 1
3255 HRT_DEBUG_MSG(1, "installing timer\n");
3256 d1222 40
3257 a1261 2
3258 dev->timer.expires = jiffies + HZ/100;
3259 dev->timer.data = (unsigned long)dev;
3260 a1262 1
3261 dev->timer_active = 1;
3262 d1264 1
3263 d1335 1
3264 a1335 1
3265 HRT_DEBUG_MSG(1, "opening device %d at addr %lX\n", minor, (unsigned long)dev);
3266 d1340 1
3267 a1340 1
3268 HRT_DEBUG_MSG(2, "setting private data\n");
3269 d1344 1
3270 a1344 1
3271 HRT_DEBUG_MSG(2, "already open\n");
3272 d1349 3
3273 a1351 2
3274 HRT_DEBUG_MSG(2, "installing timer/irq\n");
3275 result = hrt_activate_timer(dev);
3276 d1368 1
3277 a1368 1
3278 hrt_deactivate_timer(dev);
3279 d1378 1
3280 a1378 1
3281 HRT_DEBUG_MSG(3, "hrt_read_proc (1)\n");
3282 d1391 1
3283 a1391 1
3284 HRT_DEBUG_MSG(3, "hrt_read_proc (2)\n");
3285 d1404 1
3286 a1404 1
3287 HRT_DEBUG_MSG(3, "hrt_read_proc (3)\n");
3288 d1431 1
3289 a1431 1
3290 HRT_DEBUG_MSG(2, "IOC_HRT_FREEZE_FRAME: called\n");
3291 d1436 1
3292 a1436 1
3293 HRT_DEBUG_MSG(2, "IOC_HRT_GO_LIVE: called\n");
3294 d1441 1
3295 a1441 1
3296 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_WIDTH: called with arg %d\n", iarg);
3297 d1445 1
3298 a1445 1
3299 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_HEIGHT: called with arg %d\n", iarg);
3300 d1449 1
3301 a1449 1
3302 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_X: called with arg %d\n", iarg);
3303 d1453 1
3304 a1453 1
3305 HRT_DEBUG_MSG(2, "IOC_HRT_WIN_SET_Y: called with arg %d\n", iarg);
3306 d1497 1
3307 a1497 1
3308 HRT_DEBUG_MSG(2, "probing pci device\n");
3309 d1500 1
3310 a1500 1
3311 HRT_ERROR_MSG("need to increase HRT_MAX_DEVICES\n");
3312 d1505 1
3313 a1505 1
3314 HRT_ERROR_MSG("pci_enable_device failed\n");
3315 d1509 1
3316 a1509 2
3317 if (!hrt_init(dev, hrt_num_devices, pci_resource_start(pci_dev, 0))) {
3318 hrt_identify_device(dev);
3319 d1515 6
3320 a1520 14
3321 if (pci_dev->device == HRT_DEVICE_ID_GREY) {
3322 if (dev->mode & HRT_COLOR_MODE) {
3323 HRT_ERROR_MSG("grey device with mode %x?\n",
3324 dev->mode);
3325 dev->mode &= ~HRT_COLOR_MODE;
3326 }
3327 } else if (pci_dev->device == HRT_DEVICE_ID_COLOR) {
3328 if (!(dev->mode & HRT_COLOR_MODE)) {
3329 HRT_ERROR_MSG("color device with mode %x?\n",
3330 dev->mode);
3331 dev->mode |= HRT_COLOR_MODE;
3332 }
3333 } else {
3334 HRT_ERROR_MSG("unknown device type 0x%hx\n", pci_dev->device);
3335 d1524 24
3336 a1548 20
3337 dev->irq_count = 0;
3338 if (hrt_activate_timer(dev)) {
3339 HRT_DEBUG_MSG(1, "failed to install irq\n");
3340 dev->irq = 0;
3341 dev->mode &= ~HRT_IRQ_MODE;
3342 } else {
3343 hrt_enable_irq(dev);
3344 hrt_go_live(dev);
3345 mdelay(10);
3346 hrt_freeze_immediate(dev);
3347 hrt_disable_irq(dev);
3348 if (dev->irq_count) {
3349 HRT_DEBUG_MSG(1, "counted %d irqs\n",dev->irq_count);
3350 dev->mode |= HRT_IRQ_MODE;
3351 } else {
3352 HRT_DEBUG_MSG(1, "no irqs\n");
3353 dev->irq = 0;
3354 dev->mode &= ~HRT_IRQ_MODE;
3355 }
3356 }
3357 d1561 1
3358 a1561 1
3359 HRT_DEBUG_MSG(2, "hrt_pci_remove\n");
3360 d1569 1
3361 a1569 1
3362 HRT_DEBUG_MSG(2, "pci_register_driver\n");
3363 d1575 1
3364 a1575 1
3365 HRT_DEBUG_MSG(2, "pci_unregister_driver\n");
3366 d1581 1
3367 a1581 1
3368 HRT_DEBUG_MSG(2, "pci_disable_device\n");
3369 d1614 1
3370 a1614 1
3371 HRT_DEBUG_MSG(2, "entering hrt_cleanup_module()\n");
3372 d1629 1
3373 a1629 1
3374 HRT_ERROR_MSG("failed to register char device %d\n",
3375 d1638 1
3376 a1638 1
3377 HRT_ERROR_MSG("module initializing with major number %d\n",
3378 d1651 1
3379 a1651 1
3380 HRT_ERROR_MSG("no devices detected\n");
3381 d1655 1
3382 a1655 1
3383 HRT_ERROR_MSG("found %d devices\n", hrt_num_devices);
3384 d1661 1
3385 a1661 1
3386 HRT_DEBUG_MSG(2, "returning from failed init_module() with result %d\n",
3387 @
3388
3389
3390 1.7
3391 log
3392 @*** empty log message ***
3393 @
3394 text
3395 @d225 1
3396 a225 1
3397 {HRT_DEBUG_MSG(1, "unexpected state 0x%2x (%s)\n", dev->state, msg);}}
3398 d229 1
3399 a229 1
3400 {HRT_DEBUG_MSG(1, "unexpected state 0x%2x (%s)\n", hrt_module_state, msg);}}
3401 d792 2
3402 a793 2
3403 should wrap around at 0x1ff on a greyscale card
3404 but should be good through 0x3ff on a color card. */
3405 d801 1
3406 a801 1
3407 writeb(255, addr + 0x03ff);
3408 d803 1
3409 a803 2
3410 val2 = readb(addr + 0x03ff);
3411 HRT_DEBUG_MSG(1, "val1 = 0x%x, val2 = 0x%x\n", val1, val2);
3412 d805 2
3413 a806 7
3414 ((unsigned char) val2 != 255)) {
3415 HRT_DEBUG_MSG (1, "less than 0x0400 RAM\n");
3416 result = 0;
3417 } else {
3418 HRT_DEBUG_MSG (1, "at least 0x0400 RAM\n");
3419 result = HRT_COLOR_MODE;
3420 }
3421 a925 1
3422 HRT_DEBUG_MSG(1, "dev->mode = %x (1a)\n", dev->mode);
3423 a926 1
3424 HRT_DEBUG_MSG(1, "dev->mode = %x (1b)\n", dev->mode);
3425 a943 1
3426 HRT_DEBUG_MSG(1, "dev->mode = %x (2a)\n", dev->mode);
3427 a944 1
3428 HRT_DEBUG_MSG(1, "dev->mode = %x (2b)\n", dev->mode);
3429 a979 1
3430 HRT_DEBUG_MSG(1, "dev->mode = %x (10)\n", dev->mode);
3431 a1003 1
3432 HRT_DEBUG_MSG(1, "dev->mode = %x (9a)\n", hrt_devices[hrt_num_devices].mode);
3433 a1004 1
3434 HRT_DEBUG_MSG(1, "dev->mode = %x (9b)\n", hrt_devices[hrt_num_devices].mode);
3435 a1232 1
3436 HRT_DEBUG_MSG(1, "dev->mode = %x (3a)\n", dev->mode);
3437 a1233 1
3438 HRT_DEBUG_MSG(1, "dev->mode = %x (3b)\n", dev->mode);
3439 a1497 1
3440 HRT_DEBUG_MSG(1, "dev->mode = %x (4a)\n", dev->mode);
3441 a1498 1
3442 HRT_DEBUG_MSG(1, "dev->mode = %x (4b)\n", dev->mode);
3443 a1503 1
3444 HRT_DEBUG_MSG(1, "dev->mode = %x (5a)\n", dev->mode);
3445 a1504 1
3446 HRT_DEBUG_MSG(1, "dev->mode = %x (5b)\n", dev->mode);
3447 a1515 1
3448 HRT_DEBUG_MSG(1, "dev->mode = %x (6a)\n", dev->mode);
3449 a1516 1
3450 HRT_DEBUG_MSG(1, "dev->mode = %x (6b)\n", dev->mode);
3451 a1524 1
3452 HRT_DEBUG_MSG(1, "dev->mode = %x (7a)\n", dev->mode);
3453 a1525 1
3454 HRT_DEBUG_MSG(1, "dev->mode = %x (7b)\n", dev->mode);
3455 a1528 1
3456 HRT_DEBUG_MSG(1, "dev->mode = %x (8a)\n", dev->mode);
3457 a1529 1
3458 HRT_DEBUG_MSG(1, "dev->mode = %x (8b)\n", dev->mode);
3459 @
3460
3461
3462 1.6
3463 log
3464 @*** empty log message ***
3465 @
3466 text
3467 @d75 1
3468 a75 1
3469 #include <linux/irq.h>
3470 d85 1
3471 a85 1
3472 #define HRT_ERROR_MSG(args...) do{printk("<1>hrt: "); printk(args);}while(0)
3473 a135 1
3474 int valid;
3475 d137 1
3476 a140 1
3477 int is_open;
3478 d147 2
3479 a148 2
3480 int timer_installed;
3481 /* timer or irq is installed */
3482 d150 2
3483 a151 2
3484 /* 0 if board does not support irq */
3485 int interrupt_count;
3486 d182 1
3487 a182 1
3488 } hrt_dev_t;
3489 d184 6
3490 a189 2
3491 /* values for field hrt_dev_t->valid */
3492 #define HRT_VALID 1327
3493 d191 1
3494 a191 1
3495 /* values for field hrt_dev_t->mode */
3496 d195 1
3497 a195 1
3498 #define HRT_FRAME_IRQ_MODE 8
3499 d198 9
3500 d213 1
3501 a213 1
3502 hrt_dev_t hrt_devices[HRT_MAX_DEVICES];
3503 d222 11
3504 a232 2
3505 #define HRT_DEBUG_MSG(level,args...) if (level <= HRT_DEBUG_LEVEL)\
3506 {printk("<1>hrt * "); printk(args);}
3507 d260 1
3508 a260 1
3509 hrt_devices[i].interrupt_count,
3510 d277 2
3511 d280 2
3512 a281 2
3513 #define hrt_debug_init()
3514 #define hrt_debug_cleanup()
3515 a283 1
3516
3517 d299 1
3518 a299 1
3519 #define hrt_dev_freeze_next(dev) \
3520 d301 1
3521 a301 1
3522 #define hrt_dev_freeze_immediate(dev) \
3523 d303 1
3524 a303 1
3525 #define hrt_dev_go_live(dev) \
3526 d305 1
3527 a305 1
3528 #define hrt_dev_get_parity(dev) \
3529 d384 1
3530 a384 1
3531 void hrt_sda(hrt_dev_t *dev, unsigned long addr, int high)
3532 d397 1
3533 a397 1
3534 void hrt_scl(hrt_dev_t *dev, unsigned long addr, int high)
3535 d410 1
3536 a410 1
3537 void hrt_sda_scl(hrt_dev_t *dev,
3538 d432 1
3539 a432 1
3540 void hrt_i2c_start(hrt_dev_t *dev, unsigned long addr)
3541 d449 1
3542 a449 1
3543 void hrt_i2c_stop(hrt_dev_t *dev, unsigned long addr)
3544 d465 1
3545 a465 1
3546 int hrt_i2c_send_bit(hrt_dev_t *dev,
3547 d491 1
3548 a491 1
3549 int hrt_i2c_send_byte(hrt_dev_t *dev, unsigned long addr, unsigned char data)
3550 d526 1
3551 a526 1
3552 int hrt_i2c_init_registers(hrt_dev_t *dev, const char *sequence)
3553 d528 2
3554 a529 2
3555 unsigned long addr;
3556 int i, len, cur_reg;
3557 d531 2
3558 a532 2
3559 len = (int) (*sequence++);
3560 addr = dev->virt_addr;
3561 d534 4
3562 a537 4
3563 if (len <= 2) {
3564 HRT_ERROR_MSG("invalid register initialization sequence\n");
3565 return -1;
3566 }
3567 d539 1
3568 a539 1
3569 hrt_i2c_start(dev, addr);
3570 d541 12
3571 a552 6
3572 /* here we select the A/D Device on the i2c bus
3573 * that should pay attention to the following bytes */
3574 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
3575 HRT_ERROR_MSG("send_byte failed\n");
3576 return -1;
3577 }
3578 d554 8
3579 a561 5
3580 /* start at the first register and increment along the way */
3581 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = sequence[0])) {
3582 HRT_ERROR_MSG("send_byte failed(2)\n");
3583 return -1;
3584 }
3585 d563 9
3586 a571 34
3587 for(i = 0; i < len; i += 2, sequence += 2) {
3588 char reg = sequence[0];
3589 char data = sequence[1];
3590
3591 if (reg > HRT_SAA7110_MAXREG) {
3592 HRT_ERROR_MSG("register number %02X out of range!\n", reg);
3593 return -1;
3594 }
3595
3596 if (reg != cur_reg) {
3597
3598 /* we're going to an entirely different register */
3599 hrt_i2c_stop(dev, addr);
3600 hrt_i2c_start(dev, addr);
3601
3602 /* select the chip/device on the bus */
3603 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
3604 HRT_ERROR_MSG("send_byte failed(3)\n");
3605 return -1;
3606 }
3607
3608 /* select the register */
3609 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = reg)) {
3610 HRT_ERROR_MSG("send_byte failed(4)\n");
3611 return -1;
3612 }
3613 }
3614
3615 if (hrt_i2c_send_byte(dev, dev->virt_addr, data)) {
3616 HRT_ERROR_MSG("send_byte failed(5)\n");
3617 return -1;
3618 }
3619 dev->saa7110_registers[cur_reg++] = data;
3620 }
3621 d573 6
3622 a578 2
3623 /* free the i2c bus */
3624 hrt_i2c_stop(dev, addr);
3625 d580 9
3626 a588 1
3627 return 0;
3628 d591 1
3629 a591 1
3630 int hrt_i2c_init_device(hrt_dev_t *dev)
3631 d613 1
3632 a613 1
3633 * hrt_dev_copy_window
3634 d619 1
3635 a619 1
3636 void hrt_dev_copy_window(hrt_dev_t *dev)
3637 d677 1
3638 a677 1
3639 void hrt_dev_tasklet(unsigned long);
3640 d679 2
3641 a680 2
3642 int hrt_install_timer(hrt_dev_t* dev);
3643 void hrt_remove_timer(hrt_dev_t* dev);
3644 d682 1
3645 a682 1
3646 /* hrt_dev_cleanup does not bother locking dev->sem,
3647 d689 1
3648 a689 1
3649 void hrt_dev_cleanup(hrt_dev_t* dev)
3650 d693 5
3651 d700 1
3652 a700 1
3653 hrt_dev_freeze_next(dev);
3654 d702 1
3655 a702 3
3656 if (dev->timer_installed) {
3657 hrt_remove_timer (dev);
3658 }
3659 d727 1
3660 a727 1
3661 dev->valid = 0;
3662 a744 1
3663 const int cpa = 0x03ff;
3664 d791 3
3665 a793 2
3666 /* row length should be longer if this is a color card
3667 than if it is a greyscale card */
3668 d795 2
3669 d799 9
3670 a807 11
3671 writeb(231, cpa + addr);
3672 wmb();
3673 val1 = readb(cpa + addr);
3674 rmb();
3675 writeb(123, cpa + addr);
3676 wmb();
3677 val2 = readb(cpa + addr);
3678 rmb();
3679 if (((unsigned char) val1 != 231) ||
3680 ((unsigned char) val2 != 123)) {
3681 HRT_DEBUG_MSG (1, "byte at 0x%x not RAM\n", cpa);
3682 d810 1
3683 a810 1
3684 HRT_DEBUG_MSG (1, "byte at 0x%x is RAM\n", cpa);
3685 d816 1
3686 a816 1
3687 void hrt_dev_await_field_change(hrt_dev_t *dev, int id)
3688 d821 1
3689 a821 1
3690 field = hrt_dev_get_parity(dev);
3691 d823 1
3692 a823 1
3693 while ((hrt_dev_get_parity(dev)) == field) {
3694 d826 1
3695 a826 1
3696 HRT_DEBUG_MSG(1, "hrt_dev_await_field_change"
3697 d833 1
3698 a833 1
3699 int hrt_check_dual_porting(hrt_dev_t *dev)
3700 d836 1
3701 a836 1
3702 hrt_dev_freeze_immediate(dev);
3703 d844 1
3704 a844 1
3705 hrt_dev_await_field_change(dev,1);
3706 d846 1
3707 a846 1
3708 hrt_dev_go_live(dev);
3709 d848 2
3710 a849 2
3711 hrt_dev_await_field_change(dev,2);
3712 hrt_dev_await_field_change(dev,3);
3713 d851 1
3714 a851 1
3715 hrt_dev_freeze_immediate(dev);
3716 d864 1
3717 a864 1
3718 void check_performance(hrt_dev_t *dev)
3719 d867 1
3720 a867 1
3721 int i, y, n = 10000;
3722 d874 1
3723 a874 1
3724 hrt_dev_freeze_immediate(dev);
3725 d882 1
3726 a882 1
3727 hrt_dev_copy_window(dev);
3728 d887 1
3729 a887 1
3730 hrt_dev_go_live(dev);
3731 d901 1
3732 a901 1
3733 int hrt_dev_init(hrt_dev_t* dev, int dev_num, unsigned long address)
3734 d903 1
3735 a903 1
3736 DECLARE_TASKLET(temp_task, hrt_dev_tasklet, (unsigned long) dev);
3737 d907 2
3738 a908 1
3739 memset(dev, 0, sizeof(hrt_dev_t));
3740 d914 2
3741 a915 2
3742 HRT_DEBUG_MSG(2, "request_mem_region: 0x%lx, 0x%lx\n",
3743 (unsigned long) dev, address);
3744 d920 1
3745 a920 1
3746 hrt_dev_cleanup(dev);
3747 a924 1
3748 HRT_DEBUG_MSG(2, "dev->mode = %x (1)\n", dev->mode);
3749 d929 1
3750 a929 1
3751 hrt_dev_cleanup(dev);
3752 d932 1
3753 d934 1
3754 d949 1
3755 a949 1
3756 hrt_dev_cleanup(dev);
3757 d952 1
3758 d954 1
3759 d964 1
3760 a964 1
3761 hrt_dev_cleanup(dev);
3762 d972 1
3763 a972 1
3764 hrt_dev_cleanup(dev);
3765 d978 1
3766 a978 2
3767 dev->num = dev_num;
3768 dev->valid = HRT_VALID;
3769 d983 1
3770 a983 1
3771 hrt_dev_go_live(dev);
3772 d985 1
3773 a985 1
3774 return result;
3775 d988 1
3776 a988 1
3777 void hrt_identify_device(hrt_dev_t *dev)
3778 d990 1
3779 d1012 2
3780 a1013 1
3781 if (!hrt_dev_init(&hrt_devices[hrt_num_devices],
3782 d1015 1
3783 d1017 3
3784 d1021 2
3785 a1022 2
3786 hrt_identify_device(&hrt_devices[hrt_num_devices]);
3787 }
3788 d1032 1
3789 a1032 1
3790 hrt_dev_cleanup(hrt_devices+i);
3791 d1040 1
3792 a1040 1
3793 int hrt_interrupt_pending(hrt_dev_t *dev)
3794 d1047 1
3795 a1047 1
3796 void hrt_enable_interrupt(hrt_dev_t *dev)
3797 d1050 1
3798 a1050 1
3799 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
3800 d1053 1
3801 a1053 1
3802 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
3803 d1057 1
3804 a1057 1
3805 void hrt_disable_interrupt(hrt_dev_t *dev)
3806 d1060 1
3807 a1060 1
3808 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
3809 d1063 1
3810 a1063 1
3811 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
3812 d1067 1
3813 a1067 1
3814 /* hrt_remove_timer should be called only from hrt_dev_cleanup */
3815 d1069 1
3816 a1069 1
3817 void hrt_remove_timer(hrt_dev_t* dev)
3818 d1071 6
3819 a1076 5
3820 HRT_DEBUG_MSG(1, "entering hrt_remove_timer()\n");
3821 if (dev->timer_installed) {
3822 dev->timer_installed = 0;
3823 if (dev->irq) {
3824 hrt_disable_interrupt(dev);
3825 d1117 1
3826 a1117 1
3827 (c) dev->mode & HRT_FRAME_IRQ_MODE
3828 d1181 1
3829 a1181 1
3830 irqreturn_t hrt_interrupt_handler(int irq, void* dev_id, struct pt_regs* regs)
3831 d1183 1
3832 a1183 1
3833 void hrt_interrupt_handler(int irq, void* dev_id, struct pt_regs* regs)
3834 d1186 1
3835 a1186 1
3836 hrt_dev_t* dev = dev_id;
3837 d1188 6
3838 a1193 6
3839 dev->interrupt_count++;
3840 if (!dev->timer_installed) goto none;
3841 if (!dev->is_open) goto none;
3842 if (!hrt_interrupt_pending(dev)) goto none;
3843 /* disable interrupt generation ... why????? */
3844 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
3845 d1196 1
3846 a1196 1
3847 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
3848 d1200 1
3849 a1200 1
3850 /* reenable interrupt generation ... why????? */
3851 d1202 1
3852 a1202 1
3853 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
3854 d1215 1
3855 a1215 1
3856 hrt_dev_t* dev = (hrt_dev_t*)data;
3857 d1217 2
3858 a1218 2
3859 if (dev->timer_installed) {
3860 dev->interrupt_count++;
3861 d1225 1
3862 a1225 1
3863 int hrt_install_timer(hrt_dev_t* dev)
3864 d1229 4
3865 a1232 5
3866 HRT_DEBUG_MSG(1, "entering hrt_install_timer()\n");
3867
3868 if (dev->timer_installed) {
3869 HRT_DEBUG_MSG(2, "interrupts or timers are already"
3870 " enabled so doing nothing\n");
3871 d1235 1
3872 a1235 1
3873 dev->interrupt_count = 0;
3874 d1237 2
3875 a1238 2
3876 HRT_DEBUG_MSG(2, "trying to install interrupt handler\n");
3877 result = request_irq(dev->irq, hrt_interrupt_handler,
3878 d1241 2
3879 a1242 2
3880 hrt_enable_interrupt(dev);
3881 dev->timer_installed = 1;
3882 d1246 3
3883 a1248 1
3884 dev->mode &= ~HRT_FRAME_IRQ_MODE;
3885 d1257 1
3886 a1257 1
3887 dev->timer_installed = 1;
3888 d1263 1
3889 a1263 1
3890 hrt_dev_tasklet(unsigned long data)
3891 d1266 1
3892 a1266 1
3893 hrt_dev_t *dev = (hrt_dev_t *)data;
3894 d1268 1
3895 a1268 1
3896 parity = hrt_dev_get_parity(dev);
3897 d1278 1
3898 a1278 1
3899 hrt_dev_copy_window(dev);
3900 d1318 1
3901 a1318 1
3902 hrt_dev_t* dev;
3903 d1331 1
3904 a1331 1
3905 if (dev->valid != HRT_VALID) return -ENODEV;
3906 d1337 2
3907 a1338 3
3908 HRT_DEBUG_MSG(2, "checking is_open\n");
3909 if (dev->is_open) {
3910 HRT_DEBUG_MSG(2, "hrt is_open\n");
3911 d1341 1
3912 a1341 1
3913 } else dev->is_open = 1;
3914 d1343 2
3915 a1344 2
3916 HRT_DEBUG_MSG(2, "installing timer/interrupt\n");
3917 result = hrt_install_timer(dev);
3918 d1358 4
3919 a1361 4
3920 hrt_dev_t* dev = file->private_data;
3921 if (dev->valid != HRT_VALID) return -ENODEV;
3922 dev->is_open = 0;
3923 hrt_remove_timer(dev);
3924 d1368 1
3925 a1368 1
3926 hrt_dev_t* dev = file->private_data;
3927 d1372 1
3928 a1372 1
3929 if (dev->valid != HRT_VALID) return -ENODEV;
3930 d1377 1
3931 a1377 1
3932 if (!dev->is_open) {
3933 d1390 2
3934 a1391 1
3935 if (wait_event_interruptible(dev->wait_queue, (dev->in_buffer != dev->out_buffer)))
3936 d1418 1
3937 a1418 1
3938 hrt_dev_t* dev = file->private_data;
3939 d1425 1
3940 a1425 1
3941 hrt_dev_freeze_next(dev);
3942 d1430 1
3943 a1430 1
3944 hrt_dev_go_live(dev);
3945 d1489 3
3946 a1491 2
3947 hrt_dev_t* dev = &hrt_devices[hrt_num_devices];
3948 HRT_DEBUG_MSG(1, "probing pci device %lx\n", (unsigned long)dev);
3949 d1494 1
3950 d1499 1
3951 d1502 1
3952 a1502 1
3953 if (!hrt_dev_init(dev, hrt_num_devices, pci_resource_start(pci_dev, 0))) {
3954 d1508 1
3955 a1508 2
3956 if (dev->valid != HRT_VALID)
3957 HRT_ERROR_MSG("invalid device\n");
3958 d1513 1
3959 d1515 1
3960 d1521 1
3961 d1523 1
3962 d1527 1
3963 d1531 3
3964 a1533 3
3965 dev->interrupt_count = 0;
3966 if (hrt_install_timer(dev)) {
3967 HRT_DEBUG_MSG(1, "failed to install interrupt\n");
3968 d1535 3
3969 a1537 1
3970 dev->mode &= ~HRT_FRAME_IRQ_MODE;
3971 d1539 2
3972 a1540 2
3973 hrt_enable_interrupt(dev);
3974 hrt_dev_go_live(dev);
3975 d1542 7
3976 a1548 5
3977 hrt_dev_freeze_immediate(dev);
3978 hrt_disable_interrupt(dev);
3979 if (dev->interrupt_count) {
3980 HRT_DEBUG_MSG(1, "counted %d interrupts\n",dev->interrupt_count);
3981 dev->mode |= HRT_FRAME_IRQ_MODE;
3982 d1550 1
3983 a1550 1
3984 HRT_DEBUG_MSG(1, "no interrupts\n");
3985 d1552 3
3986 a1554 1
3987 dev->mode &= ~HRT_FRAME_IRQ_MODE;
3988 d1557 1
3989 d1560 1
3990 d1568 1
3991 a1568 1
3992 hrt_dev_t *dev;
3993 d1570 2
3994 a1571 2
3995 dev = (hrt_dev_t *) pci_get_drvdata (pci_dev);
3996 hrt_dev_cleanup(dev);
3997 d1619 3
3998 d1627 1
3999 d1632 35
4000 a1666 27
4001 int result = 0;
4002 hrt_debug_init();
4003 result = register_chrdev(major_number, "hrt", &hrt_fops);
4004 if (result < 0) {
4005 HRT_ERROR_MSG("failed to register as char device with major number %d\n",
4006 major_number);
4007 goto failed;
4008 }
4009 if (major_number == 0) hrt_major_number = result;
4010 else hrt_major_number = major_number;
4011 printk("hrt: module initializing with major number %d\n", hrt_major_number);
4012 memset(hrt_devices, 0, sizeof(hrt_devices));
4013
4014 /* detect ISA/PC104 devices, and PCI devices that are
4015 * jumpered to use the ISA/PC104 I/O address space */
4016 hrt_isa_init();
4017
4018 /* now detect regular PCI devices */
4019 hrt_pci_init();
4020
4021 if (hrt_num_devices == 0) {
4022 printk("hrt: no devices detected\n");
4023 return -ENODEV;
4024 } else {
4025 printk("hrt: found %d devices\n", hrt_num_devices);
4026 }
4027 return 0;
4028 d1668 5
4029 a1672 3
4030 hrt_cleanup_module();
4031 HRT_DEBUG_MSG(2, "returning from failed init_module() with result %d\n", result);
4032 return result;
4033 @
4034
4035
4036 1.5
4037 log
4038 @*** empty log message ***
4039 @
4040 text
4041 @d16 1
4042 a16 1
4043 tuning, audio) is not applicable..
4044 d18 3
4045 a20 3
4046 us worries about backward and forward compatibility.
4047 That is, we don't want to have to worry about differences in V4L
4048 headers and kernel modules breaking this driver.
4049 d22 1
4050 a22 1
4051 waste kernel memory for the V4L code if they are not using it.
4052 d24 1
4053 a24 1
4054 existing V4L applications.
4055 d30 1
4056 a30 1
4057 complexity and code size, and did not work reliably for this card.
4058 d32 2
4059 a33 2
4060 will change further. We don't want to have to worry about such
4061 differences between versions breking this driver.
4062 d35 1
4063 a35 1
4064 reuse of code between this I2C bus and other I2C applications.
4065 d37 1
4066 a37 1
4067 waste kernel memory for the extra code.
4068 d46 2
4069 a47 2
4070 #include <linux/delay.h> /* udelay */
4071 #include <linux/errno.h> /* error codes */
4072 d105 2
4073 a106 2
4074 #ifndef HRT_IO_SIZE
4075 #define HRT_IO_SIZE 0x4000
4076 a125 11
4077 const int HRT_DEVICE_IDS[] = {
4078 HRT_DEVICE_ID_COLOR,
4079 HRT_DEVICE_ID_GREY};
4080
4081 /**
4082 * Formats
4083 */
4084
4085 #define HRT_GREY_FORMAT 1
4086 #define HRT_COLOR_FORMAT 2
4087
4088 d136 43
4089 a178 42
4090 int valid;
4091 int num; /* minor device number, index in hrt_devices[] */
4092 unsigned long virt_addr;
4093 unsigned long phys_addr;
4094 int is_open; /* cannot be opened again until released */
4095
4096 struct semaphore sem;
4097 wait_queue_head_t wait_queue;
4098 struct timer_list timer;
4099 struct tasklet_struct tasklet;
4100 int timer_installed; /* timer or irq is installed */
4101 int irq; /* 0 if board does not support irq */
4102 int interrupt_count;
4103
4104 int i2c_bits; /* last values written to i2c */
4105 char saa7110_registers[HRT_SAA7110_MAXREG+1];
4106
4107 /* video data format, and dependent values */
4108 int format;
4109 int rows, cols, bytes_per_pixel;
4110
4111 int mode;
4112 /* tells us whether to stream */
4113
4114 /* frame size and buffering information */
4115 char *buffers[HRT_MAX_BUFFERS];
4116 /* contains pointers to the actual buffers */
4117 int buffer_count;
4118 int buffer_size;
4119 /* the raw size of the buffer; must be at least as large as the number of
4120 bytes in the video format */
4121 int in_buffer;
4122 /* device may write to in_buffer
4123 may only advance in_buffer if read_buffer = old in_buffer */
4124 int out_buffer;
4125 /* user may read from out_buffer if out_buffer != in_buffer */
4126
4127 /* current window of interest */
4128 int win_row, win_col, win_width, win_height;
4129
4130 int parity; /* current choice of interlaced frames */
4131
4132 d180 1
4133 a180 8
4134 struct pci_dev *pci_dev;
4135 #endif
4136 #ifdef HRT_DEBUG
4137 struct timer_list debug_timer;
4138 int debug_count;
4139 int debug_timer_count;
4140 int debug_read_count;
4141 int debug_missed_frames;
4142 d182 1
4143 d185 1
4144 a185 5
4145 /**
4146 * we use a nonzero number to indicate that a given device descriptor
4147 * is valid, i.e., it has been initialized and is associated
4148 * with an actual device
4149 */
4150 d188 7
4151 d209 3
4152 a211 1
4153 #define HRT_DEBUG_MSG(args...) do{printk("<1>hrt * "); printk(args);}while(0)
4154 d215 6
4155 a220 6
4156 #define write_buf(args...) \
4157 do { \
4158 n = snprintf(buf, count, args); \
4159 buf += n; \
4160 count -= n; \
4161 } while(0)
4162 d223 1
4163 a223 1
4164 int count, int *eof, void *data)
4165 d225 17
4166 a241 29
4167 int n, i;
4168 int ips, tps, rps;
4169 char *org_buf = buf;
4170
4171 n = hrt_devices[0].debug_count;
4172 if (n < 10) {
4173 ips = 0;
4174 tps = 0;
4175 rps = 0;
4176 }
4177 else {
4178 n = n / 10;
4179 ips = hrt_devices[0].interrupt_count / n;
4180 tps = hrt_devices[0].debug_timer_count / n;
4181 rps = hrt_devices[0].debug_read_count / n;
4182 }
4183
4184 /* dont excede count bytes when writing to buf */
4185 /* just write to buf as a normal ptr to a file */
4186
4187 write_buf("dev HZ/10 int timer read int/s timer/s read/s\n");
4188 for (i=0; i<HRT_MAX_DEVICES; i++) {
4189 write_buf("%3i %6i %6i %7i %6i %7i %9i %8i\n", i,
4190 hrt_devices[i].debug_count,
4191 hrt_devices[i].interrupt_count,
4192 hrt_devices[i].debug_timer_count,
4193 hrt_devices[i].debug_read_count,
4194 ips, tps, rps);
4195 }
4196 d243 2
4197 a244 2
4198 *eof = 1;
4199 return buf - org_buf;
4200 d278 1
4201 a278 1
4202 writeb(HRT_FREEZE_NEXT_CMD, dev->virt_addr + HRT_CONTROL_REG)
4203 d280 1
4204 a280 1
4205 writeb(HRT_FREEZE_IMM_CMD, dev->virt_addr + HRT_CONTROL_REG)
4206 d282 1
4207 a282 1
4208 writeb(HRT_LIVE_CMD, dev->virt_addr + HRT_CONTROL_REG)
4209 d284 1
4210 a284 1
4211 readb(dev->virt_addr + HRT_CONTROL_REG) & 0x1
4212 d291 64
4213 a354 64
4214 94, /* there are 94 bytes that follow */
4215 0x00, 0x4c, /* increment delay (IDEL) */
4216 0x01, 0x3c, /* HSY begin 50 Hz */
4217 0x02, 0x0d, /* HSY stop 50 Hz */
4218 0x03, 0xef, /* HCL begin 50 Hz */
4219 0x04, 0xbd, /* HCL stop 50 Hz */
4220 0x05, 0xf0, /* HSY after PHI1 50 Hz */
4221 0x06, 0x00, /* luminance control */
4222 0x07, 0x00, /* hue control */
4223 0x08, 0xf8, /* colour killer threshold QUAM (PAL/NTSC) */
4224 0x09, 0xf8, /* colour killer threshold SECAM */
4225 0x0A, 0x60, /* PAL switch sensitivity */
4226 0x0B, 0x50, /* SECAM switch sensitivity */
4227 0x0C, 0x00, /* gain control chrominance */
4228 0x0D, 0x86, /* standard/mode control */
4229 /* 7 VTRC = 1 (VCR mode, not TV)
4230 6 XXX
4231 5 XXX
4232 4 XXX
4233 3 RTSE = 0 (PLIN switched to output)
4234 2 HRMV = 1 (HREF normal position)
4235 1 SSTB = 1 (status byte = 1)
4236 0 SECS = 0 (other standards, not SECAM) */
4237 0x0E, 0x18, /* I/O and clock control */
4238 0x0F, 0x90, /* control #1 */
4239 0x10, 0x00, /* control #2 */
4240 0x11, 0x2c, /* chrominance gain reference */
4241 0x12, 0x7f, /* chrominance saturation */
4242 0x13, 0x5e, /* luminance contrast */
4243 0x14, 0x42, /* HSY begin 60 Hz */
4244 0x15, 0x1a, /* HSY stop 60 Hz */
4245 0x16, 0xff, /* HCL begin 60 Hz */
4246 0x17, 0xda, /* HCL stop 60 Hz */
4247 0x18, 0xf0, /* HSY after PHI1 60 Hz */
4248 0x19, 0x9b, /* luminance brightness */
4249 /*
4250 0x1A - not used
4251 0x1B - not used
4252 0x1C - not used
4253 0x1D - not used
4254 0x1E - not used
4255 0x1F - not used
4256 */
4257 0x20, 0x7c, /* analog control #1 */
4258 0x21, 0x03, /* analog control #2 */
4259 0x22, 0xd2, /* mixer control #1 */
4260 0x23, 0x41, /* clamping level control 21 */
4261 0x24, 0x80, /* clamping level control 22 */
4262 0x25, 0x41, /* clamping level control 31 */
4263 0x26, 0x80, /* clamping level control 32 */
4264 0x27, 0x4f, /* gain control #1 */
4265 0x28, 0xfe, /* white peak control */
4266 0x29, 0x01, /* sync bottom control */
4267 0x2A, 0xcf, /* gain control analog #2 */
4268 0x2B, 0x0f, /* gain control analog #3 */
4269 0x2C, 0x83, /* mixer control #2 */
4270 0x2D, 0x01, /* integration value gain */
4271 0x2E, 0x81, /* vertical blanking pulse set */
4272 0x2F, 0x03, /* vertical blanking pulse reset */
4273 0x30, 0x60, /* ADCs gain control */
4274 0x31, 0x71, /* mixer control #3 */
4275 0x32, 0x02, /* integration value white peak */
4276 0x33, 0x8c, /* mixer control #4 */
4277 0x34, 0x03, /* gain update level */
4278 d359 1
4279 a359 1
4280 * to the value given by parameter high
4281 d364 4
4282 a367 4
4283 if (high) dev->i2c_bits |= HRT_I2C_SDA;
4284 else dev->i2c_bits &= ~HRT_I2C_SDA;
4285 writeb(dev->i2c_bits, I2C_CONTROL(addr));
4286 wmb();
4287 d372 1
4288 a372 1
4289 * to the value given by parameter high
4290 d377 4
4291 a380 4
4292 if (high) dev->i2c_bits |= HRT_I2C_SCL;
4293 else dev->i2c_bits &= ~HRT_I2C_SCL;
4294 writeb(dev->i2c_bits, I2C_CONTROL(addr));
4295 wmb();
4296 d385 1
4297 a385 1
4298 * to the values given by parameters sda_high and scl_high
4299 d389 1
4300 a389 1
4301 unsigned long addr, int sda_high, int scl_high)
4302 d391 6
4303 a396 6
4304 if (sda_high) dev->i2c_bits |= HRT_I2C_SDA;
4305 else dev->i2c_bits &= ~HRT_I2C_SDA;
4306 if (scl_high) dev->i2c_bits |= HRT_I2C_SCL;
4307 else dev->i2c_bits &= ~HRT_I2C_SCL;
4308 writeb(dev->i2c_bits, I2C_CONTROL(addr));
4309 wmb();
4310 d398 1
4311 a398 1
4312
4313 d412 9
4314 a420 9
4315 hrt_sda_scl(dev, addr, 0, 0);
4316 hrt_i2c_delay();
4317 hrt_sda(dev, addr, 1);
4318 hrt_i2c_delay();
4319 hrt_scl(dev, addr, 1);
4320 hrt_i2c_delay();
4321 hrt_sda(dev, addr, 0);
4322 hrt_i2c_delay();
4323 hrt_scl(dev, addr, 0);
4324 d429 8
4325 a436 8
4326 hrt_sda_scl(dev, addr, 0, 0);
4327 hrt_i2c_delay();
4328 hrt_scl(dev, addr, 1);
4329 hrt_i2c_delay();
4330 hrt_sda(dev, addr, 1);
4331 hrt_i2c_delay();
4332 hrt_scl(dev, addr, 0);
4333 hrt_scl(dev, addr, 1);
4334 d448 1
4335 a448 1
4336 else hrt_sda(dev, addr, 0);
4337 d454 1
4338 a454 1
4339 timeout = jiffies + HZ / 10;
4340 d461 1
4341 a461 1
4342 }
4343 d471 16
4344 a486 16
4345 char bitpos, bit;
4346 for(bitpos = 0; bitpos < 8; bitpos++) {
4347 bit = (data & 0x80) >> 7;
4348 data <<= 1;
4349 if(hrt_i2c_send_bit(dev, addr, bit)) goto failure;
4350 }
4351 hrt_i2c_delay();
4352 hrt_sda_scl(dev, addr, 1, 0);
4353 hrt_scl(dev, addr, 1); /* leave clock high */
4354 udelay(10);
4355 if (hrt_sda_read(addr)) {
4356 HRT_ERROR_MSG("no i2c ack\n");
4357 goto failure;
4358 }
4359 hrt_sda_scl(dev, addr, 1, 0);
4360 return 0;
4361 d488 3
4362 a490 3
4363 hrt_sda_scl(dev, addr, 1, 0);
4364 hrt_i2c_stop(dev, addr);
4365 return -1;
4366 d506 2
4367 a507 2
4368 unsigned long addr;
4369 int i, len, cur_reg;
4370 d509 2
4371 a510 2
4372 len = (int) (*sequence++);
4373 addr = dev->virt_addr;
4374 d512 54
4375 a565 6
4376 if (len <= 2) {
4377 HRT_ERROR_MSG("invalid register initialization sequence\n");
4378 return -1;
4379 }
4380
4381 hrt_i2c_start(dev, addr);
4382 d567 2
4383 a568 6
4384 /* here we select the A/D Device on the i2c bus
4385 * that should pay attention to the following bytes */
4386 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
4387 HRT_ERROR_MSG("send_byte failed\n");
4388 return -1;
4389 }
4390 d570 1
4391 a570 45
4392 /* start at the first register and increment along the way */
4393 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = sequence[0])) {
4394 HRT_ERROR_MSG("send_byte failed(2)\n");
4395 return -1;
4396 }
4397
4398 for(i = 0; i < len; i += 2, sequence += 2) {
4399 char reg = sequence[0];
4400 char data = sequence[1];
4401
4402 if (reg > HRT_SAA7110_MAXREG) {
4403 HRT_ERROR_MSG("register number %02X out of range!\n", reg);
4404 return -1;
4405 }
4406
4407 if (reg != cur_reg) {
4408
4409 /* we're going to an entirely different register */
4410 hrt_i2c_stop(dev, addr);
4411 hrt_i2c_start(dev, addr);
4412
4413 /* select the chip/device on the bus */
4414 if (hrt_i2c_send_byte(dev, dev->virt_addr, HRT_AD_DEVICE_ID)) {
4415 HRT_ERROR_MSG("send_byte failed(3)\n");
4416 return -1;
4417 }
4418
4419 /* select the register */
4420 if (hrt_i2c_send_byte(dev, dev->virt_addr, cur_reg = reg)) {
4421 HRT_ERROR_MSG("send_byte failed(4)\n");
4422 return -1;
4423 }
4424 }
4425
4426 if (hrt_i2c_send_byte(dev, dev->virt_addr, data)) {
4427 HRT_ERROR_MSG("send_byte failed(5)\n");
4428 return -1;
4429 }
4430 dev->saa7110_registers[cur_reg++] = data;
4431 }
4432
4433 /* free the i2c bus */
4434 hrt_i2c_stop(dev, addr);
4435
4436 return 0;
4437 d575 13
4438 a587 11
4439 int result = 0;
4440 HRT_DEBUG_MSG("hrt_i2c_init_device entered (virt_addr = %08X, addr = %08X)\n",
4441 (unsigned) dev->virt_addr, (unsigned) dev->phys_addr);
4442
4443 result = hrt_i2c_init_registers(dev, saa7110_default_init_regs);
4444 if (result) {
4445 HRT_ERROR_MSG("hrt_i2c_init_registers failed %d\n", result);
4446 return result;
4447 }
4448 HRT_DEBUG_MSG("hrt_i2c_init_device returning %d\n", result);
4449 return result;
4450 d603 50
4451 a652 50
4452 char *buf;
4453 unsigned long y_addr;
4454 unsigned long in_addr;
4455 int win_width, win_height, win_end, win_col, win_row;
4456 int i, j, y;
4457 int dev_line_length;
4458
4459 i = (dev->in_buffer + 1) % dev->buffer_count;
4460 if (i != dev->out_buffer) dev->in_buffer = i;
4461
4462 buf = dev->buffers[dev->in_buffer];
4463 y_addr = dev->virt_addr + HRT_Y_LOW_REG;
4464 win_width = dev->win_width;
4465 win_height = dev->win_height;
4466 win_row = dev->win_row;
4467 win_col = dev->win_col;
4468 in_addr = dev->virt_addr + win_col;
4469
4470 if (dev->format == HRT_GREY_FORMAT) {
4471 dev_line_length = 512;
4472 win_end = (dev->win_row + dev->win_height) * dev_line_length;
4473 for (y = win_row * dev_line_length; y < win_end; y++) {
4474 writew(y, y_addr);
4475 wmb();
4476 memcpy_fromio(buf, in_addr, win_width);
4477 buf += win_width;
4478 }
4479 } else if (dev->format == HRT_COLOR_FORMAT) {
4480 dev_line_length = 2048;
4481 win_end = (dev->win_row + dev->win_height) * dev_line_length;
4482 for (y = win_row * dev_line_length; y < win_end; y++) {
4483 writew(y, y_addr);
4484 wmb();
4485 memcpy_fromio(buf, in_addr, win_width);
4486 /* rearrange pixels into logical order */
4487 for (i = 0; i < win_width; i++) {
4488 j = i + win_col;
4489 if (j < 512) {
4490 buf[i] = buf[j];
4491 buf[i+1] = buf[j+512];
4492 } else {
4493 buf[i] = buf[j+512];
4494 buf[i+1] = buf[j+1024];
4495 }
4496 }
4497 buf += win_width;
4498 }
4499 } else {
4500 HRT_ERROR_MSG("unsupported format %d\n", dev->format);
4501 }
4502 d661 1
4503 d664 7
4504 d673 5
4505 a677 1
4506 HRT_DEBUG_MSG("entering dev_cleanup %lx\n",(unsigned long) dev);
4507 d679 3
4508 a681 2
4509 /* restore device to an inactive state */
4510 hrt_dev_freeze_next(dev);
4511 d683 24
4512 a706 28
4513 if (dev->timer_installed) {
4514 hrt_remove_timer (dev);
4515 }
4516
4517 if (dev->phys_addr) {
4518 HRT_DEBUG_MSG("release_mem_region 0x%lx, 0x%lx\n",
4519 (unsigned long)dev, (unsigned long) dev->phys_addr);
4520 release_mem_region(dev->phys_addr, HRT_IO_SIZE);
4521 dev->phys_addr = 0;
4522 }
4523 if (dev->virt_addr) {
4524 HRT_DEBUG_MSG("iounmap %lx\n", (unsigned long) dev->virt_addr);
4525 iounmap((void *)dev->virt_addr);
4526 dev->virt_addr = 0;
4527 }
4528 {
4529 int i;
4530 HRT_DEBUG_MSG("freeing frame buffer(s)\n");
4531 vfree(dev->buffers[0]);
4532 for (i = 0; i < dev->buffer_count; i++) dev->buffers[i] = NULL;
4533 dev->in_buffer = dev->out_buffer = 0;
4534 }
4535 dev->in_buffer = dev->out_buffer = 0;
4536 if (dev->pci_dev) {
4537 hrt_pci_dev_cleanup (dev->pci_dev);
4538 dev->pci_dev = NULL;
4539 }
4540 dev->valid = 0;
4541 d714 3
4542 a716 3
4543 * 0 = no device at that address
4544 * 1 = greyscale device
4545 * 2 = color device
4546 d720 90
4547 a809 55
4548 unsigned char oldval1, oldval2, oldval3, newval2;
4549 unsigned int oldaddr;
4550 /* save the old values at the address */
4551 oldval1 = readb(HRT_CONTROL_REG + addr);
4552 rmb();
4553 oldaddr = readw(HRT_Y_LOW_REG + addr);
4554 rmb();
4555
4556 /* freeze the frame grabbing, immediately */
4557 writeb(0x5B, HRT_CONTROL_REG + addr);
4558 wmb();
4559
4560 /* write a new value to the first byte in the first raster/row */
4561 writew(0, HRT_Y_LOW_REG + addr);
4562 wmb();
4563 oldval2 = readb(addr);
4564 rmb();
4565 writeb(~oldval2, addr);
4566 wmb();
4567
4568 /* write oldval2 to the first byte of the next raster/row */
4569 writew(1, HRT_Y_LOW_REG + addr);
4570 wmb();
4571 oldval3 = readb(addr);
4572 rmb();
4573 writeb(oldval2, addr);
4574 wmb();
4575
4576 /* read the value at the previous raster/row */
4577 writew(0, HRT_Y_LOW_REG + addr);
4578 wmb();
4579 newval2 = readb(addr);
4580 rmb();
4581
4582 /* restore the old values */
4583 writeb(oldval2, addr);
4584 wmb();
4585 writew(1, HRT_Y_LOW_REG + addr);
4586 wmb();
4587 writeb(oldval3, addr);
4588 wmb();
4589 writeb(oldaddr, HRT_Y_LOW_REG + addr);
4590 wmb();
4591 writeb(oldval1, HRT_CONTROL_REG + addr);
4592 wmb();
4593
4594 if (newval2 != (unsigned char)~oldval2) return 0;
4595
4596 /* location 0x0400 should be RAM is this is a color card */
4597
4598 oldval2 = readb(0x400 + addr);
4599 writeb(~oldval2, 0x0400 + addr);
4600 newval2 = readb(0x0400 + addr);
4601 if (newval2 == ~oldval2) return HRT_COLOR_FORMAT;
4602 return HRT_GREY_FORMAT;
4603 d812 30
4604 d845 33
4605 a877 27
4606 unsigned int t1, t2;
4607 int i, n = 100;
4608 HRT_DEBUG_MSG("checking performance of device %d\n", dev->num);
4609 HRT_DEBUG_MSG("freezing\n");
4610 hrt_dev_freeze_immediate(dev);
4611 rdtscl(t1);
4612 for (i = 1; i < n; i++) {
4613 hrt_dev_copy_window(dev);
4614 }
4615 rdtscl(t2);
4616 if (t2 > t1) {
4617 HRT_DEBUG_MSG("elapsed time for %d copies = %d\n", n, t2-t1);
4618 } else {
4619 HRT_DEBUG_MSG("time anomaly. t1=%d t2=%d\n", t1, t2);
4620 }
4621 HRT_DEBUG_MSG("unfreezing\n");
4622 hrt_dev_go_live(dev);
4623 rdtscl(t1);
4624 for (i = 1; i < n; i++) {
4625 hrt_dev_copy_window(dev);
4626 }
4627 rdtscl(t2);
4628 if (t2 > t1) {
4629 HRT_DEBUG_MSG("elapsed time for %d copies = %d\n", n, t2-t1);
4630 } else {
4631 HRT_DEBUG_MSG("time anomaly. t1=%d t2=%d\n", t1, t2);
4632 }
4633 d882 20
4634 a901 78
4635 DECLARE_TASKLET(temp_task, hrt_dev_tasklet, (unsigned long) dev);
4636 int i, result;
4637 unsigned long virtual_addr;
4638
4639 memset(dev, 0, sizeof(hrt_dev_t));
4640 if (!request_mem_region(address, HRT_IO_SIZE, "hrt")) {
4641 HRT_DEBUG_MSG("hrt: I/O memory at %lx already in use\n",
4642 (unsigned long) address);
4643 return -EBUSY;
4644 }
4645 HRT_DEBUG_MSG("request_mem_region: 0x%lx, 0x%lx\n",
4646 (unsigned long) dev, address);
4647 dev->phys_addr = address;
4648 virtual_addr = (unsigned long)ioremap_nocache(address, HRT_IO_SIZE);
4649 if (!virtual_addr) {
4650 HRT_DEBUG_MSG("hrt: couldn't remap io memory!!\n");
4651 hrt_dev_cleanup(dev);
4652 return -ENODEV;
4653 }
4654 dev->virt_addr = virtual_addr;
4655
4656 result = hrt_probe(virtual_addr);
4657 if (!result) {
4658 HRT_DEBUG_MSG("hrt: hrt_probe failed at address 0x%lx\n", address);
4659 hrt_dev_cleanup(dev);
4660 return -ENODEV;
4661 }
4662 if (result == HRT_GREY_FORMAT) {
4663 HRT_DEBUG_MSG("greyscale device detected\n");
4664 dev->format = HRT_GREY_FORMAT;
4665 dev->cols = 512; /* is for NTSC, 512 for PAL */
4666 dev->rows = 480;
4667 dev->bytes_per_pixel = 1;
4668 } else {
4669 HRT_DEBUG_MSG("color device detected\n");
4670 dev->format = HRT_COLOR_FORMAT;
4671 dev->rows = 480;
4672 dev->cols = 640;
4673 dev->bytes_per_pixel = 2;
4674 }
4675 result = hrt_i2c_init_device(dev);
4676 if (result) {
4677 HRT_DEBUG_MSG("hrt_i2c_init_device %d failed\n",result);
4678 hrt_dev_cleanup(dev);
4679 return -ENODEV;
4680 }
4681 sema_init(&dev->sem, 1);
4682 init_waitqueue_head(&dev->wait_queue);
4683 init_timer(&dev->timer);
4684 memcpy(&dev->tasklet, &temp_task, sizeof(struct tasklet_struct));
4685
4686 dev->buffer_size = PAGE_ALIGN(dev->rows * dev->cols * dev->bytes_per_pixel);
4687 dev->buffer_count = HRT_DEFAULT_BUFFER_COUNT;
4688 HRT_DEBUG_MSG("buffer_size = %d, buffer_count = %d\n",
4689 dev->buffer_size, dev->buffer_count);
4690 if ((dev->buffer_count < 3) > (dev->buffer_count > HRT_MAX_BUFFERS)) {
4691 HRT_ERROR_MSG("unsupported buffer count\n");
4692 hrt_dev_cleanup(dev);
4693 return -ENOMEM;
4694 }
4695 HRT_DEBUG_MSG("trying to allocate %d bytes\n",
4696 dev->buffer_size*dev->buffer_count);
4697 dev->buffers[0] = vmalloc(dev->buffer_size*dev->buffer_count);
4698 if (dev->buffers[0] == NULL) {
4699 HRT_ERROR_MSG("unable to allocate frame buffer space\n");
4700 hrt_dev_cleanup(dev);
4701 return -ENOMEM;
4702 }
4703 for (i = 1; i < dev->buffer_count; i++)
4704 dev->buffers[i] = dev->buffers[i-1] + dev->buffer_size;
4705 dev->in_buffer = dev->out_buffer = 0;
4706 dev->num = dev_num;
4707 dev->valid = HRT_VALID;
4708
4709 check_performance(dev);
4710
4711 /* do we want to postpone this until open, or maybe read? */
4712 hrt_dev_go_live(dev);
4713 d903 73
4714 a975 1
4715 return result;
4716 d980 16
4717 a995 16
4718 int i;
4719 for (i = 0; i < ARRAY_SIZE(hrt_addresses); i++) {
4720 if (hrt_num_devices >= HRT_MAX_DEVICES) {
4721 HRT_ERROR_MSG("more than %d HRT devices\n",
4722 HRT_MAX_DEVICES);
4723 return -ENOMEM;
4724 }
4725 if (!hrt_dev_init(&hrt_devices[hrt_num_devices],
4726 hrt_num_devices, hrt_addresses[i])) {
4727 hrt_num_devices++;
4728 printk("hrt: found hrt isa device at 0x%lx, minor number %d\n",
4729 hrt_addresses[i], i);
4730 }
4731 }
4732 hrt_nonpci_devices = hrt_num_devices;
4733 return 0;
4734 d1000 4
4735 a1003 4
4736 for (i=0; i<hrt_nonpci_devices; i++) {
4737 HRT_DEBUG_MSG("cleaning up device %d\n", i);
4738 hrt_dev_cleanup(hrt_devices+i);
4739 }
4740 d1012 3
4741 a1014 3
4742 int r = readb(dev->virt_addr + HRT_CONTROL_REG) & 0x4;
4743 rmb();
4744 return r;
4745 d1019 6
4746 a1024 6
4747 int val;
4748 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
4749 rmb();
4750 val |= 0x1;
4751 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
4752 rmb();
4753 d1026 1
4754 a1026 1
4755
4756 d1029 6
4757 a1034 6
4758 int val;
4759 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
4760 rmb();
4761 val &= ~0x1;
4762 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
4763 rmb();
4764 d1037 2
4765 d1041 10
4766 a1050 14
4767 HRT_DEBUG_MSG("entering hrt_remove_interupt()\n");
4768 if (dev->timer_installed) {
4769 if (dev->irq) {
4770 hrt_disable_interrupt(dev);
4771 free_irq(dev->irq, dev);
4772 } else {
4773 del_timer_sync(&dev->timer);
4774 }
4775 dev->timer_installed = 0;
4776 }
4777
4778 #ifdef HRT_DEBUG
4779 del_timer_sync(&dev->debug_timer);
4780 #endif
4781 a1052 4
4782 #define HRT_DUAL_PORTED_MODE 1
4783 #define HRT_STREAMING_MODE 2
4784 #define HRT_FRAME_IRQ 4
4785
4786 d1086 1
4787 a1086 1
4788 (c) dev->mode & HRT_FRAME_IRQ
4789 d1137 3
4790 a1139 3
4791 1. Copy one field to buffer.
4792 2. If this is second (odd) field, advance buffer.
4793 Advancing buffer may wake up a blocked reader.
4794 d1141 3
4795 a1143 3
4796 1. Copy both fields to buffer
4797 2. Advance buffer.
4798 3. Go live again
4799 d1155 18
4800 a1172 44
4801 hrt_dev_t* dev = dev_id;
4802 int val;
4803
4804 dev->interrupt_count++;
4805
4806 if (dev->is_open) {
4807 goto done;
4808 if (hrt_interrupt_pending(dev) && dev->is_open) {
4809 /* disable interrupt generation ... why????? */
4810 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
4811 rmb();
4812 val &= ~0x1;
4813 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
4814 rmb();
4815 /* ???? make the following dependent on mode? */
4816 val = hrt_dev_get_parity(dev);
4817 if (dev->parity == -1) {
4818 /* initial state, out of synchronization */
4819 if (val == 0) {
4820 dev->parity = 0;
4821 } else {
4822 }
4823 } else if (dev->parity == 0) {
4824 /* captured even rows last cycle */
4825 if (val == 1) {
4826 /* captured odd rows this cycle
4827 so we have a full frame now */
4828 dev->parity = 1;
4829 tasklet_schedule(&dev->tasklet);
4830 } else {
4831 /* ...working here... */
4832 }
4833 } else { /* we missed a frame? */
4834 #ifdef HRT_DEBUG
4835 dev->debug_missed_frames++;
4836 #endif
4837 }
4838 /* reenable interrupt generation ... why????? */
4839 val |= 0x1;
4840 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
4841 rmb();
4842 }
4843
4844 done:
4845 d1174 1
4846 a1174 1
4847 return IRQ_HANDLED;
4848 d1176 1
4849 a1176 1
4850 }
4851 d1178 1
4852 a1178 1
4853 return IRQ_NONE;
4854 d1185 2
4855 a1186 5
4856
4857 if (dev->is_open) {
4858 #ifdef HRT_DEBUG
4859 dev->debug_timer_count++;
4860 #endif
4861 d1189 1
4862 a1189 1
4863 dev->timer.expires = jiffies + (HZ/100);
4864 d1194 5
4865 a1198 4
4866 #ifdef HRT_DEBUG
4867 void hrt_debug_timer(unsigned long data)
4868 {
4869 hrt_dev_t* dev = (hrt_dev_t*)data;
4870 d1200 4
4871 a1203 4
4872 if (dev->is_open) {
4873 dev->debug_count++;
4874 dev->debug_timer.expires = jiffies + (HZ/10);
4875 add_timer(&dev->debug_timer);
4876 d1205 4
4877 a1208 16
4878 }
4879 #endif
4880
4881 int hrt_install_timer(hrt_dev_t* dev)
4882 { int result = 0;
4883 HRT_DEBUG_MSG("entering hrt_install_interupt()\n");
4884
4885 if (dev->timer_installed) {
4886 HRT_DEBUG_MSG("interrupts or timers are already"
4887 " enabled so doing nothing\n");
4888 return 0;
4889 }
4890 dev->interrupt_count = 0;
4891 if (dev->irq) {
4892 HRT_DEBUG_MSG("trying to install interrupt handler\n");
4893 result = request_irq(dev->irq, hrt_interrupt_handler,
4894 d1210 18
4895 a1227 28
4896 if (result == 0) {
4897 hrt_enable_interrupt(dev);
4898 dev->timer_installed = 1;
4899 } else {
4900 HRT_ERROR_MSG("request_irq failed: %d\n", result);
4901 dev->irq = 0;
4902 dev->mode ^= HRT_FRAME_IRQ;
4903 }
4904 } else {
4905 HRT_DEBUG_MSG("installing timer\n");
4906 init_timer(&dev->timer);
4907 dev->timer.function = hrt_timer_handler;
4908 dev->timer.expires = jiffies + (HZ/100);
4909 dev->timer.data = (unsigned long)dev;
4910 add_timer(&dev->timer);
4911 dev->timer_installed = 1;
4912 }
4913
4914 #ifdef HRT_DEBUG
4915 init_timer(&dev->debug_timer);
4916 dev->debug_timer.function = hrt_debug_timer;
4917 dev->debug_timer.expires = jiffies + (HZ/10);
4918 dev->debug_timer.data = (unsigned long)dev;
4919 add_timer(&dev->debug_timer);
4920 dev->debug_count = 0;
4921 dev->debug_timer_count = 0;
4922 #endif
4923 return result;
4924 d1233 14
4925 a1246 2
4926 int parity;
4927 hrt_dev_t *dev = (hrt_dev_t *)data;
4928 d1248 5
4929 a1252 17
4930 parity = hrt_dev_get_parity(dev);
4931 /* if the HW reports a parity that we're still reading,
4932 * that means we're SLOW -- give up! */
4933 if ((parity == dev->parity) && (dev->parity >= 0)){
4934 /* ???? consider counting how often this occurs, for debugging */
4935 return;
4936 }
4937
4938 dev->parity = 0;
4939 /* ...working here... */
4940 hrt_dev_copy_window(dev);
4941
4942 if (!dev->parity) {
4943 up(&dev->sem);
4944 wake_up(&dev->wait_queue);
4945 /* ....need to make sure we do not race ahead before process can copy frame,
4946 or else copy the data ourselves, right now.... */
4947 d1254 1
4948 a1254 1
4949 up(&dev->sem);
4950 d1265 1
4951 a1265 1
4952 unsigned int cmd, unsigned long arg);
4953 d1269 6
4954 a1274 6
4955 .owner = THIS_MODULE,
4956 .open = hrt_open,
4957 .release = hrt_release,
4958 .read = hrt_read,
4959 .ioctl = hrt_ioctl,
4960 .mmap = hrt_mmap,
4961 d1286 31
4962 a1316 31
4963 hrt_dev_t* dev;
4964 unsigned int minor;
4965 int result = 0;
4966
4967 /* consider shifting responsibility for buffer allocation
4968 to open and release operations */
4969
4970 minor = MINOR(inode->i_rdev);
4971 if (minor >= HRT_MAX_DEVICES) return -ENODEV;
4972
4973 dev = hrt_devices + minor;
4974 HRT_DEBUG_MSG("opening hrt device %d at addr %lX\n", minor, (unsigned long)dev);
4975
4976 if (dev->valid != HRT_VALID) return -ENODEV;
4977 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
4978
4979 HRT_DEBUG_MSG("hrt_setting private data\n");
4980 file->private_data = (void*)dev;
4981
4982 HRT_DEBUG_MSG("hrt checking is_open\n");
4983 if (dev->is_open) {
4984 HRT_DEBUG_MSG("hrt is is_open\n");
4985 up(&dev->sem);
4986 return -EBUSY;
4987 } else dev->is_open = 1;
4988
4989 HRT_DEBUG_MSG("hrt installing timer/interrupt\n");
4990 result = hrt_install_timer(dev);
4991 up(&dev->sem);
4992 HRT_MOD_INC_USE_COUNT;
4993 return result;
4994 d1319 6
4995 d1327 6
4996 a1332 8
4997 hrt_dev_t* dev = file->private_data;
4998 if (dev->valid != HRT_VALID) return -ENODEV;
4999 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
5000 dev->is_open = 0;
5001 hrt_remove_timer(dev);
5002 up(&dev->sem);
5003 HRT_MOD_DEC_USE_COUNT;
5004 return 0;
5005 d1337 2
5006 a1338 2
5007 hrt_dev_t* dev = file->private_data;
5008 int max_count;
5009 d1340 4
5010 a1343 4
5011 HRT_DEBUG_MSG("hrt_read_proc (1)\n");
5012 if (dev->valid != HRT_VALID) return -ENODEV;
5013 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
5014 /* ???? do we really need the semaphore here? */
5015 d1345 19
5016 a1363 29
5017 /* check to see if the device is open */
5018 if (!dev->is_open) {
5019 up(&dev->sem);
5020 return -ENODEV;
5021 }
5022
5023 if (dev->in_buffer == dev->out_buffer) {
5024 if (file->f_flags & O_NONBLOCK) return -EAGAIN;
5025 HRT_DEBUG_MSG("hrt_read_proc (2)\n");
5026 if (dev->mode /* ...missing... */) {
5027 /* start frame grabber */
5028 /* ...working here... */
5029 }
5030 up(&dev->sem);
5031 if (wait_event_interruptible(dev->wait_queue, (dev->in_buffer != dev->out_buffer)))
5032 return -ERESTARTSYS;
5033 if (down_interruptible(&dev->sem))
5034 return -ERESTARTSYS;
5035 }
5036
5037 HRT_DEBUG_MSG("hrt_read_proc (3)\n");
5038 max_count = dev->win_width * dev->win_height * dev->bytes_per_pixel;
5039 if (count > max_count)
5040 count = max_count;
5041 if (copy_to_user(buf, dev->buffers[dev->out_buffer], count)) {
5042 up(&dev->sem);
5043 return -EFAULT;
5044 }
5045 dev->out_buffer = (dev->out_buffer + 1) % dev->buffer_count;
5046 d1365 11
5047 a1375 5
5048 #ifdef HRT_DEBUG
5049 dev->debug_read_count++;
5050 #endif
5051 up(&dev->sem);
5052 return count;
5053 d1383 1
5054 a1383 1
5055 unsigned int cmd, unsigned long arg)
5056 d1385 37
5057 a1421 3
5058 int result = 0, iarg = *((int*)arg);
5059 hrt_dev_t* dev = file->private_data;
5060
5061 d1423 1
5062 a1423 45
5063 switch (cmd)
5064 {
5065 case IOC_HRT_FREEZE_FRAME:
5066 HRT_DEBUG_MSG("IOC_HRT_FREEZE_FRAME: called\n");
5067 hrt_dev_freeze_next(dev);
5068 break;
5069
5070 case IOC_HRT_GO_LIVE:
5071 HRT_DEBUG_MSG("IOC_HRT_GO_LIVE: called\n");
5072 hrt_dev_go_live(dev);
5073 break;
5074
5075 case IOC_HRT_WIN_SET_WIDTH:
5076 HRT_DEBUG_MSG("IOC_HRT_WIN_SET_WIDTH: called with arg %d\n", iarg);
5077 dev->win_width = iarg;
5078 break;
5079 case IOC_HRT_WIN_SET_HEIGHT:
5080 HRT_DEBUG_MSG("IOC_HRT_WIN_SET_HEIGHT: called with arg %d\n", iarg);
5081 dev->win_height = iarg;
5082 break;
5083 case IOC_HRT_WIN_SET_X:
5084 HRT_DEBUG_MSG("IOC_HRT_WIN_SET_X: called with arg %d\n", iarg);
5085 dev->win_col = iarg;
5086 break;
5087 case IOC_HRT_WIN_SET_Y:
5088 HRT_DEBUG_MSG("IOC_HRT_WIN_SET_Y: called with arg %d\n", iarg);
5089 dev->win_row = iarg;
5090 break;
5091
5092 case IOC_HRT_STOP_DRV_READ:
5093 HRT_DEBUG_MSG("IOC_HRT_STOP_DRV_READ: called\n");
5094 hrt_remove_timer(dev);
5095 break;
5096
5097 case IOC_HRT_START_DRV_READ:
5098 HRT_DEBUG_MSG("IOC_HRT_START_DRV_READ: called\n");
5099 result = hrt_install_timer(dev);
5100 break;
5101
5102 default:
5103 result = -ENOSYS;
5104 break;
5105 }
5106
5107 return result;
5108 d1428 1
5109 a1428 1
5110 return -ENOSYS;
5111 d1442 3
5112 a1444 3
5113 {HRT_VENDOR_ID, HRT_DEVICE_ID_GREY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
5114 {HRT_VENDOR_ID, HRT_DEVICE_ID_COLOR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
5115 {0,}
5116 d1448 4
5117 a1451 4
5118 .name = "hrt",
5119 .id_table = hrt_pci_tbl,
5120 .probe = hrt_pci_probe,
5121 .remove = __devexit_p(hrt_pci_remove)
5122 d1455 1
5123 a1455 1
5124 const struct pci_device_id *pci_id)
5125 d1457 60
5126 a1516 55
5127 hrt_dev_t* dev = &hrt_devices[hrt_num_devices];
5128 HRT_DEBUG_MSG("probing pci device %lx\n", (unsigned long)dev);
5129 if (hrt_num_devices >= HRT_MAX_DEVICES) {
5130 HRT_ERROR_MSG("need to increase HRT_MAX_DEVICES\n");
5131 return -ENOMEM;
5132 }
5133 if (pci_enable_device(pci_dev)) {
5134 HRT_DEBUG_MSG("pci_enable_device failed\n");
5135 return -EIO;
5136 }
5137 if (!hrt_dev_init(dev, hrt_num_devices, pci_resource_start(pci_dev, 0))) {
5138 printk("hrt: found hrt pci device at 0x%lx, minor number %d\n",
5139 pci_resource_start(pci_dev, 0), dev->num);
5140 /* device has been found so set data */
5141 pci_set_drvdata (pci_dev, dev);
5142 dev->pci_dev = pci_dev;
5143 dev->irq = pci_dev->irq;
5144 if (dev->valid != HRT_VALID)
5145 HRT_ERROR_MSG("invalid device\n");
5146 if (pci_dev->device == HRT_DEVICE_ID_GREY) {
5147 if (dev->format != HRT_GREY_FORMAT)
5148 HRT_ERROR_MSG("grey device format %d?\n", dev->format);
5149 } else if (pci_dev->device == HRT_DEVICE_ID_COLOR) {
5150 if (dev->format != HRT_COLOR_FORMAT)
5151 HRT_ERROR_MSG("color device format %d?\n", dev->format);
5152 } else {
5153 HRT_DEBUG_MSG("unknown device type 0x%hx\n", pci_dev->device);
5154 return -ENODEV;
5155 }
5156 hrt_num_devices++;
5157 dev->interrupt_count = 0;
5158 if (hrt_install_timer(dev)) {
5159 HRT_DEBUG_MSG("failed to install interrupt\n");
5160 dev->irq = 0;
5161 dev->mode ^= HRT_FRAME_IRQ;
5162 } else {
5163 hrt_enable_interrupt(dev);
5164 hrt_dev_go_live(dev);
5165 mdelay(10);
5166 hrt_dev_freeze_immediate(dev);
5167 hrt_disable_interrupt(dev);
5168 if (dev->interrupt_count) {
5169 HRT_DEBUG_MSG("counted %d interrupts\n",dev->interrupt_count);
5170 dev->mode |= HRT_FRAME_IRQ;
5171 } else {
5172 HRT_DEBUG_MSG("no interrupts\n");
5173 dev->irq = 0;
5174 dev->mode ^= HRT_FRAME_IRQ;
5175 }
5176 }
5177 return 0;
5178 } else {
5179 pci_disable_device(pci_dev);
5180 return -ENODEV;
5181 }
5182 d1521 5
5183 a1525 5
5184 hrt_dev_t *dev;
5185 HRT_DEBUG_MSG("hrt_pci_remove\n");
5186 dev = (hrt_dev_t *) pci_get_drvdata (pci_dev);
5187 hrt_dev_cleanup(dev);
5188 pci_disable_device(pci_dev);
5189 d1530 2
5190 a1531 2
5191 HRT_DEBUG_MSG("pci_register_driver\n");
5192 pci_register_driver(&hrt_pci_driver);
5193 d1536 2
5194 a1537 2
5195 HRT_DEBUG_MSG("pci_unregister_driver\n");
5196 pci_unregister_driver(&hrt_pci_driver);
5197 d1542 2
5198 a1543 2
5199 HRT_DEBUG_MSG("pci_disable_device\n");
5200 pci_disable_device(pci_dev);
5201 d1572 5
5202 a1576 5
5203 HRT_DEBUG_MSG("entering hrt_cleanup_module()\n");
5204 hrt_isa_cleanup();
5205 hrt_pci_cleanup();
5206 if (hrt_major_number) unregister_chrdev(hrt_major_number, "hrt");
5207 hrt_debug_cleanup();
5208 d1581 27
5209 a1607 27
5210 int result = 0;
5211 hrt_debug_init();
5212 result = register_chrdev(major_number, "hrt", &hrt_fops);
5213 if (result < 0) {
5214 HRT_ERROR_MSG("failed to register as char device with major number %d\n",
5215 major_number);
5216 goto failed;
5217 }
5218 if (major_number == 0) hrt_major_number = result;
5219 else hrt_major_number = major_number;
5220 printk("hrt: module initializing with major number %d\n", hrt_major_number);
5221 memset(hrt_devices, 0, sizeof(hrt_devices));
5222
5223 /* detect ISA/PC104 devices, and PCI devices that are
5224 * jumpered to use the ISA/PC104 I/O address space */
5225 hrt_isa_init();
5226
5227 /* now detect regular PCI devices */
5228 hrt_pci_init();
5229
5230 if (hrt_num_devices == 0) {
5231 printk("hrt: no devices detected\n");
5232 return -ENODEV;
5233 } else {
5234 printk("hrt: found %d devices\n", hrt_num_devices);
5235 }
5236 return 0;
5237 d1609 3
5238 a1611 3
5239 hrt_cleanup_module();
5240 HRT_DEBUG_MSG("returning from failed init_module() with result %d\n", result);
5241 return result;
5242 @
5243
5244
5245 1.4
5246 log
5247 @*** empty log message ***
5248 @
5249 text
5250 @d5 1
5251 a5 1
5252 This is a bare-bones device driver for the PixelSmart512-8 (monochrome)
5253 d123 1
5254 a123 1
5255 #define HRT_DEVICE_ID_GRAY 0x0404
5256 d128 1
5257 a128 1
5258 HRT_DEVICE_ID_GRAY};
5259 d134 1
5260 a134 1
5261 #define HRT_MONO_FORMAT 1
5262 d141 1
5263 a141 1
5264 #define HRT_SAA7110_NUMREGS 0x34
5265 d162 1
5266 a162 1
5267 char saa7110_registers[HRT_SAA7110_NUMREGS];
5268 d559 1
5269 a559 1
5270 if (reg > HRT_SAA7110_NUMREGS) {
5271 d642 1
5272 a642 1
5273 if (dev->format == HRT_MONO_FORMAT) {
5274 d672 1
5275 a672 1
5276 HRT_ERROR_MSG("unsupported format\n");
5277 d725 4
5278 d777 10
5279 a786 2
5280
5281 return (newval2 == (unsigned char)~oldval2);
5282 d824 1
5283 a824 1
5284 int result;
5285 d850 13
5286 a862 1
5287
5288 a868 1
5289
5290 a873 3
5291 /* ... need to find out how to tell, for non-pci device, which model
5292 we have, and in general what size is frame buffer ... */
5293
5294 d875 15
5295 a889 17
5296 {
5297 int i;
5298 dev->buffer_count = HRT_DEFAULT_BUFFER_COUNT;
5299 if ((dev->buffer_count < 3) > (dev->buffer_count > HRT_MAX_BUFFERS)) {
5300 HRT_ERROR_MSG("unsupported buffer count\n");
5301 hrt_dev_cleanup(dev);
5302 return -ENOMEM;
5303 }
5304 dev->buffers[0] = vmalloc(dev->buffer_size*dev->buffer_count);
5305 if (dev->buffers[0] == NULL) {
5306 HRT_ERROR_MSG("unable to allocate frame buffer space\n");
5307 hrt_dev_cleanup(dev);
5308 return -ENOMEM;
5309 }
5310 for (i = 1; i < dev->buffer_count; i++)
5311 dev->buffers[i] = dev->buffers[i-1] + dev->buffer_size;
5312 dev->in_buffer = dev->out_buffer = 0;
5313 d891 3
5314 d915 1
5315 a915 1
5316 hrt_num_devices, hrt_addresses[i])) {
5317 d1005 1
5318 a1005 1
5319 with digitization. Apparently, the grayscale card has dual-ported
5320 d1435 1
5321 a1435 1
5322 {HRT_VENDOR_ID, HRT_DEVICE_ID_GRAY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
5323 d1467 5
5324 a1471 5
5325 if (pci_dev->device == HRT_DEVICE_ID_GRAY) {
5326 dev->format = HRT_MONO_FORMAT;
5327 dev->cols = 512; /* is for NTSC, 512 for PAL */
5328 dev->rows = 480;
5329 dev->bytes_per_pixel = 1;
5330 d1473 2
5331 a1474 4
5332 dev->format = HRT_COLOR_FORMAT;
5333 dev->rows = 480;
5334 dev->cols = 640;
5335 dev->bytes_per_pixel = 2;
5336 d1573 1
5337 a1573 1
5338 HRT_ERROR_MSG("failed to register as xchar device with major number %d\n",
5339 @
5340
5341
5342 1.3
5343 log
5344 @*** empty log message ***
5345 @
5346 text
5347 @a84 10
5348 #ifdef CONFIG_PCI
5349 #define HRT_CONFIG_PCI
5350 #endif
5351
5352 #ifdef HRT_DEBUG
5353 #define HRT_DEBUG_MSG(args...) do{printk("<1>hrt * "); printk(args);}while(0)
5354 #else
5355 #define HRT_DEBUG_MSG(args...) do{}while(0)
5356 #endif
5357
5358 d87 3
5359 a89 1
5360 /* Module Parameters */
5361 d118 4
5362 a121 3
5363 /**
5364 * Card-specific constants
5365 */
5366 d131 1
5367 a131 7
5368 * A/D registers
5369 */
5370 #define HRT_BRIGHTNESS_REG 0x19
5371 #define HRT_CONTRAST_REG 0x13
5372
5373 /**
5374 * NTSC 8-bit greyscale
5375 a132 2
5376 #define HRT_MAX_BYTES_PER_LINE (HRT_MAX_WIDTH * HRT_MAX_BYTES_PER_PIXEL)
5377 #define HRT_MAX_FRAMESIZE (HRT_MAX_WIDTH * HRT_MAX_HEIGHT * HRT_MAX_BYTES_PER_PIXEL)
5378 d134 2
5379 a135 2
5380 #define HRT_MONO_FORMAT
5381 #define HRT_COLOR_FORMAT
5382 d137 2
5383 a138 7
5384 #define HRT_STREAM_MODE_BIT 1
5385 #define HRT_INTERLEAVED_MODE_BIT 2
5386
5387 /**
5388 * The unique I2C bus address of the SAA7110 (A/D) device
5389 */
5390 #define HRT_AD_DEVICE_ID (128+16+8+4)
5391 a142 100
5392 const unsigned char saa7110_default_init_regs[] = {
5393 94, /* there are 94 bytes that follow */
5394 0x00, 0x4c, /* increment delay (IDEL) */
5395 0x01, 0x3c, /* HSY begin 50 Hz */
5396 0x02, 0x0d, /* HSY stop 50 Hz */
5397 0x03, 0xef, /* HCL begin 50 Hz */
5398 0x04, 0xbd, /* HCL stop 50 Hz */
5399 0x05, 0xf0, /* HSY after PHI1 50 Hz */
5400 0x06, 0x00, /* luminance control */
5401 0x07, 0x00, /* hue control */
5402 0x08, 0xf8, /* colour killer threshold QUAM (PAL/NTSC) */
5403 0x09, 0xf8, /* colour killer threshold SECAM */
5404 0x0A, 0x60, /* PAL switch sensitivity */
5405 0x0B, 0x50, /* SECAM switch sensitivity */
5406 0x0C, 0x00, /* gain control chrominance */
5407 0x0D, 0x86, /* standard/mode control */
5408 /* 7 VTRC = 1 (VCR mode, not TV)
5409 6 XXX
5410 5 XXX
5411 4 XXX
5412 3 RTSE = 0 (PLIN switched to output)
5413 2 HRMV = 1 (HREF normal position)
5414 1 SSTB = 1 (status byte = 1)
5415 0 SECS = 0 (other standards, not SECAM) */
5416 0x0E, 0x18, /* I/O and clock control */
5417 0x0F, 0x90, /* control #1 */
5418 0x10, 0x00, /* control #2 */
5419 0x11, 0x2c, /* chrominance gain reference */
5420 0x12, 0x7f, /* chrominance saturation */
5421 0x13, 0x5e, /* luminance contrast */
5422 0x14, 0x42, /* HSY begin 60 Hz */
5423 0x15, 0x1a, /* HSY stop 60 Hz */
5424 0x16, 0xff, /* HCL begin 60 Hz */
5425 0x17, 0xda, /* HCL stop 60 Hz */
5426 0x18, 0xf0, /* HSY after PHI1 60 Hz */
5427 0x19, 0x9b, /* luminance brightness */
5428 /*
5429 0x1A - not used
5430 0x1B - not used
5431 0x1C - not used
5432 0x1D - not used
5433 0x1E - not used
5434 0x1F - not used
5435 */
5436 0x20, 0x7c, /* analog control #1 */
5437 0x21, 0x03, /* analog control #2 */
5438 0x22, 0xd2, /* mixer control #1 */
5439 0x23, 0x41, /* clamping level control 21 */
5440 0x24, 0x80, /* clamping level control 22 */
5441 0x25, 0x41, /* clamping level control 31 */
5442 0x26, 0x80, /* clamping level control 32 */
5443 0x27, 0x4f, /* gain control #1 */
5444 0x28, 0xfe, /* white peak control */
5445 0x29, 0x01, /* sync bottom control */
5446 0x2A, 0xcf, /* gain control analog #2 */
5447 0x2B, 0x0f, /* gain control analog #3 */
5448 0x2C, 0x83, /* mixer control #2 */
5449 0x2D, 0x01, /* integration value gain */
5450 0x2E, 0x81, /* vertical blanking pulse set */
5451 0x2F, 0x03, /* vertical blanking pulse reset */
5452 0x30, 0x60, /* ADCs gain control */
5453 0x31, 0x71, /* mixer control #3 */
5454 0x32, 0x02, /* integration value white peak */
5455 0x33, 0x8c, /* mixer control #4 */
5456 0x34, 0x03, /* gain update level */
5457 };
5458
5459 /**
5460 * card-specific I2C interface
5461 */
5462
5463 /* ID tag */
5464 #define HRT_I2C_HW_B 0xDE
5465
5466 /* bit info */
5467 #define HRT_I2C_SCL 0x01
5468 #define HRT_I2C_SDA 0x02
5469
5470 /**
5471 * HRT_CONTROL_OFFSET is the offset of the I2C bus control port
5472 * 0x2000 = 8192 = 2^13
5473 */
5474 #define HRT_CONTROL_OFFSET 0x2000
5475 #define HRT_CONTROL(addr) (addr + HRT_CONTROL_OFFSET)
5476 #define I2C_CONTROL(addr) (addr + HRT_I2C_REG)
5477 #define I2C_POKE(addr,data) { writeb(data,I2C_CONTROL(addr)); wmb(); }
5478 #define I2C_PEEK(addr) (readb(I2C_CONTROL(addr)))
5479 #define I2C_00(addr) { writeb(0,I2C_CONTROL(addr)); wmb(); }
5480 #define I2C_10(addr) { writeb(1,I2C_CONTROL(addr)); wmb(); }
5481 #define I2C_01(addr) { writeb(2,I2C_CONTROL(addr)); wmb(); }
5482 #define I2C_11(addr) { writeb(3,I2C_CONTROL(addr)); wmb(); }
5483
5484 /**
5485 * bit 7 at 0x2000 (the HRT512-8 control register) tells whether
5486 * the CPU is sending data across the I2C bus
5487 */
5488 #define I2C_BUSY(addr) (!(readb(HRT_CONTROL(addr)) & 0x80))
5489
5490 #define HRT_DEFAULT_BUFFER_COUNT 3
5491
5492 d172 3
5493 a174 2
5494 char *buffers[HRT_DEFAULT_BUFFER_COUNT];
5495 /* contains pointer to the actual buffers */
5496 d197 1
5497 d217 6
5498 a222 6
5499 /****************************************************
5500 * optional debugging support
5501 *
5502 * debugging log messages
5503 * /proc filesystem support
5504 */
5505 a223 1
5506 #ifdef HRT_DEBUG
5507 d225 1
5508 d272 1
5509 d277 3
5510 a279 2
5511 /* hrt debugging is off
5512 */
5513 d285 14
5514 a298 3
5515 /****************************************************
5516 * low-level device control
5517 */
5518 d310 70
5519 a448 1
5520
5521 d611 3
5522 a613 68
5523 void hrt_dev_tasklet(unsigned long);
5524
5525 /*
5526 * device initialization and cleanup
5527 */
5528
5529 /**
5530 * hrt_probe - check that we have a device as the specified address.
5531 * Assume the memory region is already mapped.
5532 * The address has to be a virtual address mapped to the device I/O space.
5533 */
5534 int hrt_probe(unsigned long addr)
5535 {
5536 unsigned char oldval1, oldval2, oldval3, newval2;
5537 unsigned int oldaddr;
5538
5539 /* save the old values at the address */
5540 oldval1 = readb(HRT_CONTROL_REG + addr);
5541 rmb();
5542 oldaddr = readw(HRT_Y_LOW_REG + addr);
5543 rmb();
5544
5545 /* freeze the frame grabbing, immediately */
5546 writeb(0x5B, HRT_CONTROL_REG + addr);
5547 wmb();
5548
5549 /* write a new value to the first byte in the first raster/row */
5550 writew(0, HRT_Y_LOW_REG + addr);
5551 wmb();
5552 oldval2 = readb(addr);
5553 rmb();
5554 writeb(~oldval2, addr);
5555 wmb();
5556
5557 /* write oldval2 to the first byte of the next raster/row */
5558 writew(1, HRT_Y_LOW_REG + addr);
5559 wmb();
5560 oldval3 = readb(addr);
5561 rmb();
5562 writeb(oldval2, addr);
5563 wmb();
5564
5565 /* read the value at the previous raster/row */
5566 writew(0, HRT_Y_LOW_REG + addr);
5567 wmb();
5568 newval2 = readb(addr);
5569 rmb();
5570
5571 /* restore the old values */
5572 writeb(oldval2, addr);
5573 wmb();
5574 writew(1, HRT_Y_LOW_REG + addr);
5575 wmb();
5576 writeb(oldval3, addr);
5577 wmb();
5578 writeb(oldaddr, HRT_Y_LOW_REG + addr);
5579 wmb();
5580 writeb(oldval1, HRT_CONTROL_REG + addr);
5581 wmb();
5582
5583 return (newval2 == (unsigned char)~oldval2);
5584 }
5585
5586
5587 /****************************************************
5588 * buffering, data copying
5589 *
5590 */
5591 d627 1
5592 a627 1
5593 int win_width, win_height, win_end;
5594 d631 2
5595 a632 1
5596 int bytes_per_pixel = dev->bytes_per_pixel;
5597 d634 1
5598 a634 4
5599 i = (dev->in_buf + 1) % dev->buffer_count;
5600 if (i != dev->out_buf) then dev->in_buf = i;
5601
5602 buf = &dev->buffer[dev->in_buffer];
5603 d638 2
5604 d642 1
5605 a642 1
5606 if (dev->format == HRT_GRAY_FORMAT) {
5607 d645 1
5608 a645 1
5609 for (y = win_row * dev_line_length; y < win_end, y++) {
5610 d654 1
5611 a654 1
5612 for (y = win_row * dev_line_length; y < win_end, y++) {
5613 d662 1
5614 a662 1
5615 buf[i] = buf[j]
5616 d665 1
5617 a665 1
5618 buf[i] = buf[j+512]
5619 d676 3
5620 a678 3
5621 /***********************************************
5622 * device initialization and cleanup
5623 */
5624 d680 1
5625 d709 3
5626 a711 3
5627 vfree(dev->buffer[0];
5628 for (i = 0; i < dev->buffer_count; i++) dev->buffer[i[ = NULL;
5629 dev->in_buffer = dev->out_buffer = NULL;
5630 d713 1
5631 a713 1
5632 dev->in_buffer = dev->out_buffer = NULL;
5633 d721 88
5634 d854 1
5635 a854 1
5636 dev->buffer_size = PAGE_ALIGN(dev->rows * dev->cols * dev->bytes_per_pixel)
5637 d863 2
5638 a864 2
5639 dev->buffer[0] = vmalloc(dev->buffer_size*dev->buffer_count);
5640 if (dev->frame_buffer[0] == NULL) {
5641 d870 2
5642 a871 2
5643 dev->buffer[i] = dev->buffer[i-1] + dev->buffers_size;
5644 dev->in_buffer = dev->out_buffer = dev->buffers;
5645 d875 4
5646 d886 16
5647 a901 16
5648 int i;
5649 for (i = 0; i < ARRAY_SIZE(hrt_addresses); i++) {
5650 if (hrt_num_devices >= HRT_MAX_DEVICES) {
5651 HRT_ERROR_MSG("more than %d HRT devices\n",
5652 HRT_MAX_DEVICES);
5653 return -ENOMEM;
5654 }
5655 if (!hrt_dev_init(&hrt_devices[hrt_num_devices],
5656 hrt_num_devices, hrt_addresses[i])) {
5657 hrt_num_devices++;
5658 printk("hrt: found hrt isa device at 0x%lx, minor number %d\n",
5659 hrt_addresses[i], i);
5660 }
5661 }
5662 hrt_nonpci_devices = hrt_num_devices;
5663 return 0;
5664 d912 3
5665 a914 3
5666 /**********************************************
5667 * interrupts and timers
5668 */
5669 d1013 3
5670 d1017 1
5671 a1018 2
5672
5673 Wait for a frame to become available, if blocking allowed
5674 d1020 36
5675 d1057 1
5676 a1057 22
5677
5678
5679 Dual ported modes:
5680
5681 1. go live (i.e., start digitization), if not already live
5682 2. wait for digitization of an odd frame.
5683 3. copy data from the even field into buffer
5684 4. wait for digitization of an even frame.
5685 5. copy data from the other field into buffer
5686 6. if streaming, advance to next buffer and repeat from (1)
5687 if buffer is
5688
5689 Snapshot modes:
5690
5691 1. go live, if not already live
5692 2. freeze on next frame boundary
5693 3. wait until digitization is no longer active
5694 4. copy data from board to buffer
5695 6. if streaming, advance to next buffer and repeat from (2)
5696 else
5697
5698
5699 d1071 1
5700 d1073 1
5701 d1097 1
5702 a1097 2
5703 /*
5704 .....working here....
5705 d1101 1
5706 a1101 1
5707 dev->missed_frames++;
5708 d1110 1
5709 d1168 1
5710 a1168 1
5711 dev->mode ^= HRT_FRAME_IRQ
5712 d1206 3
5713 a1208 4
5714 dev->parity =
5715
5716 hrt_dev_next_field(dev);
5717 hrt_dev_scan_win_field(dev);
5718 d1213 2
5719 a1214 2
5720 ....need to make sure we do not race ahead before process can copy frame,
5721 or else copy the data ourselves, right now....
5722 d1219 3
5723 a1221 3
5724 /*****************************************
5725 * basic file operations (fops)
5726 */
5727 a1295 1
5728 char * from_buf;
5729 d1312 1
5730 a1312 1
5731 if (dev->mode == HRT_ONE_SHOT_MODE) {
5732 d1314 1
5733 a1314 1
5734 ..........
5735 d1324 1
5736 a1324 1
5737 max_count = dev->win_width * dev->wind_height * dev->bytes_per_pixel;
5738 d1403 1
5739 a1403 1
5740 #ifdef HRT_CONFIG_PCI
5741 d1405 3
5742 a1407 3
5743 /*********************************************
5744 * PCI support
5745 */
5746 d1435 1
5747 a1435 1
5748 if (pci_enable_device(dev)) {
5749 d1441 1
5750 a1441 1
5751 pci_resource_start(dev, 0), dev->num);
5752 d1457 1
5753 a1457 1
5754 HRT_DEBUG_MSG("unknown device type 0x%hx\n", dev->device);
5755 d1465 1
5756 a1465 1
5757 dev->mode ^= HRT_FRAME_IRQ
5758 d1474 1
5759 a1474 1
5760 dev->mode |= HRT_FRAME_IRQ
5761 d1478 1
5762 a1478 1
5763 dev->mode ^= HRT_FRAME_IRQ
5764 d1517 1
5765 a1517 3
5766 /*
5767 * no PCI support
5768 */
5769 d1533 3
5770 a1535 3
5771 /*******************************************************x
5772 * module initialization and cleanup
5773 */
5774 d1541 5
5775 a1545 5
5776 HRT_DEBUG_MSG("entering hrt_cleanup_module()\n");
5777 hrt_isa_cleanup();
5778 hrt_pci_cleanup();
5779 if (hrt_major_number) unregister_chrdev(hrt_major_number, "hrt");
5780 hrt_debug_cleanup();
5781 d1564 1
5782 a1564 2
5783 * jumpered to use the ISA/PC104 I/O address space
5784 */
5785 d1566 2
5786 d1573 2
5787 a1575 2
5788 else
5789 printk("hrt: found %d devices\n", hrt_num_devices);
5790 @
5791
5792
5793 1.2
5794 log
5795 @*** empty log message ***
5796 @
5797 text
5798 @a83 1
5799 #define HRT_DOUBLE_BUFFERING
5800 a116 4
5801 #ifndef HRT_MAX_BUFFERS
5802 #define HRT_MAX_BUFFERS 6
5803 #endif
5804
5805 a125 4
5806 #define HRT_SFB_INVALID 0
5807 #define HRT_SFB_LOCKED 0
5808 #define HRT_SFB_DONE 2
5809
5810 d134 2
5811 a135 2
5812 HRT_DEVICE_ID_COLOR,
5813 HRT_DEVICE_ID_GRAY};
5814 a145 3
5815 #define HRT_MAX_WIDTH 512
5816 #define HRT_MAX_HEIGHT 480
5817 #define HRT_MAX_BYTES_PER_PIXEL 1
5818 d149 6
5819 d261 2
5820 d268 5
5821 d277 3
5822 a279 4
5823 int timer_enabled;
5824 int irq;
5825 int use_interrupts;
5826 int interrupt_enabled;
5827 a280 8
5828 unsigned long virt_addr;
5829 unsigned long phys_addr;
5830 int is_open; /* cannot be opened again until released */
5831 int num;
5832
5833 int width, height;
5834 int depth;
5835 int fb_size;
5836 d283 23
5837 d307 1
5838 a307 6
5839 int frame_ready;
5840 wait_queue_head_t sfb_wait_queue;
5841 int sfb_enable;
5842 unsigned char* sfb[HRT_MAX_BUFFERS];
5843 int sfb_state[HRT_MAX_BUFFERS];
5844 int sfb_w;
5845 d309 1
5846 a309 8
5847 struct pci_dev *pci_dev; /* not used at present */
5848 #endif
5849 #ifdef HRT_DOUBLE_BUFFERING
5850 unsigned char* frame_buffer[2];
5851 /* read and write frame buffer pointers */
5852 unsigned char* frame_bufferr, *frame_bufferw;
5853 #else
5854 unsigned char* frame_buffer;
5855 a310 1
5856 int x, y;
5857 a314 1
5858 int debug_interrupt_count;
5859 d327 1
5860 d334 8
5861 d366 3
5862 a368 3
5863 ips = hrt_devices[0].debug_interrupt_count / n;
5864 tps = hrt_devices[0].debug_timer_count / n;
5865 rps = hrt_devices[0].debug_read_count / n;
5866 d378 1
5867 a378 1
5868 hrt_devices[i].debug_interrupt_count,
5869 d400 3
5870 a402 2
5871 /*
5872 * device control commands
5873 d404 3
5874 d420 1
5875 a420 1
5876 void hrt_sda(hrt_dev_t *hrt, unsigned long addr, int high)
5877 d422 3
5878 a424 3
5879 if (high) hrt->i2c_bits |= HRT_I2C_SDA;
5880 else hrt->i2c_bits &= ~HRT_I2C_SDA;
5881 writeb(hrt->i2c_bits, I2C_CONTROL(addr));
5882 d433 1
5883 a433 1
5884 void hrt_scl(hrt_dev_t *hrt, unsigned long addr, int high)
5885 d435 3
5886 a437 3
5887 if (high) hrt->i2c_bits |= HRT_I2C_SCL;
5888 else hrt->i2c_bits &= ~HRT_I2C_SCL;
5889 writeb(hrt->i2c_bits, I2C_CONTROL(addr));
5890 d446 1
5891 a446 1
5892 void hrt_sda_scl(hrt_dev_t *hrt,
5893 d449 5
5894 a453 5
5895 if (sda_high) hrt->i2c_bits |= HRT_I2C_SDA;
5896 else hrt->i2c_bits &= ~HRT_I2C_SDA;
5897 if (scl_high) hrt->i2c_bits |= HRT_I2C_SCL;
5898 else hrt->i2c_bits &= ~HRT_I2C_SCL;
5899 writeb(hrt->i2c_bits, I2C_CONTROL(addr));
5900 d461 1
5901 a461 1
5902 int hrt_sda_read(hrt_dev_t *hrt, unsigned long addr)
5903 d465 1
5904 a465 1
5905 * scl_read = read clock bit from I2C control register
5906 d468 1
5907 a468 9
5908 int hrt_scl_read(hrt_dev_t *hrt, unsigned long addr)
5909 { char c = readb(I2C_CONTROL(addr)); return (c & HRT_I2C_SCL); }
5910
5911
5912 /*
5913 * sda_read = start I2C data transmission
5914 */
5915 static inline
5916 void hrt_i2c_start(hrt_dev_t *hrt, unsigned long addr)
5917 d470 1
5918 a470 1
5919 hrt_sda_scl(hrt, addr, 0, 0);
5920 d472 1
5921 a472 1
5922 hrt_sda(hrt, addr, 1);
5923 d474 1
5924 a474 1
5925 hrt_scl(hrt, addr, 1);
5926 d476 1
5927 a476 1
5928 hrt_sda(hrt, addr, 0);
5929 d478 1
5930 a478 1
5931 hrt_scl(hrt, addr, 0);
5932 d486 1
5933 a486 1
5934 void hrt_i2c_stop(hrt_dev_t *hrt, unsigned long addr)
5935 d488 1
5936 a488 1
5937 hrt_sda_scl(hrt, addr, 0, 0);
5938 d490 1
5939 a490 1
5940 hrt_scl(hrt, addr, 1);
5941 d492 1
5942 a492 1
5943 hrt_sda(hrt, addr, 1);
5944 d494 2
5945 a495 2
5946 hrt_scl(hrt, addr, 0);
5947 hrt_scl(hrt, addr, 1);
5948 d502 1
5949 a502 1
5950 int hrt_i2c_send_bit(hrt_dev_t *hrt,
5951 d506 2
5952 a507 2
5953 if (bit) hrt_sda(hrt, addr, 1);
5954 else hrt_sda(hrt, addr, 0);
5955 d509 1
5956 a509 1
5957 writeb(hrt->i2c_bits | 0x04, I2C_CONTROL(addr));
5958 d528 1
5959 a528 1
5960 int hrt_i2c_send_byte(hrt_dev_t *hrt, unsigned long addr, unsigned char data)
5961 d534 1
5962 a534 1
5963 if(hrt_i2c_send_bit(hrt, addr, bit)) goto failure;
5964 d537 2
5965 a538 2
5966 hrt_sda_scl(hrt, addr, 1, 0);
5967 hrt_scl(hrt, addr, 1); /* leave clock high */
5968 d540 1
5969 a540 1
5970 if (hrt_sda_read(hrt, addr)) {
5971 d544 1
5972 a544 1
5973 hrt_sda_scl(hrt, addr, 1, 0);
5974 d547 2
5975 a548 2
5976 hrt_sda_scl(hrt, addr, 1, 0);
5977 hrt_i2c_stop(hrt, addr);
5978 d563 1
5979 a563 1
5980 int hrt_i2c_init_registers(hrt_dev_t *hrtdev, const char *sequence)
5981 d569 1
5982 a569 1
5983 addr = hrtdev->virt_addr;
5984 d576 1
5985 a576 1
5986 hrt_i2c_start(hrtdev, addr);
5987 d580 1
5988 a580 1
5989 if (hrt_i2c_send_byte(hrtdev, hrtdev->virt_addr, HRT_AD_DEVICE_ID)) {
5990 d586 1
5991 a586 1
5992 if (hrt_i2c_send_byte(hrtdev, hrtdev->virt_addr, cur_reg = sequence[0])) {
5993 d603 2
5994 a604 2
5995 hrt_i2c_stop(hrtdev, addr);
5996 hrt_i2c_start(hrtdev, addr);
5997 d607 1
5998 a607 1
5999 if (hrt_i2c_send_byte(hrtdev, hrtdev->virt_addr, HRT_AD_DEVICE_ID)) {
6000 d613 1
6001 a613 1
6002 if (hrt_i2c_send_byte(hrtdev, hrtdev->virt_addr, cur_reg = reg)) {
6003 d619 1
6004 a619 1
6005 if (hrt_i2c_send_byte(hrtdev, hrtdev->virt_addr, data)) {
6006 d623 1
6007 a623 1
6008 hrtdev->saa7110_registers[cur_reg++] = data;
6009 d627 1
6010 a627 1
6011 hrt_i2c_stop(hrtdev, addr);
6012 d632 1
6013 a632 1
6014 int hrt_i2c_init_device(hrt_dev_t *hrtdev)
6015 d636 1
6016 a636 1
6017 (unsigned) hrtdev->virt_addr, (unsigned) hrtdev->phys_addr);
6018 d638 1
6019 a638 1
6020 result = hrt_i2c_init_registers(hrtdev, saa7110_default_init_regs);
6021 a646 37
6022 /*
6023 * this is code for a special capture mode
6024 * in this mode another device driver has
6025 * to tell the this driver which buffer
6026 * to read from and write too
6027 */
6028
6029 void hrt_enable_select_fb(hrt_dev_t* dev)
6030 {
6031 dev->sfb_enable = 1;
6032 }
6033
6034 void hrt_disable_select_fb(hrt_dev_t* dev)
6035 {
6036 dev->sfb_enable = 0;
6037 }
6038
6039 void hrt_choose_sfb_w(hrt_dev_t* dev, int fb)
6040 {
6041 if (fb >= HRT_MAX_BUFFERS)
6042 fb = HRT_MAX_BUFFERS-1;
6043 else if (fb < 0)
6044 fb = 0;
6045
6046 dev->sfb_w = fb;
6047 }
6048
6049 unsigned char* hrt_get_sfb(hrt_dev_t* dev, int fb)
6050 {
6051 return dev->sfb[fb];
6052 }
6053
6054 int hrt_sfb_state(hrt_dev_t* dev, int fb)
6055 {
6056 return dev->sfb_state[fb];
6057 }
6058
6059 a709 27
6060 void hrt_dev_cleanup(hrt_dev_t* dev)
6061 {
6062 HRT_DEBUG_MSG("entering hrt_dev_cleanup %lx\n",(unsigned long) dev);
6063 if (dev->phys_addr) {
6064 HRT_DEBUG_MSG("release_mem_region 0x%lx, 0x%lx\n",
6065 (unsigned long)dev, (unsigned long) dev->phys_addr);
6066 release_mem_region(dev->phys_addr, HRT_IO_SIZE);
6067 dev->phys_addr = 0;
6068 }
6069 if (dev->virt_addr) {
6070 HRT_DEBUG_MSG("iounmap %lx\n", (unsigned long) dev->virt_addr);
6071 iounmap((void *)dev->virt_addr);
6072 dev->virt_addr = 0;
6073 }
6074 HRT_DEBUG_MSG("freeing sfb\n");
6075 if (dev->sfb) vfree(dev->sfb[0]);
6076 HRT_DEBUG_MSG("freeing frame buffer(s)\n");
6077 #ifdef HRT_DOUBLE_BUFFERING
6078 if (dev->frame_buffer[0]) vfree(dev->frame_buffer[0]);
6079 if (dev->frame_buffer[1]) vfree(dev->frame_buffer[1]);
6080 #else
6081 if (dev->frame_buffer) vfree(dev->frame_buffer);
6082 #endif
6083 HRT_DEBUG_MSG("killing tasklet\n");
6084 tasklet_kill(&dev->tasklet);
6085 dev->valid = 0;
6086 }
6087 d711 4
6088 a714 82
6089 int hrt_dev_init(hrt_dev_t* dev, int dev_num, unsigned long address)
6090 {
6091 DECLARE_TASKLET(temp_task, hrt_dev_tasklet, (unsigned long) dev);
6092 int i, result;
6093 unsigned long virtual_addr;
6094 unsigned char* tmp;
6095
6096 memset(dev, 0, sizeof(hrt_dev_t));
6097 #ifdef HRT_DOUBLE_BUFFERING
6098 dev->frame_buffer[0] = dev->frame_buffer[1] = 0;
6099 #else
6100 dev->frame_buffer = 0;
6101 #endif
6102 for (i=0; i<HRT_MAX_BUFFERS; i++) {
6103 dev->sfb[i] = 0;
6104 }
6105 if (!request_mem_region(address, HRT_IO_SIZE, "hrt")) {
6106 HRT_DEBUG_MSG("hrt: I/O memory at %lx already in use\n",
6107 (unsigned long) address);
6108 return -EBUSY;
6109 }
6110 HRT_DEBUG_MSG("request_mem_region: 0x%lx, 0x%lx\n",
6111 (unsigned long) dev, address);
6112 dev->phys_addr = address;
6113 virtual_addr = (unsigned long)ioremap_nocache(address, HRT_IO_SIZE);
6114 if (!virtual_addr) {
6115 HRT_DEBUG_MSG("hrt: couldn't remap io memory!!\n");
6116 hrt_dev_cleanup(dev);
6117 return -ENODEV;
6118 }
6119 dev->virt_addr = virtual_addr;
6120
6121 if (hrt_probe(virtual_addr)) {
6122 }
6123 else {
6124 HRT_DEBUG_MSG("hrt: hrt_probe failed at address 0x%lx\n", address);
6125 hrt_dev_cleanup(dev);
6126 return -ENODEV;
6127 }
6128
6129 result = hrt_i2c_init_device(dev);
6130 if (result) {
6131 HRT_DEBUG_MSG("hrt_i2c_init_device %d failed\n",result);
6132 hrt_dev_cleanup(dev);
6133 return -ENODEV;
6134 }
6135
6136 dev->use_interrupts = 1;
6137 sema_init(&dev->sem, 1);
6138 init_waitqueue_head(&dev->wait_queue);
6139 init_waitqueue_head(&dev->sfb_wait_queue);
6140 init_timer(&dev->timer);
6141 memcpy(&dev->tasklet, &temp_task, sizeof(struct tasklet_struct));
6142 dev->timer_enabled = 0;
6143 dev->interrupt_enabled = 0;
6144 hrt_dev_go_live(dev);
6145 dev->x = dev->y = 0;
6146 dev->width = HRT_MAX_WIDTH;
6147 dev->height = HRT_MAX_HEIGHT;
6148 dev->depth = HRT_MAX_BYTES_PER_PIXEL;
6149 dev->fb_size = HRT_MAX_FRAMESIZE;
6150 #ifdef HRT_DOUBLE_BUFFERING
6151 dev->frame_buffer[0] = vmalloc(HRT_MAX_FRAMESIZE);
6152 dev->frame_buffer[1] = vmalloc(HRT_MAX_FRAMESIZE);
6153 dev->frame_bufferw = dev->frame_buffer[0];
6154 dev->frame_bufferr = dev->frame_buffer[1];
6155 #else
6156 dev->frame_buffer = vmalloc(HRT_MAX_FRAMESIZE);
6157 #endif
6158 tmp = vmalloc(HRT_MAX_FRAMESIZE*HRT_MAX_BUFFERS);
6159 for (i=0; i<HRT_MAX_BUFFERS; i++) {
6160 dev->sfb[i] = tmp+i*HRT_MAX_FRAMESIZE;
6161 dev->sfb_state[i] = 0;
6162 }
6163 dev->sfb_w = 0;
6164 dev->sfb_enable = 0;
6165 dev->num = dev_num;
6166 dev->parity = 0;
6167 dev->frame_ready = 0;
6168 dev->valid = HRT_VALID;
6169 return result;
6170 }
6171 d717 4
6172 a720 1
6173 * given a parity, scan within the window
6174 a721 21
6175 void hrt_dev_scan_win_field(hrt_dev_t *hrtdev)
6176 {
6177 int i, y;
6178 int linelen = hrtdev->width;
6179 int left = hrtdev->x;
6180
6181 if (hrtdev->sfb_enable)
6182 hrtdev->sfb_state[hrtdev->sfb_w] = HRT_SFB_LOCKED;
6183
6184 if (linelen % 4)
6185 linelen += 4 - linelen % 4;
6186 if (left % 4)
6187 left += 4 - left % 4;
6188
6189 if (hrtdev->y & 1) {
6190 y = hrtdev->y + !hrtdev->parity;
6191 i = !hrtdev->parity;
6192 } else {
6193 y = hrtdev->y + hrtdev->parity;
6194 i = hrtdev->parity;
6195 }
6196 d723 1
6197 a723 31
6198 if (hrtdev->sfb_enable) {
6199 for (; i < hrtdev->height; y += 2, i += 2) {
6200 writew(y, hrtdev->virt_addr + HRT_Y_LOW_REG);
6201 wmb();
6202 memcpy_fromio(hrtdev->sfb[hrtdev->sfb_w] +
6203 ((i) * linelen * hrtdev->depth),
6204 hrtdev->virt_addr + left,
6205 linelen * hrtdev->depth);
6206 }
6207 hrtdev->sfb_state[hrtdev->sfb_w] = HRT_SFB_DONE;
6208 }
6209 else {
6210 for (; i < hrtdev->height; y += 2, i += 2) {
6211 writew(y, hrtdev->virt_addr + HRT_Y_LOW_REG);
6212 wmb();
6213
6214 memcpy_fromio(
6215 #ifdef HRT_DOUBLE_BUFFERING
6216 hrtdev->frame_bufferw +
6217 #else
6218 hrtdev->frame_buffer +
6219 #endif
6220 ((i) * linelen * hrtdev->depth),
6221 hrtdev->virt_addr + left,
6222 linelen * hrtdev->depth);
6223 }
6224 }
6225 }
6226
6227 void
6228 hrt_dev_next_field(hrt_dev_t *hrtdev)
6229 d725 50
6230 a774 2
6231 hrtdev->parity ^= 1;
6232 if (hrtdev->parity) hrtdev->frame_ready = 0;
6233 d777 3
6234 a779 5
6235 void
6236 hrt_dev_tasklet(unsigned long data)
6237 {
6238 int parity;
6239 hrt_dev_t *dev = (hrt_dev_t *)data;
6240 d781 2
6241 a782 2
6242 // skipping here would not be good... do we really need a lock?
6243 // if (down_trylock(&dev->sem)) return; /* couldn't get lock, give up */
6244 d784 3
6245 d788 2
6246 a789 7
6247 parity = hrt_dev_get_parity(dev);
6248 /* if the HW reports a parity that we're still reading,
6249 * that means we're SLOW -- give up! */
6250 if (parity == dev->parity) {
6251 // up(&dev->sem);
6252 return;
6253 }
6254 d791 29
6255 a819 2
6256 hrt_dev_next_field(dev);
6257 hrt_dev_scan_win_field(dev);
6258 d821 67
6259 a887 3
6260 if (!dev->parity) {
6261 #ifdef HRT_DOUBLE_BUFFERING
6262 unsigned char *c = dev->frame_bufferw;
6263 d889 1
6264 a889 10
6265 dev->frame_bufferw = dev->frame_bufferr;
6266 dev->frame_bufferr = c;
6267 #endif
6268 dev->frame_ready = 1;
6269
6270 // up(&dev->sem);
6271 wake_up(&dev->sfb_wait_queue);
6272 wake_up(&dev->wait_queue);
6273 } else
6274 // up(&dev->sem);
6275 d904 2
6276 a905 2
6277 printk("hrt: found hrt isa device at 0x%lx\n",
6278 hrt_addresses[i]);
6279 d912 6
6280 a917 44
6281 #ifdef HRT_CONFIG_PCI
6282
6283 /*
6284 * PCI support
6285 */
6286
6287 MODULE_DEVICE_TABLE(pci, hrt_pci_tbl);
6288 int hrt_pci_probe(struct pci_dev *dev, const struct pci_device_id *pci_id);
6289
6290 static struct pci_device_id hrt_pci_tbl[] __devinitdata = {
6291 {HRT_VENDOR_ID, HRT_DEVICE_ID_GRAY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
6292 {HRT_VENDOR_ID, HRT_DEVICE_ID_COLOR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
6293 {0,}
6294 };
6295
6296 static struct pci_driver hrt_pci_driver = {
6297 .name = "hrt",
6298 .id_table = hrt_pci_tbl,
6299 .probe = hrt_pci_probe
6300 };
6301
6302 int hrt_pci_probe(struct pci_dev *dev,
6303 const struct pci_device_id *pci_id)
6304 {
6305 hrt_dev_t* hrt_dev = &hrt_devices[hrt_num_devices];
6306 HRT_DEBUG_MSG("probing pci device %lx\n", (unsigned long)dev);
6307 if (hrt_num_devices >= HRT_MAX_DEVICES) {
6308 HRT_ERROR_MSG("need to increase HRT_MAX_DEVICES\n");
6309 return -ENOMEM;
6310 }
6311 if (pci_enable_device(dev)) {
6312 HRT_DEBUG_MSG("pci_enable_device failed\n");
6313 return -EIO;
6314 }
6315 if (!hrt_dev_init(hrt_dev, hrt_num_devices, pci_resource_start(dev, 0))) {
6316 printk("hrt: found hrt pci device at 0x%lx\n",
6317 pci_resource_start(dev, 0));
6318 /* device has been found so set data */
6319 pci_set_drvdata (dev, hrt_dev); /* not used at present */
6320 hrt_dev->pci_dev = dev; /* not used at present */
6321 hrt_dev->irq = dev->irq
6322 hrt_num_devices++;
6323 return 0;
6324 } else return -ENODEV;
6325 d920 2
6326 a921 30
6327 void hrt_pci_init(void)
6328 {
6329 pci_register_driver(&hrt_pci_driver);
6330 }
6331
6332 void hrt_pci_cleanup(void)
6333 {
6334 pci_unregister_driver(&hrt_pci_driver);
6335 }
6336
6337 #else
6338
6339 /*
6340 * no PCI support
6341 */
6342
6343 void hrt_pci_init(void)
6344 {
6345 }
6346
6347 void hrt_pci_cleanup(void)
6348 {
6349 }
6350
6351 #endif
6352
6353 /*
6354 * If no interupt support is available on the HRT board then
6355 * provide a timer.
6356 *
6357 a938 1
6358 dev->interrupt_enabled = 1;
6359 a948 1
6360 dev->interrupt_enabled = 0;
6361 d951 101
6362 d1058 2
6363 a1059 17
6364 hrt_dev_t* dev = dev_id;
6365 int val;
6366
6367 if (hrt_interrupt_pending(dev)) {
6368 /* disable interrupt generation ... why????? */
6369 val = readb(dev->virt_addr + HRT_INTERRUPT_ENABLE);
6370 rmb();
6371 val &= ~0x1;
6372 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
6373 rmb();
6374
6375 tasklet_schedule(&dev->tasklet);
6376
6377 /* reenable interrupt generation ... whey????? */
6378 val |= 0x1;
6379 writeb(val, dev->virt_addr + HRT_INTERRUPT_ENABLE);
6380 rmb();
6381 d1061 29
6382 d1091 1
6383 a1091 1
6384 dev->debug_interrupt_count++;
6385 d1093 6
6386 d1101 1
6387 a1101 1
6388 return IRQ_HANDLED;
6389 d1103 1
6390 a1103 1
6391 }
6392 d1105 1
6393 a1105 1
6394 return IRQ_NONE;
6395 d1117 1
6396 d1137 3
6397 a1139 3
6398 int hrt_install_interrupt(hrt_dev_t* dev)
6399 { int result = 0;
6400 HRT_DEBUG_MSG("entering hrt_install_interupt()\n");
6401 d1141 2
6402 a1142 2
6403 if (dev->irq || dev->timer_enabled) {
6404 HRT_DEBUG_MSG("interrupts or timers are already"
6405 d1144 24
6406 a1167 21
6407 return 0;
6408 }
6409
6410 if (HRT_IS_PCI(dev->num) && dev->use_interrupts) {
6411 HRT_DEBUG_MSG("trying to install interrupt handler\n");
6412 result = request_irq(dev->irq, hrt_interrupt_handler,
6413 SA_SHIRQ, "hrt", (void*)dev);
6414 if (result == 0) {
6415 hrt_enable_interrupt(dev);
6416 } else {
6417 HRT_DEBUG_MSG("request_irq failed: %d\n", result);
6418 }
6419 } else {
6420 HRT_DEBUG_MSG("installing timer\n");
6421 init_timer(&dev->timer);
6422 dev->timer.function = hrt_timer_handler;
6423 dev->timer.expires = jiffies + (HZ/100);
6424 dev->timer.data = (unsigned long)dev;
6425 add_timer(&dev->timer);
6426 dev->timer_enabled = 1;
6427 }
6428 d1170 7
6429 a1176 8
6430 init_timer(&dev->debug_timer);
6431 dev->debug_timer.function = hrt_debug_timer;
6432 dev->debug_timer.expires = jiffies + (HZ/10);
6433 dev->debug_timer.data = (unsigned long)dev;
6434 add_timer(&dev->debug_timer);
6435 dev->debug_count = 0;
6436 dev->debug_interrupt_count = 0;
6437 dev->debug_timer_count = 0;
6438 d1178 1
6439 a1178 1
6440 return result;
6441 d1181 2
6442 a1182 1
6443 void hrt_remove_interrupt(hrt_dev_t* dev)
6444 d1184 2
6445 a1185 10
6446 HRT_DEBUG_MSG("entering hrt_remove_interupt()\n");
6447 if (dev->irq) {
6448 hrt_disable_interrupt(dev);
6449 free_irq(dev->irq, dev);
6450 dev->irq = 0;
6451 }
6452 if (dev->timer_enabled) {
6453 del_timer_sync(&dev->timer);
6454 dev->timer_enabled = 0;
6455 }
6456 d1187 20
6457 a1206 3
6458 #ifdef HRT_DEBUG
6459 del_timer_sync(&dev->debug_timer);
6460 #endif
6461 d1209 2
6462 a1210 2
6463 /*
6464 * fops
6465 a1215 1
6466 int hrt_mmap (struct file *file, struct vm_area_struct *vma);
6467 d1218 1
6468 d1227 1
6469 d1238 31
6470 a1268 29
6471 hrt_dev_t* dev;
6472 unsigned int minor;
6473 int result = 0;
6474
6475 minor = MINOR(inode->i_rdev);
6476 if (minor >= HRT_MAX_DEVICES) return -ENODEV;
6477
6478 dev = hrt_devices + minor;
6479 HRT_DEBUG_MSG("opening hrt device %d at addr %lX\n", minor, (unsigned long)dev);
6480
6481 if (dev->valid != HRT_VALID) return -ENODEV;
6482 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
6483
6484 HRT_DEBUG_MSG("hrt_setting private data\n");
6485 file->private_data = (void*)dev;
6486
6487 HRT_DEBUG_MSG("hrt checking is_open\n");
6488 if (dev->is_open) {
6489 HRT_DEBUG_MSG("hrt is is_open\n");
6490 up(&dev->sem);
6491 return -EBUSY;
6492 }
6493 else dev->is_open = 1;
6494
6495 HRT_DEBUG_MSG("hrt installing interrupt\n");
6496 result = hrt_install_interrupt(dev);
6497 up(&dev->sem);
6498 HRT_MOD_INC_USE_COUNT;
6499 return result;
6500 d1273 8
6501 a1280 8
6502 hrt_dev_t* dev = file->private_data;
6503 if (dev->valid != HRT_VALID) return -ENODEV;
6504 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
6505 dev->is_open = 0;
6506 hrt_remove_interrupt(dev);
6507 up(&dev->sem);
6508 HRT_MOD_DEC_USE_COUNT;
6509 return 0;
6510 d1285 38
6511 a1322 39
6512 hrt_dev_t* dev = file->private_data;
6513
6514 if (dev->valid != HRT_VALID) return -ENODEV;
6515
6516 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
6517
6518 /* check to see if the dev is open */
6519 if (!dev->is_open) {
6520 up(&dev->sem);
6521 return -ENODEV;
6522 }
6523
6524 if (file ->f_flags & O_NONBLOCK) {
6525 /* copy data from device immediately;
6526 don't worry about frame boundaries */
6527
6528 } else { /* wait for a clean frame boundary */
6529 while (!dev->frame_ready) {
6530 up(&dev->sem);
6531 if (file->f_flags & O_NONBLOCK) return -EAGAIN;
6532 if (wait_event_interruptible(dev->wait_queue, (dev->frame_ready)))
6533 return -ERESTARTSYS;
6534 if (down_interruptible(&dev->sem))
6535 return -ERESTARTSYS;
6536 }
6537
6538
6539 }
6540
6541 if (count > (HRT_MAX_FRAMESIZE))
6542 count = HRT_MAX_FRAMESIZE;
6543 #ifdef HRT_DOUBLE_BUFFERING
6544 if (copy_to_user(buf, dev->frame_bufferr, count)) {
6545 #else
6546 if (copy_to_user(buf, dev->frame_buffer, count)) {
6547 #endif
6548 up(&dev->sem);
6549 return -EFAULT;
6550 }
6551 d1325 1
6552 a1325 1
6553 dev->debug_read_count++;
6554 d1327 2
6555 a1328 3
6556 dev->frame_ready = 0;
6557 up(&dev->sem);
6558 return count;
6559 a1343 8
6560 case IOC_HRT_SET_DRIVE_MODE:
6561 HRT_DEBUG_MSG("IOC_HRT_SET_DRIVE_MODE: called with arg %d\n",
6562 iarg);
6563 hrt_remove_interrupt(dev);
6564 dev->use_interrupts = iarg;
6565 result = hrt_install_interrupt(dev);
6566 break;
6567
6568 d1346 1
6569 a1346 1
6570 hrt_dev_freeze_immediate(dev);
6571 d1356 1
6572 a1356 1
6573 dev->width = iarg;
6574 d1360 1
6575 a1360 1
6576 dev->height = iarg;
6577 d1364 1
6578 a1364 1
6579 dev->x = iarg;
6580 d1368 1
6581 a1368 1
6582 dev->y = iarg;
6583 d1373 1
6584 a1373 1
6585 hrt_remove_interrupt(dev);
6586 d1378 1
6587 a1378 1
6588 result = hrt_install_interrupt(dev);
6589 d1389 1
6590 a1389 5
6591 /*
6592 * vma operations
6593 */
6594
6595 static void hrt_vma_open(struct vm_area_struct *vma)
6596 d1391 1
6597 d1394 1
6598 a1394 3
6599 static void hrt_vma_close(struct vm_area_struct *vma)
6600 {
6601 }
6602 d1396 3
6603 a1398 12
6604 static
6605 struct page *hrt_vma_nopage(struct vm_area_struct *vma,
6606 unsigned long address,
6607 #ifdef KERNEL_2_6
6608 int *type)
6609 #else
6610 int write_access)
6611 #endif
6612 {
6613 hrt_dev_t *hrtdev = (hrt_dev_t *)(vma->vm_file->private_data);
6614 unsigned long offset = (address - vma->vm_start);
6615 struct page *p = (struct page *)NULL;
6616 d1400 3
6617 a1402 2
6618 if (!hrtdev)
6619 return 0;
6620 d1404 5
6621 a1408 2
6622 if (offset >= hrtdev->fb_size)
6623 return 0;
6624 d1410 5
6625 a1414 14
6626 #ifdef HRT_DOUBLE_BUFFERING
6627 return 0;
6628 #else
6629 p = vmalloc_to_page(hrtdev->frame_buffer + offset);
6630 #endif
6631 if (p != NULL)
6632 get_page(p);
6633 return p;
6634 }
6635
6636 static struct vm_operations_struct hrt_vm_ops = {
6637 .open = hrt_vma_open,
6638 .close = hrt_vma_close,
6639 .nopage = hrt_vma_nopage
6640 d1417 2
6641 a1418 2
6642 #if !defined (pgprot_noncached)
6643 static inline pgprot_t pgprot_noncached(pgprot_t old_prot)
6644 d1420 66
6645 a1485 4
6646 pgprot_t new_prot = old_prot;
6647 if (boot_cpu_data.x86 > 3)
6648 new_prot = __pgprot(pgprot_val(old_prot) | _PAGE_PCD | _PAGE_PWT);
6649 return new_prot;
6650 a1486 1
6651 #endif
6652 d1488 5
6653 d1494 1
6654 a1494 2
6655 int hrt_mmap_direct
6656 (struct file *file, struct vm_area_struct *vma, unsigned long int_offs)
6657 d1496 2
6658 a1497 19
6659 hrt_dev_t *hrtdev = (hrt_dev_t *)file->private_data;
6660 unsigned long start = (hrtdev->phys_addr);
6661
6662 vma->vm_flags |= (VM_IO | VM_RESERVED);
6663 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
6664
6665 /* PCI memory, make it a PAGE address */
6666 if (start > (unsigned long)__va(high_memory))
6667 start >>= PAGE_SHIFT;
6668
6669 if (remap_page_range(
6670 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 0)
6671 vma,
6672 #endif
6673 vma->vm_start, start + int_offs,
6674 vma->vm_end - vma->vm_start, vma->vm_page_prot))
6675 return -EAGAIN;
6676 else
6677 return 0;
6678 d1500 1
6679 a1500 1
6680 int hrt_mmap(struct file *file, struct vm_area_struct *vma)
6681 d1502 3
6682 a1504 2
6683 hrt_dev_t *hrtdev = (hrt_dev_t *)file->private_data;
6684 unsigned long size = (vma->vm_end - vma->vm_start);
6685 d1506 1
6686 a1506 2
6687 if (hrtdev->valid != HRT_VALID)
6688 return -ENODEV;
6689 d1508 3
6690 a1510 10
6691 if (down_interruptible(&hrtdev->sem))
6692 return -ERESTARTSYS;
6693
6694 if (vma->vm_pgoff == (HRT_MAGIC_SCANLINE_MMAP_OFFSET / PAGE_SIZE)) {
6695 /* requesting direct I/O on the board */
6696 int ret = hrt_mmap_direct(file, vma, 0);
6697 HRT_DEBUG_MSG("doing direct mmap(), size = %X\n", (unsigned)size);
6698 up(&hrtdev->sem);
6699 return ret;
6700 }
6701 d1512 3
6702 a1514 8
6703 if (vma->vm_pgoff == (HRT_MAGIC_REGISTER_MMAP_OFFSET / PAGE_SIZE)) {
6704 /* requesting direct I/O on the board */
6705 int ret = hrt_mmap_direct(file, vma, 0x2000);
6706 HRT_DEBUG_MSG("doing register direct mmap(), size = %X\n",
6707 (unsigned)size);
6708 up(&hrtdev->sem);
6709 return ret;
6710 }
6711 d1516 3
6712 a1518 1
6713 HRT_DEBUG_MSG("doing normal mmap()\n");
6714 d1520 3
6715 a1522 4
6716 if (size > hrtdev->fb_size) {
6717 up(&hrtdev->sem);
6718 return -EINVAL;
6719 }
6720 d1524 1
6721 a1524 6
6722 vma->vm_ops = &hrt_vm_ops;
6723 if (vma->vm_ops->open) vma->vm_ops->open(vma);
6724
6725 up(&hrtdev->sem);
6726 return 0;
6727 }
6728 d1526 1
6729 a1526 1
6730 /*
6731 a1533 1
6732 int i;
6733 d1535 2
6734 a1536 4
6735 for (i=0; i<hrt_num_devices; i++) {
6736 HRT_DEBUG_MSG("cleaning up device %d\n", i);
6737 hrt_dev_cleanup(hrt_devices+i);
6738 }
6739 a1542 1
6740 int i;
6741 d1548 1
6742 a1548 1
6743 major_number);
6744 d1555 1
6745 a1555 3
6746 for (i=0; i<HRT_MAX_DEVICES; i++) {
6747 hrt_devices[i].use_interrupts = 1;
6748 }
6749 @
6750
6751
6752 1.1
6753 log
6754 @Initial revision
6755 @
6756 text
6757 @a3 3
6758 */
6759
6760 /*
6761 d9 2
6762 a10 2
6763 Unlike earlier drivers for these cards produced at FSU, this driver does *not*
6764 attempt to support the Video4Linux (V4L) API, not does not it use the generic
6765 d27 1
6766 a27 1
6767 "core" (i2c.h and i2c-dev.h) because:
6768 d91 1
6769 a91 1
6770 #define HRT_DEBUG_MSG(args...) do{printk("hrt * "); printk(args);}while(0)
6771 d96 2
6772 d135 1
6773 a135 1
6774 /*
6775 d146 1
6776 a146 7
6777 #define HRT_CONTROL_REG 0x2000
6778 #define HRT_I2C_REG 0x2001
6779 #define HRT_Y_LOW_REG 0x2002
6780 #define HRT_Y_HIGH_REG 0x2003
6781 #define HRT_INTERRUPT_ENABLE 0x2005
6782
6783 /*
6784 d152 1
6785 a152 1
6786 /*
6787 d161 1
6788 a161 1
6789 /*
6790 d236 1
6791 a236 1
6792 /*
6793 d247 1
6794 a247 1
6795 /*
6796 d261 1
6797 a261 1
6798 /*
6799 d267 1
6800 a267 1
6801 /*
6802 d299 1
6803 a299 1
6804 struct pci_dev pci_dev;
6805 d318 6
6806 a323 4
6807 /* HRT_DEV_OF(X) returns pointer to the hrt_dev_t object
6808 * that contains the struct pci_dev object pointed to by X
6809 */
6810 #define HRT_DEV_OF(X) ((hrt_dev_t *)((X)+offsetof(hrt_dev_t,pci_dev)))
6811 d510 1
6812 a510 1
6813 printk("hrt: i2c bus timeout\n");
6814 d535 1
6815 a535 1
6816 printk("hrt: no i2c ack\n");
6817 d566 1
6818 a566 1
6819 printk("hrt: invalid register initialization sequence\n");
6820 d575 1
6821 a575 1
6822 printk("hrt: send_byte failed\n");
6823 d581 1
6824 a581 1
6825 printk("hrt: send_byte failed(2)\n");
6826 d590 1
6827 a590 1
6828 printk("hrt: register number %02X out of range!\n", reg);
6829 d602 1
6830 a602 1
6831 printk("hrt: send_byte failed(3)\n");
6832 d608 1
6833 a608 1
6834 printk("hrt: send_byte failed(4)\n");
6835 d614 1
6836 a614 1
6837 printk("hrt: send_byte failed(5)\n");
6838 d634 1
6839 a634 1
6840 printk("hrt: hrt_i2c_init_registers failed %d\n", result);
6841 d684 84
6842 a767 2
6843 void hrt_dev_cleanup(hrt_dev_t* dev);
6844 int hrt_probe(unsigned long addr);
6845 a784 2
6846 HRT_DEBUG_MSG("trying address: 0x%lx\n", address);
6847
6848 d786 2
6849 a787 1
6850 HRT_DEBUG_MSG("hrt: I/O memory already in use\n");
6851 d790 3
6852 d796 1
6853 a796 1
6854 release_mem_region(address, HRT_IO_SIZE);
6855 d799 1
6856 a801 2
6857 dev->phys_addr = address;
6858 dev->virt_addr = virtual_addr;
6859 d804 2
6860 a805 3
6861 printk("hrt: hrt_probe failed at address 0x%lx\n", address);
6862 iounmap((void *)virtual_addr);
6863 release_mem_region(address, HRT_IO_SIZE);
6864 d811 1
6865 a811 1
6866 HRT_DEBUG_MSG("hrt_i2c_init_device %d\n",result);
6867 d848 1
6868 a848 1
6869 dev->valid = 1;
6870 a851 83
6871 void hrt_dev_cleanup(hrt_dev_t* dev)
6872 {
6873 HRT_DEBUG_MSG("entering hrt_dev_cleanup %lx\n",(unsigned long) dev);
6874 if (dev->virt_addr) {
6875 release_mem_region(dev->phys_addr, HRT_IO_SIZE);
6876 iounmap((void *)dev->virt_addr);
6877 dev->virt_addr = 0;
6878 }
6879 if (dev->sfb) vfree(dev->sfb[0]);
6880 #ifdef HRT_DOUBLE_BUFFERING
6881 if (dev->frame_buffer[0]) vfree(dev->frame_buffer[0]);
6882 if (dev->frame_buffer[1]) vfree(dev->frame_buffer[1]);
6883 #else
6884 if (dev->frame_buffer) vfree(dev->frame_buffer);
6885 #endif
6886 tasklet_kill(&dev->tasklet);
6887 }
6888
6889 /*
6890 * this is some stuff i just copied straight from the hrt.c file
6891 */
6892
6893 /**
6894 * hrt_probe - check that we have a device as the specified address.
6895 * Assume the memory region is already mapped.
6896 * The address has to be a virtual address mapped to the device I/O space.
6897 */
6898 int hrt_probe(unsigned long addr)
6899 {
6900 unsigned char oldval1, oldval2, oldval3, newval2;
6901 unsigned int oldaddr;
6902
6903 /* save the old values at the address */
6904 oldval1 = readb(HRT_CONTROL_REG + addr);
6905 rmb();
6906 oldaddr = readw(HRT_Y_LOW_REG + addr);
6907 rmb();
6908
6909 /* freeze the frame grabbing, immediately */
6910 writeb(0x5B, HRT_CONTROL_REG + addr);
6911 wmb();
6912
6913 /* write a new value to the first byte in the first raster/row */
6914 writew(0, HRT_Y_LOW_REG + addr);
6915 wmb();
6916 oldval2 = readb(addr);
6917 rmb();
6918 writeb(~oldval2, addr);
6919 wmb();
6920
6921 /* write oldval2 to the first byte of the next raster/row */
6922 writew(1, HRT_Y_LOW_REG + addr);
6923 wmb();
6924 oldval3 = readb(addr);
6925 rmb();
6926 writeb(oldval2, addr);
6927 wmb();
6928
6929 /* read the value at the previous raster/row */
6930 writew(0, HRT_Y_LOW_REG + addr);
6931 wmb();
6932 newval2 = readb(addr);
6933 rmb();
6934
6935 /* restore the old values */
6936 writeb(oldval2, addr);
6937 wmb();
6938 writew(1, HRT_Y_LOW_REG + addr);
6939 wmb();
6940 writeb(oldval3, addr);
6941 wmb();
6942 writeb(oldaddr, HRT_Y_LOW_REG + addr);
6943 wmb();
6944 writeb(oldval1, HRT_CONTROL_REG + addr);
6945 wmb();
6946
6947 return (newval2 == (unsigned char)~oldval2);
6948 }
6949
6950 /*
6951 * end of that
6952 */
6953
6954 d919 3
6955 a921 1
6956 if (down_trylock(&dev->sem)) return; /* couldn't get lock, give up */
6957 d927 1
6958 a927 1
6959 up(&dev->sem);
6960 d943 1
6961 a943 1
6962 up(&dev->sem);
6963 d947 1
6964 a947 1
6965 up(&dev->sem);
6966 d955 1
6967 a955 1
6968 printk("hrt: more than %d HRT devices\n",
6969 a976 1
6970 void hrt_pci_remove(struct pci_dev *pci_dev);
6971 d988 1
6972 a988 2
6973 .probe = hrt_pci_probe,
6974 .remove = hrt_pci_remove,
6975 d994 2
6976 a995 2
6977 hrt_dev_t* d = &hrt_devices[hrt_num_devices];
6978 HRT_DEBUG_MSG("entering hrt_pci_probe\n");
6979 d997 1
6980 a997 1
6981 printk("hrt: need to increase HRT_MAX_DEVICES\n");
6982 d1001 1
6983 a1001 1
6984 HRT_DEBUG_MSG("hrt: pci_enable_device failed\n");
6985 d1004 1
6986 a1004 1
6987 if (!hrt_dev_init(d, hrt_num_devices, pci_resource_start(dev, 0))) {
6988 d1008 3
6989 a1015 5
6990 void hrt_pci_remove(struct pci_dev *pci_dev)
6991 {
6992 hrt_dev_cleanup(HRT_DEV_OF(pci_dev));
6993 }
6994
6995 d1017 1
6996 a1017 1
6997 {
6998 a1152 2
6999
7000 dev->irq = dev->pci_dev.irq;
7001 a1155 1
7002 dev->irq = dev->pci_dev.irq;
7003 d1221 6
7004 d1233 1
7005 a1233 7
7006 #ifndef MINOR
7007 minor = iminor(inode);
7008 printk("<1>hrt minor is %d\n", minor);
7009 #else
7010 minor = MINOR(inode->i_rdev);
7011 #endif
7012
7013 a1235 1
7014 printk("<1>hrt_device addr = %lX\n", (unsigned long)hrt_devices);
7015 d1237 1
7016 a1237 1
7017 printk("<1>dev addr = %lX\n", (unsigned long)dev);
7018 d1239 1
7019 a1239 1
7020 if (dev->valid == 0) return -ENODEV;
7021 d1242 1
7022 a1242 1
7023 printk("<1>hrt_setting private data\n");
7024 d1245 1
7025 a1245 1
7026 printk("<1>hrt checking is_open\n");
7027 d1247 1
7028 a1247 1
7029 printk("<1>hrt is is_open\n");
7030 d1253 1
7031 a1253 1
7032 printk("<1>hrt installing interrupt\n");
7033 d1263 1
7034 a1263 1
7035 if (dev->valid == 0) return -ENODEV;
7036 d1266 1
7037 a1266 1
7038 hrt_remove_interrupt(dev);
7039 d1276 1
7040 a1276 1
7041 if (dev->valid == 0) return -ENODEV;
7042 d1286 14
7043 a1299 7
7044 while (!dev->frame_ready) {
7045 up(&dev->sem);
7046 if (file->f_flags & O_NONBLOCK) return -EAGAIN;
7047
7048 if (wait_event_interruptible(dev->wait_queue,
7049 (dev->frame_ready)))
7050 return -ERESTARTSYS;
7051 a1300 1
7052 if (down_interruptible(&dev->sem)) return -ERESTARTSYS;
7053 d1446 2
7054 a1447 1
7055 int hrt_mmap_direct(struct file *file, struct vm_area_struct *vma, unsigned long int_offs)
7056 d1463 2
7057 a1464 1
7058 vma->vm_start, start + int_offs, vma->vm_end - vma->vm_start, vma->vm_page_prot))
7059 d1475 1
7060 a1475 1
7061 if (hrtdev->valid == 0)
7062 d1516 13
7063 a1528 2
7064 int hrt_major_number = 0;;
7065 void hrt_cleanup_module(void);
7066 d1537 1
7067 a1537 1
7068 printk("hrt: failed to register as xchar device with major number %d\n",
7069 d1555 1
7070 a1555 1
7071 printk("no HRT devices detected\n");
7072 d1559 1
7073 a1559 1
7074 printk("found %d HRT devices\n", hrt_num_devices);
7075 a1566 10
7076 void hrt_cleanup_module()
7077 {
7078 int i;
7079 HRT_DEBUG_MSG("entering hrt_cleanup_module()\n");
7080 hrt_pci_cleanup();
7081 for (i=0; i<hrt_nonpci_devices; i++) hrt_dev_cleanup(&hrt_devices[i]);
7082 if (hrt_major_number) unregister_chrdev(hrt_major_number, "hrt");
7083 hrt_debug_cleanup();
7084 }
7085
7086 @
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