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1 /* 1 /*
2 * The driver for the ForteMedia FM801 based 2 * The driver for the ForteMedia FM801 based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@pe 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * 4 *
5 * Support FM only card by Andy Shevchenko <a 5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua>
6 * 6 *
7 * This program is free software; you can re 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Pub 8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either vers 9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version. 10 * (at your option) any later version.
11 * 11 *
12 * This program is distributed in the hope t 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even th 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICUL 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more detai 15 * GNU General Public License for more details.
16 * 16 *
17 * You should have received a copy of the GN 17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 * 20 *
21 */ 21 */
22 22
23 #include <linux/delay.h> 23 #include <linux/delay.h>
24 #include <linux/init.h> 24 #include <linux/init.h>
25 #include <linux/interrupt.h> 25 #include <linux/interrupt.h>
26 #include <linux/pci.h> 26 #include <linux/pci.h>
27 #include <linux/slab.h> 27 #include <linux/slab.h>
28 #include <linux/moduleparam.h> 28 #include <linux/moduleparam.h>
29 #include <sound/core.h> 29 #include <sound/core.h>
30 #include <sound/pcm.h> 30 #include <sound/pcm.h>
31 #include <sound/tlv.h> 31 #include <sound/tlv.h>
32 #include <sound/ac97_codec.h> 32 #include <sound/ac97_codec.h>
33 #include <sound/mpu401.h> 33 #include <sound/mpu401.h>
34 #include <sound/opl3.h> 34 #include <sound/opl3.h>
35 #include <sound/initval.h> 35 #include <sound/initval.h>
36 36
37 #include <asm/io.h> 37 #include <asm/io.h>
38 38
39 #ifdef CONFIG_SND_FM801_TEA575X_BOOL 39 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
40 #include <sound/tea575x-tuner.h> 40 #include <sound/tea575x-tuner.h>
41 #define TEA575X_RADIO 1 41 #define TEA575X_RADIO 1
42 #endif 42 #endif
43 43
44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz 44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
45 MODULE_DESCRIPTION("ForteMedia FM801"); 45 MODULE_DESCRIPTION("ForteMedia FM801");
46 MODULE_LICENSE("GPL"); 46 MODULE_LICENSE("GPL");
47 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," 47 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
48 "{Genius,SoundMaker Live 5.1}} 48 "{Genius,SoundMaker Live 5.1}}");
49 49
50 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_ 50 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_S 51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
52 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT 52 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
53 /* 53 /*
54 * Enable TEA575x tuner 54 * Enable TEA575x tuner
55 * 1 = MediaForte 256-PCS 55 * 1 = MediaForte 256-PCS
56 * 2 = MediaForte 256-PCPR 56 * 2 = MediaForte 256-PCPR
57 * 3 = MediaForte 64-PCR 57 * 3 = MediaForte 64-PCR
58 * 16 = setup tuner only (this is additional 58 * 16 = setup tuner only (this is additional bit), i.e. SF-64-PCR FM card
59 * High 16-bits are video (radio) device numb 59 * High 16-bits are video (radio) device number + 1
60 */ 60 */
61 static int tea575x_tuner[SNDRV_CARDS]; 61 static int tea575x_tuner[SNDRV_CARDS];
62 62
63 module_param_array(index, int, NULL, 0444); 63 module_param_array(index, int, NULL, 0444);
64 MODULE_PARM_DESC(index, "Index value for the F 64 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
65 module_param_array(id, charp, NULL, 0444); 65 module_param_array(id, charp, NULL, 0444);
66 MODULE_PARM_DESC(id, "ID string for the FM801 66 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
67 module_param_array(enable, bool, NULL, 0444); 67 module_param_array(enable, bool, NULL, 0444);
68 MODULE_PARM_DESC(enable, "Enable FM801 soundca 68 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
69 module_param_array(tea575x_tuner, int, NULL, 0 69 module_param_array(tea575x_tuner, int, NULL, 0444);
70 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575 70 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
71 71
72 /* 72 /*
73 * Direct registers 73 * Direct registers
74 */ 74 */
75 75
76 #define FM801_REG(chip, reg) (chip->port + 76 #define FM801_REG(chip, reg) (chip->port + FM801_##reg)
77 77
78 #define FM801_PCM_VOL 0x00 /* PCM 78 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
79 #define FM801_FM_VOL 0x02 /* FM 79 #define FM801_FM_VOL 0x02 /* FM Output Volume */
80 #define FM801_I2S_VOL 0x04 /* I2S 80 #define FM801_I2S_VOL 0x04 /* I2S Volume */
81 #define FM801_REC_SRC 0x06 /* Rec 81 #define FM801_REC_SRC 0x06 /* Record Source */
82 #define FM801_PLY_CTRL 0x08 /* Pla 82 #define FM801_PLY_CTRL 0x08 /* Playback Control */
83 #define FM801_PLY_COUNT 0x0a /* Pla 83 #define FM801_PLY_COUNT 0x0a /* Playback Count */
84 #define FM801_PLY_BUF1 0x0c /* Pla 84 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
85 #define FM801_PLY_BUF2 0x10 /* Pla 85 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
86 #define FM801_CAP_CTRL 0x14 /* Cap 86 #define FM801_CAP_CTRL 0x14 /* Capture Control */
87 #define FM801_CAP_COUNT 0x16 /* Cap 87 #define FM801_CAP_COUNT 0x16 /* Capture Count */
88 #define FM801_CAP_BUF1 0x18 /* Cap 88 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
89 #define FM801_CAP_BUF2 0x1c /* Cap 89 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
90 #define FM801_CODEC_CTRL 0x22 /* Cod 90 #define FM801_CODEC_CTRL 0x22 /* Codec Control */
91 #define FM801_I2S_MODE 0x24 /* I2S 91 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
92 #define FM801_VOLUME 0x26 /* Vol 92 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
93 #define FM801_I2C_CTRL 0x29 /* I2C 93 #define FM801_I2C_CTRL 0x29 /* I2C Control */
94 #define FM801_AC97_CMD 0x2a /* AC' 94 #define FM801_AC97_CMD 0x2a /* AC'97 Command */
95 #define FM801_AC97_DATA 0x2c /* AC' 95 #define FM801_AC97_DATA 0x2c /* AC'97 Data */
96 #define FM801_MPU401_DATA 0x30 /* MPU 96 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
97 #define FM801_MPU401_CMD 0x31 /* MPU 97 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
98 #define FM801_GPIO_CTRL 0x52 /* Gen 98 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
99 #define FM801_GEN_CTRL 0x54 /* Gen 99 #define FM801_GEN_CTRL 0x54 /* General Control */
100 #define FM801_IRQ_MASK 0x56 /* Int 100 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
101 #define FM801_IRQ_STATUS 0x5a /* Int 101 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
102 #define FM801_OPL3_BANK0 0x68 /* OPL 102 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
103 #define FM801_OPL3_DATA0 0x69 /* OPL 103 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
104 #define FM801_OPL3_BANK1 0x6a /* OPL 104 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
105 #define FM801_OPL3_DATA1 0x6b /* OPL 105 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
106 #define FM801_POWERDOWN 0x70 /* Blo 106 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
107 107
108 /* codec access */ 108 /* codec access */
109 #define FM801_AC97_READ (1<<7) /* rea 109 #define FM801_AC97_READ (1<<7) /* read=1, write=0 */
110 #define FM801_AC97_VALID (1<<8) /* por 110 #define FM801_AC97_VALID (1<<8) /* port valid=1 */
111 #define FM801_AC97_BUSY (1<<9) /* bus 111 #define FM801_AC97_BUSY (1<<9) /* busy=1 */
112 #define FM801_AC97_ADDR_SHIFT 10 /* cod 112 #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
113 113
114 /* playback and record control register bits * 114 /* playback and record control register bits */
115 #define FM801_BUF1_LAST (1<<1) 115 #define FM801_BUF1_LAST (1<<1)
116 #define FM801_BUF2_LAST (1<<2) 116 #define FM801_BUF2_LAST (1<<2)
117 #define FM801_START (1<<5) 117 #define FM801_START (1<<5)
118 #define FM801_PAUSE (1<<6) 118 #define FM801_PAUSE (1<<6)
119 #define FM801_IMMED_STOP (1<<7) 119 #define FM801_IMMED_STOP (1<<7)
120 #define FM801_RATE_SHIFT 8 120 #define FM801_RATE_SHIFT 8
121 #define FM801_RATE_MASK (15 << FM801_R 121 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
122 #define FM801_CHANNELS_4 (1<<12) /* pla 122 #define FM801_CHANNELS_4 (1<<12) /* playback only */
123 #define FM801_CHANNELS_6 (2<<12) /* pla 123 #define FM801_CHANNELS_6 (2<<12) /* playback only */
124 #define FM801_CHANNELS_6MS (3<<12) /* pla 124 #define FM801_CHANNELS_6MS (3<<12) /* playback only */
125 #define FM801_CHANNELS_MASK (3<<12) 125 #define FM801_CHANNELS_MASK (3<<12)
126 #define FM801_16BIT (1<<14) 126 #define FM801_16BIT (1<<14)
127 #define FM801_STEREO (1<<15) 127 #define FM801_STEREO (1<<15)
128 128
129 /* IRQ status bits */ 129 /* IRQ status bits */
130 #define FM801_IRQ_PLAYBACK (1<<8) 130 #define FM801_IRQ_PLAYBACK (1<<8)
131 #define FM801_IRQ_CAPTURE (1<<9) 131 #define FM801_IRQ_CAPTURE (1<<9)
132 #define FM801_IRQ_VOLUME (1<<14) 132 #define FM801_IRQ_VOLUME (1<<14)
133 #define FM801_IRQ_MPU (1<<15) 133 #define FM801_IRQ_MPU (1<<15)
134 134
135 /* GPIO control register */ 135 /* GPIO control register */
136 #define FM801_GPIO_GP0 (1<<0) /* rea 136 #define FM801_GPIO_GP0 (1<<0) /* read/write */
137 #define FM801_GPIO_GP1 (1<<1) 137 #define FM801_GPIO_GP1 (1<<1)
138 #define FM801_GPIO_GP2 (1<<2) 138 #define FM801_GPIO_GP2 (1<<2)
139 #define FM801_GPIO_GP3 (1<<3) 139 #define FM801_GPIO_GP3 (1<<3)
140 #define FM801_GPIO_GP(x) (1<<(0+(x))) 140 #define FM801_GPIO_GP(x) (1<<(0+(x)))
141 #define FM801_GPIO_GD0 (1<<8) /* dir 141 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
142 #define FM801_GPIO_GD1 (1<<9) 142 #define FM801_GPIO_GD1 (1<<9)
143 #define FM801_GPIO_GD2 (1<<10) 143 #define FM801_GPIO_GD2 (1<<10)
144 #define FM801_GPIO_GD3 (1<<11) 144 #define FM801_GPIO_GD3 (1<<11)
145 #define FM801_GPIO_GD(x) (1<<(8+(x))) 145 #define FM801_GPIO_GD(x) (1<<(8+(x)))
146 #define FM801_GPIO_GS0 (1<<12) /* fun 146 #define FM801_GPIO_GS0 (1<<12) /* function select: */
147 #define FM801_GPIO_GS1 (1<<13) /* 147 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
148 #define FM801_GPIO_GS2 (1<<14) /* 148 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
149 #define FM801_GPIO_GS3 (1<<15) 149 #define FM801_GPIO_GS3 (1<<15)
150 #define FM801_GPIO_GS(x) (1<<(12+(x))) 150 #define FM801_GPIO_GS(x) (1<<(12+(x)))
151 151
152 /* 152 /*
153 153
154 */ 154 */
155 155
156 struct fm801 { 156 struct fm801 {
157 int irq; 157 int irq;
158 158
159 unsigned long port; /* I/O port nu 159 unsigned long port; /* I/O port number */
160 unsigned int multichannel: 1, /* mul 160 unsigned int multichannel: 1, /* multichannel support */
161 secondary: 1; /* sec 161 secondary: 1; /* secondary codec */
162 unsigned char secondary_addr; /* add 162 unsigned char secondary_addr; /* address of the secondary codec */
163 unsigned int tea575x_tuner; /* tun 163 unsigned int tea575x_tuner; /* tuner flags */
164 164
165 unsigned short ply_ctrl; /* playback c 165 unsigned short ply_ctrl; /* playback control */
166 unsigned short cap_ctrl; /* capture co 166 unsigned short cap_ctrl; /* capture control */
167 167
168 unsigned long ply_buffer; 168 unsigned long ply_buffer;
169 unsigned int ply_buf; 169 unsigned int ply_buf;
170 unsigned int ply_count; 170 unsigned int ply_count;
171 unsigned int ply_size; 171 unsigned int ply_size;
172 unsigned int ply_pos; 172 unsigned int ply_pos;
173 173
174 unsigned long cap_buffer; 174 unsigned long cap_buffer;
175 unsigned int cap_buf; 175 unsigned int cap_buf;
176 unsigned int cap_count; 176 unsigned int cap_count;
177 unsigned int cap_size; 177 unsigned int cap_size;
178 unsigned int cap_pos; 178 unsigned int cap_pos;
179 179
180 struct snd_ac97_bus *ac97_bus; 180 struct snd_ac97_bus *ac97_bus;
181 struct snd_ac97 *ac97; 181 struct snd_ac97 *ac97;
182 struct snd_ac97 *ac97_sec; 182 struct snd_ac97 *ac97_sec;
183 183
184 struct pci_dev *pci; 184 struct pci_dev *pci;
185 struct snd_card *card; 185 struct snd_card *card;
186 struct snd_pcm *pcm; 186 struct snd_pcm *pcm;
187 struct snd_rawmidi *rmidi; 187 struct snd_rawmidi *rmidi;
188 struct snd_pcm_substream *playback_sub 188 struct snd_pcm_substream *playback_substream;
189 struct snd_pcm_substream *capture_subs 189 struct snd_pcm_substream *capture_substream;
190 unsigned int p_dma_size; 190 unsigned int p_dma_size;
191 unsigned int c_dma_size; 191 unsigned int c_dma_size;
192 192
193 spinlock_t reg_lock; 193 spinlock_t reg_lock;
194 struct snd_info_entry *proc_entry; 194 struct snd_info_entry *proc_entry;
195 195
196 #ifdef TEA575X_RADIO 196 #ifdef TEA575X_RADIO
197 struct snd_tea575x tea; 197 struct snd_tea575x tea;
198 #endif 198 #endif
199 199
200 #ifdef CONFIG_PM 200 #ifdef CONFIG_PM
201 u16 saved_regs[0x20]; 201 u16 saved_regs[0x20];
202 #endif 202 #endif
203 }; 203 };
204 204
205 static struct pci_device_id snd_fm801_ids[] = 205 static struct pci_device_id snd_fm801_ids[] = {
206 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ 206 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
207 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ 207 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
208 { 0, } 208 { 0, }
209 }; 209 };
210 210
211 MODULE_DEVICE_TABLE(pci, snd_fm801_ids); 211 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
212 212
213 /* 213 /*
214 * common I/O routines 214 * common I/O routines
215 */ 215 */
216 216
217 static int snd_fm801_update_bits(struct fm801 217 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
218 unsigned shor 218 unsigned short mask, unsigned short value)
219 { 219 {
220 int change; 220 int change;
221 unsigned long flags; 221 unsigned long flags;
222 unsigned short old, new; 222 unsigned short old, new;
223 223
224 spin_lock_irqsave(&chip->reg_lock, fla 224 spin_lock_irqsave(&chip->reg_lock, flags);
225 old = inw(chip->port + reg); 225 old = inw(chip->port + reg);
226 new = (old & ~mask) | value; 226 new = (old & ~mask) | value;
227 change = old != new; 227 change = old != new;
228 if (change) 228 if (change)
229 outw(new, chip->port + reg); 229 outw(new, chip->port + reg);
230 spin_unlock_irqrestore(&chip->reg_lock 230 spin_unlock_irqrestore(&chip->reg_lock, flags);
231 return change; 231 return change;
232 } 232 }
233 233
234 static void snd_fm801_codec_write(struct snd_a 234 static void snd_fm801_codec_write(struct snd_ac97 *ac97,
235 unsigned sho 235 unsigned short reg,
236 unsigned sho 236 unsigned short val)
237 { 237 {
238 struct fm801 *chip = ac97->private_dat 238 struct fm801 *chip = ac97->private_data;
239 int idx; 239 int idx;
240 240
241 /* 241 /*
242 * Wait until the codec interface is 242 * Wait until the codec interface is not ready..
243 */ 243 */
244 for (idx = 0; idx < 100; idx++) { 244 for (idx = 0; idx < 100; idx++) {
245 if (!(inw(FM801_REG(chip, AC97 245 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
246 goto ok1; 246 goto ok1;
247 udelay(10); 247 udelay(10);
248 } 248 }
249 snd_printk(KERN_ERR "AC'97 interface i 249 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
250 return; 250 return;
251 251
252 ok1: 252 ok1:
253 /* write data and address */ 253 /* write data and address */
254 outw(val, FM801_REG(chip, AC97_DATA)); 254 outw(val, FM801_REG(chip, AC97_DATA));
255 outw(reg | (ac97->addr << FM801_AC97_A 255 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
256 /* 256 /*
257 * Wait until the write command is no 257 * Wait until the write command is not completed..
258 */ 258 */
259 for (idx = 0; idx < 1000; idx++) { 259 for (idx = 0; idx < 1000; idx++) {
260 if (!(inw(FM801_REG(chip, AC97 260 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
261 return; 261 return;
262 udelay(10); 262 udelay(10);
263 } 263 }
264 snd_printk(KERN_ERR "AC'97 interface # 264 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
265 } 265 }
266 266
267 static unsigned short snd_fm801_codec_read(str 267 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
268 { 268 {
269 struct fm801 *chip = ac97->private_dat 269 struct fm801 *chip = ac97->private_data;
270 int idx; 270 int idx;
271 271
272 /* 272 /*
273 * Wait until the codec interface is 273 * Wait until the codec interface is not ready..
274 */ 274 */
275 for (idx = 0; idx < 100; idx++) { 275 for (idx = 0; idx < 100; idx++) {
276 if (!(inw(FM801_REG(chip, AC97 276 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
277 goto ok1; 277 goto ok1;
278 udelay(10); 278 udelay(10);
279 } 279 }
280 snd_printk(KERN_ERR "AC'97 interface i 280 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
281 return 0; 281 return 0;
282 282
283 ok1: 283 ok1:
284 /* read command */ 284 /* read command */
285 outw(reg | (ac97->addr << FM801_AC97_A 285 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ,
286 FM801_REG(chip, AC97_CMD)); 286 FM801_REG(chip, AC97_CMD));
287 for (idx = 0; idx < 100; idx++) { 287 for (idx = 0; idx < 100; idx++) {
288 if (!(inw(FM801_REG(chip, AC97 288 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
289 goto ok2; 289 goto ok2;
290 udelay(10); 290 udelay(10);
291 } 291 }
292 snd_printk(KERN_ERR "AC'97 interface # 292 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
293 return 0; 293 return 0;
294 294
295 ok2: 295 ok2:
296 for (idx = 0; idx < 1000; idx++) { 296 for (idx = 0; idx < 1000; idx++) {
297 if (inw(FM801_REG(chip, AC97_C 297 if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID)
298 goto ok3; 298 goto ok3;
299 udelay(10); 299 udelay(10);
300 } 300 }
301 snd_printk(KERN_ERR "AC'97 interface # 301 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num);
302 return 0; 302 return 0;
303 303
304 ok3: 304 ok3:
305 return inw(FM801_REG(chip, AC97_DATA)) 305 return inw(FM801_REG(chip, AC97_DATA));
306 } 306 }
307 307
308 static unsigned int rates[] = { 308 static unsigned int rates[] = {
309 5500, 8000, 9600, 11025, 309 5500, 8000, 9600, 11025,
310 16000, 19200, 22050, 32000, 310 16000, 19200, 22050, 32000,
311 38400, 44100, 48000 311 38400, 44100, 48000
312 }; 312 };
313 313
314 static struct snd_pcm_hw_constraint_list hw_co 314 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
315 .count = ARRAY_SIZE(rates), 315 .count = ARRAY_SIZE(rates),
316 .list = rates, 316 .list = rates,
317 .mask = 0, 317 .mask = 0,
318 }; 318 };
319 319
320 static unsigned int channels[] = { 320 static unsigned int channels[] = {
321 2, 4, 6 321 2, 4, 6
322 }; 322 };
323 323
324 static struct snd_pcm_hw_constraint_list hw_co 324 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
325 .count = ARRAY_SIZE(channels), 325 .count = ARRAY_SIZE(channels),
326 .list = channels, 326 .list = channels,
327 .mask = 0, 327 .mask = 0,
328 }; 328 };
329 329
330 /* 330 /*
331 * Sample rate routines 331 * Sample rate routines
332 */ 332 */
333 333
334 static unsigned short snd_fm801_rate_bits(unsi 334 static unsigned short snd_fm801_rate_bits(unsigned int rate)
335 { 335 {
336 unsigned int idx; 336 unsigned int idx;
337 337
338 for (idx = 0; idx < ARRAY_SIZE(rates); 338 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
339 if (rates[idx] == rate) 339 if (rates[idx] == rate)
340 return idx; 340 return idx;
341 snd_BUG(); 341 snd_BUG();
342 return ARRAY_SIZE(rates) - 1; 342 return ARRAY_SIZE(rates) - 1;
343 } 343 }
344 344
345 /* 345 /*
346 * PCM part 346 * PCM part
347 */ 347 */
348 348
349 static int snd_fm801_playback_trigger(struct s 349 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
350 int cmd) 350 int cmd)
351 { 351 {
352 struct fm801 *chip = snd_pcm_substream 352 struct fm801 *chip = snd_pcm_substream_chip(substream);
353 353
354 spin_lock(&chip->reg_lock); 354 spin_lock(&chip->reg_lock);
355 switch (cmd) { 355 switch (cmd) {
356 case SNDRV_PCM_TRIGGER_START: 356 case SNDRV_PCM_TRIGGER_START:
357 chip->ply_ctrl &= ~(FM801_BUF1 357 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
358 FM801_BUF 358 FM801_BUF2_LAST |
359 FM801_PAU 359 FM801_PAUSE);
360 chip->ply_ctrl |= FM801_START 360 chip->ply_ctrl |= FM801_START |
361 FM801_IMMED 361 FM801_IMMED_STOP;
362 break; 362 break;
363 case SNDRV_PCM_TRIGGER_STOP: 363 case SNDRV_PCM_TRIGGER_STOP:
364 chip->ply_ctrl &= ~(FM801_STAR 364 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
365 break; 365 break;
366 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 366 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
367 case SNDRV_PCM_TRIGGER_SUSPEND: 367 case SNDRV_PCM_TRIGGER_SUSPEND:
368 chip->ply_ctrl |= FM801_PAUSE; 368 chip->ply_ctrl |= FM801_PAUSE;
369 break; 369 break;
370 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 370 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
371 case SNDRV_PCM_TRIGGER_RESUME: 371 case SNDRV_PCM_TRIGGER_RESUME:
372 chip->ply_ctrl &= ~FM801_PAUSE 372 chip->ply_ctrl &= ~FM801_PAUSE;
373 break; 373 break;
374 default: 374 default:
375 spin_unlock(&chip->reg_lock); 375 spin_unlock(&chip->reg_lock);
376 snd_BUG(); 376 snd_BUG();
377 return -EINVAL; 377 return -EINVAL;
378 } 378 }
379 outw(chip->ply_ctrl, FM801_REG(chip, P 379 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
380 spin_unlock(&chip->reg_lock); 380 spin_unlock(&chip->reg_lock);
381 return 0; 381 return 0;
382 } 382 }
383 383
384 static int snd_fm801_capture_trigger(struct sn 384 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
385 int cmd) 385 int cmd)
386 { 386 {
387 struct fm801 *chip = snd_pcm_substream 387 struct fm801 *chip = snd_pcm_substream_chip(substream);
388 388
389 spin_lock(&chip->reg_lock); 389 spin_lock(&chip->reg_lock);
390 switch (cmd) { 390 switch (cmd) {
391 case SNDRV_PCM_TRIGGER_START: 391 case SNDRV_PCM_TRIGGER_START:
392 chip->cap_ctrl &= ~(FM801_BUF1 392 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
393 FM801_BUF 393 FM801_BUF2_LAST |
394 FM801_PAU 394 FM801_PAUSE);
395 chip->cap_ctrl |= FM801_START 395 chip->cap_ctrl |= FM801_START |
396 FM801_IMMED 396 FM801_IMMED_STOP;
397 break; 397 break;
398 case SNDRV_PCM_TRIGGER_STOP: 398 case SNDRV_PCM_TRIGGER_STOP:
399 chip->cap_ctrl &= ~(FM801_STAR 399 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
400 break; 400 break;
401 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 401 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
402 case SNDRV_PCM_TRIGGER_SUSPEND: 402 case SNDRV_PCM_TRIGGER_SUSPEND:
403 chip->cap_ctrl |= FM801_PAUSE; 403 chip->cap_ctrl |= FM801_PAUSE;
404 break; 404 break;
405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
406 case SNDRV_PCM_TRIGGER_RESUME: 406 case SNDRV_PCM_TRIGGER_RESUME:
407 chip->cap_ctrl &= ~FM801_PAUSE 407 chip->cap_ctrl &= ~FM801_PAUSE;
408 break; 408 break;
409 default: 409 default:
410 spin_unlock(&chip->reg_lock); 410 spin_unlock(&chip->reg_lock);
411 snd_BUG(); 411 snd_BUG();
412 return -EINVAL; 412 return -EINVAL;
413 } 413 }
414 outw(chip->cap_ctrl, FM801_REG(chip, C 414 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
415 spin_unlock(&chip->reg_lock); 415 spin_unlock(&chip->reg_lock);
416 return 0; 416 return 0;
417 } 417 }
418 418
419 static int snd_fm801_hw_params(struct snd_pcm_ 419 static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
420 struct snd_pcm_ 420 struct snd_pcm_hw_params *hw_params)
421 { 421 {
422 return snd_pcm_lib_malloc_pages(substr 422 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
423 } 423 }
424 424
425 static int snd_fm801_hw_free(struct snd_pcm_su 425 static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
426 { 426 {
427 return snd_pcm_lib_free_pages(substrea 427 return snd_pcm_lib_free_pages(substream);
428 } 428 }
429 429
430 static int snd_fm801_playback_prepare(struct s 430 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
431 { 431 {
432 struct fm801 *chip = snd_pcm_substream 432 struct fm801 *chip = snd_pcm_substream_chip(substream);
433 struct snd_pcm_runtime *runtime = subs 433 struct snd_pcm_runtime *runtime = substream->runtime;
434 434
435 chip->ply_size = snd_pcm_lib_buffer_by 435 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
436 chip->ply_count = snd_pcm_lib_period_b 436 chip->ply_count = snd_pcm_lib_period_bytes(substream);
437 spin_lock_irq(&chip->reg_lock); 437 spin_lock_irq(&chip->reg_lock);
438 chip->ply_ctrl &= ~(FM801_START | FM80 438 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
439 FM801_STEREO | FM 439 FM801_STEREO | FM801_RATE_MASK |
440 FM801_CHANNELS_MA 440 FM801_CHANNELS_MASK);
441 if (snd_pcm_format_width(runtime->form 441 if (snd_pcm_format_width(runtime->format) == 16)
442 chip->ply_ctrl |= FM801_16BIT; 442 chip->ply_ctrl |= FM801_16BIT;
443 if (runtime->channels > 1) { 443 if (runtime->channels > 1) {
444 chip->ply_ctrl |= FM801_STEREO 444 chip->ply_ctrl |= FM801_STEREO;
445 if (runtime->channels == 4) 445 if (runtime->channels == 4)
446 chip->ply_ctrl |= FM80 446 chip->ply_ctrl |= FM801_CHANNELS_4;
447 else if (runtime->channels == 447 else if (runtime->channels == 6)
448 chip->ply_ctrl |= FM80 448 chip->ply_ctrl |= FM801_CHANNELS_6;
449 } 449 }
450 chip->ply_ctrl |= snd_fm801_rate_bits( 450 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
451 chip->ply_buf = 0; 451 chip->ply_buf = 0;
452 outw(chip->ply_ctrl, FM801_REG(chip, P 452 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
453 outw(chip->ply_count - 1, FM801_REG(ch 453 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
454 chip->ply_buffer = runtime->dma_addr; 454 chip->ply_buffer = runtime->dma_addr;
455 chip->ply_pos = 0; 455 chip->ply_pos = 0;
456 outl(chip->ply_buffer, FM801_REG(chip, 456 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
457 outl(chip->ply_buffer + (chip->ply_cou 457 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
458 spin_unlock_irq(&chip->reg_lock); 458 spin_unlock_irq(&chip->reg_lock);
459 return 0; 459 return 0;
460 } 460 }
461 461
462 static int snd_fm801_capture_prepare(struct sn 462 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
463 { 463 {
464 struct fm801 *chip = snd_pcm_substream 464 struct fm801 *chip = snd_pcm_substream_chip(substream);
465 struct snd_pcm_runtime *runtime = subs 465 struct snd_pcm_runtime *runtime = substream->runtime;
466 466
467 chip->cap_size = snd_pcm_lib_buffer_by 467 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
468 chip->cap_count = snd_pcm_lib_period_b 468 chip->cap_count = snd_pcm_lib_period_bytes(substream);
469 spin_lock_irq(&chip->reg_lock); 469 spin_lock_irq(&chip->reg_lock);
470 chip->cap_ctrl &= ~(FM801_START | FM80 470 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
471 FM801_STEREO | FM 471 FM801_STEREO | FM801_RATE_MASK);
472 if (snd_pcm_format_width(runtime->form 472 if (snd_pcm_format_width(runtime->format) == 16)
473 chip->cap_ctrl |= FM801_16BIT; 473 chip->cap_ctrl |= FM801_16BIT;
474 if (runtime->channels > 1) 474 if (runtime->channels > 1)
475 chip->cap_ctrl |= FM801_STEREO 475 chip->cap_ctrl |= FM801_STEREO;
476 chip->cap_ctrl |= snd_fm801_rate_bits( 476 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
477 chip->cap_buf = 0; 477 chip->cap_buf = 0;
478 outw(chip->cap_ctrl, FM801_REG(chip, C 478 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
479 outw(chip->cap_count - 1, FM801_REG(ch 479 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
480 chip->cap_buffer = runtime->dma_addr; 480 chip->cap_buffer = runtime->dma_addr;
481 chip->cap_pos = 0; 481 chip->cap_pos = 0;
482 outl(chip->cap_buffer, FM801_REG(chip, 482 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
483 outl(chip->cap_buffer + (chip->cap_cou 483 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
484 spin_unlock_irq(&chip->reg_lock); 484 spin_unlock_irq(&chip->reg_lock);
485 return 0; 485 return 0;
486 } 486 }
487 487
488 static snd_pcm_uframes_t snd_fm801_playback_po 488 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
489 { 489 {
490 struct fm801 *chip = snd_pcm_substream 490 struct fm801 *chip = snd_pcm_substream_chip(substream);
491 size_t ptr; 491 size_t ptr;
492 492
493 if (!(chip->ply_ctrl & FM801_START)) 493 if (!(chip->ply_ctrl & FM801_START))
494 return 0; 494 return 0;
495 spin_lock(&chip->reg_lock); 495 spin_lock(&chip->reg_lock);
496 ptr = chip->ply_pos + (chip->ply_count 496 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
497 if (inw(FM801_REG(chip, IRQ_STATUS)) & 497 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
498 ptr += chip->ply_count; 498 ptr += chip->ply_count;
499 ptr %= chip->ply_size; 499 ptr %= chip->ply_size;
500 } 500 }
501 spin_unlock(&chip->reg_lock); 501 spin_unlock(&chip->reg_lock);
502 return bytes_to_frames(substream->runt 502 return bytes_to_frames(substream->runtime, ptr);
503 } 503 }
504 504
505 static snd_pcm_uframes_t snd_fm801_capture_poi 505 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
506 { 506 {
507 struct fm801 *chip = snd_pcm_substream 507 struct fm801 *chip = snd_pcm_substream_chip(substream);
508 size_t ptr; 508 size_t ptr;
509 509
510 if (!(chip->cap_ctrl & FM801_START)) 510 if (!(chip->cap_ctrl & FM801_START))
511 return 0; 511 return 0;
512 spin_lock(&chip->reg_lock); 512 spin_lock(&chip->reg_lock);
513 ptr = chip->cap_pos + (chip->cap_count 513 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
514 if (inw(FM801_REG(chip, IRQ_STATUS)) & 514 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
515 ptr += chip->cap_count; 515 ptr += chip->cap_count;
516 ptr %= chip->cap_size; 516 ptr %= chip->cap_size;
517 } 517 }
518 spin_unlock(&chip->reg_lock); 518 spin_unlock(&chip->reg_lock);
519 return bytes_to_frames(substream->runt 519 return bytes_to_frames(substream->runtime, ptr);
520 } 520 }
521 521
522 static irqreturn_t snd_fm801_interrupt(int irq 522 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
523 { 523 {
524 struct fm801 *chip = dev_id; 524 struct fm801 *chip = dev_id;
525 unsigned short status; 525 unsigned short status;
526 unsigned int tmp; 526 unsigned int tmp;
527 527
528 status = inw(FM801_REG(chip, IRQ_STATU 528 status = inw(FM801_REG(chip, IRQ_STATUS));
529 status &= FM801_IRQ_PLAYBACK|FM801_IRQ 529 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
530 if (! status) 530 if (! status)
531 return IRQ_NONE; 531 return IRQ_NONE;
532 /* ack first */ 532 /* ack first */
533 outw(status, FM801_REG(chip, IRQ_STATU 533 outw(status, FM801_REG(chip, IRQ_STATUS));
534 if (chip->pcm && (status & FM801_IRQ_P 534 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
535 spin_lock(&chip->reg_lock); 535 spin_lock(&chip->reg_lock);
536 chip->ply_buf++; 536 chip->ply_buf++;
537 chip->ply_pos += chip->ply_cou 537 chip->ply_pos += chip->ply_count;
538 chip->ply_pos %= chip->ply_siz 538 chip->ply_pos %= chip->ply_size;
539 tmp = chip->ply_pos + chip->pl 539 tmp = chip->ply_pos + chip->ply_count;
540 tmp %= chip->ply_size; 540 tmp %= chip->ply_size;
541 outl(chip->ply_buffer + tmp, 541 outl(chip->ply_buffer + tmp,
542 (chip->ply_buf 542 (chip->ply_buf & 1) ?
543 FM801_ 543 FM801_REG(chip, PLY_BUF1) :
544 FM801_ 544 FM801_REG(chip, PLY_BUF2));
545 spin_unlock(&chip->reg_lock); 545 spin_unlock(&chip->reg_lock);
546 snd_pcm_period_elapsed(chip->p 546 snd_pcm_period_elapsed(chip->playback_substream);
547 } 547 }
548 if (chip->pcm && (status & FM801_IRQ_C 548 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
549 spin_lock(&chip->reg_lock); 549 spin_lock(&chip->reg_lock);
550 chip->cap_buf++; 550 chip->cap_buf++;
551 chip->cap_pos += chip->cap_cou 551 chip->cap_pos += chip->cap_count;
552 chip->cap_pos %= chip->cap_siz 552 chip->cap_pos %= chip->cap_size;
553 tmp = chip->cap_pos + chip->ca 553 tmp = chip->cap_pos + chip->cap_count;
554 tmp %= chip->cap_size; 554 tmp %= chip->cap_size;
555 outl(chip->cap_buffer + tmp, 555 outl(chip->cap_buffer + tmp,
556 (chip->cap_buf 556 (chip->cap_buf & 1) ?
557 FM801_ 557 FM801_REG(chip, CAP_BUF1) :
558 FM801_ 558 FM801_REG(chip, CAP_BUF2));
559 spin_unlock(&chip->reg_lock); 559 spin_unlock(&chip->reg_lock);
560 snd_pcm_period_elapsed(chip->c 560 snd_pcm_period_elapsed(chip->capture_substream);
561 } 561 }
562 if (chip->rmidi && (status & FM801_IRQ 562 if (chip->rmidi && (status & FM801_IRQ_MPU))
563 snd_mpu401_uart_interrupt(irq, 563 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
564 if (status & FM801_IRQ_VOLUME) 564 if (status & FM801_IRQ_VOLUME)
565 ;/* TODO */ 565 ;/* TODO */
566 566
567 return IRQ_HANDLED; 567 return IRQ_HANDLED;
568 } 568 }
569 569
570 static struct snd_pcm_hardware snd_fm801_playb 570 static struct snd_pcm_hardware snd_fm801_playback =
571 { 571 {
572 .info = (SNDRV_PCM_INF 572 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
573 SNDRV_PCM_INF 573 SNDRV_PCM_INFO_BLOCK_TRANSFER |
574 SNDRV_PCM_INF 574 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
575 SNDRV_PCM_INF 575 SNDRV_PCM_INFO_MMAP_VALID),
576 .formats = SNDRV_PCM_FMTB 576 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
577 .rates = SNDRV_PCM_RATE 577 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
578 .rate_min = 5500, 578 .rate_min = 5500,
579 .rate_max = 48000, 579 .rate_max = 48000,
580 .channels_min = 1, 580 .channels_min = 1,
581 .channels_max = 2, 581 .channels_max = 2,
582 .buffer_bytes_max = (128*1024), 582 .buffer_bytes_max = (128*1024),
583 .period_bytes_min = 64, 583 .period_bytes_min = 64,
584 .period_bytes_max = (128*1024), 584 .period_bytes_max = (128*1024),
585 .periods_min = 1, 585 .periods_min = 1,
586 .periods_max = 1024, 586 .periods_max = 1024,
587 .fifo_size = 0, 587 .fifo_size = 0,
588 }; 588 };
589 589
590 static struct snd_pcm_hardware snd_fm801_captu 590 static struct snd_pcm_hardware snd_fm801_capture =
591 { 591 {
592 .info = (SNDRV_PCM_INF 592 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
593 SNDRV_PCM_INF 593 SNDRV_PCM_INFO_BLOCK_TRANSFER |
594 SNDRV_PCM_INF 594 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
595 SNDRV_PCM_INF 595 SNDRV_PCM_INFO_MMAP_VALID),
596 .formats = SNDRV_PCM_FMTB 596 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
597 .rates = SNDRV_PCM_RATE 597 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
598 .rate_min = 5500, 598 .rate_min = 5500,
599 .rate_max = 48000, 599 .rate_max = 48000,
600 .channels_min = 1, 600 .channels_min = 1,
601 .channels_max = 2, 601 .channels_max = 2,
602 .buffer_bytes_max = (128*1024), 602 .buffer_bytes_max = (128*1024),
603 .period_bytes_min = 64, 603 .period_bytes_min = 64,
604 .period_bytes_max = (128*1024), 604 .period_bytes_max = (128*1024),
605 .periods_min = 1, 605 .periods_min = 1,
606 .periods_max = 1024, 606 .periods_max = 1024,
607 .fifo_size = 0, 607 .fifo_size = 0,
608 }; 608 };
609 609
610 static int snd_fm801_playback_open(struct snd_ 610 static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
611 { 611 {
612 struct fm801 *chip = snd_pcm_substream 612 struct fm801 *chip = snd_pcm_substream_chip(substream);
613 struct snd_pcm_runtime *runtime = subs 613 struct snd_pcm_runtime *runtime = substream->runtime;
614 int err; 614 int err;
615 615
616 chip->playback_substream = substream; 616 chip->playback_substream = substream;
617 runtime->hw = snd_fm801_playback; 617 runtime->hw = snd_fm801_playback;
618 snd_pcm_hw_constraint_list(runtime, 0, 618 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
619 &hw_constra 619 &hw_constraints_rates);
620 if (chip->multichannel) { 620 if (chip->multichannel) {
621 runtime->hw.channels_max = 6; 621 runtime->hw.channels_max = 6;
622 snd_pcm_hw_constraint_list(run 622 snd_pcm_hw_constraint_list(runtime, 0,
623 SND 623 SNDRV_PCM_HW_PARAM_CHANNELS,
624 &hw 624 &hw_constraints_channels);
625 } 625 }
626 if ((err = snd_pcm_hw_constraint_integ 626 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
627 return err; 627 return err;
628 return 0; 628 return 0;
629 } 629 }
630 630
631 static int snd_fm801_capture_open(struct snd_p 631 static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
632 { 632 {
633 struct fm801 *chip = snd_pcm_substream 633 struct fm801 *chip = snd_pcm_substream_chip(substream);
634 struct snd_pcm_runtime *runtime = subs 634 struct snd_pcm_runtime *runtime = substream->runtime;
635 int err; 635 int err;
636 636
637 chip->capture_substream = substream; 637 chip->capture_substream = substream;
638 runtime->hw = snd_fm801_capture; 638 runtime->hw = snd_fm801_capture;
639 snd_pcm_hw_constraint_list(runtime, 0, 639 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
640 &hw_constra 640 &hw_constraints_rates);
641 if ((err = snd_pcm_hw_constraint_integ 641 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
642 return err; 642 return err;
643 return 0; 643 return 0;
644 } 644 }
645 645
646 static int snd_fm801_playback_close(struct snd 646 static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
647 { 647 {
648 struct fm801 *chip = snd_pcm_substream 648 struct fm801 *chip = snd_pcm_substream_chip(substream);
649 649
650 chip->playback_substream = NULL; 650 chip->playback_substream = NULL;
651 return 0; 651 return 0;
652 } 652 }
653 653
654 static int snd_fm801_capture_close(struct snd_ 654 static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
655 { 655 {
656 struct fm801 *chip = snd_pcm_substream 656 struct fm801 *chip = snd_pcm_substream_chip(substream);
657 657
658 chip->capture_substream = NULL; 658 chip->capture_substream = NULL;
659 return 0; 659 return 0;
660 } 660 }
661 661
662 static struct snd_pcm_ops snd_fm801_playback_o 662 static struct snd_pcm_ops snd_fm801_playback_ops = {
663 .open = snd_fm801_playback_ope 663 .open = snd_fm801_playback_open,
664 .close = snd_fm801_playback_clo 664 .close = snd_fm801_playback_close,
665 .ioctl = snd_pcm_lib_ioctl, 665 .ioctl = snd_pcm_lib_ioctl,
666 .hw_params = snd_fm801_hw_params, 666 .hw_params = snd_fm801_hw_params,
667 .hw_free = snd_fm801_hw_free, 667 .hw_free = snd_fm801_hw_free,
668 .prepare = snd_fm801_playback_pre 668 .prepare = snd_fm801_playback_prepare,
669 .trigger = snd_fm801_playback_tri 669 .trigger = snd_fm801_playback_trigger,
670 .pointer = snd_fm801_playback_poi 670 .pointer = snd_fm801_playback_pointer,
671 }; 671 };
672 672
673 static struct snd_pcm_ops snd_fm801_capture_op 673 static struct snd_pcm_ops snd_fm801_capture_ops = {
674 .open = snd_fm801_capture_open 674 .open = snd_fm801_capture_open,
675 .close = snd_fm801_capture_clos 675 .close = snd_fm801_capture_close,
676 .ioctl = snd_pcm_lib_ioctl, 676 .ioctl = snd_pcm_lib_ioctl,
677 .hw_params = snd_fm801_hw_params, 677 .hw_params = snd_fm801_hw_params,
678 .hw_free = snd_fm801_hw_free, 678 .hw_free = snd_fm801_hw_free,
679 .prepare = snd_fm801_capture_prep 679 .prepare = snd_fm801_capture_prepare,
680 .trigger = snd_fm801_capture_trig 680 .trigger = snd_fm801_capture_trigger,
681 .pointer = snd_fm801_capture_poin 681 .pointer = snd_fm801_capture_pointer,
682 }; 682 };
683 683
684 static int __devinit snd_fm801_pcm(struct fm80 684 static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm)
685 { 685 {
686 struct snd_pcm *pcm; 686 struct snd_pcm *pcm;
687 int err; 687 int err;
688 688
689 if (rpcm) 689 if (rpcm)
690 *rpcm = NULL; 690 *rpcm = NULL;
691 if ((err = snd_pcm_new(chip->card, "FM 691 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
692 return err; 692 return err;
693 693
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_ 694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
695 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_ 695 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
696 696
697 pcm->private_data = chip; 697 pcm->private_data = chip;
698 pcm->info_flags = 0; 698 pcm->info_flags = 0;
699 strcpy(pcm->name, "FM801"); 699 strcpy(pcm->name, "FM801");
700 chip->pcm = pcm; 700 chip->pcm = pcm;
701 701
702 snd_pcm_lib_preallocate_pages_for_all( 702 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
703 703 snd_dma_pci_data(chip->pci),
704 704 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
705 705
706 if (rpcm) 706 if (rpcm)
707 *rpcm = pcm; 707 *rpcm = pcm;
708 return 0; 708 return 0;
709 } 709 }
710 710
711 /* 711 /*
712 * TEA5757 radio 712 * TEA5757 radio
713 */ 713 */
714 714
715 #ifdef TEA575X_RADIO 715 #ifdef TEA575X_RADIO
716 716
717 /* 256PCS GPIO numbers */ 717 /* 256PCS GPIO numbers */
718 #define TEA_256PCS_DATA 1 718 #define TEA_256PCS_DATA 1
719 #define TEA_256PCS_WRITE_ENABLE 2 719 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
720 #define TEA_256PCS_BUS_CLOCK 3 720 #define TEA_256PCS_BUS_CLOCK 3
721 721
722 static void snd_fm801_tea575x_256pcs_write(str 722 static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val)
723 { 723 {
724 struct fm801 *chip = tea->private_data 724 struct fm801 *chip = tea->private_data;
725 unsigned short reg; 725 unsigned short reg;
726 int i = 25; 726 int i = 25;
727 727
728 spin_lock_irq(&chip->reg_lock); 728 spin_lock_irq(&chip->reg_lock);
729 reg = inw(FM801_REG(chip, GPIO_CTRL)); 729 reg = inw(FM801_REG(chip, GPIO_CTRL));
730 /* use GPIO lines and set write enable 730 /* use GPIO lines and set write enable bit */
731 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) 731 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
732 FM801_GPIO_GS(TEA_256PCS_WRITE_ 732 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
733 FM801_GPIO_GS(TEA_256PCS_BUS_CL 733 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
734 /* all of lines are in the write direc 734 /* all of lines are in the write direction */
735 /* clear data and clock lines */ 735 /* clear data and clock lines */
736 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA 736 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
737 FM801_GPIO_GD(TEA_256PCS_WRIT 737 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
738 FM801_GPIO_GD(TEA_256PCS_BUS_ 738 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
739 FM801_GPIO_GP(TEA_256PCS_DATA 739 FM801_GPIO_GP(TEA_256PCS_DATA) |
740 FM801_GPIO_GP(TEA_256PCS_BUS_ 740 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
741 FM801_GPIO_GP(TEA_256PCS_WRIT 741 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
742 outw(reg, FM801_REG(chip, GPIO_CTRL)); 742 outw(reg, FM801_REG(chip, GPIO_CTRL));
743 udelay(1); 743 udelay(1);
744 744
745 while (i--) { 745 while (i--) {
746 if (val & (1 << i)) 746 if (val & (1 << i))
747 reg |= FM801_GPIO_GP(T 747 reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
748 else 748 else
749 reg &= ~FM801_GPIO_GP( 749 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
750 outw(reg, FM801_REG(chip, GPIO 750 outw(reg, FM801_REG(chip, GPIO_CTRL));
751 udelay(1); 751 udelay(1);
752 reg |= FM801_GPIO_GP(TEA_256PC 752 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
753 outw(reg, FM801_REG(chip, GPIO 753 outw(reg, FM801_REG(chip, GPIO_CTRL));
754 reg &= ~FM801_GPIO_GP(TEA_256P 754 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
755 outw(reg, FM801_REG(chip, GPIO 755 outw(reg, FM801_REG(chip, GPIO_CTRL));
756 udelay(1); 756 udelay(1);
757 } 757 }
758 758
759 /* and reset the write enable bit */ 759 /* and reset the write enable bit */
760 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ 760 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
761 FM801_GPIO_GP(TEA_256PCS_DATA); 761 FM801_GPIO_GP(TEA_256PCS_DATA);
762 outw(reg, FM801_REG(chip, GPIO_CTRL)); 762 outw(reg, FM801_REG(chip, GPIO_CTRL));
763 spin_unlock_irq(&chip->reg_lock); 763 spin_unlock_irq(&chip->reg_lock);
764 } 764 }
765 765
766 static unsigned int snd_fm801_tea575x_256pcs_r 766 static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea)
767 { 767 {
768 struct fm801 *chip = tea->private_data 768 struct fm801 *chip = tea->private_data;
769 unsigned short reg; 769 unsigned short reg;
770 unsigned int val = 0; 770 unsigned int val = 0;
771 int i; 771 int i;
772 772
773 spin_lock_irq(&chip->reg_lock); 773 spin_lock_irq(&chip->reg_lock);
774 reg = inw(FM801_REG(chip, GPIO_CTRL)); 774 reg = inw(FM801_REG(chip, GPIO_CTRL));
775 /* use GPIO lines, set data direction 775 /* use GPIO lines, set data direction to input */
776 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) 776 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
777 FM801_GPIO_GS(TEA_256PCS_WRITE_ 777 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
778 FM801_GPIO_GS(TEA_256PCS_BUS_CL 778 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
779 FM801_GPIO_GD(TEA_256PCS_DATA) 779 FM801_GPIO_GD(TEA_256PCS_DATA) |
780 FM801_GPIO_GP(TEA_256PCS_DATA) 780 FM801_GPIO_GP(TEA_256PCS_DATA) |
781 FM801_GPIO_GP(TEA_256PCS_WRITE_ 781 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
782 /* all of lines are in the write direc 782 /* all of lines are in the write direction, except data */
783 /* clear data, write enable and clock 783 /* clear data, write enable and clock lines */
784 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRIT 784 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
785 FM801_GPIO_GD(TEA_256PCS_BUS_ 785 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
786 FM801_GPIO_GP(TEA_256PCS_BUS_ 786 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
787 787
788 for (i = 0; i < 24; i++) { 788 for (i = 0; i < 24; i++) {
789 reg &= ~FM801_GPIO_GP(TEA_256P 789 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
790 outw(reg, FM801_REG(chip, GPIO 790 outw(reg, FM801_REG(chip, GPIO_CTRL));
791 udelay(1); 791 udelay(1);
792 reg |= FM801_GPIO_GP(TEA_256PC 792 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
793 outw(reg, FM801_REG(chip, GPIO 793 outw(reg, FM801_REG(chip, GPIO_CTRL));
794 udelay(1); 794 udelay(1);
795 val <<= 1; 795 val <<= 1;
796 if (inw(FM801_REG(chip, GPIO_C 796 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
797 val |= 1; 797 val |= 1;
798 } 798 }
799 799
800 spin_unlock_irq(&chip->reg_lock); 800 spin_unlock_irq(&chip->reg_lock);
801 801
802 return val; 802 return val;
803 } 803 }
804 804
805 /* 256PCPR GPIO numbers */ 805 /* 256PCPR GPIO numbers */
806 #define TEA_256PCPR_BUS_CLOCK 0 806 #define TEA_256PCPR_BUS_CLOCK 0
807 #define TEA_256PCPR_DATA 1 807 #define TEA_256PCPR_DATA 1
808 #define TEA_256PCPR_WRITE_ENABLE 2 808 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
809 809
810 static void snd_fm801_tea575x_256pcpr_write(st 810 static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val)
811 { 811 {
812 struct fm801 *chip = tea->private_data 812 struct fm801 *chip = tea->private_data;
813 unsigned short reg; 813 unsigned short reg;
814 int i = 25; 814 int i = 25;
815 815
816 spin_lock_irq(&chip->reg_lock); 816 spin_lock_irq(&chip->reg_lock);
817 reg = inw(FM801_REG(chip, GPIO_CTRL)); 817 reg = inw(FM801_REG(chip, GPIO_CTRL));
818 /* use GPIO lines and set write enable 818 /* use GPIO lines and set write enable bit */
819 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) 819 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
820 FM801_GPIO_GS(TEA_256PCPR_WRITE 820 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
821 FM801_GPIO_GS(TEA_256PCPR_BUS_C 821 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
822 /* all of lines are in the write direc 822 /* all of lines are in the write direction */
823 /* clear data and clock lines */ 823 /* clear data and clock lines */
824 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DAT 824 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
825 FM801_GPIO_GD(TEA_256PCPR_WRI 825 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
826 FM801_GPIO_GD(TEA_256PCPR_BUS 826 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
827 FM801_GPIO_GP(TEA_256PCPR_DAT 827 FM801_GPIO_GP(TEA_256PCPR_DATA) |
828 FM801_GPIO_GP(TEA_256PCPR_BUS 828 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
829 FM801_GPIO_GP(TEA_256PCPR_WRI 829 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
830 outw(reg, FM801_REG(chip, GPIO_CTRL)); 830 outw(reg, FM801_REG(chip, GPIO_CTRL));
831 udelay(1); 831 udelay(1);
832 832
833 while (i--) { 833 while (i--) {
834 if (val & (1 << i)) 834 if (val & (1 << i))
835 reg |= FM801_GPIO_GP(T 835 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
836 else 836 else
837 reg &= ~FM801_GPIO_GP( 837 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
838 outw(reg, FM801_REG(chip, GPIO 838 outw(reg, FM801_REG(chip, GPIO_CTRL));
839 udelay(1); 839 udelay(1);
840 reg |= FM801_GPIO_GP(TEA_256PC 840 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
841 outw(reg, FM801_REG(chip, GPIO 841 outw(reg, FM801_REG(chip, GPIO_CTRL));
842 reg &= ~FM801_GPIO_GP(TEA_256P 842 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
843 outw(reg, FM801_REG(chip, GPIO 843 outw(reg, FM801_REG(chip, GPIO_CTRL));
844 udelay(1); 844 udelay(1);
845 } 845 }
846 846
847 /* and reset the write enable bit */ 847 /* and reset the write enable bit */
848 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE 848 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
849 FM801_GPIO_GP(TEA_256PCPR_DATA) 849 FM801_GPIO_GP(TEA_256PCPR_DATA);
850 outw(reg, FM801_REG(chip, GPIO_CTRL)); 850 outw(reg, FM801_REG(chip, GPIO_CTRL));
851 spin_unlock_irq(&chip->reg_lock); 851 spin_unlock_irq(&chip->reg_lock);
852 } 852 }
853 853
854 static unsigned int snd_fm801_tea575x_256pcpr_ 854 static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea)
855 { 855 {
856 struct fm801 *chip = tea->private_data 856 struct fm801 *chip = tea->private_data;
857 unsigned short reg; 857 unsigned short reg;
858 unsigned int val = 0; 858 unsigned int val = 0;
859 int i; 859 int i;
860 860
861 spin_lock_irq(&chip->reg_lock); 861 spin_lock_irq(&chip->reg_lock);
862 reg = inw(FM801_REG(chip, GPIO_CTRL)); 862 reg = inw(FM801_REG(chip, GPIO_CTRL));
863 /* use GPIO lines, set data direction 863 /* use GPIO lines, set data direction to input */
864 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) 864 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
865 FM801_GPIO_GS(TEA_256PCPR_WRITE 865 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
866 FM801_GPIO_GS(TEA_256PCPR_BUS_C 866 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
867 FM801_GPIO_GD(TEA_256PCPR_DATA) 867 FM801_GPIO_GD(TEA_256PCPR_DATA) |
868 FM801_GPIO_GP(TEA_256PCPR_DATA) 868 FM801_GPIO_GP(TEA_256PCPR_DATA) |
869 FM801_GPIO_GP(TEA_256PCPR_WRITE 869 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
870 /* all of lines are in the write direc 870 /* all of lines are in the write direction, except data */
871 /* clear data, write enable and clock 871 /* clear data, write enable and clock lines */
872 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRI 872 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
873 FM801_GPIO_GD(TEA_256PCPR_BUS 873 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
874 FM801_GPIO_GP(TEA_256PCPR_BUS 874 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
875 875
876 for (i = 0; i < 24; i++) { 876 for (i = 0; i < 24; i++) {
877 reg &= ~FM801_GPIO_GP(TEA_256P 877 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
878 outw(reg, FM801_REG(chip, GPIO 878 outw(reg, FM801_REG(chip, GPIO_CTRL));
879 udelay(1); 879 udelay(1);
880 reg |= FM801_GPIO_GP(TEA_256PC 880 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
881 outw(reg, FM801_REG(chip, GPIO 881 outw(reg, FM801_REG(chip, GPIO_CTRL));
882 udelay(1); 882 udelay(1);
883 val <<= 1; 883 val <<= 1;
884 if (inw(FM801_REG(chip, GPIO_C 884 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
885 val |= 1; 885 val |= 1;
886 } 886 }
887 887
888 spin_unlock_irq(&chip->reg_lock); 888 spin_unlock_irq(&chip->reg_lock);
889 889
890 return val; 890 return val;
891 } 891 }
892 892
893 /* 64PCR GPIO numbers */ 893 /* 64PCR GPIO numbers */
894 #define TEA_64PCR_BUS_CLOCK 0 894 #define TEA_64PCR_BUS_CLOCK 0
895 #define TEA_64PCR_WRITE_ENABLE 1 895 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
896 #define TEA_64PCR_DATA 2 896 #define TEA_64PCR_DATA 2
897 897
898 static void snd_fm801_tea575x_64pcr_write(stru 898 static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val)
899 { 899 {
900 struct fm801 *chip = tea->private_data 900 struct fm801 *chip = tea->private_data;
901 unsigned short reg; 901 unsigned short reg;
902 int i = 25; 902 int i = 25;
903 903
904 spin_lock_irq(&chip->reg_lock); 904 spin_lock_irq(&chip->reg_lock);
905 reg = inw(FM801_REG(chip, GPIO_CTRL)); 905 reg = inw(FM801_REG(chip, GPIO_CTRL));
906 /* use GPIO lines and set write enable 906 /* use GPIO lines and set write enable bit */
907 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 907 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
908 FM801_GPIO_GS(TEA_64PCR_WRITE_E 908 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
909 FM801_GPIO_GS(TEA_64PCR_BUS_CLO 909 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
910 /* all of lines are in the write direc 910 /* all of lines are in the write direction */
911 /* clear data and clock lines */ 911 /* clear data and clock lines */
912 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) 912 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
913 FM801_GPIO_GD(TEA_64PCR_WRITE 913 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
914 FM801_GPIO_GD(TEA_64PCR_BUS_C 914 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
915 FM801_GPIO_GP(TEA_64PCR_DATA) 915 FM801_GPIO_GP(TEA_64PCR_DATA) |
916 FM801_GPIO_GP(TEA_64PCR_BUS_C 916 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
917 FM801_GPIO_GP(TEA_64PCR_WRITE 917 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
918 outw(reg, FM801_REG(chip, GPIO_CTRL)); 918 outw(reg, FM801_REG(chip, GPIO_CTRL));
919 udelay(1); 919 udelay(1);
920 920
921 while (i--) { 921 while (i--) {
922 if (val & (1 << i)) 922 if (val & (1 << i))
923 reg |= FM801_GPIO_GP(T 923 reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
924 else 924 else
925 reg &= ~FM801_GPIO_GP( 925 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
926 outw(reg, FM801_REG(chip, GPIO 926 outw(reg, FM801_REG(chip, GPIO_CTRL));
927 udelay(1); 927 udelay(1);
928 reg |= FM801_GPIO_GP(TEA_64PCR 928 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
929 outw(reg, FM801_REG(chip, GPIO 929 outw(reg, FM801_REG(chip, GPIO_CTRL));
930 reg &= ~FM801_GPIO_GP(TEA_64PC 930 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
931 outw(reg, FM801_REG(chip, GPIO 931 outw(reg, FM801_REG(chip, GPIO_CTRL));
932 udelay(1); 932 udelay(1);
933 } 933 }
934 934
935 /* and reset the write enable bit */ 935 /* and reset the write enable bit */
936 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_E 936 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
937 FM801_GPIO_GP(TEA_64PCR_DATA); 937 FM801_GPIO_GP(TEA_64PCR_DATA);
938 outw(reg, FM801_REG(chip, GPIO_CTRL)); 938 outw(reg, FM801_REG(chip, GPIO_CTRL));
939 spin_unlock_irq(&chip->reg_lock); 939 spin_unlock_irq(&chip->reg_lock);
940 } 940 }
941 941
942 static unsigned int snd_fm801_tea575x_64pcr_re 942 static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea)
943 { 943 {
944 struct fm801 *chip = tea->private_data 944 struct fm801 *chip = tea->private_data;
945 unsigned short reg; 945 unsigned short reg;
946 unsigned int val = 0; 946 unsigned int val = 0;
947 int i; 947 int i;
948 948
949 spin_lock_irq(&chip->reg_lock); 949 spin_lock_irq(&chip->reg_lock);
950 reg = inw(FM801_REG(chip, GPIO_CTRL)); 950 reg = inw(FM801_REG(chip, GPIO_CTRL));
951 /* use GPIO lines, set data direction 951 /* use GPIO lines, set data direction to input */
952 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 952 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
953 FM801_GPIO_GS(TEA_64PCR_WRITE_E 953 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
954 FM801_GPIO_GS(TEA_64PCR_BUS_CLO 954 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
955 FM801_GPIO_GD(TEA_64PCR_DATA) | 955 FM801_GPIO_GD(TEA_64PCR_DATA) |
956 FM801_GPIO_GP(TEA_64PCR_DATA) | 956 FM801_GPIO_GP(TEA_64PCR_DATA) |
957 FM801_GPIO_GP(TEA_64PCR_WRITE_E 957 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
958 /* all of lines are in the write direc 958 /* all of lines are in the write direction, except data */
959 /* clear data, write enable and clock 959 /* clear data, write enable and clock lines */
960 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE 960 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
961 FM801_GPIO_GD(TEA_64PCR_BUS_C 961 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
962 FM801_GPIO_GP(TEA_64PCR_BUS_C 962 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
963 963
964 for (i = 0; i < 24; i++) { 964 for (i = 0; i < 24; i++) {
965 reg &= ~FM801_GPIO_GP(TEA_64PC 965 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
966 outw(reg, FM801_REG(chip, GPIO 966 outw(reg, FM801_REG(chip, GPIO_CTRL));
967 udelay(1); 967 udelay(1);
968 reg |= FM801_GPIO_GP(TEA_64PCR 968 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
969 outw(reg, FM801_REG(chip, GPIO 969 outw(reg, FM801_REG(chip, GPIO_CTRL));
970 udelay(1); 970 udelay(1);
971 val <<= 1; 971 val <<= 1;
972 if (inw(FM801_REG(chip, GPIO_C 972 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
973 val |= 1; 973 val |= 1;
974 } 974 }
975 975
976 spin_unlock_irq(&chip->reg_lock); 976 spin_unlock_irq(&chip->reg_lock);
977 977
978 return val; 978 return val;
979 } 979 }
980 980
981 static void snd_fm801_tea575x_64pcr_mute(struc 981 static void snd_fm801_tea575x_64pcr_mute(struct snd_tea575x *tea,
982 unsi 982 unsigned int mute)
983 { 983 {
984 struct fm801 *chip = tea->private_data 984 struct fm801 *chip = tea->private_data;
985 unsigned short reg; 985 unsigned short reg;
986 986
987 spin_lock_irq(&chip->reg_lock); 987 spin_lock_irq(&chip->reg_lock);
988 988
989 reg = inw(FM801_REG(chip, GPIO_CTRL)); 989 reg = inw(FM801_REG(chip, GPIO_CTRL));
990 if (mute) 990 if (mute)
991 /* 0xf800 (mute) */ 991 /* 0xf800 (mute) */
992 reg &= ~FM801_GPIO_GP(TEA_64PC 992 reg &= ~FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
993 else 993 else
994 /* 0xf802 (unmute) */ 994 /* 0xf802 (unmute) */
995 reg |= FM801_GPIO_GP(TEA_64PCR 995 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
996 outw(reg, FM801_REG(chip, GPIO_CTRL)); 996 outw(reg, FM801_REG(chip, GPIO_CTRL));
997 udelay(1); 997 udelay(1);
998 998
999 spin_unlock_irq(&chip->reg_lock); 999 spin_unlock_irq(&chip->reg_lock);
1000 } 1000 }
1001 1001
1002 static struct snd_tea575x_ops snd_fm801_tea_o 1002 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
1003 { 1003 {
1004 /* 1 = MediaForte 256-PCS */ 1004 /* 1 = MediaForte 256-PCS */
1005 .write = snd_fm801_tea575x_25 1005 .write = snd_fm801_tea575x_256pcs_write,
1006 .read = snd_fm801_tea575x_256 1006 .read = snd_fm801_tea575x_256pcs_read,
1007 }, 1007 },
1008 { 1008 {
1009 /* 2 = MediaForte 256-PCPR */ 1009 /* 2 = MediaForte 256-PCPR */
1010 .write = snd_fm801_tea575x_25 1010 .write = snd_fm801_tea575x_256pcpr_write,
1011 .read = snd_fm801_tea575x_256 1011 .read = snd_fm801_tea575x_256pcpr_read,
1012 }, 1012 },
1013 { 1013 {
1014 /* 3 = MediaForte 64-PCR */ 1014 /* 3 = MediaForte 64-PCR */
1015 .write = snd_fm801_tea575x_64 1015 .write = snd_fm801_tea575x_64pcr_write,
1016 .read = snd_fm801_tea575x_64p 1016 .read = snd_fm801_tea575x_64pcr_read,
1017 .mute = snd_fm801_tea575x_64p 1017 .mute = snd_fm801_tea575x_64pcr_mute,
1018 } 1018 }
1019 }; 1019 };
1020 #endif 1020 #endif
1021 1021
1022 /* 1022 /*
1023 * Mixer routines 1023 * Mixer routines
1024 */ 1024 */
1025 1025
1026 #define FM801_SINGLE(xname, reg, shift, mask, 1026 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
1027 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name 1027 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
1028 .get = snd_fm801_get_single, .put = snd_fm8 1028 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
1029 .private_value = reg | (shift << 8) | (mask 1029 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1030 1030
1031 static int snd_fm801_info_single(struct snd_k 1031 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
1032 struct snd_c 1032 struct snd_ctl_elem_info *uinfo)
1033 { 1033 {
1034 int mask = (kcontrol->private_value > 1034 int mask = (kcontrol->private_value >> 16) & 0xff;
1035 1035
1036 uinfo->type = mask == 1 ? SNDRV_CTL_E 1036 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1037 uinfo->count = 1; 1037 uinfo->count = 1;
1038 uinfo->value.integer.min = 0; 1038 uinfo->value.integer.min = 0;
1039 uinfo->value.integer.max = mask; 1039 uinfo->value.integer.max = mask;
1040 return 0; 1040 return 0;
1041 } 1041 }
1042 1042
1043 static int snd_fm801_get_single(struct snd_kc 1043 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
1044 struct snd_ct 1044 struct snd_ctl_elem_value *ucontrol)
1045 { 1045 {
1046 struct fm801 *chip = snd_kcontrol_chi 1046 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1047 int reg = kcontrol->private_value & 0 1047 int reg = kcontrol->private_value & 0xff;
1048 int shift = (kcontrol->private_value 1048 int shift = (kcontrol->private_value >> 8) & 0xff;
1049 int mask = (kcontrol->private_value > 1049 int mask = (kcontrol->private_value >> 16) & 0xff;
1050 int invert = (kcontrol->private_value 1050 int invert = (kcontrol->private_value >> 24) & 0xff;
1051 1051
1052 ucontrol->value.integer.value[0] = (i 1052 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1053 if (invert) 1053 if (invert)
1054 ucontrol->value.integer.value 1054 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1055 return 0; 1055 return 0;
1056 } 1056 }
1057 1057
1058 static int snd_fm801_put_single(struct snd_kc 1058 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
1059 struct snd_ct 1059 struct snd_ctl_elem_value *ucontrol)
1060 { 1060 {
1061 struct fm801 *chip = snd_kcontrol_chi 1061 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1062 int reg = kcontrol->private_value & 0 1062 int reg = kcontrol->private_value & 0xff;
1063 int shift = (kcontrol->private_value 1063 int shift = (kcontrol->private_value >> 8) & 0xff;
1064 int mask = (kcontrol->private_value > 1064 int mask = (kcontrol->private_value >> 16) & 0xff;
1065 int invert = (kcontrol->private_value 1065 int invert = (kcontrol->private_value >> 24) & 0xff;
1066 unsigned short val; 1066 unsigned short val;
1067 1067
1068 val = (ucontrol->value.integer.value[ 1068 val = (ucontrol->value.integer.value[0] & mask);
1069 if (invert) 1069 if (invert)
1070 val = mask - val; 1070 val = mask - val;
1071 return snd_fm801_update_bits(chip, re 1071 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1072 } 1072 }
1073 1073
1074 #define FM801_DOUBLE(xname, reg, shift_left, 1074 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1075 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name 1075 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1076 .get = snd_fm801_get_double, .put = snd_fm8 1076 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1077 .private_value = reg | (shift_left << 8) | 1077 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1078 #define FM801_DOUBLE_TLV(xname, reg, shift_le 1078 #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
1079 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1079 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1080 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1080 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1081 .name = xname, .info = snd_fm801_info_doubl 1081 .name = xname, .info = snd_fm801_info_double, \
1082 .get = snd_fm801_get_double, .put = snd_fm8 1082 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1083 .private_value = reg | (shift_left << 8) | 1083 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
1084 .tlv = { .p = (xtlv) } } 1084 .tlv = { .p = (xtlv) } }
1085 1085
1086 static int snd_fm801_info_double(struct snd_k 1086 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
1087 struct snd_c 1087 struct snd_ctl_elem_info *uinfo)
1088 { 1088 {
1089 int mask = (kcontrol->private_value > 1089 int mask = (kcontrol->private_value >> 16) & 0xff;
1090 1090
1091 uinfo->type = mask == 1 ? SNDRV_CTL_E 1091 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1092 uinfo->count = 2; 1092 uinfo->count = 2;
1093 uinfo->value.integer.min = 0; 1093 uinfo->value.integer.min = 0;
1094 uinfo->value.integer.max = mask; 1094 uinfo->value.integer.max = mask;
1095 return 0; 1095 return 0;
1096 } 1096 }
1097 1097
1098 static int snd_fm801_get_double(struct snd_kc 1098 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
1099 struct snd_ct 1099 struct snd_ctl_elem_value *ucontrol)
1100 { 1100 {
1101 struct fm801 *chip = snd_kcontrol_chi 1101 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1102 int reg = kcontrol->private_value & 0 1102 int reg = kcontrol->private_value & 0xff;
1103 int shift_left = (kcontrol->private_v 1103 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1104 int shift_right = (kcontrol->private_ 1104 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1105 int mask = (kcontrol->private_value > 1105 int mask = (kcontrol->private_value >> 16) & 0xff;
1106 int invert = (kcontrol->private_value 1106 int invert = (kcontrol->private_value >> 24) & 0xff;
1107 1107
1108 spin_lock_irq(&chip->reg_lock); 1108 spin_lock_irq(&chip->reg_lock);
1109 ucontrol->value.integer.value[0] = (i 1109 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1110 ucontrol->value.integer.value[1] = (i 1110 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1111 spin_unlock_irq(&chip->reg_lock); 1111 spin_unlock_irq(&chip->reg_lock);
1112 if (invert) { 1112 if (invert) {
1113 ucontrol->value.integer.value 1113 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1114 ucontrol->value.integer.value 1114 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1115 } 1115 }
1116 return 0; 1116 return 0;
1117 } 1117 }
1118 1118
1119 static int snd_fm801_put_double(struct snd_kc 1119 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
1120 struct snd_ct 1120 struct snd_ctl_elem_value *ucontrol)
1121 { 1121 {
1122 struct fm801 *chip = snd_kcontrol_chi 1122 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1123 int reg = kcontrol->private_value & 0 1123 int reg = kcontrol->private_value & 0xff;
1124 int shift_left = (kcontrol->private_v 1124 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1125 int shift_right = (kcontrol->private_ 1125 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1126 int mask = (kcontrol->private_value > 1126 int mask = (kcontrol->private_value >> 16) & 0xff;
1127 int invert = (kcontrol->private_value 1127 int invert = (kcontrol->private_value >> 24) & 0xff;
1128 unsigned short val1, val2; 1128 unsigned short val1, val2;
1129 1129
1130 val1 = ucontrol->value.integer.value[ 1130 val1 = ucontrol->value.integer.value[0] & mask;
1131 val2 = ucontrol->value.integer.value[ 1131 val2 = ucontrol->value.integer.value[1] & mask;
1132 if (invert) { 1132 if (invert) {
1133 val1 = mask - val1; 1133 val1 = mask - val1;
1134 val2 = mask - val2; 1134 val2 = mask - val2;
1135 } 1135 }
1136 return snd_fm801_update_bits(chip, re 1136 return snd_fm801_update_bits(chip, reg,
1137 (mask << 1137 (mask << shift_left) | (mask << shift_right),
1138 (val1 << 1138 (val1 << shift_left ) | (val2 << shift_right));
1139 } 1139 }
1140 1140
1141 static int snd_fm801_info_mux(struct snd_kcon 1141 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
1142 struct snd_ctl_ 1142 struct snd_ctl_elem_info *uinfo)
1143 { 1143 {
1144 static char *texts[5] = { 1144 static char *texts[5] = {
1145 "AC97 Primary", "FM", "I2S", 1145 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1146 }; 1146 };
1147 1147
1148 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENU 1148 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1149 uinfo->count = 1; 1149 uinfo->count = 1;
1150 uinfo->value.enumerated.items = 5; 1150 uinfo->value.enumerated.items = 5;
1151 if (uinfo->value.enumerated.item > 4) 1151 if (uinfo->value.enumerated.item > 4)
1152 uinfo->value.enumerated.item 1152 uinfo->value.enumerated.item = 4;
1153 strcpy(uinfo->value.enumerated.name, 1153 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1154 return 0; 1154 return 0;
1155 } 1155 }
1156 1156
1157 static int snd_fm801_get_mux(struct snd_kcont 1157 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
1158 struct snd_ctl_e 1158 struct snd_ctl_elem_value *ucontrol)
1159 { 1159 {
1160 struct fm801 *chip = snd_kcontrol_chi 1160 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1161 unsigned short val; 1161 unsigned short val;
1162 1162
1163 val = inw(FM801_REG(chip, REC_SRC)) & 1163 val = inw(FM801_REG(chip, REC_SRC)) & 7;
1164 if (val > 4) 1164 if (val > 4)
1165 val = 4; 1165 val = 4;
1166 ucontrol->value.enumerated.item[0] = 1166 ucontrol->value.enumerated.item[0] = val;
1167 return 0; 1167 return 0;
1168 } 1168 }
1169 1169
1170 static int snd_fm801_put_mux(struct snd_kcont 1170 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
1171 struct snd_ctl_e 1171 struct snd_ctl_elem_value *ucontrol)
1172 { 1172 {
1173 struct fm801 *chip = snd_kcontrol_chi 1173 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1174 unsigned short val; 1174 unsigned short val;
1175 1175
1176 if ((val = ucontrol->value.enumerated 1176 if ((val = ucontrol->value.enumerated.item[0]) > 4)
1177 return -EINVAL; 1177 return -EINVAL;
1178 return snd_fm801_update_bits(chip, FM 1178 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1179 } 1179 }
1180 1180
1181 static const DECLARE_TLV_DB_SCALE(db_scale_ds 1181 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
1182 1182
1183 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_c 1183 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1184 1184
1185 static struct snd_kcontrol_new snd_fm801_cont 1185 static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = {
1186 FM801_DOUBLE_TLV("Wave Playback Volume", FM80 1186 FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1187 db_scale_dsp), 1187 db_scale_dsp),
1188 FM801_SINGLE("Wave Playback Switch", FM801_PC 1188 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1189 FM801_DOUBLE_TLV("I2S Playback Volume", FM801 1189 FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1190 db_scale_dsp), 1190 db_scale_dsp),
1191 FM801_SINGLE("I2S Playback Switch", FM801_I2S 1191 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1192 FM801_DOUBLE_TLV("FM Playback Volume", FM801_ 1192 FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1193 db_scale_dsp), 1193 db_scale_dsp),
1194 FM801_SINGLE("FM Playback Switch", FM801_FM_V 1194 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1195 { 1195 {
1196 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1196 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1197 .name = "Digital Capture Source", 1197 .name = "Digital Capture Source",
1198 .info = snd_fm801_info_mux, 1198 .info = snd_fm801_info_mux,
1199 .get = snd_fm801_get_mux, 1199 .get = snd_fm801_get_mux,
1200 .put = snd_fm801_put_mux, 1200 .put = snd_fm801_put_mux,
1201 } 1201 }
1202 }; 1202 };
1203 1203
1204 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_f 1204 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1205 1205
1206 static struct snd_kcontrol_new snd_fm801_cont 1206 static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = {
1207 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM8 1207 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1208 FM801_SINGLE("AC97 18-bit Switch", FM801_CODE 1208 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1209 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE 1209 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1210 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data 1210 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1211 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data 1211 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1212 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBAC 1212 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1213 }; 1213 };
1214 1214
1215 static void snd_fm801_mixer_free_ac97_bus(str 1215 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1216 { 1216 {
1217 struct fm801 *chip = bus->private_dat 1217 struct fm801 *chip = bus->private_data;
1218 chip->ac97_bus = NULL; 1218 chip->ac97_bus = NULL;
1219 } 1219 }
1220 1220
1221 static void snd_fm801_mixer_free_ac97(struct 1221 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1222 { 1222 {
1223 struct fm801 *chip = ac97->private_da 1223 struct fm801 *chip = ac97->private_data;
1224 if (ac97->num == 0) { 1224 if (ac97->num == 0) {
1225 chip->ac97 = NULL; 1225 chip->ac97 = NULL;
1226 } else { 1226 } else {
1227 chip->ac97_sec = NULL; 1227 chip->ac97_sec = NULL;
1228 } 1228 }
1229 } 1229 }
1230 1230
1231 static int __devinit snd_fm801_mixer(struct f 1231 static int __devinit snd_fm801_mixer(struct fm801 *chip)
1232 { 1232 {
1233 struct snd_ac97_template ac97; 1233 struct snd_ac97_template ac97;
1234 unsigned int i; 1234 unsigned int i;
1235 int err; 1235 int err;
1236 static struct snd_ac97_bus_ops ops = 1236 static struct snd_ac97_bus_ops ops = {
1237 .write = snd_fm801_codec_writ 1237 .write = snd_fm801_codec_write,
1238 .read = snd_fm801_codec_read, 1238 .read = snd_fm801_codec_read,
1239 }; 1239 };
1240 1240
1241 if ((err = snd_ac97_bus(chip->card, 0 1241 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1242 return err; 1242 return err;
1243 chip->ac97_bus->private_free = snd_fm 1243 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1244 1244
1245 memset(&ac97, 0, sizeof(ac97)); 1245 memset(&ac97, 0, sizeof(ac97));
1246 ac97.private_data = chip; 1246 ac97.private_data = chip;
1247 ac97.private_free = snd_fm801_mixer_f 1247 ac97.private_free = snd_fm801_mixer_free_ac97;
1248 if ((err = snd_ac97_mixer(chip->ac97_ 1248 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1249 return err; 1249 return err;
1250 if (chip->secondary) { 1250 if (chip->secondary) {
1251 ac97.num = 1; 1251 ac97.num = 1;
1252 ac97.addr = chip->secondary_a 1252 ac97.addr = chip->secondary_addr;
1253 if ((err = snd_ac97_mixer(chi 1253 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1254 return err; 1254 return err;
1255 } 1255 }
1256 for (i = 0; i < FM801_CONTROLS; i++) 1256 for (i = 0; i < FM801_CONTROLS; i++)
1257 snd_ctl_add(chip->card, snd_c 1257 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1258 if (chip->multichannel) { 1258 if (chip->multichannel) {
1259 for (i = 0; i < FM801_CONTROL 1259 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1260 snd_ctl_add(chip->car 1260 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1261 } 1261 }
1262 return 0; 1262 return 0;
1263 } 1263 }
1264 1264
1265 /* 1265 /*
1266 * initialization routines 1266 * initialization routines
1267 */ 1267 */
1268 1268
1269 static int wait_for_codec(struct fm801 *chip, 1269 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1270 unsigned short reg, 1270 unsigned short reg, unsigned long waits)
1271 { 1271 {
1272 unsigned long timeout = jiffies + wai 1272 unsigned long timeout = jiffies + waits;
1273 1273
1274 outw(FM801_AC97_READ | (codec_id << F 1274 outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg,
1275 FM801_REG(chip, AC97_CMD)); 1275 FM801_REG(chip, AC97_CMD));
1276 udelay(5); 1276 udelay(5);
1277 do { 1277 do {
1278 if ((inw(FM801_REG(chip, AC97 1278 if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY))
1279 == FM801_AC97_VALID) 1279 == FM801_AC97_VALID)
1280 return 0; 1280 return 0;
1281 schedule_timeout_uninterrupti 1281 schedule_timeout_uninterruptible(1);
1282 } while (time_after(timeout, jiffies) 1282 } while (time_after(timeout, jiffies));
1283 return -EIO; 1283 return -EIO;
1284 } 1284 }
1285 1285
1286 static int snd_fm801_chip_init(struct fm801 * 1286 static int snd_fm801_chip_init(struct fm801 *chip, int resume)
1287 { 1287 {
>> 1288 int id;
1288 unsigned short cmdw; 1289 unsigned short cmdw;
1289 1290
1290 if (chip->tea575x_tuner & 0x0010) 1291 if (chip->tea575x_tuner & 0x0010)
1291 goto __ac97_ok; 1292 goto __ac97_ok;
1292 1293
1293 /* codec cold reset + AC'97 warm rese 1294 /* codec cold reset + AC'97 warm reset */
1294 outw((1<<5) | (1<<6), FM801_REG(chip, 1295 outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL));
1295 inw(FM801_REG(chip, CODEC_CTRL)); /* 1296 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1296 udelay(100); 1297 udelay(100);
1297 outw(0, FM801_REG(chip, CODEC_CTRL)); 1298 outw(0, FM801_REG(chip, CODEC_CTRL));
1298 1299
1299 if (wait_for_codec(chip, 0, AC97_RESE 1300 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) {
1300 snd_printk(KERN_ERR "Primary 1301 snd_printk(KERN_ERR "Primary AC'97 codec not found\n");
1301 if (! resume) 1302 if (! resume)
1302 return -EIO; 1303 return -EIO;
1303 } 1304 }
1304 1305
1305 if (chip->multichannel) { 1306 if (chip->multichannel) {
1306 if (chip->secondary_addr) { 1307 if (chip->secondary_addr) {
1307 wait_for_codec(chip, 1308 wait_for_codec(chip, chip->secondary_addr,
1308 AC97_V 1309 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1309 } else { 1310 } else {
1310 /* my card has the se 1311 /* my card has the secondary codec */
1311 /* at address #3, so 1312 /* at address #3, so the loop is inverted */
1312 int i; !! 1313 for (id = 3; id > 0; id--) {
1313 for (i = 3; i > 0; i- !! 1314 if (! wait_for_codec(chip, id, AC97_VENDOR_ID1,
1314 if (!wait_for <<
1315 1315 msecs_to_jiffies(50))) {
1316 cmdw 1316 cmdw = inw(FM801_REG(chip, AC97_DATA));
1317 if (c 1317 if (cmdw != 0xffff && cmdw != 0) {
1318 1318 chip->secondary = 1;
1319 !! 1319 chip->secondary_addr = id;
1320 1320 break;
1321 } 1321 }
1322 } 1322 }
1323 } 1323 }
1324 } 1324 }
1325 1325
1326 /* the recovery phase, it see 1326 /* the recovery phase, it seems that probing for non-existing codec might */
1327 /* cause timeout problems */ 1327 /* cause timeout problems */
1328 wait_for_codec(chip, 0, AC97_ 1328 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1329 } 1329 }
1330 1330
1331 __ac97_ok: 1331 __ac97_ok:
1332 1332
1333 /* init volume */ 1333 /* init volume */
1334 outw(0x0808, FM801_REG(chip, PCM_VOL) 1334 outw(0x0808, FM801_REG(chip, PCM_VOL));
1335 outw(0x9f1f, FM801_REG(chip, FM_VOL)) 1335 outw(0x9f1f, FM801_REG(chip, FM_VOL));
1336 outw(0x8808, FM801_REG(chip, I2S_VOL) 1336 outw(0x8808, FM801_REG(chip, I2S_VOL));
1337 1337
1338 /* I2S control - I2S mode */ 1338 /* I2S control - I2S mode */
1339 outw(0x0003, FM801_REG(chip, I2S_MODE 1339 outw(0x0003, FM801_REG(chip, I2S_MODE));
1340 1340
1341 /* interrupt setup */ 1341 /* interrupt setup */
1342 cmdw = inw(FM801_REG(chip, IRQ_MASK)) 1342 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1343 if (chip->irq < 0) 1343 if (chip->irq < 0)
1344 cmdw |= 0x00c3; /* ma 1344 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
1345 else 1345 else
1346 cmdw &= ~0x0083; /* un 1346 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
1347 outw(cmdw, FM801_REG(chip, IRQ_MASK)) 1347 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1348 1348
1349 /* interrupt clear */ 1349 /* interrupt clear */
1350 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAP 1350 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1351 1351
1352 return 0; 1352 return 0;
1353 } 1353 }
1354 1354
1355 1355
1356 static int snd_fm801_free(struct fm801 *chip) 1356 static int snd_fm801_free(struct fm801 *chip)
1357 { 1357 {
1358 unsigned short cmdw; 1358 unsigned short cmdw;
1359 1359
1360 if (chip->irq < 0) 1360 if (chip->irq < 0)
1361 goto __end_hw; 1361 goto __end_hw;
1362 1362
1363 /* interrupt setup - mask everything 1363 /* interrupt setup - mask everything */
1364 cmdw = inw(FM801_REG(chip, IRQ_MASK)) 1364 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1365 cmdw |= 0x00c3; 1365 cmdw |= 0x00c3;
1366 outw(cmdw, FM801_REG(chip, IRQ_MASK)) 1366 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1367 1367
1368 __end_hw: 1368 __end_hw:
1369 #ifdef TEA575X_RADIO 1369 #ifdef TEA575X_RADIO
1370 snd_tea575x_exit(&chip->tea); 1370 snd_tea575x_exit(&chip->tea);
1371 #endif 1371 #endif
1372 if (chip->irq >= 0) 1372 if (chip->irq >= 0)
1373 free_irq(chip->irq, chip); 1373 free_irq(chip->irq, chip);
1374 pci_release_regions(chip->pci); 1374 pci_release_regions(chip->pci);
1375 pci_disable_device(chip->pci); 1375 pci_disable_device(chip->pci);
1376 1376
1377 kfree(chip); 1377 kfree(chip);
1378 return 0; 1378 return 0;
1379 } 1379 }
1380 1380
1381 static int snd_fm801_dev_free(struct snd_devi 1381 static int snd_fm801_dev_free(struct snd_device *device)
1382 { 1382 {
1383 struct fm801 *chip = device->device_d 1383 struct fm801 *chip = device->device_data;
1384 return snd_fm801_free(chip); 1384 return snd_fm801_free(chip);
1385 } 1385 }
1386 1386
1387 static int __devinit snd_fm801_create(struct 1387 static int __devinit snd_fm801_create(struct snd_card *card,
1388 struct 1388 struct pci_dev * pci,
1389 int tea 1389 int tea575x_tuner,
1390 struct 1390 struct fm801 ** rchip)
1391 { 1391 {
1392 struct fm801 *chip; 1392 struct fm801 *chip;
1393 int err; 1393 int err;
1394 static struct snd_device_ops ops = { 1394 static struct snd_device_ops ops = {
1395 .dev_free = snd_fm801_dev 1395 .dev_free = snd_fm801_dev_free,
1396 }; 1396 };
1397 1397
1398 *rchip = NULL; 1398 *rchip = NULL;
1399 if ((err = pci_enable_device(pci)) < 1399 if ((err = pci_enable_device(pci)) < 0)
1400 return err; 1400 return err;
1401 chip = kzalloc(sizeof(*chip), GFP_KER 1401 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1402 if (chip == NULL) { 1402 if (chip == NULL) {
1403 pci_disable_device(pci); 1403 pci_disable_device(pci);
1404 return -ENOMEM; 1404 return -ENOMEM;
1405 } 1405 }
1406 spin_lock_init(&chip->reg_lock); 1406 spin_lock_init(&chip->reg_lock);
1407 chip->card = card; 1407 chip->card = card;
1408 chip->pci = pci; 1408 chip->pci = pci;
1409 chip->irq = -1; 1409 chip->irq = -1;
1410 chip->tea575x_tuner = tea575x_tuner; 1410 chip->tea575x_tuner = tea575x_tuner;
1411 if ((err = pci_request_regions(pci, " 1411 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1412 kfree(chip); 1412 kfree(chip);
1413 pci_disable_device(pci); 1413 pci_disable_device(pci);
1414 return err; 1414 return err;
1415 } 1415 }
1416 chip->port = pci_resource_start(pci, 1416 chip->port = pci_resource_start(pci, 0);
1417 if ((tea575x_tuner & 0x0010) == 0) { 1417 if ((tea575x_tuner & 0x0010) == 0) {
1418 if (request_irq(pci->irq, snd 1418 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_SHARED,
1419 "FM801", chip 1419 "FM801", chip)) {
1420 snd_printk(KERN_ERR " 1420 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq);
1421 snd_fm801_free(chip); 1421 snd_fm801_free(chip);
1422 return -EBUSY; 1422 return -EBUSY;
1423 } 1423 }
1424 chip->irq = pci->irq; 1424 chip->irq = pci->irq;
1425 pci_set_master(pci); 1425 pci_set_master(pci);
1426 } 1426 }
1427 1427
1428 if (pci->revision >= 0xb1) /* FM 1428 if (pci->revision >= 0xb1) /* FM801-AU */
1429 chip->multichannel = 1; 1429 chip->multichannel = 1;
1430 1430
1431 snd_fm801_chip_init(chip, 0); 1431 snd_fm801_chip_init(chip, 0);
1432 1432
1433 if ((err = snd_device_new(card, SNDRV 1433 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1434 snd_fm801_free(chip); 1434 snd_fm801_free(chip);
1435 return err; 1435 return err;
1436 } 1436 }
1437 1437
1438 snd_card_set_dev(card, &pci->dev); 1438 snd_card_set_dev(card, &pci->dev);
1439 1439
1440 #ifdef TEA575X_RADIO 1440 #ifdef TEA575X_RADIO
1441 if (tea575x_tuner > 0 && (tea575x_tun 1441 if (tea575x_tuner > 0 && (tea575x_tuner & 0x000f) < 4) {
1442 chip->tea.dev_nr = tea575x_tu 1442 chip->tea.dev_nr = tea575x_tuner >> 16;
1443 chip->tea.card = card; 1443 chip->tea.card = card;
1444 chip->tea.freq_fixup = 10700; 1444 chip->tea.freq_fixup = 10700;
1445 chip->tea.private_data = chip 1445 chip->tea.private_data = chip;
1446 chip->tea.ops = &snd_fm801_te 1446 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0x000f) - 1];
1447 snd_tea575x_init(&chip->tea); 1447 snd_tea575x_init(&chip->tea);
1448 } 1448 }
1449 #endif 1449 #endif
1450 1450
1451 *rchip = chip; 1451 *rchip = chip;
1452 return 0; 1452 return 0;
1453 } 1453 }
1454 1454
1455 static int __devinit snd_card_fm801_probe(str 1455 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1456 con 1456 const struct pci_device_id *pci_id)
1457 { 1457 {
1458 static int dev; 1458 static int dev;
1459 struct snd_card *card; 1459 struct snd_card *card;
1460 struct fm801 *chip; 1460 struct fm801 *chip;
1461 struct snd_opl3 *opl3; 1461 struct snd_opl3 *opl3;
1462 int err; 1462 int err;
1463 1463
1464 if (dev >= SNDRV_CARDS) 1464 if (dev >= SNDRV_CARDS)
1465 return -ENODEV; 1465 return -ENODEV;
1466 if (!enable[dev]) { 1466 if (!enable[dev]) {
1467 dev++; 1467 dev++;
1468 return -ENOENT; 1468 return -ENOENT;
1469 } 1469 }
1470 1470
1471 err = snd_card_create(index[dev], id[ !! 1471 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1472 if (err < 0) !! 1472 if (card == NULL)
1473 return err; !! 1473 return -ENOMEM;
1474 if ((err = snd_fm801_create(card, pci 1474 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1475 snd_card_free(card); 1475 snd_card_free(card);
1476 return err; 1476 return err;
1477 } 1477 }
1478 card->private_data = chip; 1478 card->private_data = chip;
1479 1479
1480 strcpy(card->driver, "FM801"); 1480 strcpy(card->driver, "FM801");
1481 strcpy(card->shortname, "ForteMedia F 1481 strcpy(card->shortname, "ForteMedia FM801-");
1482 strcat(card->shortname, chip->multich 1482 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1483 sprintf(card->longname, "%s at 0x%lx, 1483 sprintf(card->longname, "%s at 0x%lx, irq %i",
1484 card->shortname, chip->port, 1484 card->shortname, chip->port, chip->irq);
1485 1485
1486 if (tea575x_tuner[dev] & 0x0010) 1486 if (tea575x_tuner[dev] & 0x0010)
1487 goto __fm801_tuner_only; 1487 goto __fm801_tuner_only;
1488 1488
1489 if ((err = snd_fm801_pcm(chip, 0, NUL 1489 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1490 snd_card_free(card); 1490 snd_card_free(card);
1491 return err; 1491 return err;
1492 } 1492 }
1493 if ((err = snd_fm801_mixer(chip)) < 0 1493 if ((err = snd_fm801_mixer(chip)) < 0) {
1494 snd_card_free(card); 1494 snd_card_free(card);
1495 return err; 1495 return err;
1496 } 1496 }
1497 if ((err = snd_mpu401_uart_new(card, 1497 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1498 FM801_ 1498 FM801_REG(chip, MPU401_DATA),
1499 MPU401 1499 MPU401_INFO_INTEGRATED,
1500 chip-> 1500 chip->irq, 0, &chip->rmidi)) < 0) {
1501 snd_card_free(card); 1501 snd_card_free(card);
1502 return err; 1502 return err;
1503 } 1503 }
1504 if ((err = snd_opl3_create(card, FM80 1504 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1505 FM801_REG( 1505 FM801_REG(chip, OPL3_BANK1),
1506 OPL3_HW_OP 1506 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1507 snd_card_free(card); 1507 snd_card_free(card);
1508 return err; 1508 return err;
1509 } 1509 }
1510 if ((err = snd_opl3_hwdep_new(opl3, 0 1510 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1511 snd_card_free(card); 1511 snd_card_free(card);
1512 return err; 1512 return err;
1513 } 1513 }
1514 1514
1515 __fm801_tuner_only: 1515 __fm801_tuner_only:
1516 if ((err = snd_card_register(card)) < 1516 if ((err = snd_card_register(card)) < 0) {
1517 snd_card_free(card); 1517 snd_card_free(card);
1518 return err; 1518 return err;
1519 } 1519 }
1520 pci_set_drvdata(pci, card); 1520 pci_set_drvdata(pci, card);
1521 dev++; 1521 dev++;
1522 return 0; 1522 return 0;
1523 } 1523 }
1524 1524
1525 static void __devexit snd_card_fm801_remove(s 1525 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1526 { 1526 {
1527 snd_card_free(pci_get_drvdata(pci)); 1527 snd_card_free(pci_get_drvdata(pci));
1528 pci_set_drvdata(pci, NULL); 1528 pci_set_drvdata(pci, NULL);
1529 } 1529 }
1530 1530
1531 #ifdef CONFIG_PM 1531 #ifdef CONFIG_PM
1532 static unsigned char saved_regs[] = { 1532 static unsigned char saved_regs[] = {
1533 FM801_PCM_VOL, FM801_I2S_VOL, FM801_F 1533 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1534 FM801_PLY_CTRL, FM801_PLY_COUNT, FM80 1534 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1535 FM801_CAP_CTRL, FM801_CAP_COUNT, FM80 1535 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1536 FM801_CODEC_CTRL, FM801_I2S_MODE, FM8 1536 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1537 }; 1537 };
1538 1538
1539 static int snd_fm801_suspend(struct pci_dev * 1539 static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state)
1540 { 1540 {
1541 struct snd_card *card = pci_get_drvda 1541 struct snd_card *card = pci_get_drvdata(pci);
1542 struct fm801 *chip = card->private_da 1542 struct fm801 *chip = card->private_data;
1543 int i; 1543 int i;
1544 1544
1545 snd_power_change_state(card, SNDRV_CT 1545 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1546 snd_pcm_suspend_all(chip->pcm); 1546 snd_pcm_suspend_all(chip->pcm);
1547 snd_ac97_suspend(chip->ac97); 1547 snd_ac97_suspend(chip->ac97);
1548 snd_ac97_suspend(chip->ac97_sec); 1548 snd_ac97_suspend(chip->ac97_sec);
1549 for (i = 0; i < ARRAY_SIZE(saved_regs 1549 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1550 chip->saved_regs[i] = inw(chi 1550 chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
1551 /* FIXME: tea575x suspend */ 1551 /* FIXME: tea575x suspend */
1552 1552
1553 pci_disable_device(pci); 1553 pci_disable_device(pci);
1554 pci_save_state(pci); 1554 pci_save_state(pci);
1555 pci_set_power_state(pci, pci_choose_s 1555 pci_set_power_state(pci, pci_choose_state(pci, state));
1556 return 0; 1556 return 0;
1557 } 1557 }
1558 1558
1559 static int snd_fm801_resume(struct pci_dev *p 1559 static int snd_fm801_resume(struct pci_dev *pci)
1560 { 1560 {
1561 struct snd_card *card = pci_get_drvda 1561 struct snd_card *card = pci_get_drvdata(pci);
1562 struct fm801 *chip = card->private_da 1562 struct fm801 *chip = card->private_data;
1563 int i; 1563 int i;
1564 1564
1565 pci_set_power_state(pci, PCI_D0); 1565 pci_set_power_state(pci, PCI_D0);
1566 pci_restore_state(pci); 1566 pci_restore_state(pci);
1567 if (pci_enable_device(pci) < 0) { 1567 if (pci_enable_device(pci) < 0) {
1568 printk(KERN_ERR "fm801: pci_e 1568 printk(KERN_ERR "fm801: pci_enable_device failed, "
1569 "disabling device\n"); 1569 "disabling device\n");
1570 snd_card_disconnect(card); 1570 snd_card_disconnect(card);
1571 return -EIO; 1571 return -EIO;
1572 } 1572 }
1573 pci_set_master(pci); 1573 pci_set_master(pci);
1574 1574
1575 snd_fm801_chip_init(chip, 1); 1575 snd_fm801_chip_init(chip, 1);
1576 snd_ac97_resume(chip->ac97); 1576 snd_ac97_resume(chip->ac97);
1577 snd_ac97_resume(chip->ac97_sec); 1577 snd_ac97_resume(chip->ac97_sec);
1578 for (i = 0; i < ARRAY_SIZE(saved_regs 1578 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1579 outw(chip->saved_regs[i], chi 1579 outw(chip->saved_regs[i], chip->port + saved_regs[i]);
1580 1580
1581 snd_power_change_state(card, SNDRV_CT 1581 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1582 return 0; 1582 return 0;
1583 } 1583 }
1584 #endif 1584 #endif
1585 1585
1586 static struct pci_driver driver = { 1586 static struct pci_driver driver = {
1587 .name = "FM801", 1587 .name = "FM801",
1588 .id_table = snd_fm801_ids, 1588 .id_table = snd_fm801_ids,
1589 .probe = snd_card_fm801_probe, 1589 .probe = snd_card_fm801_probe,
1590 .remove = __devexit_p(snd_card_fm801_ 1590 .remove = __devexit_p(snd_card_fm801_remove),
1591 #ifdef CONFIG_PM 1591 #ifdef CONFIG_PM
1592 .suspend = snd_fm801_suspend, 1592 .suspend = snd_fm801_suspend,
1593 .resume = snd_fm801_resume, 1593 .resume = snd_fm801_resume,
1594 #endif 1594 #endif
1595 }; 1595 };
1596 1596
1597 static int __init alsa_card_fm801_init(void) 1597 static int __init alsa_card_fm801_init(void)
1598 { 1598 {
1599 return pci_register_driver(&driver); 1599 return pci_register_driver(&driver);
1600 } 1600 }
1601 1601
1602 static void __exit alsa_card_fm801_exit(void) 1602 static void __exit alsa_card_fm801_exit(void)
1603 { 1603 {
1604 pci_unregister_driver(&driver); 1604 pci_unregister_driver(&driver);
1605 } 1605 }
1606 1606
1607 module_init(alsa_card_fm801_init) 1607 module_init(alsa_card_fm801_init)
1608 module_exit(alsa_card_fm801_exit) 1608 module_exit(alsa_card_fm801_exit)
1609 1609
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