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1 /* 1 /*
2 * The driver for the ForteMedia FM801 based 2 * The driver for the ForteMedia FM801 based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@pe !! 3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * 4 *
5 * Support FM only card by Andy Shevchenko <a <<
6 * 5 *
7 * This program is free software; you can re 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Pub 7 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either vers 8 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version. 9 * (at your option) any later version.
11 * 10 *
12 * This program is distributed in the hope t 11 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even th 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICUL 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more detai 14 * GNU General Public License for more details.
16 * 15 *
17 * You should have received a copy of the GN 16 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to 17 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 * 19 *
21 */ 20 */
22 21
>> 22 #include <sound/driver.h>
23 #include <linux/delay.h> 23 #include <linux/delay.h>
24 #include <linux/init.h> 24 #include <linux/init.h>
25 #include <linux/interrupt.h> 25 #include <linux/interrupt.h>
26 #include <linux/pci.h> 26 #include <linux/pci.h>
27 #include <linux/slab.h> 27 #include <linux/slab.h>
28 #include <linux/moduleparam.h> 28 #include <linux/moduleparam.h>
29 #include <sound/core.h> 29 #include <sound/core.h>
30 #include <sound/pcm.h> 30 #include <sound/pcm.h>
31 #include <sound/tlv.h> <<
32 #include <sound/ac97_codec.h> 31 #include <sound/ac97_codec.h>
33 #include <sound/mpu401.h> 32 #include <sound/mpu401.h>
34 #include <sound/opl3.h> 33 #include <sound/opl3.h>
35 #include <sound/initval.h> 34 #include <sound/initval.h>
36 35
37 #include <asm/io.h> 36 #include <asm/io.h>
38 37
39 #ifdef CONFIG_SND_FM801_TEA575X_BOOL !! 38 #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
40 #include <sound/tea575x-tuner.h> 39 #include <sound/tea575x-tuner.h>
41 #define TEA575X_RADIO 1 40 #define TEA575X_RADIO 1
42 #endif 41 #endif
43 42
44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz !! 43 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
45 MODULE_DESCRIPTION("ForteMedia FM801"); 44 MODULE_DESCRIPTION("ForteMedia FM801");
46 MODULE_LICENSE("GPL"); 45 MODULE_LICENSE("GPL");
47 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," 46 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
48 "{Genius,SoundMaker Live 5.1}} 47 "{Genius,SoundMaker Live 5.1}}");
49 48
50 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_ 49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_S 50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
52 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT 51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
53 /* 52 /*
54 * Enable TEA575x tuner 53 * Enable TEA575x tuner
55 * 1 = MediaForte 256-PCS 54 * 1 = MediaForte 256-PCS
56 * 2 = MediaForte 256-PCPR 55 * 2 = MediaForte 256-PCPR
57 * 3 = MediaForte 64-PCR 56 * 3 = MediaForte 64-PCR
58 * 16 = setup tuner only (this is additional <<
59 * High 16-bits are video (radio) device numb 57 * High 16-bits are video (radio) device number + 1
60 */ 58 */
61 static int tea575x_tuner[SNDRV_CARDS]; !! 59 static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
62 60
63 module_param_array(index, int, NULL, 0444); 61 module_param_array(index, int, NULL, 0444);
64 MODULE_PARM_DESC(index, "Index value for the F 62 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
65 module_param_array(id, charp, NULL, 0444); 63 module_param_array(id, charp, NULL, 0444);
66 MODULE_PARM_DESC(id, "ID string for the FM801 64 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
67 module_param_array(enable, bool, NULL, 0444); 65 module_param_array(enable, bool, NULL, 0444);
68 MODULE_PARM_DESC(enable, "Enable FM801 soundca 66 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
69 module_param_array(tea575x_tuner, int, NULL, 0 !! 67 module_param_array(tea575x_tuner, bool, NULL, 0444);
70 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575 68 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
71 69
72 /* 70 /*
73 * Direct registers 71 * Direct registers
74 */ 72 */
75 73
76 #define FM801_REG(chip, reg) (chip->port + 74 #define FM801_REG(chip, reg) (chip->port + FM801_##reg)
77 75
78 #define FM801_PCM_VOL 0x00 /* PCM 76 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
79 #define FM801_FM_VOL 0x02 /* FM 77 #define FM801_FM_VOL 0x02 /* FM Output Volume */
80 #define FM801_I2S_VOL 0x04 /* I2S 78 #define FM801_I2S_VOL 0x04 /* I2S Volume */
81 #define FM801_REC_SRC 0x06 /* Rec 79 #define FM801_REC_SRC 0x06 /* Record Source */
82 #define FM801_PLY_CTRL 0x08 /* Pla 80 #define FM801_PLY_CTRL 0x08 /* Playback Control */
83 #define FM801_PLY_COUNT 0x0a /* Pla 81 #define FM801_PLY_COUNT 0x0a /* Playback Count */
84 #define FM801_PLY_BUF1 0x0c /* Pla 82 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
85 #define FM801_PLY_BUF2 0x10 /* Pla 83 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
86 #define FM801_CAP_CTRL 0x14 /* Cap 84 #define FM801_CAP_CTRL 0x14 /* Capture Control */
87 #define FM801_CAP_COUNT 0x16 /* Cap 85 #define FM801_CAP_COUNT 0x16 /* Capture Count */
88 #define FM801_CAP_BUF1 0x18 /* Cap 86 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
89 #define FM801_CAP_BUF2 0x1c /* Cap 87 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
90 #define FM801_CODEC_CTRL 0x22 /* Cod 88 #define FM801_CODEC_CTRL 0x22 /* Codec Control */
91 #define FM801_I2S_MODE 0x24 /* I2S 89 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
92 #define FM801_VOLUME 0x26 /* Vol 90 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
93 #define FM801_I2C_CTRL 0x29 /* I2C 91 #define FM801_I2C_CTRL 0x29 /* I2C Control */
94 #define FM801_AC97_CMD 0x2a /* AC' 92 #define FM801_AC97_CMD 0x2a /* AC'97 Command */
95 #define FM801_AC97_DATA 0x2c /* AC' 93 #define FM801_AC97_DATA 0x2c /* AC'97 Data */
96 #define FM801_MPU401_DATA 0x30 /* MPU 94 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
97 #define FM801_MPU401_CMD 0x31 /* MPU 95 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
98 #define FM801_GPIO_CTRL 0x52 /* Gen 96 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
99 #define FM801_GEN_CTRL 0x54 /* Gen 97 #define FM801_GEN_CTRL 0x54 /* General Control */
100 #define FM801_IRQ_MASK 0x56 /* Int 98 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
101 #define FM801_IRQ_STATUS 0x5a /* Int 99 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
102 #define FM801_OPL3_BANK0 0x68 /* OPL 100 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
103 #define FM801_OPL3_DATA0 0x69 /* OPL 101 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
104 #define FM801_OPL3_BANK1 0x6a /* OPL 102 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
105 #define FM801_OPL3_DATA1 0x6b /* OPL 103 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
106 #define FM801_POWERDOWN 0x70 /* Blo 104 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
107 105
108 /* codec access */ !! 106 #define FM801_AC97_ADDR_SHIFT 10
109 #define FM801_AC97_READ (1<<7) /* rea <<
110 #define FM801_AC97_VALID (1<<8) /* por <<
111 #define FM801_AC97_BUSY (1<<9) /* bus <<
112 #define FM801_AC97_ADDR_SHIFT 10 /* cod <<
113 107
114 /* playback and record control register bits * 108 /* playback and record control register bits */
115 #define FM801_BUF1_LAST (1<<1) 109 #define FM801_BUF1_LAST (1<<1)
116 #define FM801_BUF2_LAST (1<<2) 110 #define FM801_BUF2_LAST (1<<2)
117 #define FM801_START (1<<5) 111 #define FM801_START (1<<5)
118 #define FM801_PAUSE (1<<6) 112 #define FM801_PAUSE (1<<6)
119 #define FM801_IMMED_STOP (1<<7) 113 #define FM801_IMMED_STOP (1<<7)
120 #define FM801_RATE_SHIFT 8 114 #define FM801_RATE_SHIFT 8
121 #define FM801_RATE_MASK (15 << FM801_R 115 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
122 #define FM801_CHANNELS_4 (1<<12) /* pla 116 #define FM801_CHANNELS_4 (1<<12) /* playback only */
123 #define FM801_CHANNELS_6 (2<<12) /* pla 117 #define FM801_CHANNELS_6 (2<<12) /* playback only */
124 #define FM801_CHANNELS_6MS (3<<12) /* pla 118 #define FM801_CHANNELS_6MS (3<<12) /* playback only */
125 #define FM801_CHANNELS_MASK (3<<12) 119 #define FM801_CHANNELS_MASK (3<<12)
126 #define FM801_16BIT (1<<14) 120 #define FM801_16BIT (1<<14)
127 #define FM801_STEREO (1<<15) 121 #define FM801_STEREO (1<<15)
128 122
129 /* IRQ status bits */ 123 /* IRQ status bits */
130 #define FM801_IRQ_PLAYBACK (1<<8) 124 #define FM801_IRQ_PLAYBACK (1<<8)
131 #define FM801_IRQ_CAPTURE (1<<9) 125 #define FM801_IRQ_CAPTURE (1<<9)
132 #define FM801_IRQ_VOLUME (1<<14) 126 #define FM801_IRQ_VOLUME (1<<14)
133 #define FM801_IRQ_MPU (1<<15) 127 #define FM801_IRQ_MPU (1<<15)
134 128
135 /* GPIO control register */ 129 /* GPIO control register */
136 #define FM801_GPIO_GP0 (1<<0) /* rea 130 #define FM801_GPIO_GP0 (1<<0) /* read/write */
137 #define FM801_GPIO_GP1 (1<<1) 131 #define FM801_GPIO_GP1 (1<<1)
138 #define FM801_GPIO_GP2 (1<<2) 132 #define FM801_GPIO_GP2 (1<<2)
139 #define FM801_GPIO_GP3 (1<<3) 133 #define FM801_GPIO_GP3 (1<<3)
140 #define FM801_GPIO_GP(x) (1<<(0+(x))) 134 #define FM801_GPIO_GP(x) (1<<(0+(x)))
141 #define FM801_GPIO_GD0 (1<<8) /* dir 135 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
142 #define FM801_GPIO_GD1 (1<<9) 136 #define FM801_GPIO_GD1 (1<<9)
143 #define FM801_GPIO_GD2 (1<<10) 137 #define FM801_GPIO_GD2 (1<<10)
144 #define FM801_GPIO_GD3 (1<<11) 138 #define FM801_GPIO_GD3 (1<<11)
145 #define FM801_GPIO_GD(x) (1<<(8+(x))) 139 #define FM801_GPIO_GD(x) (1<<(8+(x)))
146 #define FM801_GPIO_GS0 (1<<12) /* fun 140 #define FM801_GPIO_GS0 (1<<12) /* function select: */
147 #define FM801_GPIO_GS1 (1<<13) /* 141 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
148 #define FM801_GPIO_GS2 (1<<14) /* 142 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
149 #define FM801_GPIO_GS3 (1<<15) 143 #define FM801_GPIO_GS3 (1<<15)
150 #define FM801_GPIO_GS(x) (1<<(12+(x))) 144 #define FM801_GPIO_GS(x) (1<<(12+(x)))
151 145
152 /* 146 /*
153 147
154 */ 148 */
155 149
156 struct fm801 { !! 150 typedef struct _snd_fm801 fm801_t;
>> 151
>> 152 struct _snd_fm801 {
157 int irq; 153 int irq;
158 154
159 unsigned long port; /* I/O port nu 155 unsigned long port; /* I/O port number */
160 unsigned int multichannel: 1, /* mul 156 unsigned int multichannel: 1, /* multichannel support */
161 secondary: 1; /* sec 157 secondary: 1; /* secondary codec */
162 unsigned char secondary_addr; /* add 158 unsigned char secondary_addr; /* address of the secondary codec */
163 unsigned int tea575x_tuner; /* tun <<
164 159
165 unsigned short ply_ctrl; /* playback c 160 unsigned short ply_ctrl; /* playback control */
166 unsigned short cap_ctrl; /* capture co 161 unsigned short cap_ctrl; /* capture control */
167 162
168 unsigned long ply_buffer; 163 unsigned long ply_buffer;
169 unsigned int ply_buf; 164 unsigned int ply_buf;
170 unsigned int ply_count; 165 unsigned int ply_count;
171 unsigned int ply_size; 166 unsigned int ply_size;
172 unsigned int ply_pos; 167 unsigned int ply_pos;
173 168
174 unsigned long cap_buffer; 169 unsigned long cap_buffer;
175 unsigned int cap_buf; 170 unsigned int cap_buf;
176 unsigned int cap_count; 171 unsigned int cap_count;
177 unsigned int cap_size; 172 unsigned int cap_size;
178 unsigned int cap_pos; 173 unsigned int cap_pos;
179 174
180 struct snd_ac97_bus *ac97_bus; !! 175 ac97_bus_t *ac97_bus;
181 struct snd_ac97 *ac97; !! 176 ac97_t *ac97;
182 struct snd_ac97 *ac97_sec; !! 177 ac97_t *ac97_sec;
183 178
184 struct pci_dev *pci; 179 struct pci_dev *pci;
185 struct snd_card *card; !! 180 snd_card_t *card;
186 struct snd_pcm *pcm; !! 181 snd_pcm_t *pcm;
187 struct snd_rawmidi *rmidi; !! 182 snd_rawmidi_t *rmidi;
188 struct snd_pcm_substream *playback_sub !! 183 snd_pcm_substream_t *playback_substream;
189 struct snd_pcm_substream *capture_subs !! 184 snd_pcm_substream_t *capture_substream;
190 unsigned int p_dma_size; 185 unsigned int p_dma_size;
191 unsigned int c_dma_size; 186 unsigned int c_dma_size;
192 187
193 spinlock_t reg_lock; 188 spinlock_t reg_lock;
194 struct snd_info_entry *proc_entry; !! 189 snd_info_entry_t *proc_entry;
195 190
196 #ifdef TEA575X_RADIO 191 #ifdef TEA575X_RADIO
197 struct snd_tea575x tea; !! 192 tea575x_t tea;
198 #endif <<
199 <<
200 #ifdef CONFIG_PM <<
201 u16 saved_regs[0x20]; <<
202 #endif 193 #endif
203 }; 194 };
204 195
205 static struct pci_device_id snd_fm801_ids[] = 196 static struct pci_device_id snd_fm801_ids[] = {
206 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ 197 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
207 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ <<
208 { 0, } 198 { 0, }
209 }; 199 };
210 200
211 MODULE_DEVICE_TABLE(pci, snd_fm801_ids); 201 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
212 202
213 /* 203 /*
214 * common I/O routines 204 * common I/O routines
215 */ 205 */
216 206
217 static int snd_fm801_update_bits(struct fm801 !! 207 static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
218 unsigned shor 208 unsigned short mask, unsigned short value)
219 { 209 {
220 int change; 210 int change;
221 unsigned long flags; 211 unsigned long flags;
222 unsigned short old, new; 212 unsigned short old, new;
223 213
224 spin_lock_irqsave(&chip->reg_lock, fla 214 spin_lock_irqsave(&chip->reg_lock, flags);
225 old = inw(chip->port + reg); 215 old = inw(chip->port + reg);
226 new = (old & ~mask) | value; 216 new = (old & ~mask) | value;
227 change = old != new; 217 change = old != new;
228 if (change) 218 if (change)
229 outw(new, chip->port + reg); 219 outw(new, chip->port + reg);
230 spin_unlock_irqrestore(&chip->reg_lock 220 spin_unlock_irqrestore(&chip->reg_lock, flags);
231 return change; 221 return change;
232 } 222 }
233 223
234 static void snd_fm801_codec_write(struct snd_a !! 224 static void snd_fm801_codec_write(ac97_t *ac97,
235 unsigned sho 225 unsigned short reg,
236 unsigned sho 226 unsigned short val)
237 { 227 {
238 struct fm801 *chip = ac97->private_dat !! 228 fm801_t *chip = ac97->private_data;
239 int idx; 229 int idx;
240 230
241 /* 231 /*
242 * Wait until the codec interface is 232 * Wait until the codec interface is not ready..
243 */ 233 */
244 for (idx = 0; idx < 100; idx++) { 234 for (idx = 0; idx < 100; idx++) {
245 if (!(inw(FM801_REG(chip, AC97 !! 235 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
246 goto ok1; 236 goto ok1;
247 udelay(10); 237 udelay(10);
248 } 238 }
249 snd_printk(KERN_ERR "AC'97 interface i !! 239 snd_printk("AC'97 interface is busy (1)\n");
250 return; 240 return;
251 241
252 ok1: 242 ok1:
253 /* write data and address */ 243 /* write data and address */
254 outw(val, FM801_REG(chip, AC97_DATA)); 244 outw(val, FM801_REG(chip, AC97_DATA));
255 outw(reg | (ac97->addr << FM801_AC97_A 245 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
256 /* 246 /*
257 * Wait until the write command is no 247 * Wait until the write command is not completed..
258 */ 248 */
259 for (idx = 0; idx < 1000; idx++) { 249 for (idx = 0; idx < 1000; idx++) {
260 if (!(inw(FM801_REG(chip, AC97 !! 250 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
261 return; 251 return;
262 udelay(10); 252 udelay(10);
263 } 253 }
264 snd_printk(KERN_ERR "AC'97 interface # !! 254 snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
265 } 255 }
266 256
267 static unsigned short snd_fm801_codec_read(str !! 257 static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
268 { 258 {
269 struct fm801 *chip = ac97->private_dat !! 259 fm801_t *chip = ac97->private_data;
270 int idx; 260 int idx;
271 261
272 /* 262 /*
273 * Wait until the codec interface is 263 * Wait until the codec interface is not ready..
274 */ 264 */
275 for (idx = 0; idx < 100; idx++) { 265 for (idx = 0; idx < 100; idx++) {
276 if (!(inw(FM801_REG(chip, AC97 !! 266 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
277 goto ok1; 267 goto ok1;
278 udelay(10); 268 udelay(10);
279 } 269 }
280 snd_printk(KERN_ERR "AC'97 interface i !! 270 snd_printk("AC'97 interface is busy (1)\n");
281 return 0; 271 return 0;
282 272
283 ok1: 273 ok1:
284 /* read command */ 274 /* read command */
285 outw(reg | (ac97->addr << FM801_AC97_A !! 275 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
286 FM801_REG(chip, AC97_CMD)); <<
287 for (idx = 0; idx < 100; idx++) { 276 for (idx = 0; idx < 100; idx++) {
288 if (!(inw(FM801_REG(chip, AC97 !! 277 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
289 goto ok2; 278 goto ok2;
290 udelay(10); 279 udelay(10);
291 } 280 }
292 snd_printk(KERN_ERR "AC'97 interface # !! 281 snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
293 return 0; 282 return 0;
294 283
295 ok2: 284 ok2:
296 for (idx = 0; idx < 1000; idx++) { 285 for (idx = 0; idx < 1000; idx++) {
297 if (inw(FM801_REG(chip, AC97_C !! 286 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
298 goto ok3; 287 goto ok3;
299 udelay(10); 288 udelay(10);
300 } 289 }
301 snd_printk(KERN_ERR "AC'97 interface # !! 290 snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
302 return 0; 291 return 0;
303 292
304 ok3: 293 ok3:
305 return inw(FM801_REG(chip, AC97_DATA)) 294 return inw(FM801_REG(chip, AC97_DATA));
306 } 295 }
307 296
308 static unsigned int rates[] = { 297 static unsigned int rates[] = {
309 5500, 8000, 9600, 11025, 298 5500, 8000, 9600, 11025,
310 16000, 19200, 22050, 32000, 299 16000, 19200, 22050, 32000,
311 38400, 44100, 48000 300 38400, 44100, 48000
312 }; 301 };
313 302
314 static struct snd_pcm_hw_constraint_list hw_co !! 303 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
315 .count = ARRAY_SIZE(rates), 304 .count = ARRAY_SIZE(rates),
316 .list = rates, 305 .list = rates,
317 .mask = 0, 306 .mask = 0,
318 }; 307 };
319 308
320 static unsigned int channels[] = { 309 static unsigned int channels[] = {
321 2, 4, 6 310 2, 4, 6
322 }; 311 };
323 312
324 static struct snd_pcm_hw_constraint_list hw_co !! 313 #define CHANNELS sizeof(channels) / sizeof(channels[0])
325 .count = ARRAY_SIZE(channels), !! 314
>> 315 static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
>> 316 .count = CHANNELS,
326 .list = channels, 317 .list = channels,
327 .mask = 0, 318 .mask = 0,
328 }; 319 };
329 320
330 /* 321 /*
331 * Sample rate routines 322 * Sample rate routines
332 */ 323 */
333 324
334 static unsigned short snd_fm801_rate_bits(unsi 325 static unsigned short snd_fm801_rate_bits(unsigned int rate)
335 { 326 {
336 unsigned int idx; 327 unsigned int idx;
337 328
338 for (idx = 0; idx < ARRAY_SIZE(rates); 329 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
339 if (rates[idx] == rate) 330 if (rates[idx] == rate)
340 return idx; 331 return idx;
341 snd_BUG(); 332 snd_BUG();
342 return ARRAY_SIZE(rates) - 1; 333 return ARRAY_SIZE(rates) - 1;
343 } 334 }
344 335
345 /* 336 /*
346 * PCM part 337 * PCM part
347 */ 338 */
348 339
349 static int snd_fm801_playback_trigger(struct s !! 340 static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
350 int cmd) 341 int cmd)
351 { 342 {
352 struct fm801 *chip = snd_pcm_substream !! 343 fm801_t *chip = snd_pcm_substream_chip(substream);
353 344
354 spin_lock(&chip->reg_lock); 345 spin_lock(&chip->reg_lock);
355 switch (cmd) { 346 switch (cmd) {
356 case SNDRV_PCM_TRIGGER_START: 347 case SNDRV_PCM_TRIGGER_START:
357 chip->ply_ctrl &= ~(FM801_BUF1 348 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
358 FM801_BUF 349 FM801_BUF2_LAST |
359 FM801_PAU 350 FM801_PAUSE);
360 chip->ply_ctrl |= FM801_START 351 chip->ply_ctrl |= FM801_START |
361 FM801_IMMED 352 FM801_IMMED_STOP;
362 break; 353 break;
363 case SNDRV_PCM_TRIGGER_STOP: 354 case SNDRV_PCM_TRIGGER_STOP:
364 chip->ply_ctrl &= ~(FM801_STAR 355 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
365 break; 356 break;
366 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 357 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
367 case SNDRV_PCM_TRIGGER_SUSPEND: <<
368 chip->ply_ctrl |= FM801_PAUSE; 358 chip->ply_ctrl |= FM801_PAUSE;
369 break; 359 break;
370 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 360 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
371 case SNDRV_PCM_TRIGGER_RESUME: <<
372 chip->ply_ctrl &= ~FM801_PAUSE 361 chip->ply_ctrl &= ~FM801_PAUSE;
373 break; 362 break;
374 default: 363 default:
375 spin_unlock(&chip->reg_lock); 364 spin_unlock(&chip->reg_lock);
376 snd_BUG(); 365 snd_BUG();
377 return -EINVAL; 366 return -EINVAL;
378 } 367 }
379 outw(chip->ply_ctrl, FM801_REG(chip, P 368 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
380 spin_unlock(&chip->reg_lock); 369 spin_unlock(&chip->reg_lock);
381 return 0; 370 return 0;
382 } 371 }
383 372
384 static int snd_fm801_capture_trigger(struct sn !! 373 static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
385 int cmd) 374 int cmd)
386 { 375 {
387 struct fm801 *chip = snd_pcm_substream !! 376 fm801_t *chip = snd_pcm_substream_chip(substream);
388 377
389 spin_lock(&chip->reg_lock); 378 spin_lock(&chip->reg_lock);
390 switch (cmd) { 379 switch (cmd) {
391 case SNDRV_PCM_TRIGGER_START: 380 case SNDRV_PCM_TRIGGER_START:
392 chip->cap_ctrl &= ~(FM801_BUF1 381 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
393 FM801_BUF 382 FM801_BUF2_LAST |
394 FM801_PAU 383 FM801_PAUSE);
395 chip->cap_ctrl |= FM801_START 384 chip->cap_ctrl |= FM801_START |
396 FM801_IMMED 385 FM801_IMMED_STOP;
397 break; 386 break;
398 case SNDRV_PCM_TRIGGER_STOP: 387 case SNDRV_PCM_TRIGGER_STOP:
399 chip->cap_ctrl &= ~(FM801_STAR 388 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
400 break; 389 break;
401 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 390 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
402 case SNDRV_PCM_TRIGGER_SUSPEND: <<
403 chip->cap_ctrl |= FM801_PAUSE; 391 chip->cap_ctrl |= FM801_PAUSE;
404 break; 392 break;
405 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 393 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
406 case SNDRV_PCM_TRIGGER_RESUME: <<
407 chip->cap_ctrl &= ~FM801_PAUSE 394 chip->cap_ctrl &= ~FM801_PAUSE;
408 break; 395 break;
409 default: 396 default:
410 spin_unlock(&chip->reg_lock); 397 spin_unlock(&chip->reg_lock);
411 snd_BUG(); 398 snd_BUG();
412 return -EINVAL; 399 return -EINVAL;
413 } 400 }
414 outw(chip->cap_ctrl, FM801_REG(chip, C 401 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
415 spin_unlock(&chip->reg_lock); 402 spin_unlock(&chip->reg_lock);
416 return 0; 403 return 0;
417 } 404 }
418 405
419 static int snd_fm801_hw_params(struct snd_pcm_ !! 406 static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
420 struct snd_pcm_ !! 407 snd_pcm_hw_params_t * hw_params)
421 { 408 {
422 return snd_pcm_lib_malloc_pages(substr 409 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
423 } 410 }
424 411
425 static int snd_fm801_hw_free(struct snd_pcm_su !! 412 static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
426 { 413 {
427 return snd_pcm_lib_free_pages(substrea 414 return snd_pcm_lib_free_pages(substream);
428 } 415 }
429 416
430 static int snd_fm801_playback_prepare(struct s !! 417 static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
431 { 418 {
432 struct fm801 *chip = snd_pcm_substream !! 419 fm801_t *chip = snd_pcm_substream_chip(substream);
433 struct snd_pcm_runtime *runtime = subs !! 420 snd_pcm_runtime_t *runtime = substream->runtime;
434 421
435 chip->ply_size = snd_pcm_lib_buffer_by 422 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
436 chip->ply_count = snd_pcm_lib_period_b 423 chip->ply_count = snd_pcm_lib_period_bytes(substream);
437 spin_lock_irq(&chip->reg_lock); 424 spin_lock_irq(&chip->reg_lock);
438 chip->ply_ctrl &= ~(FM801_START | FM80 425 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
439 FM801_STEREO | FM 426 FM801_STEREO | FM801_RATE_MASK |
440 FM801_CHANNELS_MA 427 FM801_CHANNELS_MASK);
441 if (snd_pcm_format_width(runtime->form 428 if (snd_pcm_format_width(runtime->format) == 16)
442 chip->ply_ctrl |= FM801_16BIT; 429 chip->ply_ctrl |= FM801_16BIT;
443 if (runtime->channels > 1) { 430 if (runtime->channels > 1) {
444 chip->ply_ctrl |= FM801_STEREO 431 chip->ply_ctrl |= FM801_STEREO;
445 if (runtime->channels == 4) 432 if (runtime->channels == 4)
446 chip->ply_ctrl |= FM80 433 chip->ply_ctrl |= FM801_CHANNELS_4;
447 else if (runtime->channels == 434 else if (runtime->channels == 6)
448 chip->ply_ctrl |= FM80 435 chip->ply_ctrl |= FM801_CHANNELS_6;
449 } 436 }
450 chip->ply_ctrl |= snd_fm801_rate_bits( 437 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
451 chip->ply_buf = 0; 438 chip->ply_buf = 0;
452 outw(chip->ply_ctrl, FM801_REG(chip, P 439 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
453 outw(chip->ply_count - 1, FM801_REG(ch 440 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
454 chip->ply_buffer = runtime->dma_addr; 441 chip->ply_buffer = runtime->dma_addr;
455 chip->ply_pos = 0; 442 chip->ply_pos = 0;
456 outl(chip->ply_buffer, FM801_REG(chip, 443 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
457 outl(chip->ply_buffer + (chip->ply_cou 444 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
458 spin_unlock_irq(&chip->reg_lock); 445 spin_unlock_irq(&chip->reg_lock);
459 return 0; 446 return 0;
460 } 447 }
461 448
462 static int snd_fm801_capture_prepare(struct sn !! 449 static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
463 { 450 {
464 struct fm801 *chip = snd_pcm_substream !! 451 fm801_t *chip = snd_pcm_substream_chip(substream);
465 struct snd_pcm_runtime *runtime = subs !! 452 snd_pcm_runtime_t *runtime = substream->runtime;
466 453
467 chip->cap_size = snd_pcm_lib_buffer_by 454 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
468 chip->cap_count = snd_pcm_lib_period_b 455 chip->cap_count = snd_pcm_lib_period_bytes(substream);
469 spin_lock_irq(&chip->reg_lock); 456 spin_lock_irq(&chip->reg_lock);
470 chip->cap_ctrl &= ~(FM801_START | FM80 457 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
471 FM801_STEREO | FM 458 FM801_STEREO | FM801_RATE_MASK);
472 if (snd_pcm_format_width(runtime->form 459 if (snd_pcm_format_width(runtime->format) == 16)
473 chip->cap_ctrl |= FM801_16BIT; 460 chip->cap_ctrl |= FM801_16BIT;
474 if (runtime->channels > 1) 461 if (runtime->channels > 1)
475 chip->cap_ctrl |= FM801_STEREO 462 chip->cap_ctrl |= FM801_STEREO;
476 chip->cap_ctrl |= snd_fm801_rate_bits( 463 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
477 chip->cap_buf = 0; 464 chip->cap_buf = 0;
478 outw(chip->cap_ctrl, FM801_REG(chip, C 465 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
479 outw(chip->cap_count - 1, FM801_REG(ch 466 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
480 chip->cap_buffer = runtime->dma_addr; 467 chip->cap_buffer = runtime->dma_addr;
481 chip->cap_pos = 0; 468 chip->cap_pos = 0;
482 outl(chip->cap_buffer, FM801_REG(chip, 469 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
483 outl(chip->cap_buffer + (chip->cap_cou 470 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
484 spin_unlock_irq(&chip->reg_lock); 471 spin_unlock_irq(&chip->reg_lock);
485 return 0; 472 return 0;
486 } 473 }
487 474
488 static snd_pcm_uframes_t snd_fm801_playback_po !! 475 static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
489 { 476 {
490 struct fm801 *chip = snd_pcm_substream !! 477 fm801_t *chip = snd_pcm_substream_chip(substream);
491 size_t ptr; 478 size_t ptr;
492 479
493 if (!(chip->ply_ctrl & FM801_START)) 480 if (!(chip->ply_ctrl & FM801_START))
494 return 0; 481 return 0;
495 spin_lock(&chip->reg_lock); 482 spin_lock(&chip->reg_lock);
496 ptr = chip->ply_pos + (chip->ply_count 483 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
497 if (inw(FM801_REG(chip, IRQ_STATUS)) & 484 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
498 ptr += chip->ply_count; 485 ptr += chip->ply_count;
499 ptr %= chip->ply_size; 486 ptr %= chip->ply_size;
500 } 487 }
501 spin_unlock(&chip->reg_lock); 488 spin_unlock(&chip->reg_lock);
502 return bytes_to_frames(substream->runt 489 return bytes_to_frames(substream->runtime, ptr);
503 } 490 }
504 491
505 static snd_pcm_uframes_t snd_fm801_capture_poi !! 492 static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
506 { 493 {
507 struct fm801 *chip = snd_pcm_substream !! 494 fm801_t *chip = snd_pcm_substream_chip(substream);
508 size_t ptr; 495 size_t ptr;
509 496
510 if (!(chip->cap_ctrl & FM801_START)) 497 if (!(chip->cap_ctrl & FM801_START))
511 return 0; 498 return 0;
512 spin_lock(&chip->reg_lock); 499 spin_lock(&chip->reg_lock);
513 ptr = chip->cap_pos + (chip->cap_count 500 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
514 if (inw(FM801_REG(chip, IRQ_STATUS)) & 501 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
515 ptr += chip->cap_count; 502 ptr += chip->cap_count;
516 ptr %= chip->cap_size; 503 ptr %= chip->cap_size;
517 } 504 }
518 spin_unlock(&chip->reg_lock); 505 spin_unlock(&chip->reg_lock);
519 return bytes_to_frames(substream->runt 506 return bytes_to_frames(substream->runtime, ptr);
520 } 507 }
521 508
522 static irqreturn_t snd_fm801_interrupt(int irq !! 509 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
523 { 510 {
524 struct fm801 *chip = dev_id; !! 511 fm801_t *chip = dev_id;
525 unsigned short status; 512 unsigned short status;
526 unsigned int tmp; 513 unsigned int tmp;
527 514
528 status = inw(FM801_REG(chip, IRQ_STATU 515 status = inw(FM801_REG(chip, IRQ_STATUS));
529 status &= FM801_IRQ_PLAYBACK|FM801_IRQ 516 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
530 if (! status) 517 if (! status)
531 return IRQ_NONE; 518 return IRQ_NONE;
532 /* ack first */ 519 /* ack first */
533 outw(status, FM801_REG(chip, IRQ_STATU 520 outw(status, FM801_REG(chip, IRQ_STATUS));
534 if (chip->pcm && (status & FM801_IRQ_P 521 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
535 spin_lock(&chip->reg_lock); 522 spin_lock(&chip->reg_lock);
536 chip->ply_buf++; 523 chip->ply_buf++;
537 chip->ply_pos += chip->ply_cou 524 chip->ply_pos += chip->ply_count;
538 chip->ply_pos %= chip->ply_siz 525 chip->ply_pos %= chip->ply_size;
539 tmp = chip->ply_pos + chip->pl 526 tmp = chip->ply_pos + chip->ply_count;
540 tmp %= chip->ply_size; 527 tmp %= chip->ply_size;
541 outl(chip->ply_buffer + tmp, 528 outl(chip->ply_buffer + tmp,
542 (chip->ply_buf 529 (chip->ply_buf & 1) ?
543 FM801_ 530 FM801_REG(chip, PLY_BUF1) :
544 FM801_ 531 FM801_REG(chip, PLY_BUF2));
545 spin_unlock(&chip->reg_lock); 532 spin_unlock(&chip->reg_lock);
546 snd_pcm_period_elapsed(chip->p 533 snd_pcm_period_elapsed(chip->playback_substream);
547 } 534 }
548 if (chip->pcm && (status & FM801_IRQ_C 535 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
549 spin_lock(&chip->reg_lock); 536 spin_lock(&chip->reg_lock);
550 chip->cap_buf++; 537 chip->cap_buf++;
551 chip->cap_pos += chip->cap_cou 538 chip->cap_pos += chip->cap_count;
552 chip->cap_pos %= chip->cap_siz 539 chip->cap_pos %= chip->cap_size;
553 tmp = chip->cap_pos + chip->ca 540 tmp = chip->cap_pos + chip->cap_count;
554 tmp %= chip->cap_size; 541 tmp %= chip->cap_size;
555 outl(chip->cap_buffer + tmp, 542 outl(chip->cap_buffer + tmp,
556 (chip->cap_buf 543 (chip->cap_buf & 1) ?
557 FM801_ 544 FM801_REG(chip, CAP_BUF1) :
558 FM801_ 545 FM801_REG(chip, CAP_BUF2));
559 spin_unlock(&chip->reg_lock); 546 spin_unlock(&chip->reg_lock);
560 snd_pcm_period_elapsed(chip->c 547 snd_pcm_period_elapsed(chip->capture_substream);
561 } 548 }
562 if (chip->rmidi && (status & FM801_IRQ 549 if (chip->rmidi && (status & FM801_IRQ_MPU))
563 snd_mpu401_uart_interrupt(irq, !! 550 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
564 if (status & FM801_IRQ_VOLUME) 551 if (status & FM801_IRQ_VOLUME)
565 ;/* TODO */ 552 ;/* TODO */
566 553
567 return IRQ_HANDLED; 554 return IRQ_HANDLED;
568 } 555 }
569 556
570 static struct snd_pcm_hardware snd_fm801_playb !! 557 static snd_pcm_hardware_t snd_fm801_playback =
571 { 558 {
572 .info = (SNDRV_PCM_INF 559 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
573 SNDRV_PCM_INF 560 SNDRV_PCM_INFO_BLOCK_TRANSFER |
574 SNDRV_PCM_INF !! 561 SNDRV_PCM_INFO_PAUSE |
575 SNDRV_PCM_INF 562 SNDRV_PCM_INFO_MMAP_VALID),
576 .formats = SNDRV_PCM_FMTB 563 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
577 .rates = SNDRV_PCM_RATE 564 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
578 .rate_min = 5500, 565 .rate_min = 5500,
579 .rate_max = 48000, 566 .rate_max = 48000,
580 .channels_min = 1, 567 .channels_min = 1,
581 .channels_max = 2, 568 .channels_max = 2,
582 .buffer_bytes_max = (128*1024), 569 .buffer_bytes_max = (128*1024),
583 .period_bytes_min = 64, 570 .period_bytes_min = 64,
584 .period_bytes_max = (128*1024), 571 .period_bytes_max = (128*1024),
585 .periods_min = 1, 572 .periods_min = 1,
586 .periods_max = 1024, 573 .periods_max = 1024,
587 .fifo_size = 0, 574 .fifo_size = 0,
588 }; 575 };
589 576
590 static struct snd_pcm_hardware snd_fm801_captu !! 577 static snd_pcm_hardware_t snd_fm801_capture =
591 { 578 {
592 .info = (SNDRV_PCM_INF 579 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
593 SNDRV_PCM_INF 580 SNDRV_PCM_INFO_BLOCK_TRANSFER |
594 SNDRV_PCM_INF !! 581 SNDRV_PCM_INFO_PAUSE |
595 SNDRV_PCM_INF 582 SNDRV_PCM_INFO_MMAP_VALID),
596 .formats = SNDRV_PCM_FMTB 583 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
597 .rates = SNDRV_PCM_RATE 584 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
598 .rate_min = 5500, 585 .rate_min = 5500,
599 .rate_max = 48000, 586 .rate_max = 48000,
600 .channels_min = 1, 587 .channels_min = 1,
601 .channels_max = 2, 588 .channels_max = 2,
602 .buffer_bytes_max = (128*1024), 589 .buffer_bytes_max = (128*1024),
603 .period_bytes_min = 64, 590 .period_bytes_min = 64,
604 .period_bytes_max = (128*1024), 591 .period_bytes_max = (128*1024),
605 .periods_min = 1, 592 .periods_min = 1,
606 .periods_max = 1024, 593 .periods_max = 1024,
607 .fifo_size = 0, 594 .fifo_size = 0,
608 }; 595 };
609 596
610 static int snd_fm801_playback_open(struct snd_ !! 597 static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
611 { 598 {
612 struct fm801 *chip = snd_pcm_substream !! 599 fm801_t *chip = snd_pcm_substream_chip(substream);
613 struct snd_pcm_runtime *runtime = subs !! 600 snd_pcm_runtime_t *runtime = substream->runtime;
614 int err; 601 int err;
615 602
616 chip->playback_substream = substream; 603 chip->playback_substream = substream;
617 runtime->hw = snd_fm801_playback; 604 runtime->hw = snd_fm801_playback;
618 snd_pcm_hw_constraint_list(runtime, 0, !! 605 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
619 &hw_constra <<
620 if (chip->multichannel) { 606 if (chip->multichannel) {
621 runtime->hw.channels_max = 6; 607 runtime->hw.channels_max = 6;
622 snd_pcm_hw_constraint_list(run !! 608 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
623 SND <<
624 &hw <<
625 } 609 }
626 if ((err = snd_pcm_hw_constraint_integ 610 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
627 return err; 611 return err;
628 return 0; 612 return 0;
629 } 613 }
630 614
631 static int snd_fm801_capture_open(struct snd_p !! 615 static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
632 { 616 {
633 struct fm801 *chip = snd_pcm_substream !! 617 fm801_t *chip = snd_pcm_substream_chip(substream);
634 struct snd_pcm_runtime *runtime = subs !! 618 snd_pcm_runtime_t *runtime = substream->runtime;
635 int err; 619 int err;
636 620
637 chip->capture_substream = substream; 621 chip->capture_substream = substream;
638 runtime->hw = snd_fm801_capture; 622 runtime->hw = snd_fm801_capture;
639 snd_pcm_hw_constraint_list(runtime, 0, !! 623 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
640 &hw_constra <<
641 if ((err = snd_pcm_hw_constraint_integ 624 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
642 return err; 625 return err;
643 return 0; 626 return 0;
644 } 627 }
645 628
646 static int snd_fm801_playback_close(struct snd !! 629 static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
647 { 630 {
648 struct fm801 *chip = snd_pcm_substream !! 631 fm801_t *chip = snd_pcm_substream_chip(substream);
649 632
650 chip->playback_substream = NULL; 633 chip->playback_substream = NULL;
651 return 0; 634 return 0;
652 } 635 }
653 636
654 static int snd_fm801_capture_close(struct snd_ !! 637 static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
655 { 638 {
656 struct fm801 *chip = snd_pcm_substream !! 639 fm801_t *chip = snd_pcm_substream_chip(substream);
657 640
658 chip->capture_substream = NULL; 641 chip->capture_substream = NULL;
659 return 0; 642 return 0;
660 } 643 }
661 644
662 static struct snd_pcm_ops snd_fm801_playback_o !! 645 static snd_pcm_ops_t snd_fm801_playback_ops = {
663 .open = snd_fm801_playback_ope 646 .open = snd_fm801_playback_open,
664 .close = snd_fm801_playback_clo 647 .close = snd_fm801_playback_close,
665 .ioctl = snd_pcm_lib_ioctl, 648 .ioctl = snd_pcm_lib_ioctl,
666 .hw_params = snd_fm801_hw_params, 649 .hw_params = snd_fm801_hw_params,
667 .hw_free = snd_fm801_hw_free, 650 .hw_free = snd_fm801_hw_free,
668 .prepare = snd_fm801_playback_pre 651 .prepare = snd_fm801_playback_prepare,
669 .trigger = snd_fm801_playback_tri 652 .trigger = snd_fm801_playback_trigger,
670 .pointer = snd_fm801_playback_poi 653 .pointer = snd_fm801_playback_pointer,
671 }; 654 };
672 655
673 static struct snd_pcm_ops snd_fm801_capture_op !! 656 static snd_pcm_ops_t snd_fm801_capture_ops = {
674 .open = snd_fm801_capture_open 657 .open = snd_fm801_capture_open,
675 .close = snd_fm801_capture_clos 658 .close = snd_fm801_capture_close,
676 .ioctl = snd_pcm_lib_ioctl, 659 .ioctl = snd_pcm_lib_ioctl,
677 .hw_params = snd_fm801_hw_params, 660 .hw_params = snd_fm801_hw_params,
678 .hw_free = snd_fm801_hw_free, 661 .hw_free = snd_fm801_hw_free,
679 .prepare = snd_fm801_capture_prep 662 .prepare = snd_fm801_capture_prepare,
680 .trigger = snd_fm801_capture_trig 663 .trigger = snd_fm801_capture_trigger,
681 .pointer = snd_fm801_capture_poin 664 .pointer = snd_fm801_capture_pointer,
682 }; 665 };
683 666
684 static int __devinit snd_fm801_pcm(struct fm80 !! 667 static void snd_fm801_pcm_free(snd_pcm_t *pcm)
685 { 668 {
686 struct snd_pcm *pcm; !! 669 fm801_t *chip = pcm->private_data;
>> 670 chip->pcm = NULL;
>> 671 snd_pcm_lib_preallocate_free_for_all(pcm);
>> 672 }
>> 673
>> 674 static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
>> 675 {
>> 676 snd_pcm_t *pcm;
687 int err; 677 int err;
688 678
689 if (rpcm) 679 if (rpcm)
690 *rpcm = NULL; 680 *rpcm = NULL;
691 if ((err = snd_pcm_new(chip->card, "FM 681 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
692 return err; 682 return err;
693 683
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_ 684 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
695 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_ 685 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
696 686
697 pcm->private_data = chip; 687 pcm->private_data = chip;
>> 688 pcm->private_free = snd_fm801_pcm_free;
698 pcm->info_flags = 0; 689 pcm->info_flags = 0;
699 strcpy(pcm->name, "FM801"); 690 strcpy(pcm->name, "FM801");
700 chip->pcm = pcm; 691 chip->pcm = pcm;
701 692
702 snd_pcm_lib_preallocate_pages_for_all( 693 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
703 694 snd_dma_pci_data(chip->pci),
704 695 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
705 696
706 if (rpcm) 697 if (rpcm)
707 *rpcm = pcm; 698 *rpcm = pcm;
708 return 0; 699 return 0;
709 } 700 }
710 701
711 /* 702 /*
712 * TEA5757 radio 703 * TEA5757 radio
713 */ 704 */
714 705
715 #ifdef TEA575X_RADIO 706 #ifdef TEA575X_RADIO
716 707
717 /* 256PCS GPIO numbers */ 708 /* 256PCS GPIO numbers */
718 #define TEA_256PCS_DATA 1 709 #define TEA_256PCS_DATA 1
719 #define TEA_256PCS_WRITE_ENABLE 2 710 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
720 #define TEA_256PCS_BUS_CLOCK 3 711 #define TEA_256PCS_BUS_CLOCK 3
721 712
722 static void snd_fm801_tea575x_256pcs_write(str !! 713 static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
723 { 714 {
724 struct fm801 *chip = tea->private_data !! 715 fm801_t *chip = tea->private_data;
725 unsigned short reg; 716 unsigned short reg;
726 int i = 25; 717 int i = 25;
727 718
728 spin_lock_irq(&chip->reg_lock); 719 spin_lock_irq(&chip->reg_lock);
729 reg = inw(FM801_REG(chip, GPIO_CTRL)); 720 reg = inw(FM801_REG(chip, GPIO_CTRL));
730 /* use GPIO lines and set write enable 721 /* use GPIO lines and set write enable bit */
731 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) 722 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
732 FM801_GPIO_GS(TEA_256PCS_WRITE_ 723 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
733 FM801_GPIO_GS(TEA_256PCS_BUS_CL 724 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
734 /* all of lines are in the write direc 725 /* all of lines are in the write direction */
735 /* clear data and clock lines */ 726 /* clear data and clock lines */
736 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA 727 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
737 FM801_GPIO_GD(TEA_256PCS_WRIT 728 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
738 FM801_GPIO_GD(TEA_256PCS_BUS_ 729 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
739 FM801_GPIO_GP(TEA_256PCS_DATA 730 FM801_GPIO_GP(TEA_256PCS_DATA) |
740 FM801_GPIO_GP(TEA_256PCS_BUS_ 731 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
741 FM801_GPIO_GP(TEA_256PCS_WRIT 732 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
742 outw(reg, FM801_REG(chip, GPIO_CTRL)); 733 outw(reg, FM801_REG(chip, GPIO_CTRL));
743 udelay(1); 734 udelay(1);
744 735
745 while (i--) { 736 while (i--) {
746 if (val & (1 << i)) 737 if (val & (1 << i))
747 reg |= FM801_GPIO_GP(T 738 reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
748 else 739 else
749 reg &= ~FM801_GPIO_GP( 740 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
750 outw(reg, FM801_REG(chip, GPIO 741 outw(reg, FM801_REG(chip, GPIO_CTRL));
751 udelay(1); 742 udelay(1);
752 reg |= FM801_GPIO_GP(TEA_256PC 743 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
753 outw(reg, FM801_REG(chip, GPIO 744 outw(reg, FM801_REG(chip, GPIO_CTRL));
754 reg &= ~FM801_GPIO_GP(TEA_256P 745 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
755 outw(reg, FM801_REG(chip, GPIO 746 outw(reg, FM801_REG(chip, GPIO_CTRL));
756 udelay(1); 747 udelay(1);
757 } 748 }
758 749
759 /* and reset the write enable bit */ 750 /* and reset the write enable bit */
760 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ 751 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
761 FM801_GPIO_GP(TEA_256PCS_DATA); 752 FM801_GPIO_GP(TEA_256PCS_DATA);
762 outw(reg, FM801_REG(chip, GPIO_CTRL)); 753 outw(reg, FM801_REG(chip, GPIO_CTRL));
763 spin_unlock_irq(&chip->reg_lock); 754 spin_unlock_irq(&chip->reg_lock);
764 } 755 }
765 756
766 static unsigned int snd_fm801_tea575x_256pcs_r !! 757 static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
767 { 758 {
768 struct fm801 *chip = tea->private_data !! 759 fm801_t *chip = tea->private_data;
769 unsigned short reg; 760 unsigned short reg;
770 unsigned int val = 0; 761 unsigned int val = 0;
771 int i; 762 int i;
772 763
773 spin_lock_irq(&chip->reg_lock); 764 spin_lock_irq(&chip->reg_lock);
774 reg = inw(FM801_REG(chip, GPIO_CTRL)); 765 reg = inw(FM801_REG(chip, GPIO_CTRL));
775 /* use GPIO lines, set data direction 766 /* use GPIO lines, set data direction to input */
776 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) 767 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
777 FM801_GPIO_GS(TEA_256PCS_WRITE_ 768 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
778 FM801_GPIO_GS(TEA_256PCS_BUS_CL 769 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
779 FM801_GPIO_GD(TEA_256PCS_DATA) 770 FM801_GPIO_GD(TEA_256PCS_DATA) |
780 FM801_GPIO_GP(TEA_256PCS_DATA) 771 FM801_GPIO_GP(TEA_256PCS_DATA) |
781 FM801_GPIO_GP(TEA_256PCS_WRITE_ 772 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
782 /* all of lines are in the write direc 773 /* all of lines are in the write direction, except data */
783 /* clear data, write enable and clock 774 /* clear data, write enable and clock lines */
784 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRIT 775 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
785 FM801_GPIO_GD(TEA_256PCS_BUS_ 776 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
786 FM801_GPIO_GP(TEA_256PCS_BUS_ 777 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
787 778
788 for (i = 0; i < 24; i++) { 779 for (i = 0; i < 24; i++) {
789 reg &= ~FM801_GPIO_GP(TEA_256P 780 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
790 outw(reg, FM801_REG(chip, GPIO 781 outw(reg, FM801_REG(chip, GPIO_CTRL));
791 udelay(1); 782 udelay(1);
792 reg |= FM801_GPIO_GP(TEA_256PC 783 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
793 outw(reg, FM801_REG(chip, GPIO 784 outw(reg, FM801_REG(chip, GPIO_CTRL));
794 udelay(1); 785 udelay(1);
795 val <<= 1; 786 val <<= 1;
796 if (inw(FM801_REG(chip, GPIO_C 787 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
797 val |= 1; 788 val |= 1;
798 } 789 }
799 790
800 spin_unlock_irq(&chip->reg_lock); 791 spin_unlock_irq(&chip->reg_lock);
801 792
802 return val; 793 return val;
803 } 794 }
804 795
805 /* 256PCPR GPIO numbers */ 796 /* 256PCPR GPIO numbers */
806 #define TEA_256PCPR_BUS_CLOCK 0 797 #define TEA_256PCPR_BUS_CLOCK 0
807 #define TEA_256PCPR_DATA 1 798 #define TEA_256PCPR_DATA 1
808 #define TEA_256PCPR_WRITE_ENABLE 2 799 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
809 800
810 static void snd_fm801_tea575x_256pcpr_write(st !! 801 static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
811 { 802 {
812 struct fm801 *chip = tea->private_data !! 803 fm801_t *chip = tea->private_data;
813 unsigned short reg; 804 unsigned short reg;
814 int i = 25; 805 int i = 25;
815 806
816 spin_lock_irq(&chip->reg_lock); 807 spin_lock_irq(&chip->reg_lock);
817 reg = inw(FM801_REG(chip, GPIO_CTRL)); 808 reg = inw(FM801_REG(chip, GPIO_CTRL));
818 /* use GPIO lines and set write enable 809 /* use GPIO lines and set write enable bit */
819 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) 810 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
820 FM801_GPIO_GS(TEA_256PCPR_WRITE 811 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
821 FM801_GPIO_GS(TEA_256PCPR_BUS_C 812 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
822 /* all of lines are in the write direc 813 /* all of lines are in the write direction */
823 /* clear data and clock lines */ 814 /* clear data and clock lines */
824 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DAT 815 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
825 FM801_GPIO_GD(TEA_256PCPR_WRI 816 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
826 FM801_GPIO_GD(TEA_256PCPR_BUS 817 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
827 FM801_GPIO_GP(TEA_256PCPR_DAT 818 FM801_GPIO_GP(TEA_256PCPR_DATA) |
828 FM801_GPIO_GP(TEA_256PCPR_BUS 819 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
829 FM801_GPIO_GP(TEA_256PCPR_WRI 820 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
830 outw(reg, FM801_REG(chip, GPIO_CTRL)); 821 outw(reg, FM801_REG(chip, GPIO_CTRL));
831 udelay(1); 822 udelay(1);
832 823
833 while (i--) { 824 while (i--) {
834 if (val & (1 << i)) 825 if (val & (1 << i))
835 reg |= FM801_GPIO_GP(T 826 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
836 else 827 else
837 reg &= ~FM801_GPIO_GP( 828 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
838 outw(reg, FM801_REG(chip, GPIO 829 outw(reg, FM801_REG(chip, GPIO_CTRL));
839 udelay(1); 830 udelay(1);
840 reg |= FM801_GPIO_GP(TEA_256PC 831 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
841 outw(reg, FM801_REG(chip, GPIO 832 outw(reg, FM801_REG(chip, GPIO_CTRL));
842 reg &= ~FM801_GPIO_GP(TEA_256P 833 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
843 outw(reg, FM801_REG(chip, GPIO 834 outw(reg, FM801_REG(chip, GPIO_CTRL));
844 udelay(1); 835 udelay(1);
845 } 836 }
846 837
847 /* and reset the write enable bit */ 838 /* and reset the write enable bit */
848 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE 839 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
849 FM801_GPIO_GP(TEA_256PCPR_DATA) 840 FM801_GPIO_GP(TEA_256PCPR_DATA);
850 outw(reg, FM801_REG(chip, GPIO_CTRL)); 841 outw(reg, FM801_REG(chip, GPIO_CTRL));
851 spin_unlock_irq(&chip->reg_lock); 842 spin_unlock_irq(&chip->reg_lock);
852 } 843 }
853 844
854 static unsigned int snd_fm801_tea575x_256pcpr_ !! 845 static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
855 { 846 {
856 struct fm801 *chip = tea->private_data !! 847 fm801_t *chip = tea->private_data;
857 unsigned short reg; 848 unsigned short reg;
858 unsigned int val = 0; 849 unsigned int val = 0;
859 int i; 850 int i;
860 851
861 spin_lock_irq(&chip->reg_lock); 852 spin_lock_irq(&chip->reg_lock);
862 reg = inw(FM801_REG(chip, GPIO_CTRL)); 853 reg = inw(FM801_REG(chip, GPIO_CTRL));
863 /* use GPIO lines, set data direction 854 /* use GPIO lines, set data direction to input */
864 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) 855 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
865 FM801_GPIO_GS(TEA_256PCPR_WRITE 856 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
866 FM801_GPIO_GS(TEA_256PCPR_BUS_C 857 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
867 FM801_GPIO_GD(TEA_256PCPR_DATA) 858 FM801_GPIO_GD(TEA_256PCPR_DATA) |
868 FM801_GPIO_GP(TEA_256PCPR_DATA) 859 FM801_GPIO_GP(TEA_256PCPR_DATA) |
869 FM801_GPIO_GP(TEA_256PCPR_WRITE 860 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
870 /* all of lines are in the write direc 861 /* all of lines are in the write direction, except data */
871 /* clear data, write enable and clock 862 /* clear data, write enable and clock lines */
872 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRI 863 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
873 FM801_GPIO_GD(TEA_256PCPR_BUS 864 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
874 FM801_GPIO_GP(TEA_256PCPR_BUS 865 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
875 866
876 for (i = 0; i < 24; i++) { 867 for (i = 0; i < 24; i++) {
877 reg &= ~FM801_GPIO_GP(TEA_256P 868 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
878 outw(reg, FM801_REG(chip, GPIO 869 outw(reg, FM801_REG(chip, GPIO_CTRL));
879 udelay(1); 870 udelay(1);
880 reg |= FM801_GPIO_GP(TEA_256PC 871 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
881 outw(reg, FM801_REG(chip, GPIO 872 outw(reg, FM801_REG(chip, GPIO_CTRL));
882 udelay(1); 873 udelay(1);
883 val <<= 1; 874 val <<= 1;
884 if (inw(FM801_REG(chip, GPIO_C 875 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
885 val |= 1; 876 val |= 1;
886 } 877 }
887 878
888 spin_unlock_irq(&chip->reg_lock); 879 spin_unlock_irq(&chip->reg_lock);
889 880
890 return val; 881 return val;
891 } 882 }
892 883
893 /* 64PCR GPIO numbers */ 884 /* 64PCR GPIO numbers */
894 #define TEA_64PCR_BUS_CLOCK 0 885 #define TEA_64PCR_BUS_CLOCK 0
895 #define TEA_64PCR_WRITE_ENABLE 1 886 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
896 #define TEA_64PCR_DATA 2 887 #define TEA_64PCR_DATA 2
897 888
898 static void snd_fm801_tea575x_64pcr_write(stru !! 889 static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
899 { 890 {
900 struct fm801 *chip = tea->private_data !! 891 fm801_t *chip = tea->private_data;
901 unsigned short reg; 892 unsigned short reg;
902 int i = 25; 893 int i = 25;
903 894
904 spin_lock_irq(&chip->reg_lock); 895 spin_lock_irq(&chip->reg_lock);
905 reg = inw(FM801_REG(chip, GPIO_CTRL)); 896 reg = inw(FM801_REG(chip, GPIO_CTRL));
906 /* use GPIO lines and set write enable 897 /* use GPIO lines and set write enable bit */
907 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 898 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
908 FM801_GPIO_GS(TEA_64PCR_WRITE_E 899 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
909 FM801_GPIO_GS(TEA_64PCR_BUS_CLO 900 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
910 /* all of lines are in the write direc 901 /* all of lines are in the write direction */
911 /* clear data and clock lines */ 902 /* clear data and clock lines */
912 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) 903 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
913 FM801_GPIO_GD(TEA_64PCR_WRITE 904 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
914 FM801_GPIO_GD(TEA_64PCR_BUS_C 905 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
915 FM801_GPIO_GP(TEA_64PCR_DATA) 906 FM801_GPIO_GP(TEA_64PCR_DATA) |
916 FM801_GPIO_GP(TEA_64PCR_BUS_C 907 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
917 FM801_GPIO_GP(TEA_64PCR_WRITE 908 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
918 outw(reg, FM801_REG(chip, GPIO_CTRL)); 909 outw(reg, FM801_REG(chip, GPIO_CTRL));
919 udelay(1); 910 udelay(1);
920 911
921 while (i--) { 912 while (i--) {
922 if (val & (1 << i)) 913 if (val & (1 << i))
923 reg |= FM801_GPIO_GP(T 914 reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
924 else 915 else
925 reg &= ~FM801_GPIO_GP( 916 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
926 outw(reg, FM801_REG(chip, GPIO 917 outw(reg, FM801_REG(chip, GPIO_CTRL));
927 udelay(1); 918 udelay(1);
928 reg |= FM801_GPIO_GP(TEA_64PCR 919 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
929 outw(reg, FM801_REG(chip, GPIO 920 outw(reg, FM801_REG(chip, GPIO_CTRL));
930 reg &= ~FM801_GPIO_GP(TEA_64PC 921 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
931 outw(reg, FM801_REG(chip, GPIO 922 outw(reg, FM801_REG(chip, GPIO_CTRL));
932 udelay(1); 923 udelay(1);
933 } 924 }
934 925
935 /* and reset the write enable bit */ 926 /* and reset the write enable bit */
936 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_E 927 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
937 FM801_GPIO_GP(TEA_64PCR_DATA); 928 FM801_GPIO_GP(TEA_64PCR_DATA);
938 outw(reg, FM801_REG(chip, GPIO_CTRL)); 929 outw(reg, FM801_REG(chip, GPIO_CTRL));
939 spin_unlock_irq(&chip->reg_lock); 930 spin_unlock_irq(&chip->reg_lock);
940 } 931 }
941 932
942 static unsigned int snd_fm801_tea575x_64pcr_re !! 933 static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
943 { 934 {
944 struct fm801 *chip = tea->private_data !! 935 fm801_t *chip = tea->private_data;
945 unsigned short reg; 936 unsigned short reg;
946 unsigned int val = 0; 937 unsigned int val = 0;
947 int i; 938 int i;
948 939
949 spin_lock_irq(&chip->reg_lock); 940 spin_lock_irq(&chip->reg_lock);
950 reg = inw(FM801_REG(chip, GPIO_CTRL)); 941 reg = inw(FM801_REG(chip, GPIO_CTRL));
951 /* use GPIO lines, set data direction 942 /* use GPIO lines, set data direction to input */
952 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 943 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
953 FM801_GPIO_GS(TEA_64PCR_WRITE_E 944 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
954 FM801_GPIO_GS(TEA_64PCR_BUS_CLO 945 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
955 FM801_GPIO_GD(TEA_64PCR_DATA) | 946 FM801_GPIO_GD(TEA_64PCR_DATA) |
956 FM801_GPIO_GP(TEA_64PCR_DATA) | 947 FM801_GPIO_GP(TEA_64PCR_DATA) |
957 FM801_GPIO_GP(TEA_64PCR_WRITE_E 948 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
958 /* all of lines are in the write direc 949 /* all of lines are in the write direction, except data */
959 /* clear data, write enable and clock 950 /* clear data, write enable and clock lines */
960 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE 951 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
961 FM801_GPIO_GD(TEA_64PCR_BUS_C 952 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
962 FM801_GPIO_GP(TEA_64PCR_BUS_C 953 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
963 954
964 for (i = 0; i < 24; i++) { 955 for (i = 0; i < 24; i++) {
965 reg &= ~FM801_GPIO_GP(TEA_64PC 956 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
966 outw(reg, FM801_REG(chip, GPIO 957 outw(reg, FM801_REG(chip, GPIO_CTRL));
967 udelay(1); 958 udelay(1);
968 reg |= FM801_GPIO_GP(TEA_64PCR 959 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
969 outw(reg, FM801_REG(chip, GPIO 960 outw(reg, FM801_REG(chip, GPIO_CTRL));
970 udelay(1); 961 udelay(1);
971 val <<= 1; 962 val <<= 1;
972 if (inw(FM801_REG(chip, GPIO_C 963 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
973 val |= 1; 964 val |= 1;
974 } 965 }
975 966
976 spin_unlock_irq(&chip->reg_lock); 967 spin_unlock_irq(&chip->reg_lock);
977 968
978 return val; 969 return val;
979 } 970 }
980 971
981 static void snd_fm801_tea575x_64pcr_mute(struc <<
982 unsi <<
983 { <<
984 struct fm801 *chip = tea->private_data <<
985 unsigned short reg; <<
986 <<
987 spin_lock_irq(&chip->reg_lock); <<
988 <<
989 reg = inw(FM801_REG(chip, GPIO_CTRL)); <<
990 if (mute) <<
991 /* 0xf800 (mute) */ <<
992 reg &= ~FM801_GPIO_GP(TEA_64PC <<
993 else <<
994 /* 0xf802 (unmute) */ <<
995 reg |= FM801_GPIO_GP(TEA_64PCR <<
996 outw(reg, FM801_REG(chip, GPIO_CTRL)); <<
997 udelay(1); <<
998 <<
999 spin_unlock_irq(&chip->reg_lock); <<
1000 } <<
1001 <<
1002 static struct snd_tea575x_ops snd_fm801_tea_o 972 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
1003 { 973 {
1004 /* 1 = MediaForte 256-PCS */ 974 /* 1 = MediaForte 256-PCS */
1005 .write = snd_fm801_tea575x_25 975 .write = snd_fm801_tea575x_256pcs_write,
1006 .read = snd_fm801_tea575x_256 976 .read = snd_fm801_tea575x_256pcs_read,
1007 }, 977 },
1008 { 978 {
1009 /* 2 = MediaForte 256-PCPR */ 979 /* 2 = MediaForte 256-PCPR */
1010 .write = snd_fm801_tea575x_25 980 .write = snd_fm801_tea575x_256pcpr_write,
1011 .read = snd_fm801_tea575x_256 981 .read = snd_fm801_tea575x_256pcpr_read,
1012 }, 982 },
1013 { 983 {
1014 /* 3 = MediaForte 64-PCR */ 984 /* 3 = MediaForte 64-PCR */
1015 .write = snd_fm801_tea575x_64 985 .write = snd_fm801_tea575x_64pcr_write,
1016 .read = snd_fm801_tea575x_64p 986 .read = snd_fm801_tea575x_64pcr_read,
1017 .mute = snd_fm801_tea575x_64p <<
1018 } 987 }
1019 }; 988 };
1020 #endif 989 #endif
1021 990
1022 /* 991 /*
1023 * Mixer routines 992 * Mixer routines
1024 */ 993 */
1025 994
1026 #define FM801_SINGLE(xname, reg, shift, mask, 995 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
1027 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name 996 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
1028 .get = snd_fm801_get_single, .put = snd_fm8 997 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
1029 .private_value = reg | (shift << 8) | (mask 998 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1030 999
1031 static int snd_fm801_info_single(struct snd_k !! 1000 static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1032 struct snd_c <<
1033 { 1001 {
1034 int mask = (kcontrol->private_value > 1002 int mask = (kcontrol->private_value >> 16) & 0xff;
1035 1003
1036 uinfo->type = mask == 1 ? SNDRV_CTL_E 1004 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1037 uinfo->count = 1; 1005 uinfo->count = 1;
1038 uinfo->value.integer.min = 0; 1006 uinfo->value.integer.min = 0;
1039 uinfo->value.integer.max = mask; 1007 uinfo->value.integer.max = mask;
1040 return 0; 1008 return 0;
1041 } 1009 }
1042 1010
1043 static int snd_fm801_get_single(struct snd_kc !! 1011 static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1044 struct snd_ct <<
1045 { 1012 {
1046 struct fm801 *chip = snd_kcontrol_chi !! 1013 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1047 int reg = kcontrol->private_value & 0 1014 int reg = kcontrol->private_value & 0xff;
1048 int shift = (kcontrol->private_value 1015 int shift = (kcontrol->private_value >> 8) & 0xff;
1049 int mask = (kcontrol->private_value > 1016 int mask = (kcontrol->private_value >> 16) & 0xff;
1050 int invert = (kcontrol->private_value 1017 int invert = (kcontrol->private_value >> 24) & 0xff;
1051 1018
1052 ucontrol->value.integer.value[0] = (i 1019 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1053 if (invert) 1020 if (invert)
1054 ucontrol->value.integer.value 1021 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1055 return 0; 1022 return 0;
1056 } 1023 }
1057 1024
1058 static int snd_fm801_put_single(struct snd_kc !! 1025 static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1059 struct snd_ct <<
1060 { 1026 {
1061 struct fm801 *chip = snd_kcontrol_chi !! 1027 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1062 int reg = kcontrol->private_value & 0 1028 int reg = kcontrol->private_value & 0xff;
1063 int shift = (kcontrol->private_value 1029 int shift = (kcontrol->private_value >> 8) & 0xff;
1064 int mask = (kcontrol->private_value > 1030 int mask = (kcontrol->private_value >> 16) & 0xff;
1065 int invert = (kcontrol->private_value 1031 int invert = (kcontrol->private_value >> 24) & 0xff;
1066 unsigned short val; 1032 unsigned short val;
1067 1033
1068 val = (ucontrol->value.integer.value[ 1034 val = (ucontrol->value.integer.value[0] & mask);
1069 if (invert) 1035 if (invert)
1070 val = mask - val; 1036 val = mask - val;
1071 return snd_fm801_update_bits(chip, re 1037 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1072 } 1038 }
1073 1039
1074 #define FM801_DOUBLE(xname, reg, shift_left, 1040 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1075 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name 1041 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1076 .get = snd_fm801_get_double, .put = snd_fm8 1042 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1077 .private_value = reg | (shift_left << 8) | 1043 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1078 #define FM801_DOUBLE_TLV(xname, reg, shift_le <<
1079 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ <<
1080 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | <<
1081 .name = xname, .info = snd_fm801_info_doubl <<
1082 .get = snd_fm801_get_double, .put = snd_fm8 <<
1083 .private_value = reg | (shift_left << 8) | <<
1084 .tlv = { .p = (xtlv) } } <<
1085 1044
1086 static int snd_fm801_info_double(struct snd_k !! 1045 static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1087 struct snd_c <<
1088 { 1046 {
1089 int mask = (kcontrol->private_value > 1047 int mask = (kcontrol->private_value >> 16) & 0xff;
1090 1048
1091 uinfo->type = mask == 1 ? SNDRV_CTL_E 1049 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1092 uinfo->count = 2; 1050 uinfo->count = 2;
1093 uinfo->value.integer.min = 0; 1051 uinfo->value.integer.min = 0;
1094 uinfo->value.integer.max = mask; 1052 uinfo->value.integer.max = mask;
1095 return 0; 1053 return 0;
1096 } 1054 }
1097 1055
1098 static int snd_fm801_get_double(struct snd_kc !! 1056 static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1099 struct snd_ct <<
1100 { 1057 {
1101 struct fm801 *chip = snd_kcontrol_chi !! 1058 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1102 int reg = kcontrol->private_value & 0 1059 int reg = kcontrol->private_value & 0xff;
1103 int shift_left = (kcontrol->private_v 1060 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1104 int shift_right = (kcontrol->private_ 1061 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1105 int mask = (kcontrol->private_value > 1062 int mask = (kcontrol->private_value >> 16) & 0xff;
1106 int invert = (kcontrol->private_value 1063 int invert = (kcontrol->private_value >> 24) & 0xff;
1107 1064
1108 spin_lock_irq(&chip->reg_lock); 1065 spin_lock_irq(&chip->reg_lock);
1109 ucontrol->value.integer.value[0] = (i 1066 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1110 ucontrol->value.integer.value[1] = (i 1067 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1111 spin_unlock_irq(&chip->reg_lock); 1068 spin_unlock_irq(&chip->reg_lock);
1112 if (invert) { 1069 if (invert) {
1113 ucontrol->value.integer.value 1070 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1114 ucontrol->value.integer.value 1071 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1115 } 1072 }
1116 return 0; 1073 return 0;
1117 } 1074 }
1118 1075
1119 static int snd_fm801_put_double(struct snd_kc !! 1076 static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1120 struct snd_ct <<
1121 { 1077 {
1122 struct fm801 *chip = snd_kcontrol_chi !! 1078 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1123 int reg = kcontrol->private_value & 0 1079 int reg = kcontrol->private_value & 0xff;
1124 int shift_left = (kcontrol->private_v 1080 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1125 int shift_right = (kcontrol->private_ 1081 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1126 int mask = (kcontrol->private_value > 1082 int mask = (kcontrol->private_value >> 16) & 0xff;
1127 int invert = (kcontrol->private_value 1083 int invert = (kcontrol->private_value >> 24) & 0xff;
1128 unsigned short val1, val2; 1084 unsigned short val1, val2;
1129 1085
1130 val1 = ucontrol->value.integer.value[ 1086 val1 = ucontrol->value.integer.value[0] & mask;
1131 val2 = ucontrol->value.integer.value[ 1087 val2 = ucontrol->value.integer.value[1] & mask;
1132 if (invert) { 1088 if (invert) {
1133 val1 = mask - val1; 1089 val1 = mask - val1;
1134 val2 = mask - val2; 1090 val2 = mask - val2;
1135 } 1091 }
1136 return snd_fm801_update_bits(chip, re 1092 return snd_fm801_update_bits(chip, reg,
1137 (mask << 1093 (mask << shift_left) | (mask << shift_right),
1138 (val1 << 1094 (val1 << shift_left ) | (val2 << shift_right));
1139 } 1095 }
1140 1096
1141 static int snd_fm801_info_mux(struct snd_kcon !! 1097 static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1142 struct snd_ctl_ <<
1143 { 1098 {
1144 static char *texts[5] = { 1099 static char *texts[5] = {
1145 "AC97 Primary", "FM", "I2S", 1100 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1146 }; 1101 };
1147 1102
1148 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENU 1103 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1149 uinfo->count = 1; 1104 uinfo->count = 1;
1150 uinfo->value.enumerated.items = 5; 1105 uinfo->value.enumerated.items = 5;
1151 if (uinfo->value.enumerated.item > 4) 1106 if (uinfo->value.enumerated.item > 4)
1152 uinfo->value.enumerated.item 1107 uinfo->value.enumerated.item = 4;
1153 strcpy(uinfo->value.enumerated.name, 1108 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1154 return 0; 1109 return 0;
1155 } 1110 }
1156 1111
1157 static int snd_fm801_get_mux(struct snd_kcont !! 1112 static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1158 struct snd_ctl_e <<
1159 { 1113 {
1160 struct fm801 *chip = snd_kcontrol_chi !! 1114 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1161 unsigned short val; 1115 unsigned short val;
1162 1116
1163 val = inw(FM801_REG(chip, REC_SRC)) & 1117 val = inw(FM801_REG(chip, REC_SRC)) & 7;
1164 if (val > 4) 1118 if (val > 4)
1165 val = 4; 1119 val = 4;
1166 ucontrol->value.enumerated.item[0] = 1120 ucontrol->value.enumerated.item[0] = val;
1167 return 0; 1121 return 0;
1168 } 1122 }
1169 1123
1170 static int snd_fm801_put_mux(struct snd_kcont !! 1124 static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1171 struct snd_ctl_e <<
1172 { 1125 {
1173 struct fm801 *chip = snd_kcontrol_chi !! 1126 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1174 unsigned short val; 1127 unsigned short val;
1175 1128
1176 if ((val = ucontrol->value.enumerated 1129 if ((val = ucontrol->value.enumerated.item[0]) > 4)
1177 return -EINVAL; 1130 return -EINVAL;
1178 return snd_fm801_update_bits(chip, FM 1131 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1179 } 1132 }
1180 1133
1181 static const DECLARE_TLV_DB_SCALE(db_scale_ds !! 1134 #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1182 <<
1183 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_c <<
1184 1135
1185 static struct snd_kcontrol_new snd_fm801_cont !! 1136 static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1186 FM801_DOUBLE_TLV("Wave Playback Volume", FM80 !! 1137 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1187 db_scale_dsp), <<
1188 FM801_SINGLE("Wave Playback Switch", FM801_PC 1138 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1189 FM801_DOUBLE_TLV("I2S Playback Volume", FM801 !! 1139 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1190 db_scale_dsp), <<
1191 FM801_SINGLE("I2S Playback Switch", FM801_I2S 1140 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1192 FM801_DOUBLE_TLV("FM Playback Volume", FM801_ !! 1141 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1193 db_scale_dsp), <<
1194 FM801_SINGLE("FM Playback Switch", FM801_FM_V 1142 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1195 { 1143 {
1196 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1144 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1197 .name = "Digital Capture Source", 1145 .name = "Digital Capture Source",
1198 .info = snd_fm801_info_mux, 1146 .info = snd_fm801_info_mux,
1199 .get = snd_fm801_get_mux, 1147 .get = snd_fm801_get_mux,
1200 .put = snd_fm801_put_mux, 1148 .put = snd_fm801_put_mux,
1201 } 1149 }
1202 }; 1150 };
1203 1151
1204 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_f !! 1152 #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1205 1153
1206 static struct snd_kcontrol_new snd_fm801_cont !! 1154 static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1207 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM8 1155 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1208 FM801_SINGLE("AC97 18-bit Switch", FM801_CODE 1156 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1209 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE !! 1157 FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
1210 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data !! 1158 FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
1211 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data !! 1159 FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
1212 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBAC !! 1160 FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
1213 }; 1161 };
1214 1162
1215 static void snd_fm801_mixer_free_ac97_bus(str !! 1163 static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1216 { 1164 {
1217 struct fm801 *chip = bus->private_dat !! 1165 fm801_t *chip = bus->private_data;
1218 chip->ac97_bus = NULL; 1166 chip->ac97_bus = NULL;
1219 } 1167 }
1220 1168
1221 static void snd_fm801_mixer_free_ac97(struct !! 1169 static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1222 { 1170 {
1223 struct fm801 *chip = ac97->private_da !! 1171 fm801_t *chip = ac97->private_data;
1224 if (ac97->num == 0) { 1172 if (ac97->num == 0) {
1225 chip->ac97 = NULL; 1173 chip->ac97 = NULL;
1226 } else { 1174 } else {
1227 chip->ac97_sec = NULL; 1175 chip->ac97_sec = NULL;
1228 } 1176 }
1229 } 1177 }
1230 1178
1231 static int __devinit snd_fm801_mixer(struct f !! 1179 static int __devinit snd_fm801_mixer(fm801_t *chip)
1232 { 1180 {
1233 struct snd_ac97_template ac97; !! 1181 ac97_template_t ac97;
1234 unsigned int i; 1182 unsigned int i;
1235 int err; 1183 int err;
1236 static struct snd_ac97_bus_ops ops = !! 1184 static ac97_bus_ops_t ops = {
1237 .write = snd_fm801_codec_writ 1185 .write = snd_fm801_codec_write,
1238 .read = snd_fm801_codec_read, 1186 .read = snd_fm801_codec_read,
1239 }; 1187 };
1240 1188
1241 if ((err = snd_ac97_bus(chip->card, 0 1189 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1242 return err; 1190 return err;
1243 chip->ac97_bus->private_free = snd_fm 1191 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1244 1192
1245 memset(&ac97, 0, sizeof(ac97)); 1193 memset(&ac97, 0, sizeof(ac97));
1246 ac97.private_data = chip; 1194 ac97.private_data = chip;
1247 ac97.private_free = snd_fm801_mixer_f 1195 ac97.private_free = snd_fm801_mixer_free_ac97;
1248 if ((err = snd_ac97_mixer(chip->ac97_ 1196 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1249 return err; 1197 return err;
1250 if (chip->secondary) { 1198 if (chip->secondary) {
1251 ac97.num = 1; 1199 ac97.num = 1;
1252 ac97.addr = chip->secondary_a 1200 ac97.addr = chip->secondary_addr;
1253 if ((err = snd_ac97_mixer(chi 1201 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1254 return err; 1202 return err;
1255 } 1203 }
1256 for (i = 0; i < FM801_CONTROLS; i++) 1204 for (i = 0; i < FM801_CONTROLS; i++)
1257 snd_ctl_add(chip->card, snd_c 1205 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1258 if (chip->multichannel) { 1206 if (chip->multichannel) {
1259 for (i = 0; i < FM801_CONTROL 1207 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1260 snd_ctl_add(chip->car 1208 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1261 } 1209 }
1262 return 0; 1210 return 0;
1263 } 1211 }
1264 1212
1265 /* 1213 /*
1266 * initialization routines 1214 * initialization routines
1267 */ 1215 */
1268 1216
1269 static int wait_for_codec(struct fm801 *chip, !! 1217 static int snd_fm801_free(fm801_t *chip)
1270 unsigned short reg, <<
1271 { <<
1272 unsigned long timeout = jiffies + wai <<
1273 <<
1274 outw(FM801_AC97_READ | (codec_id << F <<
1275 FM801_REG(chip, AC97_CMD)); <<
1276 udelay(5); <<
1277 do { <<
1278 if ((inw(FM801_REG(chip, AC97 <<
1279 == FM801_AC97_VALID) <<
1280 return 0; <<
1281 schedule_timeout_uninterrupti <<
1282 } while (time_after(timeout, jiffies) <<
1283 return -EIO; <<
1284 } <<
1285 <<
1286 static int snd_fm801_chip_init(struct fm801 * <<
1287 { <<
1288 unsigned short cmdw; <<
1289 <<
1290 if (chip->tea575x_tuner & 0x0010) <<
1291 goto __ac97_ok; <<
1292 <<
1293 /* codec cold reset + AC'97 warm rese <<
1294 outw((1<<5) | (1<<6), FM801_REG(chip, <<
1295 inw(FM801_REG(chip, CODEC_CTRL)); /* <<
1296 udelay(100); <<
1297 outw(0, FM801_REG(chip, CODEC_CTRL)); <<
1298 <<
1299 if (wait_for_codec(chip, 0, AC97_RESE <<
1300 snd_printk(KERN_ERR "Primary <<
1301 if (! resume) <<
1302 return -EIO; <<
1303 } <<
1304 <<
1305 if (chip->multichannel) { <<
1306 if (chip->secondary_addr) { <<
1307 wait_for_codec(chip, <<
1308 AC97_V <<
1309 } else { <<
1310 /* my card has the se <<
1311 /* at address #3, so <<
1312 int i; <<
1313 for (i = 3; i > 0; i- <<
1314 if (!wait_for <<
1315 <<
1316 cmdw <<
1317 if (c <<
1318 <<
1319 <<
1320 <<
1321 } <<
1322 } <<
1323 } <<
1324 } <<
1325 <<
1326 /* the recovery phase, it see <<
1327 /* cause timeout problems */ <<
1328 wait_for_codec(chip, 0, AC97_ <<
1329 } <<
1330 <<
1331 __ac97_ok: <<
1332 <<
1333 /* init volume */ <<
1334 outw(0x0808, FM801_REG(chip, PCM_VOL) <<
1335 outw(0x9f1f, FM801_REG(chip, FM_VOL)) <<
1336 outw(0x8808, FM801_REG(chip, I2S_VOL) <<
1337 <<
1338 /* I2S control - I2S mode */ <<
1339 outw(0x0003, FM801_REG(chip, I2S_MODE <<
1340 <<
1341 /* interrupt setup */ <<
1342 cmdw = inw(FM801_REG(chip, IRQ_MASK)) <<
1343 if (chip->irq < 0) <<
1344 cmdw |= 0x00c3; /* ma <<
1345 else <<
1346 cmdw &= ~0x0083; /* un <<
1347 outw(cmdw, FM801_REG(chip, IRQ_MASK)) <<
1348 <<
1349 /* interrupt clear */ <<
1350 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAP <<
1351 <<
1352 return 0; <<
1353 } <<
1354 <<
1355 <<
1356 static int snd_fm801_free(struct fm801 *chip) <<
1357 { 1218 {
1358 unsigned short cmdw; 1219 unsigned short cmdw;
1359 1220
1360 if (chip->irq < 0) 1221 if (chip->irq < 0)
1361 goto __end_hw; 1222 goto __end_hw;
1362 1223
1363 /* interrupt setup - mask everything 1224 /* interrupt setup - mask everything */
1364 cmdw = inw(FM801_REG(chip, IRQ_MASK)) 1225 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1365 cmdw |= 0x00c3; 1226 cmdw |= 0x00c3;
1366 outw(cmdw, FM801_REG(chip, IRQ_MASK)) 1227 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1367 1228
1368 __end_hw: 1229 __end_hw:
1369 #ifdef TEA575X_RADIO 1230 #ifdef TEA575X_RADIO
1370 snd_tea575x_exit(&chip->tea); 1231 snd_tea575x_exit(&chip->tea);
1371 #endif 1232 #endif
1372 if (chip->irq >= 0) 1233 if (chip->irq >= 0)
1373 free_irq(chip->irq, chip); !! 1234 free_irq(chip->irq, (void *)chip);
1374 pci_release_regions(chip->pci); 1235 pci_release_regions(chip->pci);
1375 pci_disable_device(chip->pci); 1236 pci_disable_device(chip->pci);
1376 1237
1377 kfree(chip); 1238 kfree(chip);
1378 return 0; 1239 return 0;
1379 } 1240 }
1380 1241
1381 static int snd_fm801_dev_free(struct snd_devi !! 1242 static int snd_fm801_dev_free(snd_device_t *device)
1382 { 1243 {
1383 struct fm801 *chip = device->device_d !! 1244 fm801_t *chip = device->device_data;
1384 return snd_fm801_free(chip); 1245 return snd_fm801_free(chip);
1385 } 1246 }
1386 1247
1387 static int __devinit snd_fm801_create(struct !! 1248 static int __devinit snd_fm801_create(snd_card_t * card,
1388 struct 1249 struct pci_dev * pci,
1389 int tea 1250 int tea575x_tuner,
1390 struct !! 1251 fm801_t ** rchip)
1391 { 1252 {
1392 struct fm801 *chip; !! 1253 fm801_t *chip;
>> 1254 unsigned char rev, id;
>> 1255 unsigned short cmdw;
>> 1256 unsigned long timeout;
1393 int err; 1257 int err;
1394 static struct snd_device_ops ops = { !! 1258 static snd_device_ops_t ops = {
1395 .dev_free = snd_fm801_dev 1259 .dev_free = snd_fm801_dev_free,
1396 }; 1260 };
1397 1261
1398 *rchip = NULL; 1262 *rchip = NULL;
1399 if ((err = pci_enable_device(pci)) < 1263 if ((err = pci_enable_device(pci)) < 0)
1400 return err; 1264 return err;
1401 chip = kzalloc(sizeof(*chip), GFP_KER !! 1265 chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
1402 if (chip == NULL) { 1266 if (chip == NULL) {
1403 pci_disable_device(pci); 1267 pci_disable_device(pci);
1404 return -ENOMEM; 1268 return -ENOMEM;
1405 } 1269 }
1406 spin_lock_init(&chip->reg_lock); 1270 spin_lock_init(&chip->reg_lock);
1407 chip->card = card; 1271 chip->card = card;
1408 chip->pci = pci; 1272 chip->pci = pci;
1409 chip->irq = -1; 1273 chip->irq = -1;
1410 chip->tea575x_tuner = tea575x_tuner; <<
1411 if ((err = pci_request_regions(pci, " 1274 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1412 kfree(chip); 1275 kfree(chip);
1413 pci_disable_device(pci); 1276 pci_disable_device(pci);
1414 return err; 1277 return err;
1415 } 1278 }
1416 chip->port = pci_resource_start(pci, 1279 chip->port = pci_resource_start(pci, 0);
1417 if ((tea575x_tuner & 0x0010) == 0) { !! 1280 if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
1418 if (request_irq(pci->irq, snd !! 1281 snd_printk("unable to grab IRQ %d\n", chip->irq);
1419 "FM801", chip !! 1282 snd_fm801_free(chip);
1420 snd_printk(KERN_ERR " !! 1283 return -EBUSY;
1421 snd_fm801_free(chip); <<
1422 return -EBUSY; <<
1423 } <<
1424 chip->irq = pci->irq; <<
1425 pci_set_master(pci); <<
1426 } 1284 }
>> 1285 chip->irq = pci->irq;
>> 1286 pci_set_master(pci);
1427 1287
1428 if (pci->revision >= 0xb1) /* FM !! 1288 pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
>> 1289 if (rev >= 0xb1) /* FM801-AU */
1429 chip->multichannel = 1; 1290 chip->multichannel = 1;
1430 1291
1431 snd_fm801_chip_init(chip, 0); !! 1292 /* codec cold reset + AC'97 warm reset */
>> 1293 outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
>> 1294 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
>> 1295 udelay(100);
>> 1296 outw(0, FM801_REG(chip, CODEC_CTRL));
>> 1297
>> 1298 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
>> 1299
>> 1300 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
>> 1301 udelay(5);
>> 1302 do {
>> 1303 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
>> 1304 goto __ac97_secondary;
>> 1305 set_current_state(TASK_UNINTERRUPTIBLE);
>> 1306 schedule_timeout(1);
>> 1307 } while (time_after(timeout, jiffies));
>> 1308 snd_printk("Primary AC'97 codec not found\n");
>> 1309 snd_fm801_free(chip);
>> 1310 return -EIO;
>> 1311
>> 1312 __ac97_secondary:
>> 1313 if (!chip->multichannel) /* lookup is not required */
>> 1314 goto __ac97_ok;
>> 1315 for (id = 3; id > 0; id--) { /* my card has the secondary codec */
>> 1316 /* at address #3, so the loop is inverted */
>> 1317
>> 1318 timeout = jiffies + HZ / 20;
>> 1319
>> 1320 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
>> 1321 udelay(5);
>> 1322 do {
>> 1323 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
>> 1324 cmdw = inw(FM801_REG(chip, AC97_DATA));
>> 1325 if (cmdw != 0xffff && cmdw != 0) {
>> 1326 chip->secondary = 1;
>> 1327 chip->secondary_addr = id;
>> 1328 goto __ac97_ok;
>> 1329 }
>> 1330 }
>> 1331 set_current_state(TASK_UNINTERRUPTIBLE);
>> 1332 schedule_timeout(1);
>> 1333 } while (time_after(timeout, jiffies));
>> 1334 }
>> 1335
>> 1336 /* the recovery phase, it seems that probing for non-existing codec might */
>> 1337 /* cause timeout problems */
>> 1338 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
>> 1339
>> 1340 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
>> 1341 udelay(5);
>> 1342 do {
>> 1343 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
>> 1344 goto __ac97_ok;
>> 1345 set_current_state(TASK_UNINTERRUPTIBLE);
>> 1346 schedule_timeout(1);
>> 1347 } while (time_after(timeout, jiffies));
>> 1348 snd_printk("Primary AC'97 codec not responding\n");
>> 1349 snd_fm801_free(chip);
>> 1350 return -EIO;
>> 1351
>> 1352 __ac97_ok:
>> 1353
>> 1354 /* init volume */
>> 1355 outw(0x0808, FM801_REG(chip, PCM_VOL));
>> 1356 outw(0x9f1f, FM801_REG(chip, FM_VOL));
>> 1357 outw(0x8808, FM801_REG(chip, I2S_VOL));
>> 1358
>> 1359 /* I2S control - I2S mode */
>> 1360 outw(0x0003, FM801_REG(chip, I2S_MODE));
>> 1361
>> 1362 /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
>> 1363 cmdw = inw(FM801_REG(chip, IRQ_MASK));
>> 1364 cmdw &= ~0x0083;
>> 1365 outw(cmdw, FM801_REG(chip, IRQ_MASK));
>> 1366
>> 1367 /* interrupt clear */
>> 1368 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1432 1369
1433 if ((err = snd_device_new(card, SNDRV 1370 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1434 snd_fm801_free(chip); 1371 snd_fm801_free(chip);
1435 return err; 1372 return err;
1436 } 1373 }
1437 1374
1438 snd_card_set_dev(card, &pci->dev); 1375 snd_card_set_dev(card, &pci->dev);
1439 1376
1440 #ifdef TEA575X_RADIO 1377 #ifdef TEA575X_RADIO
1441 if (tea575x_tuner > 0 && (tea575x_tun !! 1378 if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1442 chip->tea.dev_nr = tea575x_tu 1379 chip->tea.dev_nr = tea575x_tuner >> 16;
1443 chip->tea.card = card; 1380 chip->tea.card = card;
1444 chip->tea.freq_fixup = 10700; 1381 chip->tea.freq_fixup = 10700;
1445 chip->tea.private_data = chip 1382 chip->tea.private_data = chip;
1446 chip->tea.ops = &snd_fm801_te !! 1383 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1447 snd_tea575x_init(&chip->tea); 1384 snd_tea575x_init(&chip->tea);
1448 } 1385 }
1449 #endif 1386 #endif
1450 1387
1451 *rchip = chip; 1388 *rchip = chip;
1452 return 0; 1389 return 0;
1453 } 1390 }
1454 1391
1455 static int __devinit snd_card_fm801_probe(str 1392 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1456 con 1393 const struct pci_device_id *pci_id)
1457 { 1394 {
1458 static int dev; 1395 static int dev;
1459 struct snd_card *card; !! 1396 snd_card_t *card;
1460 struct fm801 *chip; !! 1397 fm801_t *chip;
1461 struct snd_opl3 *opl3; !! 1398 opl3_t *opl3;
1462 int err; 1399 int err;
1463 1400
1464 if (dev >= SNDRV_CARDS) 1401 if (dev >= SNDRV_CARDS)
1465 return -ENODEV; 1402 return -ENODEV;
1466 if (!enable[dev]) { 1403 if (!enable[dev]) {
1467 dev++; 1404 dev++;
1468 return -ENOENT; 1405 return -ENOENT;
1469 } 1406 }
1470 1407
1471 err = snd_card_create(index[dev], id[ !! 1408 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1472 if (err < 0) !! 1409 if (card == NULL)
1473 return err; !! 1410 return -ENOMEM;
1474 if ((err = snd_fm801_create(card, pci 1411 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1475 snd_card_free(card); 1412 snd_card_free(card);
1476 return err; 1413 return err;
1477 } 1414 }
1478 card->private_data = chip; <<
1479 1415
1480 strcpy(card->driver, "FM801"); 1416 strcpy(card->driver, "FM801");
1481 strcpy(card->shortname, "ForteMedia F 1417 strcpy(card->shortname, "ForteMedia FM801-");
1482 strcat(card->shortname, chip->multich 1418 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1483 sprintf(card->longname, "%s at 0x%lx, 1419 sprintf(card->longname, "%s at 0x%lx, irq %i",
1484 card->shortname, chip->port, 1420 card->shortname, chip->port, chip->irq);
1485 1421
1486 if (tea575x_tuner[dev] & 0x0010) <<
1487 goto __fm801_tuner_only; <<
1488 <<
1489 if ((err = snd_fm801_pcm(chip, 0, NUL 1422 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1490 snd_card_free(card); 1423 snd_card_free(card);
1491 return err; 1424 return err;
1492 } 1425 }
1493 if ((err = snd_fm801_mixer(chip)) < 0 1426 if ((err = snd_fm801_mixer(chip)) < 0) {
1494 snd_card_free(card); 1427 snd_card_free(card);
1495 return err; 1428 return err;
1496 } 1429 }
1497 if ((err = snd_mpu401_uart_new(card, 1430 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1498 FM801_ !! 1431 FM801_REG(chip, MPU401_DATA), 1,
1499 MPU401 <<
1500 chip-> 1432 chip->irq, 0, &chip->rmidi)) < 0) {
1501 snd_card_free(card); 1433 snd_card_free(card);
1502 return err; 1434 return err;
1503 } 1435 }
1504 if ((err = snd_opl3_create(card, FM80 1436 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1505 FM801_REG( 1437 FM801_REG(chip, OPL3_BANK1),
1506 OPL3_HW_OP 1438 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1507 snd_card_free(card); 1439 snd_card_free(card);
1508 return err; 1440 return err;
1509 } 1441 }
1510 if ((err = snd_opl3_hwdep_new(opl3, 0 1442 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1511 snd_card_free(card); 1443 snd_card_free(card);
1512 return err; 1444 return err;
1513 } 1445 }
1514 1446
1515 __fm801_tuner_only: <<
1516 if ((err = snd_card_register(card)) < 1447 if ((err = snd_card_register(card)) < 0) {
1517 snd_card_free(card); 1448 snd_card_free(card);
1518 return err; 1449 return err;
1519 } 1450 }
1520 pci_set_drvdata(pci, card); 1451 pci_set_drvdata(pci, card);
1521 dev++; 1452 dev++;
1522 return 0; 1453 return 0;
1523 } 1454 }
1524 1455
1525 static void __devexit snd_card_fm801_remove(s 1456 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1526 { 1457 {
1527 snd_card_free(pci_get_drvdata(pci)); 1458 snd_card_free(pci_get_drvdata(pci));
1528 pci_set_drvdata(pci, NULL); 1459 pci_set_drvdata(pci, NULL);
1529 } 1460 }
1530 1461
1531 #ifdef CONFIG_PM <<
1532 static unsigned char saved_regs[] = { <<
1533 FM801_PCM_VOL, FM801_I2S_VOL, FM801_F <<
1534 FM801_PLY_CTRL, FM801_PLY_COUNT, FM80 <<
1535 FM801_CAP_CTRL, FM801_CAP_COUNT, FM80 <<
1536 FM801_CODEC_CTRL, FM801_I2S_MODE, FM8 <<
1537 }; <<
1538 <<
1539 static int snd_fm801_suspend(struct pci_dev * <<
1540 { <<
1541 struct snd_card *card = pci_get_drvda <<
1542 struct fm801 *chip = card->private_da <<
1543 int i; <<
1544 <<
1545 snd_power_change_state(card, SNDRV_CT <<
1546 snd_pcm_suspend_all(chip->pcm); <<
1547 snd_ac97_suspend(chip->ac97); <<
1548 snd_ac97_suspend(chip->ac97_sec); <<
1549 for (i = 0; i < ARRAY_SIZE(saved_regs <<
1550 chip->saved_regs[i] = inw(chi <<
1551 /* FIXME: tea575x suspend */ <<
1552 <<
1553 pci_disable_device(pci); <<
1554 pci_save_state(pci); <<
1555 pci_set_power_state(pci, pci_choose_s <<
1556 return 0; <<
1557 } <<
1558 <<
1559 static int snd_fm801_resume(struct pci_dev *p <<
1560 { <<
1561 struct snd_card *card = pci_get_drvda <<
1562 struct fm801 *chip = card->private_da <<
1563 int i; <<
1564 <<
1565 pci_set_power_state(pci, PCI_D0); <<
1566 pci_restore_state(pci); <<
1567 if (pci_enable_device(pci) < 0) { <<
1568 printk(KERN_ERR "fm801: pci_e <<
1569 "disabling device\n"); <<
1570 snd_card_disconnect(card); <<
1571 return -EIO; <<
1572 } <<
1573 pci_set_master(pci); <<
1574 <<
1575 snd_fm801_chip_init(chip, 1); <<
1576 snd_ac97_resume(chip->ac97); <<
1577 snd_ac97_resume(chip->ac97_sec); <<
1578 for (i = 0; i < ARRAY_SIZE(saved_regs <<
1579 outw(chip->saved_regs[i], chi <<
1580 <<
1581 snd_power_change_state(card, SNDRV_CT <<
1582 return 0; <<
1583 } <<
1584 #endif <<
1585 <<
1586 static struct pci_driver driver = { 1462 static struct pci_driver driver = {
1587 .name = "FM801", 1463 .name = "FM801",
1588 .id_table = snd_fm801_ids, 1464 .id_table = snd_fm801_ids,
1589 .probe = snd_card_fm801_probe, 1465 .probe = snd_card_fm801_probe,
1590 .remove = __devexit_p(snd_card_fm801_ 1466 .remove = __devexit_p(snd_card_fm801_remove),
1591 #ifdef CONFIG_PM <<
1592 .suspend = snd_fm801_suspend, <<
1593 .resume = snd_fm801_resume, <<
1594 #endif <<
1595 }; 1467 };
1596 1468
1597 static int __init alsa_card_fm801_init(void) 1469 static int __init alsa_card_fm801_init(void)
1598 { 1470 {
1599 return pci_register_driver(&driver); !! 1471 return pci_module_init(&driver);
1600 } 1472 }
1601 1473
1602 static void __exit alsa_card_fm801_exit(void) 1474 static void __exit alsa_card_fm801_exit(void)
1603 { 1475 {
1604 pci_unregister_driver(&driver); 1476 pci_unregister_driver(&driver);
1605 } 1477 }
1606 1478
1607 module_init(alsa_card_fm801_init) 1479 module_init(alsa_card_fm801_init)
1608 module_exit(alsa_card_fm801_exit) 1480 module_exit(alsa_card_fm801_exit)
1609 1481
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