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1 /* 1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@su !! 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of CS4231(A)/CS4232/I 3 * Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4 * 4 *
5 * Bugs: 5 * Bugs:
6 * - sometimes record brokes playback with 6 * - sometimes record brokes playback with WSS portion of
7 * Yamaha OPL3-SA3 chip 7 * Yamaha OPL3-SA3 chip
8 * - CS4231 (GUS MAX) - still trouble with 8 * - CS4231 (GUS MAX) - still trouble with occasional noises
9 * - broken initializat 9 * - broken initialization?
10 * 10 *
11 * This program is free software; you can re 11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Pub 12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either vers 13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version. 14 * (at your option) any later version.
15 * 15 *
16 * This program is distributed in the hope t 16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even th 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICUL 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more detai 19 * GNU General Public License for more details.
20 * 20 *
21 * You should have received a copy of the GN 21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to 22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * 24 *
25 */ 25 */
26 26
27 #include <sound/driver.h> <<
28 #include <linux/delay.h> 27 #include <linux/delay.h>
29 #include <linux/pm.h> 28 #include <linux/pm.h>
30 #include <linux/init.h> 29 #include <linux/init.h>
31 #include <linux/interrupt.h> 30 #include <linux/interrupt.h>
32 #include <linux/slab.h> 31 #include <linux/slab.h>
33 #include <linux/ioport.h> 32 #include <linux/ioport.h>
34 #include <sound/core.h> 33 #include <sound/core.h>
35 #include <sound/cs4231.h> 34 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h> 35 #include <sound/pcm_params.h>
37 36
38 #include <asm/io.h> 37 #include <asm/io.h>
39 #include <asm/dma.h> 38 #include <asm/dma.h>
40 #include <asm/irq.h> 39 #include <asm/irq.h>
41 40
42 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz> !! 41 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS 42 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL"); 43 MODULE_LICENSE("GPL");
45 44
46 #if 0 45 #if 0
47 #define SNDRV_DEBUG_MCE 46 #define SNDRV_DEBUG_MCE
48 #endif 47 #endif
49 48
50 /* 49 /*
51 * Some variables 50 * Some variables
52 */ 51 */
53 52
54 static unsigned char freq_bits[14] = { 53 static unsigned char freq_bits[14] = {
55 /* 5510 */ 0x00 | CS4231_XTAL2, 54 /* 5510 */ 0x00 | CS4231_XTAL2,
56 /* 6620 */ 0x0E | CS4231_XTAL2, 55 /* 6620 */ 0x0E | CS4231_XTAL2,
57 /* 8000 */ 0x00 | CS4231_XTAL1, 56 /* 8000 */ 0x00 | CS4231_XTAL1,
58 /* 9600 */ 0x0E | CS4231_XTAL1, 57 /* 9600 */ 0x0E | CS4231_XTAL1,
59 /* 11025 */ 0x02 | CS4231_XTAL2, 58 /* 11025 */ 0x02 | CS4231_XTAL2,
60 /* 16000 */ 0x02 | CS4231_XTAL1, 59 /* 16000 */ 0x02 | CS4231_XTAL1,
61 /* 18900 */ 0x04 | CS4231_XTAL2, 60 /* 18900 */ 0x04 | CS4231_XTAL2,
62 /* 22050 */ 0x06 | CS4231_XTAL2, 61 /* 22050 */ 0x06 | CS4231_XTAL2,
63 /* 27042 */ 0x04 | CS4231_XTAL1, 62 /* 27042 */ 0x04 | CS4231_XTAL1,
64 /* 32000 */ 0x06 | CS4231_XTAL1, 63 /* 32000 */ 0x06 | CS4231_XTAL1,
65 /* 33075 */ 0x0C | CS4231_XTAL2, 64 /* 33075 */ 0x0C | CS4231_XTAL2,
66 /* 37800 */ 0x08 | CS4231_XTAL2, 65 /* 37800 */ 0x08 | CS4231_XTAL2,
67 /* 44100 */ 0x0A | CS4231_XTAL2, 66 /* 44100 */ 0x0A | CS4231_XTAL2,
68 /* 48000 */ 0x0C | CS4231_XTAL1 67 /* 48000 */ 0x0C | CS4231_XTAL1
69 }; 68 };
70 69
71 static unsigned int rates[14] = { 70 static unsigned int rates[14] = {
72 5510, 6620, 8000, 9600, 11025, 16000, 71 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
73 27042, 32000, 33075, 37800, 44100, 480 72 27042, 32000, 33075, 37800, 44100, 48000
74 }; 73 };
75 74
76 static snd_pcm_hw_constraint_list_t hw_constra !! 75 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
77 .count = 14, !! 76 .count = ARRAY_SIZE(rates),
78 .list = rates, 77 .list = rates,
79 .mask = 0, 78 .mask = 0,
80 }; 79 };
81 80
82 static int snd_cs4231_xrate(snd_pcm_runtime_t !! 81 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
83 { 82 {
84 return snd_pcm_hw_constraint_list(runt 83 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
85 } 84 }
86 85
87 static unsigned char snd_cs4231_original_image 86 static unsigned char snd_cs4231_original_image[32] =
88 { 87 {
89 0x00, /* 00/00 - lic 88 0x00, /* 00/00 - lic */
90 0x00, /* 01/01 - ric 89 0x00, /* 01/01 - ric */
91 0x9f, /* 02/02 - la1 90 0x9f, /* 02/02 - la1ic */
92 0x9f, /* 03/03 - ra1 91 0x9f, /* 03/03 - ra1ic */
93 0x9f, /* 04/04 - la2 92 0x9f, /* 04/04 - la2ic */
94 0x9f, /* 05/05 - ra2 93 0x9f, /* 05/05 - ra2ic */
95 0xbf, /* 06/06 - loc 94 0xbf, /* 06/06 - loc */
96 0xbf, /* 07/07 - roc 95 0xbf, /* 07/07 - roc */
97 0x20, /* 08/08 - pdf 96 0x20, /* 08/08 - pdfr */
98 CS4231_AUTOCALIB, /* 09/09 - ic 97 CS4231_AUTOCALIB, /* 09/09 - ic */
99 0x00, /* 0a/10 - pc 98 0x00, /* 0a/10 - pc */
100 0x00, /* 0b/11 - ti 99 0x00, /* 0b/11 - ti */
101 CS4231_MODE2, /* 0c/12 - mi 100 CS4231_MODE2, /* 0c/12 - mi */
102 0xfc, /* 0d/13 - lbc 101 0xfc, /* 0d/13 - lbc */
103 0x00, /* 0e/14 - pbr 102 0x00, /* 0e/14 - pbru */
104 0x00, /* 0f/15 - pbr 103 0x00, /* 0f/15 - pbrl */
105 0x80, /* 10/16 - afe 104 0x80, /* 10/16 - afei */
106 0x01, /* 11/17 - afe 105 0x01, /* 11/17 - afeii */
107 0x9f, /* 12/18 - lli 106 0x9f, /* 12/18 - llic */
108 0x9f, /* 13/19 - rli 107 0x9f, /* 13/19 - rlic */
109 0x00, /* 14/20 - tlb 108 0x00, /* 14/20 - tlb */
110 0x00, /* 15/21 - thb 109 0x00, /* 15/21 - thb */
111 0x00, /* 16/22 - la3 110 0x00, /* 16/22 - la3mic/reserved */
112 0x00, /* 17/23 - ra3 111 0x00, /* 17/23 - ra3mic/reserved */
113 0x00, /* 18/24 - afs 112 0x00, /* 18/24 - afs */
114 0x00, /* 19/25 - lam 113 0x00, /* 19/25 - lamoc/version */
115 0xcf, /* 1a/26 - mio 114 0xcf, /* 1a/26 - mioc */
116 0x00, /* 1b/27 - ram 115 0x00, /* 1b/27 - ramoc/reserved */
117 0x20, /* 1c/28 - cdf 116 0x20, /* 1c/28 - cdfr */
118 0x00, /* 1d/29 - res 117 0x00, /* 1d/29 - res4 */
119 0x00, /* 1e/30 - cbr 118 0x00, /* 1e/30 - cbru */
120 0x00, /* 1f/31 - cbr 119 0x00, /* 1f/31 - cbrl */
121 }; 120 };
122 121
123 /* 122 /*
124 * Basic I/O functions 123 * Basic I/O functions
125 */ 124 */
126 125
127 #if !defined(EBUS_SUPPORT) && !defined(SBUS_SU !! 126 static inline void cs4231_outb(struct snd_cs4231 *chip, u8 offset, u8 val)
128 #define __CS4231_INLINE__ inline <<
129 #else <<
130 #define __CS4231_INLINE__ /* nothing */ <<
131 #endif <<
132 <<
133 static __CS4231_INLINE__ void cs4231_outb(cs42 <<
134 { 127 {
135 #ifdef EBUS_SUPPORT <<
136 if (chip->ebus->flag) { <<
137 writeb(val, chip->port + (offs <<
138 } else { <<
139 #endif <<
140 #ifdef SBUS_SUPPORT <<
141 sbus_writeb(val, chip->port + <<
142 #endif <<
143 #ifdef EBUS_SUPPORT <<
144 } <<
145 #endif <<
146 #ifdef LEGACY_SUPPORT <<
147 outb(val, chip->port + offset); 128 outb(val, chip->port + offset);
148 #endif <<
149 } 129 }
150 130
151 static __CS4231_INLINE__ u8 cs4231_inb(cs4231_ !! 131 static inline u8 cs4231_inb(struct snd_cs4231 *chip, u8 offset)
152 { 132 {
153 #ifdef EBUS_SUPPORT <<
154 if (chip->ebus_flag) { <<
155 return readb(chip->port + (off <<
156 } else { <<
157 #endif <<
158 #ifdef SBUS_SUPPORT <<
159 return sbus_readb(chip->port + <<
160 #endif <<
161 #ifdef EBUS_SUPPORT <<
162 } <<
163 #endif <<
164 #ifdef LEGACY_SUPPORT <<
165 return inb(chip->port + offset); 133 return inb(chip->port + offset);
166 #endif <<
167 } 134 }
168 135
169 static void snd_cs4231_outm(cs4231_t *chip, un !! 136 static void snd_cs4231_wait(struct snd_cs4231 *chip)
170 unsigned char mask <<
171 { 137 {
172 int timeout; 138 int timeout;
173 unsigned char tmp; <<
174 139
175 for (timeout = 250; 140 for (timeout = 250;
176 timeout > 0 && (cs4231_inb(chip, 141 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
177 timeout--) 142 timeout--)
178 udelay(100); 143 udelay(100);
>> 144 }
>> 145
>> 146 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
>> 147 unsigned char mask, unsigned char value)
>> 148 {
>> 149 unsigned char tmp = (chip->image[reg] & mask) | value;
>> 150
>> 151 snd_cs4231_wait(chip);
179 #ifdef CONFIG_SND_DEBUG 152 #ifdef CONFIG_SND_DEBUG
180 if (cs4231_inb(chip, CS4231P(REGSEL)) 153 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
181 snd_printk("outm: auto calibra 154 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
182 #endif 155 #endif
183 if (chip->calibrate_mute) { !! 156 chip->image[reg] = tmp;
184 chip->image[reg] &= mask; !! 157 if (!chip->calibrate_mute) {
185 chip->image[reg] |= value; <<
186 } else { <<
187 cs4231_outb(chip, CS4231P(REGS 158 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
188 mb(); !! 159 wmb();
189 tmp = (chip->image[reg] & mask <<
190 cs4231_outb(chip, CS4231P(REG) 160 cs4231_outb(chip, CS4231P(REG), tmp);
191 chip->image[reg] = tmp; <<
192 mb(); 161 mb();
193 } 162 }
194 } 163 }
195 164
196 static void snd_cs4231_dout(cs4231_t *chip, un !! 165 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
197 { 166 {
198 int timeout; 167 int timeout;
199 168
200 for (timeout = 250; 169 for (timeout = 250;
201 timeout > 0 && (cs4231_inb(chip, 170 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
202 timeout--) 171 timeout--)
203 udelay(10); 172 udelay(10);
204 cs4231_outb(chip, CS4231P(REGSEL), chi 173 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
205 cs4231_outb(chip, CS4231P(REG), value) 174 cs4231_outb(chip, CS4231P(REG), value);
206 mb(); 175 mb();
207 } 176 }
208 177
209 void snd_cs4231_out(cs4231_t *chip, unsigned c !! 178 void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
210 { 179 {
211 int timeout; !! 180 snd_cs4231_wait(chip);
212 <<
213 for (timeout = 250; <<
214 timeout > 0 && (cs4231_inb(chip, <<
215 timeout--) <<
216 udelay(100); <<
217 #ifdef CONFIG_SND_DEBUG 181 #ifdef CONFIG_SND_DEBUG
218 if (cs4231_inb(chip, CS4231P(REGSEL)) 182 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
219 snd_printk("out: auto calibrat 183 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
220 #endif 184 #endif
221 cs4231_outb(chip, CS4231P(REGSEL), chi 185 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
222 cs4231_outb(chip, CS4231P(REG), value) 186 cs4231_outb(chip, CS4231P(REG), value);
223 chip->image[reg] = value; 187 chip->image[reg] = value;
224 mb(); 188 mb();
225 #if 0 !! 189 snd_printdd("codec out - reg 0x%x = 0x%x\n",
226 printk("codec out - reg 0x%x = 0x%x\n" !! 190 chip->mce_bit | reg, value);
227 #endif <<
228 } 191 }
229 192
230 unsigned char snd_cs4231_in(cs4231_t *chip, un !! 193 unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
231 { 194 {
232 int timeout; !! 195 snd_cs4231_wait(chip);
233 <<
234 for (timeout = 250; <<
235 timeout > 0 && (cs4231_inb(chip, <<
236 timeout--) <<
237 udelay(100); <<
238 #ifdef CONFIG_SND_DEBUG 196 #ifdef CONFIG_SND_DEBUG
239 if (cs4231_inb(chip, CS4231P(REGSEL)) 197 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
240 snd_printk("in: auto calibrati 198 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
241 #endif 199 #endif
242 cs4231_outb(chip, CS4231P(REGSEL), chi 200 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
243 mb(); 201 mb();
244 return cs4231_inb(chip, CS4231P(REG)); 202 return cs4231_inb(chip, CS4231P(REG));
245 } 203 }
246 204
247 void snd_cs4236_ext_out(cs4231_t *chip, unsign !! 205 void snd_cs4236_ext_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char val)
248 { 206 {
249 cs4231_outb(chip, CS4231P(REGSEL), chi 207 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
250 cs4231_outb(chip, CS4231P(REG), reg | 208 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
251 cs4231_outb(chip, CS4231P(REG), val); 209 cs4231_outb(chip, CS4231P(REG), val);
252 chip->eimage[CS4236_REG(reg)] = val; 210 chip->eimage[CS4236_REG(reg)] = val;
253 #if 0 211 #if 0
254 printk("ext out : reg = 0x%x, val = 0x 212 printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
255 #endif 213 #endif
256 } 214 }
257 215
258 unsigned char snd_cs4236_ext_in(cs4231_t *chip !! 216 unsigned char snd_cs4236_ext_in(struct snd_cs4231 *chip, unsigned char reg)
259 { 217 {
260 cs4231_outb(chip, CS4231P(REGSEL), chi 218 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
261 cs4231_outb(chip, CS4231P(REG), reg | 219 cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
262 #if 1 220 #if 1
263 return cs4231_inb(chip, CS4231P(REG)); 221 return cs4231_inb(chip, CS4231P(REG));
264 #else 222 #else
265 { 223 {
266 unsigned char res; 224 unsigned char res;
267 res = cs4231_inb(chip, CS4231P 225 res = cs4231_inb(chip, CS4231P(REG));
268 printk("ext in : reg = 0x%x, v 226 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
269 return res; 227 return res;
270 } 228 }
271 #endif 229 #endif
272 } 230 }
273 231
274 #if 0 232 #if 0
275 233
276 static void snd_cs4231_debug(cs4231_t *chip) !! 234 static void snd_cs4231_debug(struct snd_cs4231 *chip)
277 { 235 {
278 printk("CS4231 REGS: INDEX = 0x%0 236 printk("CS4231 REGS: INDEX = 0x%02x ", cs4231_inb(chip, CS4231P(REGSEL)));
279 printk(" STATUS = 0x%0 237 printk(" STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
280 printk(" 0x00: left input = 0x%0 238 printk(" 0x00: left input = 0x%02x ", snd_cs4231_in(chip, 0x00));
281 printk(" 0x10: alt 1 (CFIG 2) = 0x%0 239 printk(" 0x10: alt 1 (CFIG 2) = 0x%02x\n", snd_cs4231_in(chip, 0x10));
282 printk(" 0x01: right input = 0x%0 240 printk(" 0x01: right input = 0x%02x ", snd_cs4231_in(chip, 0x01));
283 printk(" 0x11: alt 2 (CFIG 3) = 0x%0 241 printk(" 0x11: alt 2 (CFIG 3) = 0x%02x\n", snd_cs4231_in(chip, 0x11));
284 printk(" 0x02: GF1 left input = 0x%0 242 printk(" 0x02: GF1 left input = 0x%02x ", snd_cs4231_in(chip, 0x02));
285 printk(" 0x12: left line in = 0x%0 243 printk(" 0x12: left line in = 0x%02x\n", snd_cs4231_in(chip, 0x12));
286 printk(" 0x03: GF1 right input = 0x%0 244 printk(" 0x03: GF1 right input = 0x%02x ", snd_cs4231_in(chip, 0x03));
287 printk(" 0x13: right line in = 0x%0 245 printk(" 0x13: right line in = 0x%02x\n", snd_cs4231_in(chip, 0x13));
288 printk(" 0x04: CD left input = 0x%0 246 printk(" 0x04: CD left input = 0x%02x ", snd_cs4231_in(chip, 0x04));
289 printk(" 0x14: timer low = 0x%0 247 printk(" 0x14: timer low = 0x%02x\n", snd_cs4231_in(chip, 0x14));
290 printk(" 0x05: CD right input = 0x%0 248 printk(" 0x05: CD right input = 0x%02x ", snd_cs4231_in(chip, 0x05));
291 printk(" 0x15: timer high = 0x%0 249 printk(" 0x15: timer high = 0x%02x\n", snd_cs4231_in(chip, 0x15));
292 printk(" 0x06: left output = 0x%0 250 printk(" 0x06: left output = 0x%02x ", snd_cs4231_in(chip, 0x06));
293 printk(" 0x16: left MIC (PnP) = 0x%0 251 printk(" 0x16: left MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x16));
294 printk(" 0x07: right output = 0x%0 252 printk(" 0x07: right output = 0x%02x ", snd_cs4231_in(chip, 0x07));
295 printk(" 0x17: right MIC (PnP) = 0x%0 253 printk(" 0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
296 printk(" 0x08: playback format = 0x%0 254 printk(" 0x08: playback format = 0x%02x ", snd_cs4231_in(chip, 0x08));
297 printk(" 0x18: IRQ status = 0x%0 255 printk(" 0x18: IRQ status = 0x%02x\n", snd_cs4231_in(chip, 0x18));
298 printk(" 0x09: iface (CFIG 1) = 0x%0 256 printk(" 0x09: iface (CFIG 1) = 0x%02x ", snd_cs4231_in(chip, 0x09));
299 printk(" 0x19: left line out = 0x%0 257 printk(" 0x19: left line out = 0x%02x\n", snd_cs4231_in(chip, 0x19));
300 printk(" 0x0a: pin control = 0x%0 258 printk(" 0x0a: pin control = 0x%02x ", snd_cs4231_in(chip, 0x0a));
301 printk(" 0x1a: mono control = 0x%0 259 printk(" 0x1a: mono control = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
302 printk(" 0x0b: init & status = 0x%0 260 printk(" 0x0b: init & status = 0x%02x ", snd_cs4231_in(chip, 0x0b));
303 printk(" 0x1b: right line out = 0x%0 261 printk(" 0x1b: right line out = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
304 printk(" 0x0c: revision & mode = 0x%0 262 printk(" 0x0c: revision & mode = 0x%02x ", snd_cs4231_in(chip, 0x0c));
305 printk(" 0x1c: record format = 0x%0 263 printk(" 0x1c: record format = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
306 printk(" 0x0d: loopback = 0x%0 264 printk(" 0x0d: loopback = 0x%02x ", snd_cs4231_in(chip, 0x0d));
307 printk(" 0x1d: var freq (PnP) = 0x%0 265 printk(" 0x1d: var freq (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
308 printk(" 0x0e: ply upr count = 0x%0 266 printk(" 0x0e: ply upr count = 0x%02x ", snd_cs4231_in(chip, 0x0e));
309 printk(" 0x1e: ply lwr count = 0x%0 267 printk(" 0x1e: ply lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
310 printk(" 0x0f: rec upr count = 0x%0 268 printk(" 0x0f: rec upr count = 0x%02x ", snd_cs4231_in(chip, 0x0f));
311 printk(" 0x1f: rec lwr count = 0x%0 269 printk(" 0x1f: rec lwr count = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
312 } 270 }
313 271
314 #endif 272 #endif
315 273
316 /* 274 /*
317 * CS4231 detection / MCE routines 275 * CS4231 detection / MCE routines
318 */ 276 */
319 277
320 static void snd_cs4231_busy_wait(cs4231_t *chi !! 278 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
321 { 279 {
322 int timeout; 280 int timeout;
323 281
324 /* huh.. looks like this sequence is p 282 /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
325 for (timeout = 5; timeout > 0; timeout 283 for (timeout = 5; timeout > 0; timeout--)
326 cs4231_inb(chip, CS4231P(REGSE 284 cs4231_inb(chip, CS4231P(REGSEL));
327 /* end of cleanup sequence */ 285 /* end of cleanup sequence */
328 for (timeout = 250; 286 for (timeout = 250;
329 timeout > 0 && (cs4231_inb(chip, 287 timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
330 timeout--) 288 timeout--)
331 udelay(10); 289 udelay(10);
332 } 290 }
333 291
334 void snd_cs4231_mce_up(cs4231_t *chip) !! 292 void snd_cs4231_mce_up(struct snd_cs4231 *chip)
335 { 293 {
336 unsigned long flags; 294 unsigned long flags;
337 int timeout; 295 int timeout;
338 296
339 for (timeout = 250; timeout > 0 && (cs !! 297 snd_cs4231_wait(chip);
340 udelay(100); <<
341 #ifdef CONFIG_SND_DEBUG 298 #ifdef CONFIG_SND_DEBUG
342 if (cs4231_inb(chip, CS4231P(REGSEL)) 299 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
343 snd_printk("mce_up - auto cali 300 snd_printk("mce_up - auto calibration time out (0)\n");
344 #endif 301 #endif
345 spin_lock_irqsave(&chip->reg_lock, fla 302 spin_lock_irqsave(&chip->reg_lock, flags);
346 chip->mce_bit |= CS4231_MCE; 303 chip->mce_bit |= CS4231_MCE;
347 timeout = cs4231_inb(chip, CS4231P(REG 304 timeout = cs4231_inb(chip, CS4231P(REGSEL));
348 if (timeout == 0x80) 305 if (timeout == 0x80)
349 snd_printk("mce_up [0x%lx]: se 306 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
350 if (!(timeout & CS4231_MCE)) 307 if (!(timeout & CS4231_MCE))
351 cs4231_outb(chip, CS4231P(REGS 308 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
352 spin_unlock_irqrestore(&chip->reg_lock 309 spin_unlock_irqrestore(&chip->reg_lock, flags);
353 } 310 }
354 311
355 void snd_cs4231_mce_down(cs4231_t *chip) !! 312 void snd_cs4231_mce_down(struct snd_cs4231 *chip)
356 { 313 {
357 unsigned long flags; 314 unsigned long flags;
>> 315 unsigned long end_time;
358 int timeout; 316 int timeout;
359 317
360 snd_cs4231_busy_wait(chip); 318 snd_cs4231_busy_wait(chip);
361 #if 0 !! 319
362 printk("(1) timeout = %i\n", timeout); <<
363 #endif <<
364 #ifdef CONFIG_SND_DEBUG 320 #ifdef CONFIG_SND_DEBUG
365 if (cs4231_inb(chip, CS4231P(REGSEL)) 321 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
366 snd_printk("mce_down [0x%lx] - 322 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
367 #endif 323 #endif
368 spin_lock_irqsave(&chip->reg_lock, fla 324 spin_lock_irqsave(&chip->reg_lock, flags);
369 chip->mce_bit &= ~CS4231_MCE; 325 chip->mce_bit &= ~CS4231_MCE;
370 timeout = cs4231_inb(chip, CS4231P(REG 326 timeout = cs4231_inb(chip, CS4231P(REGSEL));
371 cs4231_outb(chip, CS4231P(REGSEL), chi 327 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
372 spin_unlock_irqrestore(&chip->reg_lock 328 spin_unlock_irqrestore(&chip->reg_lock, flags);
373 if (timeout == 0x80) 329 if (timeout == 0x80)
374 snd_printk("mce_down [0x%lx]: 330 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
375 if ((timeout & CS4231_MCE) == 0 || 331 if ((timeout & CS4231_MCE) == 0 ||
376 !(chip->hardware & (CS4231_HW_CS42 332 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
377 return; 333 return;
378 } 334 }
379 snd_cs4231_busy_wait(chip); <<
380 <<
381 /* calibration process */ <<
382 335
383 for (timeout = 500; timeout > 0 && (sn !! 336 /*
384 udelay(10); !! 337 * Wait for (possible -- during init auto-calibration may not be set)
385 if ((snd_cs4231_in(chip, CS4231_TEST_I !! 338 * calibration process to start. Needs upto 5 sample periods on AD1848
386 snd_printd("cs4231_mce_down - !! 339 * which at the slowest possible rate of 5.5125 kHz means 907 us.
387 return; !! 340 */
388 } !! 341 msleep(1);
389 #if 0 !! 342
390 printk("(2) timeout = %i, jiffies = %l !! 343 snd_printdd("(1) jiffies = %lu\n", jiffies);
391 #endif !! 344
392 /* in 10 ms increments, check conditio !! 345 /* check condition up to 250 ms */
393 timeout = 25; !! 346 end_time = jiffies + msecs_to_jiffies(250);
394 while (snd_cs4231_in(chip, CS4231_TEST !! 347 while (snd_cs4231_in(chip, CS4231_TEST_INIT) &
395 if (--timeout < 0) { !! 348 CS4231_CALIB_IN_PROGRESS) {
396 snd_printk("mce_down - !! 349
>> 350 if (time_after(jiffies, end_time)) {
>> 351 snd_printk(KERN_ERR "mce_down - "
>> 352 "auto calibration time out (2)\n");
397 return; 353 return;
398 } 354 }
399 msleep(10); !! 355 msleep(1);
400 } 356 }
401 #if 0 !! 357
402 printk("(3) jiffies = %li\n", jiffies) !! 358 snd_printdd("(2) jiffies = %lu\n", jiffies);
403 #endif !! 359
404 /* in 10 ms increments, check conditio !! 360 /* check condition up to 100 ms */
405 timeout = 10; !! 361 end_time = jiffies + msecs_to_jiffies(100);
406 while (cs4231_inb(chip, CS4231P(REGSEL 362 while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
407 if (--timeout < 0) { !! 363 if (time_after(jiffies, end_time)) {
408 snd_printk(KERN_ERR "m 364 snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
409 return; 365 return;
410 } 366 }
411 msleep(10); !! 367 msleep(1);
412 } 368 }
413 #if 0 !! 369
414 printk("(4) jiffies = %li\n", jiffies) !! 370 snd_printdd("(3) jiffies = %lu\n", jiffies);
415 snd_printk("mce_down - exit = 0x%x\n", !! 371 snd_printd("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
416 #endif <<
417 } 372 }
418 373
419 static unsigned int snd_cs4231_get_count(unsig 374 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
420 { 375 {
421 switch (format & 0xe0) { 376 switch (format & 0xe0) {
422 case CS4231_LINEAR_16: 377 case CS4231_LINEAR_16:
423 case CS4231_LINEAR_16_BIG: 378 case CS4231_LINEAR_16_BIG:
424 size >>= 1; 379 size >>= 1;
425 break; 380 break;
426 case CS4231_ADPCM_16: 381 case CS4231_ADPCM_16:
427 return size >> 2; 382 return size >> 2;
428 } 383 }
429 if (format & CS4231_STEREO) 384 if (format & CS4231_STEREO)
430 size >>= 1; 385 size >>= 1;
431 return size; 386 return size;
432 } 387 }
433 388
434 static int snd_cs4231_trigger(snd_pcm_substrea !! 389 static int snd_cs4231_trigger(struct snd_pcm_substream *substream,
435 int cmd) 390 int cmd)
436 { 391 {
437 cs4231_t *chip = snd_pcm_substream_chi !! 392 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
438 int result = 0; 393 int result = 0;
439 unsigned int what; 394 unsigned int what;
440 struct list_head *pos; !! 395 struct snd_pcm_substream *s;
441 snd_pcm_substream_t *s; <<
442 int do_start; 396 int do_start;
443 397
444 #if 0 398 #if 0
445 printk("codec trigger!!! - what = %i, 399 printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
446 #endif 400 #endif
447 401
448 switch (cmd) { 402 switch (cmd) {
449 case SNDRV_PCM_TRIGGER_START: 403 case SNDRV_PCM_TRIGGER_START:
450 case SNDRV_PCM_TRIGGER_RESUME: 404 case SNDRV_PCM_TRIGGER_RESUME:
451 do_start = 1; break; 405 do_start = 1; break;
452 case SNDRV_PCM_TRIGGER_STOP: 406 case SNDRV_PCM_TRIGGER_STOP:
453 case SNDRV_PCM_TRIGGER_SUSPEND: 407 case SNDRV_PCM_TRIGGER_SUSPEND:
454 do_start = 0; break; 408 do_start = 0; break;
455 default: 409 default:
456 return -EINVAL; 410 return -EINVAL;
457 } 411 }
458 412
459 what = 0; 413 what = 0;
460 snd_pcm_group_for_each(pos, substream) !! 414 snd_pcm_group_for_each_entry(s, substream) {
461 s = snd_pcm_group_substream_en <<
462 if (s == chip->playback_substr 415 if (s == chip->playback_substream) {
463 what |= CS4231_PLAYBAC 416 what |= CS4231_PLAYBACK_ENABLE;
464 snd_pcm_trigger_done(s 417 snd_pcm_trigger_done(s, substream);
465 } else if (s == chip->capture_ 418 } else if (s == chip->capture_substream) {
466 what |= CS4231_RECORD_ 419 what |= CS4231_RECORD_ENABLE;
467 snd_pcm_trigger_done(s 420 snd_pcm_trigger_done(s, substream);
468 } 421 }
469 } 422 }
470 spin_lock(&chip->reg_lock); 423 spin_lock(&chip->reg_lock);
471 if (do_start) { 424 if (do_start) {
472 chip->image[CS4231_IFACE_CTRL] 425 chip->image[CS4231_IFACE_CTRL] |= what;
473 if (chip->trigger) 426 if (chip->trigger)
474 chip->trigger(chip, wh 427 chip->trigger(chip, what, 1);
475 } else { 428 } else {
476 chip->image[CS4231_IFACE_CTRL] 429 chip->image[CS4231_IFACE_CTRL] &= ~what;
477 if (chip->trigger) 430 if (chip->trigger)
478 chip->trigger(chip, wh 431 chip->trigger(chip, what, 0);
479 } 432 }
480 snd_cs4231_out(chip, CS4231_IFACE_CTRL 433 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
481 spin_unlock(&chip->reg_lock); 434 spin_unlock(&chip->reg_lock);
482 #if 0 435 #if 0
483 snd_cs4231_debug(chip); 436 snd_cs4231_debug(chip);
484 #endif 437 #endif
485 return result; 438 return result;
486 } 439 }
487 440
488 /* 441 /*
489 * CODEC I/O 442 * CODEC I/O
490 */ 443 */
491 444
492 static unsigned char snd_cs4231_get_rate(unsig 445 static unsigned char snd_cs4231_get_rate(unsigned int rate)
493 { 446 {
494 int i; 447 int i;
495 448
496 for (i = 0; i < 14; i++) !! 449 for (i = 0; i < ARRAY_SIZE(rates); i++)
497 if (rate == rates[i]) 450 if (rate == rates[i])
498 return freq_bits[i]; 451 return freq_bits[i];
499 // snd_BUG(); 452 // snd_BUG();
500 return freq_bits[13]; !! 453 return freq_bits[ARRAY_SIZE(rates) - 1];
501 } 454 }
502 455
503 static unsigned char snd_cs4231_get_format(cs4 !! 456 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip,
504 int 457 int format,
505 int 458 int channels)
506 { 459 {
507 unsigned char rformat; 460 unsigned char rformat;
508 461
509 rformat = CS4231_LINEAR_8; 462 rformat = CS4231_LINEAR_8;
510 switch (format) { 463 switch (format) {
511 case SNDRV_PCM_FORMAT_MU_LAW: rforma 464 case SNDRV_PCM_FORMAT_MU_LAW: rformat = CS4231_ULAW_8; break;
512 case SNDRV_PCM_FORMAT_A_LAW: rforma 465 case SNDRV_PCM_FORMAT_A_LAW: rformat = CS4231_ALAW_8; break;
513 case SNDRV_PCM_FORMAT_S16_LE: rforma 466 case SNDRV_PCM_FORMAT_S16_LE: rformat = CS4231_LINEAR_16; break;
514 case SNDRV_PCM_FORMAT_S16_BE: rforma 467 case SNDRV_PCM_FORMAT_S16_BE: rformat = CS4231_LINEAR_16_BIG; break;
515 case SNDRV_PCM_FORMAT_IMA_ADPCM: 468 case SNDRV_PCM_FORMAT_IMA_ADPCM: rformat = CS4231_ADPCM_16; break;
516 } 469 }
517 if (channels > 1) 470 if (channels > 1)
518 rformat |= CS4231_STEREO; 471 rformat |= CS4231_STEREO;
519 #if 0 472 #if 0
520 snd_printk("get_format: 0x%x (mode=0x% 473 snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
521 #endif 474 #endif
522 return rformat; 475 return rformat;
523 } 476 }
524 477
525 static void snd_cs4231_calibrate_mute(cs4231_t !! 478 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
526 { 479 {
527 unsigned long flags; 480 unsigned long flags;
528 481
529 mute = mute ? 1 : 0; 482 mute = mute ? 1 : 0;
530 spin_lock_irqsave(&chip->reg_lock, fla 483 spin_lock_irqsave(&chip->reg_lock, flags);
531 if (chip->calibrate_mute == mute) { 484 if (chip->calibrate_mute == mute) {
532 spin_unlock_irqrestore(&chip-> 485 spin_unlock_irqrestore(&chip->reg_lock, flags);
533 return; 486 return;
534 } 487 }
535 if (!mute) { 488 if (!mute) {
536 snd_cs4231_dout(chip, CS4231_L 489 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
537 snd_cs4231_dout(chip, CS4231_R 490 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
538 snd_cs4231_dout(chip, CS4231_L 491 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
539 } 492 }
540 snd_cs4231_dout(chip, CS4231_AUX1_LEFT 493 snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
541 snd_cs4231_dout(chip, CS4231_AUX1_RIGH 494 snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
542 snd_cs4231_dout(chip, CS4231_AUX2_LEFT 495 snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
543 snd_cs4231_dout(chip, CS4231_AUX2_RIGH 496 snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
544 snd_cs4231_dout(chip, CS4231_LEFT_OUTP 497 snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
545 snd_cs4231_dout(chip, CS4231_RIGHT_OUT 498 snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
546 snd_cs4231_dout(chip, CS4231_LEFT_LINE 499 snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
547 snd_cs4231_dout(chip, CS4231_RIGHT_LIN 500 snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
548 snd_cs4231_dout(chip, CS4231_MONO_CTRL 501 snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
549 if (chip->hardware == CS4231_HW_INTERW 502 if (chip->hardware == CS4231_HW_INTERWAVE) {
550 snd_cs4231_dout(chip, CS4231_L 503 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
551 snd_cs4231_dout(chip, CS4231_R 504 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);
552 snd_cs4231_dout(chip, CS4231_L 505 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
553 snd_cs4231_dout(chip, CS4231_L 506 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
554 } 507 }
555 chip->calibrate_mute = mute; 508 chip->calibrate_mute = mute;
556 spin_unlock_irqrestore(&chip->reg_lock 509 spin_unlock_irqrestore(&chip->reg_lock, flags);
557 } 510 }
558 511
559 static void snd_cs4231_playback_format(cs4231_ !! 512 static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
560 snd_pcm !! 513 struct snd_pcm_hw_params *params,
561 unsigne 514 unsigned char pdfr)
562 { 515 {
563 unsigned long flags; 516 unsigned long flags;
564 int full_calib = 1; 517 int full_calib = 1;
565 518
566 down(&chip->mce_mutex); !! 519 mutex_lock(&chip->mce_mutex);
567 snd_cs4231_calibrate_mute(chip, 1); 520 snd_cs4231_calibrate_mute(chip, 1);
568 if (chip->hardware == CS4231_HW_CS4231 521 if (chip->hardware == CS4231_HW_CS4231A ||
569 (chip->hardware & CS4231_HW_CS4232 522 (chip->hardware & CS4231_HW_CS4232_MASK)) {
570 spin_lock_irqsave(&chip->reg_l 523 spin_lock_irqsave(&chip->reg_lock, flags);
571 if ((chip->image[CS4231_PLAYBK 524 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) { /* rate is same? */
572 snd_cs4231_out(chip, C 525 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
573 snd_cs4231_out(chip, C 526 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
574 snd_cs4231_out(chip, C 527 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
575 udelay(100); /* Fixes 528 udelay(100); /* Fixes audible clicks at least on GUS MAX */
576 full_calib = 0; 529 full_calib = 0;
577 } 530 }
578 spin_unlock_irqrestore(&chip-> 531 spin_unlock_irqrestore(&chip->reg_lock, flags);
579 } 532 }
580 if (full_calib) { 533 if (full_calib) {
581 snd_cs4231_mce_up(chip); 534 snd_cs4231_mce_up(chip);
582 spin_lock_irqsave(&chip->reg_l 535 spin_lock_irqsave(&chip->reg_lock, flags);
583 if (chip->hardware != CS4231_H 536 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
584 snd_cs4231_out(chip, C 537 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
585 (chip- 538 (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
586 (pdfr 539 (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
587 pdfr); 540 pdfr);
588 } else { 541 } else {
589 snd_cs4231_out(chip, C 542 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
590 } 543 }
591 spin_unlock_irqrestore(&chip-> 544 spin_unlock_irqrestore(&chip->reg_lock, flags);
>> 545 if (chip->hardware == CS4231_HW_OPL3SA2)
>> 546 udelay(100); /* this seems to help */
592 snd_cs4231_mce_down(chip); 547 snd_cs4231_mce_down(chip);
593 } 548 }
594 snd_cs4231_calibrate_mute(chip, 0); 549 snd_cs4231_calibrate_mute(chip, 0);
595 up(&chip->mce_mutex); !! 550 mutex_unlock(&chip->mce_mutex);
596 } 551 }
597 552
598 static void snd_cs4231_capture_format(cs4231_t !! 553 static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
599 snd_pcm_ !! 554 struct snd_pcm_hw_params *params,
600 unsigned 555 unsigned char cdfr)
601 { 556 {
602 unsigned long flags; 557 unsigned long flags;
603 int full_calib = 1; 558 int full_calib = 1;
604 559
605 down(&chip->mce_mutex); !! 560 mutex_lock(&chip->mce_mutex);
606 snd_cs4231_calibrate_mute(chip, 1); 561 snd_cs4231_calibrate_mute(chip, 1);
607 if (chip->hardware == CS4231_HW_CS4231 562 if (chip->hardware == CS4231_HW_CS4231A ||
608 (chip->hardware & CS4231_HW_CS4232 563 (chip->hardware & CS4231_HW_CS4232_MASK)) {
609 spin_lock_irqsave(&chip->reg_l 564 spin_lock_irqsave(&chip->reg_lock, flags);
610 if ((chip->image[CS4231_PLAYBK 565 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) || /* rate is same? */
611 (chip->image[CS4231_IFACE_ 566 (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
612 snd_cs4231_out(chip, C 567 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
613 snd_cs4231_out(chip, C 568 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
614 snd_cs4231_out(chip, C 569 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
615 full_calib = 0; 570 full_calib = 0;
616 } 571 }
617 spin_unlock_irqrestore(&chip-> 572 spin_unlock_irqrestore(&chip->reg_lock, flags);
618 } 573 }
619 if (full_calib) { 574 if (full_calib) {
620 snd_cs4231_mce_up(chip); 575 snd_cs4231_mce_up(chip);
621 spin_lock_irqsave(&chip->reg_l 576 spin_lock_irqsave(&chip->reg_lock, flags);
622 if (chip->hardware != CS4231_H 577 if (chip->hardware != CS4231_HW_INTERWAVE) {
623 if (!(chip->image[CS42 578 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
624 snd_cs4231_out 579 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
625 580 ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
626 581 (cdfr & 0x0f));
627 spin_unlock_ir 582 spin_unlock_irqrestore(&chip->reg_lock, flags);
628 snd_cs4231_mce 583 snd_cs4231_mce_down(chip);
629 snd_cs4231_mce 584 snd_cs4231_mce_up(chip);
630 spin_lock_irqs 585 spin_lock_irqsave(&chip->reg_lock, flags);
631 } 586 }
632 } 587 }
633 snd_cs4231_out(chip, CS4231_RE 588 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
634 spin_unlock_irqrestore(&chip-> 589 spin_unlock_irqrestore(&chip->reg_lock, flags);
635 snd_cs4231_mce_down(chip); 590 snd_cs4231_mce_down(chip);
636 } 591 }
637 snd_cs4231_calibrate_mute(chip, 0); 592 snd_cs4231_calibrate_mute(chip, 0);
638 up(&chip->mce_mutex); !! 593 mutex_unlock(&chip->mce_mutex);
639 } 594 }
640 595
641 /* 596 /*
642 * Timer interface 597 * Timer interface
643 */ 598 */
644 599
645 static unsigned long snd_cs4231_timer_resoluti !! 600 static unsigned long snd_cs4231_timer_resolution(struct snd_timer * timer)
646 { 601 {
647 cs4231_t *chip = snd_timer_chip(timer) !! 602 struct snd_cs4231 *chip = snd_timer_chip(timer);
648 if (chip->hardware & CS4231_HW_CS4236B 603 if (chip->hardware & CS4231_HW_CS4236B_MASK)
649 return 14467; 604 return 14467;
650 else 605 else
651 return chip->image[CS4231_PLAY 606 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
652 } 607 }
653 608
654 static int snd_cs4231_timer_start(snd_timer_t !! 609 static int snd_cs4231_timer_start(struct snd_timer * timer)
655 { 610 {
656 unsigned long flags; 611 unsigned long flags;
657 unsigned int ticks; 612 unsigned int ticks;
658 cs4231_t *chip = snd_timer_chip(timer) !! 613 struct snd_cs4231 *chip = snd_timer_chip(timer);
659 spin_lock_irqsave(&chip->reg_lock, fla 614 spin_lock_irqsave(&chip->reg_lock, flags);
660 ticks = timer->sticks; 615 ticks = timer->sticks;
661 if ((chip->image[CS4231_ALT_FEATURE_1] 616 if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
662 (unsigned char)(ticks >> 8) != chi 617 (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
663 (unsigned char)ticks != chip->imag 618 (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
664 snd_cs4231_out(chip, CS4231_TI 619 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
665 snd_cs4231_out(chip, CS4231_TI 620 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
666 snd_cs4231_out(chip, CS4231_AL 621 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
667 } 622 }
668 spin_unlock_irqrestore(&chip->reg_lock 623 spin_unlock_irqrestore(&chip->reg_lock, flags);
669 return 0; 624 return 0;
670 } 625 }
671 626
672 static int snd_cs4231_timer_stop(snd_timer_t * !! 627 static int snd_cs4231_timer_stop(struct snd_timer * timer)
673 { 628 {
674 unsigned long flags; 629 unsigned long flags;
675 cs4231_t *chip = snd_timer_chip(timer) !! 630 struct snd_cs4231 *chip = snd_timer_chip(timer);
676 spin_lock_irqsave(&chip->reg_lock, fla 631 spin_lock_irqsave(&chip->reg_lock, flags);
677 snd_cs4231_out(chip, CS4231_ALT_FEATUR 632 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
678 spin_unlock_irqrestore(&chip->reg_lock 633 spin_unlock_irqrestore(&chip->reg_lock, flags);
679 return 0; 634 return 0;
680 } 635 }
681 636
682 static void snd_cs4231_init(cs4231_t *chip) !! 637 static void snd_cs4231_init(struct snd_cs4231 *chip)
683 { 638 {
684 unsigned long flags; 639 unsigned long flags;
685 640
686 snd_cs4231_mce_down(chip); 641 snd_cs4231_mce_down(chip);
687 642
688 #ifdef SNDRV_DEBUG_MCE 643 #ifdef SNDRV_DEBUG_MCE
689 snd_printk("init: (1)\n"); 644 snd_printk("init: (1)\n");
690 #endif 645 #endif
691 snd_cs4231_mce_up(chip); 646 snd_cs4231_mce_up(chip);
692 spin_lock_irqsave(&chip->reg_lock, fla 647 spin_lock_irqsave(&chip->reg_lock, flags);
693 chip->image[CS4231_IFACE_CTRL] &= ~(CS 648 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
694 CS4231_RECORD_ENA 649 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
695 CS4231_CALIB_MODE 650 CS4231_CALIB_MODE);
696 chip->image[CS4231_IFACE_CTRL] |= CS42 651 chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
697 snd_cs4231_out(chip, CS4231_IFACE_CTRL 652 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
698 spin_unlock_irqrestore(&chip->reg_lock 653 spin_unlock_irqrestore(&chip->reg_lock, flags);
699 snd_cs4231_mce_down(chip); 654 snd_cs4231_mce_down(chip);
700 655
701 #ifdef SNDRV_DEBUG_MCE 656 #ifdef SNDRV_DEBUG_MCE
702 snd_printk("init: (2)\n"); 657 snd_printk("init: (2)\n");
703 #endif 658 #endif
704 659
705 snd_cs4231_mce_up(chip); 660 snd_cs4231_mce_up(chip);
706 spin_lock_irqsave(&chip->reg_lock, fla 661 spin_lock_irqsave(&chip->reg_lock, flags);
707 snd_cs4231_out(chip, CS4231_ALT_FEATUR 662 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
708 spin_unlock_irqrestore(&chip->reg_lock 663 spin_unlock_irqrestore(&chip->reg_lock, flags);
709 snd_cs4231_mce_down(chip); 664 snd_cs4231_mce_down(chip);
710 665
711 #ifdef SNDRV_DEBUG_MCE 666 #ifdef SNDRV_DEBUG_MCE
712 snd_printk("init: (3) - afei = 0x%x\n" 667 snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
713 #endif 668 #endif
714 669
715 spin_lock_irqsave(&chip->reg_lock, fla 670 spin_lock_irqsave(&chip->reg_lock, flags);
716 snd_cs4231_out(chip, CS4231_ALT_FEATUR 671 snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
717 spin_unlock_irqrestore(&chip->reg_lock 672 spin_unlock_irqrestore(&chip->reg_lock, flags);
718 673
719 snd_cs4231_mce_up(chip); 674 snd_cs4231_mce_up(chip);
720 spin_lock_irqsave(&chip->reg_lock, fla 675 spin_lock_irqsave(&chip->reg_lock, flags);
721 snd_cs4231_out(chip, CS4231_PLAYBK_FOR 676 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
722 spin_unlock_irqrestore(&chip->reg_lock 677 spin_unlock_irqrestore(&chip->reg_lock, flags);
723 snd_cs4231_mce_down(chip); 678 snd_cs4231_mce_down(chip);
724 679
725 #ifdef SNDRV_DEBUG_MCE 680 #ifdef SNDRV_DEBUG_MCE
726 snd_printk("init: (4)\n"); 681 snd_printk("init: (4)\n");
727 #endif 682 #endif
728 683
729 snd_cs4231_mce_up(chip); 684 snd_cs4231_mce_up(chip);
730 spin_lock_irqsave(&chip->reg_lock, fla 685 spin_lock_irqsave(&chip->reg_lock, flags);
731 snd_cs4231_out(chip, CS4231_REC_FORMAT 686 snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
732 spin_unlock_irqrestore(&chip->reg_lock 687 spin_unlock_irqrestore(&chip->reg_lock, flags);
733 snd_cs4231_mce_down(chip); 688 snd_cs4231_mce_down(chip);
734 689
735 #ifdef SNDRV_DEBUG_MCE 690 #ifdef SNDRV_DEBUG_MCE
736 snd_printk("init: (5)\n"); 691 snd_printk("init: (5)\n");
737 #endif 692 #endif
738 } 693 }
739 694
740 static int snd_cs4231_open(cs4231_t *chip, uns !! 695 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
741 { 696 {
742 unsigned long flags; 697 unsigned long flags;
743 698
744 down(&chip->open_mutex); !! 699 mutex_lock(&chip->open_mutex);
745 if ((chip->mode & mode) || 700 if ((chip->mode & mode) ||
746 ((chip->mode & CS4231_MODE_OPEN) & 701 ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
747 up(&chip->open_mutex); !! 702 mutex_unlock(&chip->open_mutex);
748 return -EAGAIN; 703 return -EAGAIN;
749 } 704 }
750 if (chip->mode & CS4231_MODE_OPEN) { 705 if (chip->mode & CS4231_MODE_OPEN) {
751 chip->mode |= mode; 706 chip->mode |= mode;
752 up(&chip->open_mutex); !! 707 mutex_unlock(&chip->open_mutex);
753 return 0; 708 return 0;
754 } 709 }
755 /* ok. now enable and ack CODEC IRQ */ 710 /* ok. now enable and ack CODEC IRQ */
756 spin_lock_irqsave(&chip->reg_lock, fla 711 spin_lock_irqsave(&chip->reg_lock, flags);
757 snd_cs4231_out(chip, CS4231_IRQ_STATUS 712 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
758 CS4231_RECORD_IRQ | 713 CS4231_RECORD_IRQ |
759 CS4231_TIMER_IRQ); 714 CS4231_TIMER_IRQ);
760 snd_cs4231_out(chip, CS4231_IRQ_STATUS 715 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
761 cs4231_outb(chip, CS4231P(STATUS), 0); 716 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
762 cs4231_outb(chip, CS4231P(STATUS), 0); 717 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
763 chip->image[CS4231_PIN_CTRL] |= CS4231 718 chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
764 snd_cs4231_out(chip, CS4231_PIN_CTRL, 719 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
765 snd_cs4231_out(chip, CS4231_IRQ_STATUS 720 snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
766 CS4231_RECORD_IRQ | 721 CS4231_RECORD_IRQ |
767 CS4231_TIMER_IRQ); 722 CS4231_TIMER_IRQ);
768 snd_cs4231_out(chip, CS4231_IRQ_STATUS 723 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
769 spin_unlock_irqrestore(&chip->reg_lock 724 spin_unlock_irqrestore(&chip->reg_lock, flags);
770 725
771 chip->mode = mode; 726 chip->mode = mode;
772 up(&chip->open_mutex); !! 727 mutex_unlock(&chip->open_mutex);
773 return 0; 728 return 0;
774 } 729 }
775 730
776 static void snd_cs4231_close(cs4231_t *chip, u !! 731 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
777 { 732 {
778 unsigned long flags; 733 unsigned long flags;
779 734
780 down(&chip->open_mutex); !! 735 mutex_lock(&chip->open_mutex);
781 chip->mode &= ~mode; 736 chip->mode &= ~mode;
782 if (chip->mode & CS4231_MODE_OPEN) { 737 if (chip->mode & CS4231_MODE_OPEN) {
783 up(&chip->open_mutex); !! 738 mutex_unlock(&chip->open_mutex);
784 return; 739 return;
785 } 740 }
786 snd_cs4231_calibrate_mute(chip, 1); 741 snd_cs4231_calibrate_mute(chip, 1);
787 742
788 /* disable IRQ */ 743 /* disable IRQ */
789 spin_lock_irqsave(&chip->reg_lock, fla 744 spin_lock_irqsave(&chip->reg_lock, flags);
790 snd_cs4231_out(chip, CS4231_IRQ_STATUS 745 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
791 cs4231_outb(chip, CS4231P(STATUS), 0); 746 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
792 cs4231_outb(chip, CS4231P(STATUS), 0); 747 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
793 chip->image[CS4231_PIN_CTRL] &= ~CS423 748 chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
794 snd_cs4231_out(chip, CS4231_PIN_CTRL, 749 snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
795 750
796 /* now disable record & playback */ 751 /* now disable record & playback */
797 752
798 if (chip->image[CS4231_IFACE_CTRL] & ( 753 if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
799 754 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
800 spin_unlock_irqrestore(&chip-> 755 spin_unlock_irqrestore(&chip->reg_lock, flags);
801 snd_cs4231_mce_up(chip); 756 snd_cs4231_mce_up(chip);
802 spin_lock_irqsave(&chip->reg_l 757 spin_lock_irqsave(&chip->reg_lock, flags);
803 chip->image[CS4231_IFACE_CTRL] 758 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
804 759 CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
805 snd_cs4231_out(chip, CS4231_IF 760 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
806 spin_unlock_irqrestore(&chip-> 761 spin_unlock_irqrestore(&chip->reg_lock, flags);
807 snd_cs4231_mce_down(chip); 762 snd_cs4231_mce_down(chip);
808 spin_lock_irqsave(&chip->reg_l 763 spin_lock_irqsave(&chip->reg_lock, flags);
809 } 764 }
810 765
811 /* clear IRQ again */ 766 /* clear IRQ again */
812 snd_cs4231_out(chip, CS4231_IRQ_STATUS 767 snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
813 cs4231_outb(chip, CS4231P(STATUS), 0); 768 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
814 cs4231_outb(chip, CS4231P(STATUS), 0); 769 cs4231_outb(chip, CS4231P(STATUS), 0); /* clear IRQ */
815 spin_unlock_irqrestore(&chip->reg_lock 770 spin_unlock_irqrestore(&chip->reg_lock, flags);
816 771
817 snd_cs4231_calibrate_mute(chip, 0); 772 snd_cs4231_calibrate_mute(chip, 0);
818 773
819 chip->mode = 0; 774 chip->mode = 0;
820 up(&chip->open_mutex); !! 775 mutex_unlock(&chip->open_mutex);
821 } 776 }
822 777
823 /* 778 /*
824 * timer open/close 779 * timer open/close
825 */ 780 */
826 781
827 static int snd_cs4231_timer_open(snd_timer_t * !! 782 static int snd_cs4231_timer_open(struct snd_timer * timer)
828 { 783 {
829 cs4231_t *chip = snd_timer_chip(timer) !! 784 struct snd_cs4231 *chip = snd_timer_chip(timer);
830 snd_cs4231_open(chip, CS4231_MODE_TIME 785 snd_cs4231_open(chip, CS4231_MODE_TIMER);
831 return 0; 786 return 0;
832 } 787 }
833 788
834 static int snd_cs4231_timer_close(snd_timer_t !! 789 static int snd_cs4231_timer_close(struct snd_timer * timer)
835 { 790 {
836 cs4231_t *chip = snd_timer_chip(timer) !! 791 struct snd_cs4231 *chip = snd_timer_chip(timer);
837 snd_cs4231_close(chip, CS4231_MODE_TIM 792 snd_cs4231_close(chip, CS4231_MODE_TIMER);
838 return 0; 793 return 0;
839 } 794 }
840 795
841 static struct _snd_timer_hardware snd_cs4231_t !! 796 static struct snd_timer_hardware snd_cs4231_timer_table =
842 { 797 {
843 .flags = SNDRV_TIMER_HW_AUTO, 798 .flags = SNDRV_TIMER_HW_AUTO,
844 .resolution = 9945, 799 .resolution = 9945,
845 .ticks = 65535, 800 .ticks = 65535,
846 .open = snd_cs4231_timer_open, 801 .open = snd_cs4231_timer_open,
847 .close = snd_cs4231_timer_close 802 .close = snd_cs4231_timer_close,
848 .c_resolution = snd_cs4231_timer_resol 803 .c_resolution = snd_cs4231_timer_resolution,
849 .start = snd_cs4231_timer_start 804 .start = snd_cs4231_timer_start,
850 .stop = snd_cs4231_timer_stop, 805 .stop = snd_cs4231_timer_stop,
851 }; 806 };
852 807
853 /* 808 /*
854 * ok.. exported functions.. 809 * ok.. exported functions..
855 */ 810 */
856 811
857 static int snd_cs4231_playback_hw_params(snd_p !! 812 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
858 snd_p !! 813 struct snd_pcm_hw_params *hw_params)
859 { 814 {
860 cs4231_t *chip = snd_pcm_substream_chi !! 815 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
861 unsigned char new_pdfr; 816 unsigned char new_pdfr;
862 int err; 817 int err;
863 818
864 if ((err = snd_pcm_lib_malloc_pages(su 819 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
865 return err; 820 return err;
866 new_pdfr = snd_cs4231_get_format(chip, 821 new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
867 snd_cs4231_get_rate(params_ 822 snd_cs4231_get_rate(params_rate(hw_params));
868 chip->set_playback_format(chip, hw_par 823 chip->set_playback_format(chip, hw_params, new_pdfr);
869 return 0; 824 return 0;
870 } 825 }
871 826
872 static int snd_cs4231_playback_hw_free(snd_pcm !! 827 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
873 { 828 {
874 return snd_pcm_lib_free_pages(substrea 829 return snd_pcm_lib_free_pages(substream);
875 } 830 }
876 831
877 #ifdef LEGACY_SUPPORT !! 832 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
878 static int snd_cs4231_playback_prepare(snd_pcm <<
879 { 833 {
880 cs4231_t *chip = snd_pcm_substream_chi !! 834 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
881 snd_pcm_runtime_t *runtime = substream !! 835 struct snd_pcm_runtime *runtime = substream->runtime;
882 unsigned long flags; 836 unsigned long flags;
883 unsigned int size = snd_pcm_lib_buffer 837 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
884 unsigned int count = snd_pcm_lib_perio 838 unsigned int count = snd_pcm_lib_period_bytes(substream);
885 839
886 spin_lock_irqsave(&chip->reg_lock, fla 840 spin_lock_irqsave(&chip->reg_lock, flags);
887 chip->p_dma_size = size; 841 chip->p_dma_size = size;
888 chip->image[CS4231_IFACE_CTRL] &= ~(CS 842 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
889 snd_dma_program(chip->dma1, runtime->d 843 snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
890 count = snd_cs4231_get_count(chip->ima 844 count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
891 snd_cs4231_out(chip, CS4231_PLY_LWR_CN 845 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
892 snd_cs4231_out(chip, CS4231_PLY_UPR_CN 846 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
893 spin_unlock_irqrestore(&chip->reg_lock 847 spin_unlock_irqrestore(&chip->reg_lock, flags);
894 #if 0 848 #if 0
895 snd_cs4231_debug(chip); 849 snd_cs4231_debug(chip);
896 #endif 850 #endif
897 return 0; 851 return 0;
898 } 852 }
899 #endif /* LEGACY_SUPPORT */ <<
900 853
901 static int snd_cs4231_capture_hw_params(snd_pc !! 854 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
902 snd_pc !! 855 struct snd_pcm_hw_params *hw_params)
903 { 856 {
904 cs4231_t *chip = snd_pcm_substream_chi !! 857 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
905 unsigned char new_cdfr; 858 unsigned char new_cdfr;
906 int err; 859 int err;
907 860
908 if ((err = snd_pcm_lib_malloc_pages(su 861 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
909 return err; 862 return err;
910 new_cdfr = snd_cs4231_get_format(chip, 863 new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
911 snd_cs4231_get_rate(params_ 864 snd_cs4231_get_rate(params_rate(hw_params));
912 chip->set_capture_format(chip, hw_para 865 chip->set_capture_format(chip, hw_params, new_cdfr);
913 return 0; 866 return 0;
914 } 867 }
915 868
916 static int snd_cs4231_capture_hw_free(snd_pcm_ !! 869 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
917 { 870 {
918 return snd_pcm_lib_free_pages(substrea 871 return snd_pcm_lib_free_pages(substream);
919 } 872 }
920 873
921 #ifdef LEGACY_SUPPORT !! 874 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
922 static int snd_cs4231_capture_prepare(snd_pcm_ <<
923 { 875 {
924 cs4231_t *chip = snd_pcm_substream_chi !! 876 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
925 snd_pcm_runtime_t *runtime = substream !! 877 struct snd_pcm_runtime *runtime = substream->runtime;
926 unsigned long flags; 878 unsigned long flags;
927 unsigned int size = snd_pcm_lib_buffer 879 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
928 unsigned int count = snd_pcm_lib_perio 880 unsigned int count = snd_pcm_lib_period_bytes(substream);
929 881
930 spin_lock_irqsave(&chip->reg_lock, fla 882 spin_lock_irqsave(&chip->reg_lock, flags);
931 chip->c_dma_size = size; 883 chip->c_dma_size = size;
932 chip->image[CS4231_IFACE_CTRL] &= ~(CS 884 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
933 snd_dma_program(chip->dma2, runtime->d 885 snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
934 count = snd_cs4231_get_count(chip->ima 886 count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
935 if (chip->single_dma && chip->hardware 887 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
936 snd_cs4231_out(chip, CS4231_PL 888 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
937 snd_cs4231_out(chip, CS4231_PL 889 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
938 } else { 890 } else {
939 snd_cs4231_out(chip, CS4231_RE 891 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
940 snd_cs4231_out(chip, CS4231_RE 892 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
941 } 893 }
942 spin_unlock_irqrestore(&chip->reg_lock 894 spin_unlock_irqrestore(&chip->reg_lock, flags);
943 return 0; 895 return 0;
944 } 896 }
945 #endif <<
946 897
947 static void snd_cs4231_overrange(cs4231_t *chi !! 898 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
948 { 899 {
949 unsigned long flags; 900 unsigned long flags;
950 unsigned char res; 901 unsigned char res;
951 902
952 spin_lock_irqsave(&chip->reg_lock, fla 903 spin_lock_irqsave(&chip->reg_lock, flags);
953 res = snd_cs4231_in(chip, CS4231_TEST_ 904 res = snd_cs4231_in(chip, CS4231_TEST_INIT);
954 spin_unlock_irqrestore(&chip->reg_lock 905 spin_unlock_irqrestore(&chip->reg_lock, flags);
955 if (res & (0x08 | 0x02)) /* det 906 if (res & (0x08 | 0x02)) /* detect overrange only above 0dB; may be user selectable? */
956 chip->capture_substream->runti 907 chip->capture_substream->runtime->overrange++;
957 } 908 }
958 909
959 irqreturn_t snd_cs4231_interrupt(int irq, void !! 910 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id)
960 { 911 {
961 cs4231_t *chip = dev_id; !! 912 struct snd_cs4231 *chip = dev_id;
962 unsigned char status; 913 unsigned char status;
963 914
964 status = snd_cs4231_in(chip, CS4231_IR 915 status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
965 if (status & CS4231_TIMER_IRQ) { 916 if (status & CS4231_TIMER_IRQ) {
966 if (chip->timer) 917 if (chip->timer)
967 snd_timer_interrupt(ch 918 snd_timer_interrupt(chip->timer, chip->timer->sticks);
968 } 919 }
969 if (chip->single_dma && chip->hardware 920 if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
970 if (status & CS4231_PLAYBACK_I 921 if (status & CS4231_PLAYBACK_IRQ) {
971 if (chip->mode & CS423 922 if (chip->mode & CS4231_MODE_PLAY) {
972 if (chip->play 923 if (chip->playback_substream)
973 snd_pc 924 snd_pcm_period_elapsed(chip->playback_substream);
974 } 925 }
975 if (chip->mode & CS423 926 if (chip->mode & CS4231_MODE_RECORD) {
976 if (chip->capt 927 if (chip->capture_substream) {
977 snd_cs 928 snd_cs4231_overrange(chip);
978 snd_pc 929 snd_pcm_period_elapsed(chip->capture_substream);
979 } 930 }
980 } 931 }
981 } 932 }
982 } else { 933 } else {
983 if (status & CS4231_PLAYBACK_I 934 if (status & CS4231_PLAYBACK_IRQ) {
984 if (chip->playback_sub 935 if (chip->playback_substream)
985 snd_pcm_period 936 snd_pcm_period_elapsed(chip->playback_substream);
986 } 937 }
987 if (status & CS4231_RECORD_IRQ 938 if (status & CS4231_RECORD_IRQ) {
988 if (chip->capture_subs 939 if (chip->capture_substream) {
989 snd_cs4231_ove 940 snd_cs4231_overrange(chip);
990 snd_pcm_period 941 snd_pcm_period_elapsed(chip->capture_substream);
991 } 942 }
992 } 943 }
993 } 944 }
994 945
995 spin_lock(&chip->reg_lock); 946 spin_lock(&chip->reg_lock);
996 snd_cs4231_outm(chip, CS4231_IRQ_STATU 947 snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
997 spin_unlock(&chip->reg_lock); 948 spin_unlock(&chip->reg_lock);
998 return IRQ_HANDLED; 949 return IRQ_HANDLED;
999 } 950 }
1000 951
1001 #ifdef LEGACY_SUPPORT !! 952 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1002 static snd_pcm_uframes_t snd_cs4231_playback_ <<
1003 { 953 {
1004 cs4231_t *chip = snd_pcm_substream_ch !! 954 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1005 size_t ptr; 955 size_t ptr;
1006 956
1007 if (!(chip->image[CS4231_IFACE_CTRL] 957 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1008 return 0; 958 return 0;
1009 ptr = snd_dma_pointer(chip->dma1, chi 959 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1010 return bytes_to_frames(substream->run 960 return bytes_to_frames(substream->runtime, ptr);
1011 } 961 }
1012 962
1013 static snd_pcm_uframes_t snd_cs4231_capture_p !! 963 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1014 { 964 {
1015 cs4231_t *chip = snd_pcm_substream_ch !! 965 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1016 size_t ptr; 966 size_t ptr;
1017 967
1018 if (!(chip->image[CS4231_IFACE_CTRL] 968 if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1019 return 0; 969 return 0;
1020 ptr = snd_dma_pointer(chip->dma2, chi 970 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1021 return bytes_to_frames(substream->run 971 return bytes_to_frames(substream->runtime, ptr);
1022 } 972 }
1023 #endif /* LEGACY_SUPPORT */ <<
1024 973
1025 /* 974 /*
1026 975
1027 */ 976 */
1028 977
1029 static int snd_cs4231_probe(cs4231_t *chip) !! 978 static int snd_cs4231_probe(struct snd_cs4231 *chip)
1030 { 979 {
1031 unsigned long flags; 980 unsigned long flags;
1032 int i, id, rev; 981 int i, id, rev;
1033 unsigned char *ptr; 982 unsigned char *ptr;
1034 unsigned int hw; 983 unsigned int hw;
1035 984
1036 #if 0 985 #if 0
1037 snd_cs4231_debug(chip); 986 snd_cs4231_debug(chip);
1038 #endif 987 #endif
1039 id = 0; 988 id = 0;
1040 for (i = 0; i < 50; i++) { 989 for (i = 0; i < 50; i++) {
1041 mb(); 990 mb();
1042 if (cs4231_inb(chip, CS4231P( 991 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1043 udelay(2000); 992 udelay(2000);
1044 else { 993 else {
1045 spin_lock_irqsave(&ch 994 spin_lock_irqsave(&chip->reg_lock, flags);
1046 snd_cs4231_out(chip, 995 snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1047 id = snd_cs4231_in(ch 996 id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1048 spin_unlock_irqrestor 997 spin_unlock_irqrestore(&chip->reg_lock, flags);
1049 if (id == 0x0a) 998 if (id == 0x0a)
1050 break; /* th 999 break; /* this is valid value */
1051 } 1000 }
1052 } 1001 }
1053 snd_printdd("cs4231: port = 0x%lx, id 1002 snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1054 if (id != 0x0a) 1003 if (id != 0x0a)
1055 return -ENODEV; /* no valid d 1004 return -ENODEV; /* no valid device found */
1056 1005
1057 if (((hw = chip->hardware) & CS4231_H 1006 if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1058 rev = snd_cs4231_in(chip, CS4 1007 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1059 snd_printdd("CS4231: VERSION 1008 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1060 if (rev == 0x80) { 1009 if (rev == 0x80) {
1061 unsigned char tmp = s 1010 unsigned char tmp = snd_cs4231_in(chip, 23);
1062 snd_cs4231_out(chip, 1011 snd_cs4231_out(chip, 23, ~tmp);
1063 if (snd_cs4231_in(chi 1012 if (snd_cs4231_in(chip, 23) != tmp)
1064 chip->hardwar 1013 chip->hardware = CS4231_HW_AD1845;
1065 else 1014 else
1066 chip->hardwar 1015 chip->hardware = CS4231_HW_CS4231;
1067 } else if (rev == 0xa0) { 1016 } else if (rev == 0xa0) {
1068 chip->hardware = CS42 1017 chip->hardware = CS4231_HW_CS4231A;
1069 } else if (rev == 0xa2) { 1018 } else if (rev == 0xa2) {
1070 chip->hardware = CS42 1019 chip->hardware = CS4231_HW_CS4232;
1071 } else if (rev == 0xb2) { 1020 } else if (rev == 0xb2) {
1072 chip->hardware = CS42 1021 chip->hardware = CS4231_HW_CS4232A;
1073 } else if (rev == 0x83) { 1022 } else if (rev == 0x83) {
1074 chip->hardware = CS42 1023 chip->hardware = CS4231_HW_CS4236;
1075 } else if (rev == 0x03) { 1024 } else if (rev == 0x03) {
1076 chip->hardware = CS42 1025 chip->hardware = CS4231_HW_CS4236B;
1077 } else { 1026 } else {
1078 snd_printk("unknown C 1027 snd_printk("unknown CS chip with version 0x%x\n", rev);
1079 return -ENODEV; 1028 return -ENODEV; /* unknown CS4231 chip? */
1080 } 1029 }
1081 } 1030 }
1082 spin_lock_irqsave(&chip->reg_lock, fl 1031 spin_lock_irqsave(&chip->reg_lock, flags);
1083 cs4231_inb(chip, CS4231P(STATUS)); 1032 cs4231_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
1084 cs4231_outb(chip, CS4231P(STATUS), 0) 1033 cs4231_outb(chip, CS4231P(STATUS), 0);
1085 mb(); 1034 mb();
1086 spin_unlock_irqrestore(&chip->reg_loc 1035 spin_unlock_irqrestore(&chip->reg_lock, flags);
1087 1036
1088 chip->image[CS4231_MISC_INFO] = CS423 1037 chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1089 switch (chip->hardware) { 1038 switch (chip->hardware) {
1090 case CS4231_HW_INTERWAVE: 1039 case CS4231_HW_INTERWAVE:
1091 chip->image[CS4231_MISC_INFO] 1040 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1092 break; 1041 break;
1093 case CS4231_HW_CS4235: 1042 case CS4231_HW_CS4235:
1094 case CS4231_HW_CS4236B: 1043 case CS4231_HW_CS4236B:
1095 case CS4231_HW_CS4237B: 1044 case CS4231_HW_CS4237B:
1096 case CS4231_HW_CS4238B: 1045 case CS4231_HW_CS4238B:
1097 case CS4231_HW_CS4239: 1046 case CS4231_HW_CS4239:
1098 if (hw == CS4231_HW_DETECT3) 1047 if (hw == CS4231_HW_DETECT3)
1099 chip->image[CS4231_MI 1048 chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1100 else 1049 else
1101 chip->hardware = CS42 1050 chip->hardware = CS4231_HW_CS4236;
1102 break; 1051 break;
1103 } 1052 }
1104 1053
1105 chip->image[CS4231_IFACE_CTRL] = 1054 chip->image[CS4231_IFACE_CTRL] =
1106 (chip->image[CS4231_IFACE_CTRL] & 1055 (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1107 (chip->single_dma ? CS4231_SINGLE 1056 (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1108 chip->image[CS4231_ALT_FEATURE_1] = 0 1057 chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1109 chip->image[CS4231_ALT_FEATURE_2] = c 1058 chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1110 ptr = (unsigned char *) &chip->image; 1059 ptr = (unsigned char *) &chip->image;
1111 snd_cs4231_mce_down(chip); 1060 snd_cs4231_mce_down(chip);
1112 spin_lock_irqsave(&chip->reg_lock, fl 1061 spin_lock_irqsave(&chip->reg_lock, flags);
1113 for (i = 0; i < 32; i++) /* ok 1062 for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1114 snd_cs4231_out(chip, i, *ptr+ 1063 snd_cs4231_out(chip, i, *ptr++);
1115 spin_unlock_irqrestore(&chip->reg_loc 1064 spin_unlock_irqrestore(&chip->reg_lock, flags);
1116 snd_cs4231_mce_up(chip); 1065 snd_cs4231_mce_up(chip);
1117 snd_cs4231_mce_down(chip); 1066 snd_cs4231_mce_down(chip);
1118 1067
1119 mdelay(2); 1068 mdelay(2);
1120 1069
1121 /* ok.. try check hardware version fo 1070 /* ok.. try check hardware version for CS4236+ chips */
1122 if ((hw & CS4231_HW_TYPE_MASK) == CS4 1071 if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1123 if (chip->hardware == CS4231_ 1072 if (chip->hardware == CS4231_HW_CS4236B) {
1124 rev = snd_cs4236_ext_ 1073 rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1125 snd_cs4236_ext_out(ch 1074 snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1126 id = snd_cs4236_ext_i 1075 id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1127 snd_cs4236_ext_out(ch 1076 snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1128 snd_printdd("CS4231: 1077 snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1129 if ((id & 0x1f) == 0x 1078 if ((id & 0x1f) == 0x1d) { /* CS4235 */
1130 chip->hardwar 1079 chip->hardware = CS4231_HW_CS4235;
1131 switch (id >> 1080 switch (id >> 5) {
1132 case 4: 1081 case 4:
1133 case 5: 1082 case 5:
1134 case 6: 1083 case 6:
1135 break 1084 break;
1136 default: 1085 default:
1137 snd_p 1086 snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1138 } 1087 }
1139 } else if ((id & 0x1f 1088 } else if ((id & 0x1f) == 0x0b) { /* CS4236/B */
1140 switch (id >> 1089 switch (id >> 5) {
1141 case 4: 1090 case 4:
1142 case 5: 1091 case 5:
1143 case 6: 1092 case 6:
1144 case 7: 1093 case 7:
1145 chip- 1094 chip->hardware = CS4231_HW_CS4236B;
1146 break 1095 break;
1147 default: 1096 default:
1148 snd_p 1097 snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1149 } 1098 }
1150 } else if ((id & 0x1f 1099 } else if ((id & 0x1f) == 0x08) { /* CS4237B */
1151 chip->hardwar 1100 chip->hardware = CS4231_HW_CS4237B;
1152 switch (id >> 1101 switch (id >> 5) {
1153 case 4: 1102 case 4:
1154 case 5: 1103 case 5:
1155 case 6: 1104 case 6:
1156 case 7: 1105 case 7:
1157 break 1106 break;
1158 default: 1107 default:
1159 snd_p 1108 snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1160 } 1109 }
1161 } else if ((id & 0x1f 1110 } else if ((id & 0x1f) == 0x09) { /* CS4238B */
1162 chip->hardwar 1111 chip->hardware = CS4231_HW_CS4238B;
1163 switch (id >> 1112 switch (id >> 5) {
1164 case 5: 1113 case 5:
1165 case 6: 1114 case 6:
1166 case 7: 1115 case 7:
1167 break 1116 break;
1168 default: 1117 default:
1169 snd_p 1118 snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1170 } 1119 }
1171 } else if ((id & 0x1f 1120 } else if ((id & 0x1f) == 0x1e) { /* CS4239 */
1172 chip->hardwar 1121 chip->hardware = CS4231_HW_CS4239;
1173 switch (id >> 1122 switch (id >> 5) {
1174 case 4: 1123 case 4:
1175 case 5: 1124 case 5:
1176 case 6: 1125 case 6:
1177 break 1126 break;
1178 default: 1127 default:
1179 snd_p 1128 snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1180 } 1129 }
1181 } else { 1130 } else {
1182 snd_printk("u 1131 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1183 } 1132 }
1184 } 1133 }
1185 } 1134 }
1186 return 0; /* all things 1135 return 0; /* all things are ok.. */
1187 } 1136 }
1188 1137
1189 /* 1138 /*
1190 1139
1191 */ 1140 */
1192 1141
1193 static snd_pcm_hardware_t snd_cs4231_playback !! 1142 static struct snd_pcm_hardware snd_cs4231_playback =
1194 { 1143 {
1195 .info = (SNDRV_PCM_IN 1144 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1196 SNDRV_PCM_IN 1145 SNDRV_PCM_INFO_MMAP_VALID |
1197 SNDRV_PCM_IN 1146 SNDRV_PCM_INFO_RESUME |
1198 SNDRV_PCM_IN 1147 SNDRV_PCM_INFO_SYNC_START),
1199 .formats = (SNDRV_PCM_FM 1148 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1200 SNDRV_PCM_FM 1149 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1201 .rates = SNDRV_PCM_RAT 1150 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1202 .rate_min = 5510, 1151 .rate_min = 5510,
1203 .rate_max = 48000, 1152 .rate_max = 48000,
1204 .channels_min = 1, 1153 .channels_min = 1,
1205 .channels_max = 2, 1154 .channels_max = 2,
1206 .buffer_bytes_max = (128*1024), 1155 .buffer_bytes_max = (128*1024),
1207 .period_bytes_min = 64, 1156 .period_bytes_min = 64,
1208 .period_bytes_max = (128*1024), 1157 .period_bytes_max = (128*1024),
1209 .periods_min = 1, 1158 .periods_min = 1,
1210 .periods_max = 1024, 1159 .periods_max = 1024,
1211 .fifo_size = 0, 1160 .fifo_size = 0,
1212 }; 1161 };
1213 1162
1214 static snd_pcm_hardware_t snd_cs4231_capture !! 1163 static struct snd_pcm_hardware snd_cs4231_capture =
1215 { 1164 {
1216 .info = (SNDRV_PCM_IN 1165 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1217 SNDRV_PCM_IN 1166 SNDRV_PCM_INFO_MMAP_VALID |
1218 SNDRV_PCM_IN 1167 SNDRV_PCM_INFO_RESUME |
1219 SNDRV_PCM_IN 1168 SNDRV_PCM_INFO_SYNC_START),
1220 .formats = (SNDRV_PCM_FM 1169 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1221 SNDRV_PCM_FM 1170 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1222 .rates = SNDRV_PCM_RAT 1171 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1223 .rate_min = 5510, 1172 .rate_min = 5510,
1224 .rate_max = 48000, 1173 .rate_max = 48000,
1225 .channels_min = 1, 1174 .channels_min = 1,
1226 .channels_max = 2, 1175 .channels_max = 2,
1227 .buffer_bytes_max = (128*1024), 1176 .buffer_bytes_max = (128*1024),
1228 .period_bytes_min = 64, 1177 .period_bytes_min = 64,
1229 .period_bytes_max = (128*1024), 1178 .period_bytes_max = (128*1024),
1230 .periods_min = 1, 1179 .periods_min = 1,
1231 .periods_max = 1024, 1180 .periods_max = 1024,
1232 .fifo_size = 0, 1181 .fifo_size = 0,
1233 }; 1182 };
1234 1183
1235 /* 1184 /*
1236 1185
1237 */ 1186 */
1238 1187
1239 static int snd_cs4231_playback_open(snd_pcm_s !! 1188 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1240 { 1189 {
1241 cs4231_t *chip = snd_pcm_substream_ch !! 1190 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1242 snd_pcm_runtime_t *runtime = substrea !! 1191 struct snd_pcm_runtime *runtime = substream->runtime;
1243 int err; 1192 int err;
1244 1193
1245 runtime->hw = snd_cs4231_playback; 1194 runtime->hw = snd_cs4231_playback;
1246 1195
1247 /* hardware bug in InterWave chipset 1196 /* hardware bug in InterWave chipset */
1248 if (chip->hardware == CS4231_HW_INTER 1197 if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1249 runtime->hw.formats &= ~SNDRV 1198 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1250 1199
1251 /* hardware limitation of cheap chips 1200 /* hardware limitation of cheap chips */
1252 if (chip->hardware == CS4231_HW_CS423 1201 if (chip->hardware == CS4231_HW_CS4235 ||
1253 chip->hardware == CS4231_HW_CS423 1202 chip->hardware == CS4231_HW_CS4239)
1254 runtime->hw.formats = SNDRV_P 1203 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1255 1204
1256 #ifdef LEGACY_SUPPORT <<
1257 snd_pcm_limit_isa_dma_size(chip->dma1 1205 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1258 snd_pcm_limit_isa_dma_size(chip->dma1 1206 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1259 1207
1260 if (chip->claim_dma) { 1208 if (chip->claim_dma) {
1261 if ((err = chip->claim_dma(ch 1209 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1262 return err; 1210 return err;
1263 } 1211 }
1264 #endif <<
1265 1212
1266 if ((err = snd_cs4231_open(chip, CS42 1213 if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1267 #ifdef LEGACY_SUPPORT <<
1268 if (chip->release_dma) 1214 if (chip->release_dma)
1269 chip->release_dma(chi 1215 chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1270 #endif <<
1271 snd_free_pages(runtime->dma_a 1216 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1272 return err; 1217 return err;
1273 } 1218 }
1274 chip->playback_substream = substream; 1219 chip->playback_substream = substream;
1275 #if defined(SBUS_SUPPORT) || defined(EBUS_SUP <<
1276 chip->p_periods_sent = 0; <<
1277 #endif <<
1278 snd_pcm_set_sync(substream); 1220 snd_pcm_set_sync(substream);
1279 chip->rate_constraint(runtime); 1221 chip->rate_constraint(runtime);
1280 return 0; 1222 return 0;
1281 } 1223 }
1282 1224
1283 static int snd_cs4231_capture_open(snd_pcm_su !! 1225 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1284 { 1226 {
1285 cs4231_t *chip = snd_pcm_substream_ch !! 1227 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1286 snd_pcm_runtime_t *runtime = substrea !! 1228 struct snd_pcm_runtime *runtime = substream->runtime;
1287 int err; 1229 int err;
1288 1230
1289 runtime->hw = snd_cs4231_capture; 1231 runtime->hw = snd_cs4231_capture;
1290 1232
1291 /* hardware limitation of cheap chips 1233 /* hardware limitation of cheap chips */
1292 if (chip->hardware == CS4231_HW_CS423 1234 if (chip->hardware == CS4231_HW_CS4235 ||
1293 chip->hardware == CS4231_HW_CS423 1235 chip->hardware == CS4231_HW_CS4239)
1294 runtime->hw.formats = SNDRV_P 1236 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1295 1237
1296 #ifdef LEGACY_SUPPORT <<
1297 snd_pcm_limit_isa_dma_size(chip->dma2 1238 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1298 snd_pcm_limit_isa_dma_size(chip->dma2 1239 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1299 1240
1300 if (chip->claim_dma) { 1241 if (chip->claim_dma) {
1301 if ((err = chip->claim_dma(ch 1242 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1302 return err; 1243 return err;
1303 } 1244 }
1304 #endif <<
1305 1245
1306 if ((err = snd_cs4231_open(chip, CS42 1246 if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1307 #ifdef LEGACY_SUPPORT <<
1308 if (chip->release_dma) 1247 if (chip->release_dma)
1309 chip->release_dma(chi 1248 chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1310 #endif <<
1311 snd_free_pages(runtime->dma_a 1249 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1312 return err; 1250 return err;
1313 } 1251 }
1314 chip->capture_substream = substream; 1252 chip->capture_substream = substream;
1315 #if defined(SBUS_SUPPORT) || defined(EBUS_SUP <<
1316 chip->c_periods_sent = 0; <<
1317 #endif <<
1318 snd_pcm_set_sync(substream); 1253 snd_pcm_set_sync(substream);
1319 chip->rate_constraint(runtime); 1254 chip->rate_constraint(runtime);
1320 return 0; 1255 return 0;
1321 } 1256 }
1322 1257
1323 static int snd_cs4231_playback_close(snd_pcm_ !! 1258 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1324 { 1259 {
1325 cs4231_t *chip = snd_pcm_substream_ch !! 1260 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1326 1261
1327 chip->playback_substream = NULL; 1262 chip->playback_substream = NULL;
1328 snd_cs4231_close(chip, CS4231_MODE_PL 1263 snd_cs4231_close(chip, CS4231_MODE_PLAY);
1329 return 0; 1264 return 0;
1330 } 1265 }
1331 1266
1332 static int snd_cs4231_capture_close(snd_pcm_s !! 1267 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1333 { 1268 {
1334 cs4231_t *chip = snd_pcm_substream_ch !! 1269 struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1335 1270
1336 chip->capture_substream = NULL; 1271 chip->capture_substream = NULL;
1337 snd_cs4231_close(chip, CS4231_MODE_RE 1272 snd_cs4231_close(chip, CS4231_MODE_RECORD);
1338 return 0; 1273 return 0;
1339 } 1274 }
1340 1275
1341 #ifdef CONFIG_PM 1276 #ifdef CONFIG_PM
1342 1277
1343 /* lowlevel suspend callback for CS4231 */ 1278 /* lowlevel suspend callback for CS4231 */
1344 static void snd_cs4231_suspend(cs4231_t *chip !! 1279 static void snd_cs4231_suspend(struct snd_cs4231 *chip)
1345 { 1280 {
1346 int reg; 1281 int reg;
1347 unsigned long flags; 1282 unsigned long flags;
1348 1283
>> 1284 snd_pcm_suspend_all(chip->pcm);
1349 spin_lock_irqsave(&chip->reg_lock, fl 1285 spin_lock_irqsave(&chip->reg_lock, flags);
1350 for (reg = 0; reg < 32; reg++) 1286 for (reg = 0; reg < 32; reg++)
1351 chip->image[reg] = snd_cs4231 1287 chip->image[reg] = snd_cs4231_in(chip, reg);
1352 spin_unlock_irqrestore(&chip->reg_loc 1288 spin_unlock_irqrestore(&chip->reg_lock, flags);
1353 } 1289 }
1354 1290
1355 /* lowlevel resume callback for CS4231 */ 1291 /* lowlevel resume callback for CS4231 */
1356 static void snd_cs4231_resume(cs4231_t *chip) !! 1292 static void snd_cs4231_resume(struct snd_cs4231 *chip)
1357 { 1293 {
1358 int reg; 1294 int reg;
1359 unsigned long flags; 1295 unsigned long flags;
1360 int timeout; !! 1296 /* int timeout; */
1361 1297
1362 snd_cs4231_mce_up(chip); 1298 snd_cs4231_mce_up(chip);
1363 spin_lock_irqsave(&chip->reg_lock, fl 1299 spin_lock_irqsave(&chip->reg_lock, flags);
1364 for (reg = 0; reg < 32; reg++) { 1300 for (reg = 0; reg < 32; reg++) {
1365 switch (reg) { 1301 switch (reg) {
1366 case CS4231_VERSION: 1302 case CS4231_VERSION:
1367 break; 1303 break;
1368 default: 1304 default:
1369 snd_cs4231_out(chip, 1305 snd_cs4231_out(chip, reg, chip->image[reg]);
1370 break; 1306 break;
1371 } 1307 }
1372 } 1308 }
1373 spin_unlock_irqrestore(&chip->reg_loc 1309 spin_unlock_irqrestore(&chip->reg_lock, flags);
1374 #if 0 !! 1310 #if 1
1375 snd_cs4231_mce_down(chip); 1311 snd_cs4231_mce_down(chip);
1376 #else 1312 #else
1377 /* The following is a workaround to a 1313 /* The following is a workaround to avoid freeze after resume on TP600E.
1378 This is the first half of copy of 1314 This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1379 include rescheduling. -- iwai 1315 include rescheduling. -- iwai
1380 */ 1316 */
1381 snd_cs4231_busy_wait(chip); 1317 snd_cs4231_busy_wait(chip);
1382 spin_lock_irqsave(&chip->reg_lock, fl 1318 spin_lock_irqsave(&chip->reg_lock, flags);
1383 chip->mce_bit &= ~CS4231_MCE; 1319 chip->mce_bit &= ~CS4231_MCE;
1384 timeout = cs4231_inb(chip, CS4231P(RE 1320 timeout = cs4231_inb(chip, CS4231P(REGSEL));
1385 cs4231_outb(chip, CS4231P(REGSEL), ch 1321 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1386 spin_unlock_irqrestore(&chip->reg_loc 1322 spin_unlock_irqrestore(&chip->reg_lock, flags);
1387 if (timeout == 0x80) 1323 if (timeout == 0x80)
1388 snd_printk("down [0x%lx]: ser 1324 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1389 if ((timeout & CS4231_MCE) == 0 || 1325 if ((timeout & CS4231_MCE) == 0 ||
1390 !(chip->hardware & (CS4231_HW_CS4 1326 !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1391 return; 1327 return;
1392 } 1328 }
1393 snd_cs4231_busy_wait(chip); 1329 snd_cs4231_busy_wait(chip);
1394 #endif 1330 #endif
1395 } 1331 }
1396 <<
1397 static int snd_cs4231_pm_suspend(snd_card_t * <<
1398 { <<
1399 cs4231_t *chip = card->pm_private_dat <<
1400 if (chip->suspend) <<
1401 chip->suspend(chip); <<
1402 return 0; <<
1403 } <<
1404 <<
1405 static int snd_cs4231_pm_resume(snd_card_t *c <<
1406 { <<
1407 cs4231_t *chip = card->pm_private_dat <<
1408 if (chip->resume) <<
1409 chip->resume(chip); <<
1410 return 0; <<
1411 } <<
1412 #endif /* CONFIG_PM */ 1332 #endif /* CONFIG_PM */
1413 1333
1414 #ifdef LEGACY_SUPPORT !! 1334 static int snd_cs4231_free(struct snd_cs4231 *chip)
1415 <<
1416 static int snd_cs4231_free(cs4231_t *chip) <<
1417 { 1335 {
1418 if (chip->res_port) { !! 1336 release_and_free_resource(chip->res_port);
1419 release_resource(chip->res_po !! 1337 release_and_free_resource(chip->res_cport);
1420 kfree_nocheck(chip->res_port) <<
1421 } <<
1422 if (chip->res_cport) { <<
1423 release_resource(chip->res_cp <<
1424 kfree_nocheck(chip->res_cport <<
1425 } <<
1426 if (chip->irq >= 0) { 1338 if (chip->irq >= 0) {
1427 disable_irq(chip->irq); 1339 disable_irq(chip->irq);
1428 if (!(chip->hwshare & CS4231_ 1340 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1429 free_irq(chip->irq, ( 1341 free_irq(chip->irq, (void *) chip);
1430 } 1342 }
1431 if (!(chip->hwshare & CS4231_HWSHARE_ 1343 if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1432 snd_dma_disable(chip->dma1); 1344 snd_dma_disable(chip->dma1);
1433 free_dma(chip->dma1); 1345 free_dma(chip->dma1);
1434 } 1346 }
1435 if (!(chip->hwshare & CS4231_HWSHARE_ 1347 if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1436 snd_dma_disable(chip->dma2); 1348 snd_dma_disable(chip->dma2);
1437 free_dma(chip->dma2); 1349 free_dma(chip->dma2);
1438 } 1350 }
1439 if (chip->timer) 1351 if (chip->timer)
1440 snd_device_free(chip->card, c 1352 snd_device_free(chip->card, chip->timer);
1441 kfree(chip); 1353 kfree(chip);
1442 return 0; 1354 return 0;
1443 } 1355 }
1444 1356
1445 static int snd_cs4231_dev_free(snd_device_t * !! 1357 static int snd_cs4231_dev_free(struct snd_device *device)
1446 { 1358 {
1447 cs4231_t *chip = device->device_data; !! 1359 struct snd_cs4231 *chip = device->device_data;
1448 return snd_cs4231_free(chip); 1360 return snd_cs4231_free(chip);
1449 } 1361 }
1450 1362
1451 #endif /* LEGACY_SUPPORT */ !! 1363 const char *snd_cs4231_chip_id(struct snd_cs4231 *chip)
1452 <<
1453 const char *snd_cs4231_chip_id(cs4231_t *chip <<
1454 { 1364 {
1455 switch (chip->hardware) { 1365 switch (chip->hardware) {
1456 case CS4231_HW_CS4231: return "CS423 1366 case CS4231_HW_CS4231: return "CS4231";
1457 case CS4231_HW_CS4231A: return "CS423 1367 case CS4231_HW_CS4231A: return "CS4231A";
1458 case CS4231_HW_CS4232: return "CS423 1368 case CS4231_HW_CS4232: return "CS4232";
1459 case CS4231_HW_CS4232A: return "CS423 1369 case CS4231_HW_CS4232A: return "CS4232A";
1460 case CS4231_HW_CS4235: return "CS423 1370 case CS4231_HW_CS4235: return "CS4235";
1461 case CS4231_HW_CS4236: return "CS423 1371 case CS4231_HW_CS4236: return "CS4236";
1462 case CS4231_HW_CS4236B: return "CS423 1372 case CS4231_HW_CS4236B: return "CS4236B";
1463 case CS4231_HW_CS4237B: return "CS423 1373 case CS4231_HW_CS4237B: return "CS4237B";
1464 case CS4231_HW_CS4238B: return "CS423 1374 case CS4231_HW_CS4238B: return "CS4238B";
1465 case CS4231_HW_CS4239: return "CS423 1375 case CS4231_HW_CS4239: return "CS4239";
1466 case CS4231_HW_INTERWAVE: return "AMD 1376 case CS4231_HW_INTERWAVE: return "AMD InterWave";
1467 case CS4231_HW_OPL3SA2: return chip-> 1377 case CS4231_HW_OPL3SA2: return chip->card->shortname;
1468 case CS4231_HW_AD1845: return "AD1845 1378 case CS4231_HW_AD1845: return "AD1845";
1469 default: return "???"; 1379 default: return "???";
1470 } 1380 }
1471 } 1381 }
1472 1382
1473 static int snd_cs4231_new(snd_card_t * card, !! 1383 static int snd_cs4231_new(struct snd_card *card,
1474 unsigned short hard 1384 unsigned short hardware,
1475 unsigned short hwsh 1385 unsigned short hwshare,
1476 cs4231_t ** rchip) !! 1386 struct snd_cs4231 ** rchip)
1477 { 1387 {
1478 cs4231_t *chip; !! 1388 struct snd_cs4231 *chip;
1479 1389
1480 *rchip = NULL; 1390 *rchip = NULL;
1481 chip = kcalloc(1, sizeof(*chip), GFP_ !! 1391 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1482 if (chip == NULL) 1392 if (chip == NULL)
1483 return -ENOMEM; 1393 return -ENOMEM;
1484 chip->hardware = hardware; 1394 chip->hardware = hardware;
1485 chip->hwshare = hwshare; 1395 chip->hwshare = hwshare;
1486 1396
1487 spin_lock_init(&chip->reg_lock); 1397 spin_lock_init(&chip->reg_lock);
1488 init_MUTEX(&chip->mce_mutex); !! 1398 mutex_init(&chip->mce_mutex);
1489 init_MUTEX(&chip->open_mutex); !! 1399 mutex_init(&chip->open_mutex);
1490 chip->card = card; 1400 chip->card = card;
1491 chip->rate_constraint = snd_cs4231_xr 1401 chip->rate_constraint = snd_cs4231_xrate;
1492 chip->set_playback_format = snd_cs423 1402 chip->set_playback_format = snd_cs4231_playback_format;
1493 chip->set_capture_format = snd_cs4231 1403 chip->set_capture_format = snd_cs4231_capture_format;
1494 memcpy(&chip->image, &snd_cs4231_orig 1404 memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1495 1405
1496 *rchip = chip; 1406 *rchip = chip;
1497 return 0; 1407 return 0;
1498 } 1408 }
1499 1409
1500 #ifdef LEGACY_SUPPORT !! 1410 int snd_cs4231_create(struct snd_card *card,
1501 <<
1502 int snd_cs4231_create(snd_card_t * card, <<
1503 unsigned long port, 1411 unsigned long port,
1504 unsigned long cport, 1412 unsigned long cport,
1505 int irq, int dma1, int 1413 int irq, int dma1, int dma2,
1506 unsigned short hardware 1414 unsigned short hardware,
1507 unsigned short hwshare, 1415 unsigned short hwshare,
1508 cs4231_t ** rchip) !! 1416 struct snd_cs4231 ** rchip)
1509 { 1417 {
1510 static snd_device_ops_t ops = { !! 1418 static struct snd_device_ops ops = {
1511 .dev_free = snd_cs4231_de 1419 .dev_free = snd_cs4231_dev_free,
1512 }; 1420 };
1513 cs4231_t *chip; !! 1421 struct snd_cs4231 *chip;
1514 int err; 1422 int err;
1515 1423
1516 err = snd_cs4231_new(card, hardware, 1424 err = snd_cs4231_new(card, hardware, hwshare, &chip);
1517 if (err < 0) 1425 if (err < 0)
1518 return err; 1426 return err;
1519 1427
1520 chip->irq = -1; 1428 chip->irq = -1;
1521 chip->dma1 = -1; 1429 chip->dma1 = -1;
1522 chip->dma2 = -1; 1430 chip->dma2 = -1;
1523 1431
1524 if ((chip->res_port = request_region( 1432 if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1525 snd_printk(KERN_ERR "cs4231: 1433 snd_printk(KERN_ERR "cs4231: can't grab port 0x%lx\n", port);
1526 snd_cs4231_free(chip); 1434 snd_cs4231_free(chip);
1527 return -EBUSY; 1435 return -EBUSY;
1528 } 1436 }
1529 chip->port = port; 1437 chip->port = port;
1530 if ((long)cport >= 0 && (chip->res_cp 1438 if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1531 snd_printk(KERN_ERR "cs4231: 1439 snd_printk(KERN_ERR "cs4231: can't grab control port 0x%lx\n", cport);
1532 snd_cs4231_free(chip); 1440 snd_cs4231_free(chip);
1533 return -ENODEV; 1441 return -ENODEV;
1534 } 1442 }
1535 chip->cport = cport; 1443 chip->cport = cport;
1536 if (!(hwshare & CS4231_HWSHARE_IRQ) & !! 1444 if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, IRQF_DISABLED, "CS4231", (void *) chip)) {
1537 snd_printk(KERN_ERR "cs4231: 1445 snd_printk(KERN_ERR "cs4231: can't grab IRQ %d\n", irq);
1538 snd_cs4231_free(chip); 1446 snd_cs4231_free(chip);
1539 return -EBUSY; 1447 return -EBUSY;
1540 } 1448 }
1541 chip->irq = irq; 1449 chip->irq = irq;
1542 if (!(hwshare & CS4231_HWSHARE_DMA1) 1450 if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1543 snd_printk(KERN_ERR "cs4231: 1451 snd_printk(KERN_ERR "cs4231: can't grab DMA1 %d\n", dma1);
1544 snd_cs4231_free(chip); 1452 snd_cs4231_free(chip);
1545 return -EBUSY; 1453 return -EBUSY;
1546 } 1454 }
1547 chip->dma1 = dma1; 1455 chip->dma1 = dma1;
1548 if (!(hwshare & CS4231_HWSHARE_DMA2) 1456 if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1549 snd_printk(KERN_ERR "cs4231: 1457 snd_printk(KERN_ERR "cs4231: can't grab DMA2 %d\n", dma2);
1550 snd_cs4231_free(chip); 1458 snd_cs4231_free(chip);
1551 return -EBUSY; 1459 return -EBUSY;
1552 } 1460 }
1553 if (dma1 == dma2 || dma2 < 0) { 1461 if (dma1 == dma2 || dma2 < 0) {
1554 chip->single_dma = 1; 1462 chip->single_dma = 1;
1555 chip->dma2 = chip->dma1; 1463 chip->dma2 = chip->dma1;
1556 } else 1464 } else
1557 chip->dma2 = dma2; 1465 chip->dma2 = dma2;
1558 1466
1559 /* global setup */ 1467 /* global setup */
1560 if (snd_cs4231_probe(chip) < 0) { 1468 if (snd_cs4231_probe(chip) < 0) {
1561 snd_cs4231_free(chip); 1469 snd_cs4231_free(chip);
1562 return -ENODEV; 1470 return -ENODEV;
1563 } 1471 }
1564 snd_cs4231_init(chip); 1472 snd_cs4231_init(chip);
1565 1473
>> 1474 #if 0
1566 if (chip->hardware & CS4231_HW_CS4232 1475 if (chip->hardware & CS4231_HW_CS4232_MASK) {
1567 if (chip->res_cport == NULL) 1476 if (chip->res_cport == NULL)
1568 snd_printk("CS4232 co 1477 snd_printk("CS4232 control port features are not accessible\n");
1569 } 1478 }
>> 1479 #endif
1570 1480
1571 /* Register device */ 1481 /* Register device */
1572 if ((err = snd_device_new(card, SNDRV 1482 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1573 snd_cs4231_free(chip); 1483 snd_cs4231_free(chip);
1574 return err; 1484 return err;
1575 } 1485 }
1576 1486
1577 #ifdef CONFIG_PM 1487 #ifdef CONFIG_PM
1578 /* Power Management */ 1488 /* Power Management */
1579 chip->suspend = snd_cs4231_suspend; 1489 chip->suspend = snd_cs4231_suspend;
1580 chip->resume = snd_cs4231_resume; 1490 chip->resume = snd_cs4231_resume;
1581 snd_card_set_isa_pm_callback(card, sn <<
1582 #endif 1491 #endif
1583 1492
1584 *rchip = chip; 1493 *rchip = chip;
1585 return 0; 1494 return 0;
1586 } 1495 }
1587 1496
1588 #endif /* LEGACY_SUPPORT */ !! 1497 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1589 <<
1590 static snd_pcm_ops_t snd_cs4231_playback_ops <<
1591 .open = snd_cs4231_playback_o 1498 .open = snd_cs4231_playback_open,
1592 .close = snd_cs4231_playback_c 1499 .close = snd_cs4231_playback_close,
1593 .ioctl = snd_pcm_lib_ioctl, 1500 .ioctl = snd_pcm_lib_ioctl,
1594 .hw_params = snd_cs4231_playback_h 1501 .hw_params = snd_cs4231_playback_hw_params,
1595 .hw_free = snd_cs4231_playback_h 1502 .hw_free = snd_cs4231_playback_hw_free,
1596 .prepare = snd_cs4231_playback_p 1503 .prepare = snd_cs4231_playback_prepare,
1597 .trigger = snd_cs4231_trigger, 1504 .trigger = snd_cs4231_trigger,
1598 .pointer = snd_cs4231_playback_p 1505 .pointer = snd_cs4231_playback_pointer,
1599 }; 1506 };
1600 1507
1601 static snd_pcm_ops_t snd_cs4231_capture_ops = !! 1508 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1602 .open = snd_cs4231_capture_op 1509 .open = snd_cs4231_capture_open,
1603 .close = snd_cs4231_capture_cl 1510 .close = snd_cs4231_capture_close,
1604 .ioctl = snd_pcm_lib_ioctl, 1511 .ioctl = snd_pcm_lib_ioctl,
1605 .hw_params = snd_cs4231_capture_hw 1512 .hw_params = snd_cs4231_capture_hw_params,
1606 .hw_free = snd_cs4231_capture_hw 1513 .hw_free = snd_cs4231_capture_hw_free,
1607 .prepare = snd_cs4231_capture_pr 1514 .prepare = snd_cs4231_capture_prepare,
1608 .trigger = snd_cs4231_trigger, 1515 .trigger = snd_cs4231_trigger,
1609 .pointer = snd_cs4231_capture_po 1516 .pointer = snd_cs4231_capture_pointer,
1610 }; 1517 };
1611 1518
1612 static void snd_cs4231_pcm_free(snd_pcm_t *pc !! 1519 int snd_cs4231_pcm(struct snd_cs4231 *chip, int device, struct snd_pcm **rpcm)
1613 { 1520 {
1614 cs4231_t *chip = pcm->private_data; !! 1521 struct snd_pcm *pcm;
1615 chip->pcm = NULL; <<
1616 snd_pcm_lib_preallocate_free_for_all( <<
1617 } <<
1618 <<
1619 int snd_cs4231_pcm(cs4231_t *chip, int device <<
1620 { <<
1621 snd_pcm_t *pcm; <<
1622 int err; 1522 int err;
1623 1523
1624 if ((err = snd_pcm_new(chip->card, "C 1524 if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1625 return err; 1525 return err;
1626 1526
1627 spin_lock_init(&chip->reg_lock); 1527 spin_lock_init(&chip->reg_lock);
1628 init_MUTEX(&chip->mce_mutex); !! 1528 mutex_init(&chip->mce_mutex);
1629 init_MUTEX(&chip->open_mutex); !! 1529 mutex_init(&chip->open_mutex);
1630 1530
1631 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM 1531 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1632 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM 1532 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1633 1533
1634 /* global setup */ 1534 /* global setup */
1635 pcm->private_data = chip; 1535 pcm->private_data = chip;
1636 pcm->private_free = snd_cs4231_pcm_fr <<
1637 pcm->info_flags = 0; 1536 pcm->info_flags = 0;
1638 if (chip->single_dma) 1537 if (chip->single_dma)
1639 pcm->info_flags |= SNDRV_PCM_ 1538 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1640 if (chip->hardware != CS4231_HW_INTER 1539 if (chip->hardware != CS4231_HW_INTERWAVE)
1641 pcm->info_flags |= SNDRV_PCM_ 1540 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1642 strcpy(pcm->name, snd_cs4231_chip_id( 1541 strcpy(pcm->name, snd_cs4231_chip_id(chip));
1643 1542
1644 #ifdef LEGACY_SUPPORT <<
1645 snd_pcm_lib_preallocate_pages_for_all 1543 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1646 1544 snd_dma_isa_data(),
1647 1545 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1648 #else <<
1649 # ifdef EBUS_SUPPORT <<
1650 if (chip->ebus_flag) { <<
1651 snd_pcm_lib_preallocate_pages <<
1652 <<
1653 <<
1654 } else { <<
1655 # endif <<
1656 # ifdef SBUS_SUPPORT <<
1657 snd_pcm_lib_preallocate_pages <<
1658 <<
1659 <<
1660 # endif <<
1661 # ifdef EBUS_SUPPORT <<
1662 } <<
1663 # endif <<
1664 #endif <<
1665 1546
1666 chip->pcm = pcm; 1547 chip->pcm = pcm;
1667 if (rpcm) 1548 if (rpcm)
1668 *rpcm = pcm; 1549 *rpcm = pcm;
1669 return 0; 1550 return 0;
1670 } 1551 }
1671 1552
1672 static void snd_cs4231_timer_free(snd_timer_t !! 1553 static void snd_cs4231_timer_free(struct snd_timer *timer)
1673 { 1554 {
1674 cs4231_t *chip = timer->private_data; !! 1555 struct snd_cs4231 *chip = timer->private_data;
1675 chip->timer = NULL; 1556 chip->timer = NULL;
1676 } 1557 }
1677 1558
1678 int snd_cs4231_timer(cs4231_t *chip, int devi !! 1559 int snd_cs4231_timer(struct snd_cs4231 *chip, int device, struct snd_timer **rtimer)
1679 { 1560 {
1680 snd_timer_t *timer; !! 1561 struct snd_timer *timer;
1681 snd_timer_id_t tid; !! 1562 struct snd_timer_id tid;
1682 int err; 1563 int err;
1683 1564
1684 /* Timer initialization */ 1565 /* Timer initialization */
1685 tid.dev_class = SNDRV_TIMER_CLASS_CAR 1566 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1686 tid.dev_sclass = SNDRV_TIMER_SCLASS_N 1567 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1687 tid.card = chip->card->number; 1568 tid.card = chip->card->number;
1688 tid.device = device; 1569 tid.device = device;
1689 tid.subdevice = 0; 1570 tid.subdevice = 0;
1690 if ((err = snd_timer_new(chip->card, 1571 if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1691 return err; 1572 return err;
1692 strcpy(timer->name, snd_cs4231_chip_i 1573 strcpy(timer->name, snd_cs4231_chip_id(chip));
1693 timer->private_data = chip; 1574 timer->private_data = chip;
1694 timer->private_free = snd_cs4231_time 1575 timer->private_free = snd_cs4231_timer_free;
1695 timer->hw = snd_cs4231_timer_table; 1576 timer->hw = snd_cs4231_timer_table;
1696 chip->timer = timer; 1577 chip->timer = timer;
1697 if (rtimer) 1578 if (rtimer)
1698 *rtimer = timer; 1579 *rtimer = timer;
1699 return 0; 1580 return 0;
1700 } 1581 }
1701 1582
1702 /* 1583 /*
1703 * MIXER part 1584 * MIXER part
1704 */ 1585 */
1705 1586
1706 static int snd_cs4231_info_mux(snd_kcontrol_t !! 1587 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1707 { 1588 {
1708 static char *texts[4] = { 1589 static char *texts[4] = {
1709 "Line", "Aux", "Mic", "Mix" 1590 "Line", "Aux", "Mic", "Mix"
1710 }; 1591 };
1711 static char *opl3sa_texts[4] = { 1592 static char *opl3sa_texts[4] = {
1712 "Line", "CD", "Mic", "Mix" 1593 "Line", "CD", "Mic", "Mix"
1713 }; 1594 };
1714 static char *gusmax_texts[4] = { 1595 static char *gusmax_texts[4] = {
1715 "Line", "Synth", "Mic", "Mix" 1596 "Line", "Synth", "Mic", "Mix"
1716 }; 1597 };
1717 char **ptexts = texts; 1598 char **ptexts = texts;
1718 cs4231_t *chip = snd_kcontrol_chip(kc !! 1599 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1719 1600
1720 snd_assert(chip->card != NULL, return 1601 snd_assert(chip->card != NULL, return -EINVAL);
1721 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENU 1602 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1722 uinfo->count = 2; 1603 uinfo->count = 2;
1723 uinfo->value.enumerated.items = 4; 1604 uinfo->value.enumerated.items = 4;
1724 if (uinfo->value.enumerated.item > 3) 1605 if (uinfo->value.enumerated.item > 3)
1725 uinfo->value.enumerated.item 1606 uinfo->value.enumerated.item = 3;
1726 if (!strcmp(chip->card->driver, "GUS 1607 if (!strcmp(chip->card->driver, "GUS MAX"))
1727 ptexts = gusmax_texts; 1608 ptexts = gusmax_texts;
1728 switch (chip->hardware) { 1609 switch (chip->hardware) {
1729 case CS4231_HW_INTERWAVE: ptexts = gu 1610 case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1730 case CS4231_HW_OPL3SA2: ptexts = opl3 1611 case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1731 } 1612 }
1732 strcpy(uinfo->value.enumerated.name, 1613 strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1733 return 0; 1614 return 0;
1734 } 1615 }
1735 1616
1736 static int snd_cs4231_get_mux(snd_kcontrol_t !! 1617 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1737 { 1618 {
1738 cs4231_t *chip = snd_kcontrol_chip(kc !! 1619 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1739 unsigned long flags; 1620 unsigned long flags;
1740 1621
1741 spin_lock_irqsave(&chip->reg_lock, fl 1622 spin_lock_irqsave(&chip->reg_lock, flags);
1742 ucontrol->value.enumerated.item[0] = 1623 ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1743 ucontrol->value.enumerated.item[1] = 1624 ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1744 spin_unlock_irqrestore(&chip->reg_loc 1625 spin_unlock_irqrestore(&chip->reg_lock, flags);
1745 return 0; 1626 return 0;
1746 } 1627 }
1747 1628
1748 static int snd_cs4231_put_mux(snd_kcontrol_t !! 1629 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1749 { 1630 {
1750 cs4231_t *chip = snd_kcontrol_chip(kc !! 1631 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1751 unsigned long flags; 1632 unsigned long flags;
1752 unsigned short left, right; 1633 unsigned short left, right;
1753 int change; 1634 int change;
1754 1635
1755 if (ucontrol->value.enumerated.item[0 1636 if (ucontrol->value.enumerated.item[0] > 3 ||
1756 ucontrol->value.enumerated.item[1 1637 ucontrol->value.enumerated.item[1] > 3)
1757 return -EINVAL; 1638 return -EINVAL;
1758 left = ucontrol->value.enumerated.ite 1639 left = ucontrol->value.enumerated.item[0] << 6;
1759 right = ucontrol->value.enumerated.it 1640 right = ucontrol->value.enumerated.item[1] << 6;
1760 spin_lock_irqsave(&chip->reg_lock, fl 1641 spin_lock_irqsave(&chip->reg_lock, flags);
1761 left = (chip->image[CS4231_LEFT_INPUT 1642 left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1762 right = (chip->image[CS4231_RIGHT_INP 1643 right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1763 change = left != chip->image[CS4231_L 1644 change = left != chip->image[CS4231_LEFT_INPUT] ||
1764 right != chip->image[CS4231_ 1645 right != chip->image[CS4231_RIGHT_INPUT];
1765 snd_cs4231_out(chip, CS4231_LEFT_INPU 1646 snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1766 snd_cs4231_out(chip, CS4231_RIGHT_INP 1647 snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1767 spin_unlock_irqrestore(&chip->reg_loc 1648 spin_unlock_irqrestore(&chip->reg_lock, flags);
1768 return change; 1649 return change;
1769 } 1650 }
1770 1651
1771 int snd_cs4231_info_single(snd_kcontrol_t *kc !! 1652 int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1772 { 1653 {
1773 int mask = (kcontrol->private_value > 1654 int mask = (kcontrol->private_value >> 16) & 0xff;
1774 1655
1775 uinfo->type = mask == 1 ? SNDRV_CTL_E 1656 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1776 uinfo->count = 1; 1657 uinfo->count = 1;
1777 uinfo->value.integer.min = 0; 1658 uinfo->value.integer.min = 0;
1778 uinfo->value.integer.max = mask; 1659 uinfo->value.integer.max = mask;
1779 return 0; 1660 return 0;
1780 } 1661 }
1781 1662
1782 int snd_cs4231_get_single(snd_kcontrol_t * kc !! 1663 int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1783 { 1664 {
1784 cs4231_t *chip = snd_kcontrol_chip(kc !! 1665 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1785 unsigned long flags; 1666 unsigned long flags;
1786 int reg = kcontrol->private_value & 0 1667 int reg = kcontrol->private_value & 0xff;
1787 int shift = (kcontrol->private_value 1668 int shift = (kcontrol->private_value >> 8) & 0xff;
1788 int mask = (kcontrol->private_value > 1669 int mask = (kcontrol->private_value >> 16) & 0xff;
1789 int invert = (kcontrol->private_value 1670 int invert = (kcontrol->private_value >> 24) & 0xff;
1790 1671
1791 spin_lock_irqsave(&chip->reg_lock, fl 1672 spin_lock_irqsave(&chip->reg_lock, flags);
1792 ucontrol->value.integer.value[0] = (c 1673 ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1793 spin_unlock_irqrestore(&chip->reg_loc 1674 spin_unlock_irqrestore(&chip->reg_lock, flags);
1794 if (invert) 1675 if (invert)
1795 ucontrol->value.integer.value 1676 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1796 return 0; 1677 return 0;
1797 } 1678 }
1798 1679
1799 int snd_cs4231_put_single(snd_kcontrol_t * kc !! 1680 int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1800 { 1681 {
1801 cs4231_t *chip = snd_kcontrol_chip(kc !! 1682 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1802 unsigned long flags; 1683 unsigned long flags;
1803 int reg = kcontrol->private_value & 0 1684 int reg = kcontrol->private_value & 0xff;
1804 int shift = (kcontrol->private_value 1685 int shift = (kcontrol->private_value >> 8) & 0xff;
1805 int mask = (kcontrol->private_value > 1686 int mask = (kcontrol->private_value >> 16) & 0xff;
1806 int invert = (kcontrol->private_value 1687 int invert = (kcontrol->private_value >> 24) & 0xff;
1807 int change; 1688 int change;
1808 unsigned short val; 1689 unsigned short val;
1809 1690
1810 val = (ucontrol->value.integer.value[ 1691 val = (ucontrol->value.integer.value[0] & mask);
1811 if (invert) 1692 if (invert)
1812 val = mask - val; 1693 val = mask - val;
1813 val <<= shift; 1694 val <<= shift;
1814 spin_lock_irqsave(&chip->reg_lock, fl 1695 spin_lock_irqsave(&chip->reg_lock, flags);
1815 val = (chip->image[reg] & ~(mask << s 1696 val = (chip->image[reg] & ~(mask << shift)) | val;
1816 change = val != chip->image[reg]; 1697 change = val != chip->image[reg];
1817 snd_cs4231_out(chip, reg, val); 1698 snd_cs4231_out(chip, reg, val);
1818 spin_unlock_irqrestore(&chip->reg_loc 1699 spin_unlock_irqrestore(&chip->reg_lock, flags);
1819 return change; 1700 return change;
1820 } 1701 }
1821 1702
1822 int snd_cs4231_info_double(snd_kcontrol_t *kc !! 1703 int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1823 { 1704 {
1824 int mask = (kcontrol->private_value > 1705 int mask = (kcontrol->private_value >> 24) & 0xff;
1825 1706
1826 uinfo->type = mask == 1 ? SNDRV_CTL_E 1707 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1827 uinfo->count = 2; 1708 uinfo->count = 2;
1828 uinfo->value.integer.min = 0; 1709 uinfo->value.integer.min = 0;
1829 uinfo->value.integer.max = mask; 1710 uinfo->value.integer.max = mask;
1830 return 0; 1711 return 0;
1831 } 1712 }
1832 1713
1833 int snd_cs4231_get_double(snd_kcontrol_t * kc !! 1714 int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1834 { 1715 {
1835 cs4231_t *chip = snd_kcontrol_chip(kc !! 1716 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1836 unsigned long flags; 1717 unsigned long flags;
1837 int left_reg = kcontrol->private_valu 1718 int left_reg = kcontrol->private_value & 0xff;
1838 int right_reg = (kcontrol->private_va 1719 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1839 int shift_left = (kcontrol->private_v 1720 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1840 int shift_right = (kcontrol->private_ 1721 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1841 int mask = (kcontrol->private_value > 1722 int mask = (kcontrol->private_value >> 24) & 0xff;
1842 int invert = (kcontrol->private_value 1723 int invert = (kcontrol->private_value >> 22) & 1;
1843 1724
1844 spin_lock_irqsave(&chip->reg_lock, fl 1725 spin_lock_irqsave(&chip->reg_lock, flags);
1845 ucontrol->value.integer.value[0] = (c 1726 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1846 ucontrol->value.integer.value[1] = (c 1727 ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1847 spin_unlock_irqrestore(&chip->reg_loc 1728 spin_unlock_irqrestore(&chip->reg_lock, flags);
1848 if (invert) { 1729 if (invert) {
1849 ucontrol->value.integer.value 1730 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1850 ucontrol->value.integer.value 1731 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1851 } 1732 }
1852 return 0; 1733 return 0;
1853 } 1734 }
1854 1735
1855 int snd_cs4231_put_double(snd_kcontrol_t * kc !! 1736 int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1856 { 1737 {
1857 cs4231_t *chip = snd_kcontrol_chip(kc !! 1738 struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1858 unsigned long flags; 1739 unsigned long flags;
1859 int left_reg = kcontrol->private_valu 1740 int left_reg = kcontrol->private_value & 0xff;
1860 int right_reg = (kcontrol->private_va 1741 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1861 int shift_left = (kcontrol->private_v 1742 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1862 int shift_right = (kcontrol->private_ 1743 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1863 int mask = (kcontrol->private_value > 1744 int mask = (kcontrol->private_value >> 24) & 0xff;
1864 int invert = (kcontrol->private_value 1745 int invert = (kcontrol->private_value >> 22) & 1;
1865 int change; 1746 int change;
1866 unsigned short val1, val2; 1747 unsigned short val1, val2;
1867 1748
1868 val1 = ucontrol->value.integer.value[ 1749 val1 = ucontrol->value.integer.value[0] & mask;
1869 val2 = ucontrol->value.integer.value[ 1750 val2 = ucontrol->value.integer.value[1] & mask;
1870 if (invert) { 1751 if (invert) {
1871 val1 = mask - val1; 1752 val1 = mask - val1;
1872 val2 = mask - val2; 1753 val2 = mask - val2;
1873 } 1754 }
1874 val1 <<= shift_left; 1755 val1 <<= shift_left;
1875 val2 <<= shift_right; 1756 val2 <<= shift_right;
1876 spin_lock_irqsave(&chip->reg_lock, fl 1757 spin_lock_irqsave(&chip->reg_lock, flags);
1877 val1 = (chip->image[left_reg] & ~(mas 1758 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1878 val2 = (chip->image[right_reg] & ~(ma 1759 val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1879 change = val1 != chip->image[left_reg 1760 change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1880 snd_cs4231_out(chip, left_reg, val1); 1761 snd_cs4231_out(chip, left_reg, val1);
1881 snd_cs4231_out(chip, right_reg, val2) 1762 snd_cs4231_out(chip, right_reg, val2);
1882 spin_unlock_irqrestore(&chip->reg_loc 1763 spin_unlock_irqrestore(&chip->reg_lock, flags);
1883 return change; 1764 return change;
1884 } 1765 }
1885 1766
1886 static snd_kcontrol_new_t snd_cs4231_controls !! 1767 static struct snd_kcontrol_new snd_cs4231_controls[] = {
1887 CS4231_DOUBLE("PCM Playback Switch", 0, CS423 1768 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1888 CS4231_DOUBLE("PCM Playback Volume", 0, CS423 1769 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1889 CS4231_DOUBLE("Line Playback Switch", 0, CS42 1770 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1890 CS4231_DOUBLE("Line Playback Volume", 0, CS42 1771 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1891 CS4231_DOUBLE("Aux Playback Switch", 0, CS423 1772 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1892 CS4231_DOUBLE("Aux Playback Volume", 0, CS423 1773 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1893 CS4231_DOUBLE("Aux Playback Switch", 1, CS423 1774 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1894 CS4231_DOUBLE("Aux Playback Volume", 1, CS423 1775 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1895 CS4231_SINGLE("Mono Playback Switch", 0, CS42 1776 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1896 CS4231_SINGLE("Mono Playback Volume", 0, CS42 1777 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1897 CS4231_SINGLE("Mono Output Playback Switch", 1778 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1898 CS4231_SINGLE("Mono Output Playback Bypass", 1779 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1899 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEF 1780 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1900 { 1781 {
1901 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1782 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1902 .name = "Capture Source", 1783 .name = "Capture Source",
1903 .info = snd_cs4231_info_mux, 1784 .info = snd_cs4231_info_mux,
1904 .get = snd_cs4231_get_mux, 1785 .get = snd_cs4231_get_mux,
1905 .put = snd_cs4231_put_mux, 1786 .put = snd_cs4231_put_mux,
1906 }, 1787 },
1907 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INP 1788 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1908 CS4231_SINGLE("Loopback Capture Switch", 0, C 1789 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1909 CS4231_SINGLE("Loopback Capture Volume", 0, C 1790 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1910 }; 1791 };
1911 1792
1912 int snd_cs4231_mixer(cs4231_t *chip) !! 1793 int snd_cs4231_mixer(struct snd_cs4231 *chip)
1913 { 1794 {
1914 snd_card_t *card; !! 1795 struct snd_card *card;
1915 unsigned int idx; 1796 unsigned int idx;
1916 int err; 1797 int err;
1917 1798
1918 snd_assert(chip != NULL && chip->pcm 1799 snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1919 1800
1920 card = chip->card; 1801 card = chip->card;
1921 1802
1922 strcpy(card->mixername, chip->pcm->na 1803 strcpy(card->mixername, chip->pcm->name);
1923 1804
1924 for (idx = 0; idx < ARRAY_SIZE(snd_cs 1805 for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1925 if ((err = snd_ctl_add(card, 1806 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1926 return err; 1807 return err;
1927 } 1808 }
1928 return 0; 1809 return 0;
1929 } 1810 }
1930 1811
1931 EXPORT_SYMBOL(snd_cs4231_out); 1812 EXPORT_SYMBOL(snd_cs4231_out);
1932 EXPORT_SYMBOL(snd_cs4231_in); 1813 EXPORT_SYMBOL(snd_cs4231_in);
1933 EXPORT_SYMBOL(snd_cs4236_ext_out); 1814 EXPORT_SYMBOL(snd_cs4236_ext_out);
1934 EXPORT_SYMBOL(snd_cs4236_ext_in); 1815 EXPORT_SYMBOL(snd_cs4236_ext_in);
1935 EXPORT_SYMBOL(snd_cs4231_mce_up); 1816 EXPORT_SYMBOL(snd_cs4231_mce_up);
1936 EXPORT_SYMBOL(snd_cs4231_mce_down); 1817 EXPORT_SYMBOL(snd_cs4231_mce_down);
1937 EXPORT_SYMBOL(snd_cs4231_interrupt); 1818 EXPORT_SYMBOL(snd_cs4231_interrupt);
1938 EXPORT_SYMBOL(snd_cs4231_chip_id); 1819 EXPORT_SYMBOL(snd_cs4231_chip_id);
1939 EXPORT_SYMBOL(snd_cs4231_create); 1820 EXPORT_SYMBOL(snd_cs4231_create);
1940 EXPORT_SYMBOL(snd_cs4231_pcm); 1821 EXPORT_SYMBOL(snd_cs4231_pcm);
1941 EXPORT_SYMBOL(snd_cs4231_mixer); 1822 EXPORT_SYMBOL(snd_cs4231_mixer);
1942 EXPORT_SYMBOL(snd_cs4231_timer); 1823 EXPORT_SYMBOL(snd_cs4231_timer);
1943 EXPORT_SYMBOL(snd_cs4231_info_single); 1824 EXPORT_SYMBOL(snd_cs4231_info_single);
1944 EXPORT_SYMBOL(snd_cs4231_get_single); 1825 EXPORT_SYMBOL(snd_cs4231_get_single);
1945 EXPORT_SYMBOL(snd_cs4231_put_single); 1826 EXPORT_SYMBOL(snd_cs4231_put_single);
1946 EXPORT_SYMBOL(snd_cs4231_info_double); 1827 EXPORT_SYMBOL(snd_cs4231_info_double);
1947 EXPORT_SYMBOL(snd_cs4231_get_double); 1828 EXPORT_SYMBOL(snd_cs4231_get_double);
1948 EXPORT_SYMBOL(snd_cs4231_put_double); 1829 EXPORT_SYMBOL(snd_cs4231_put_double);
1949 1830
1950 /* 1831 /*
1951 * INIT part 1832 * INIT part
1952 */ 1833 */
1953 1834
1954 static int __init alsa_cs4231_init(void) 1835 static int __init alsa_cs4231_init(void)
1955 { 1836 {
1956 return 0; 1837 return 0;
1957 } 1838 }
1958 1839
1959 static void __exit alsa_cs4231_exit(void) 1840 static void __exit alsa_cs4231_exit(void)
1960 { 1841 {
1961 } 1842 }
1962 1843
1963 module_init(alsa_cs4231_init) 1844 module_init(alsa_cs4231_init)
1964 module_exit(alsa_cs4231_exit) 1845 module_exit(alsa_cs4231_exit)
1965 1846
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