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1 /* 1 /*
2 * USB ConnectTech WhiteHEAT driver 2 * USB ConnectTech WhiteHEAT driver
3 * 3 *
4 * Copyright (C) 2002 4 * Copyright (C) 2002
5 * Connect Tech Inc. 5 * Connect Tech Inc.
6 * 6 *
7 * Copyright (C) 1999, 2000 7 * Copyright (C) 1999, 2000
8 * Greg Kroah-Hartman (greg@kroah.com 8 * Greg Kroah-Hartman (greg@kroah.com)
9 * 9 *
10 * This program is free software; you can 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General 11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either v 12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version. 13 * (at your option) any later version.
14 * 14 *
15 * See Documentation/usb/usb-serial.txt for mo 15 * See Documentation/usb/usb-serial.txt for more information on using this driver
16 * 16 *
17 */ 17 */
18 18
19 #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H 19 #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
20 #define __LINUX_USB_SERIAL_WHITEHEAT_H 20 #define __LINUX_USB_SERIAL_WHITEHEAT_H
21 21
22 22
23 #define FALSE 0 <<
24 #define TRUE 1 <<
25 <<
26 <<
27 /* WhiteHEAT commands */ 23 /* WhiteHEAT commands */
28 #define WHITEHEAT_OPEN 1 24 #define WHITEHEAT_OPEN 1 /* open the port */
29 #define WHITEHEAT_CLOSE 2 25 #define WHITEHEAT_CLOSE 2 /* close the port */
30 #define WHITEHEAT_SETUP_PORT 3 26 #define WHITEHEAT_SETUP_PORT 3 /* change port settings */
31 #define WHITEHEAT_SET_RTS 4 27 #define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
32 #define WHITEHEAT_SET_DTR 5 28 #define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
33 #define WHITEHEAT_SET_BREAK 6 29 #define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
34 #define WHITEHEAT_DUMP 7 30 #define WHITEHEAT_DUMP 7 /* dump memory */
35 #define WHITEHEAT_STATUS 8 31 #define WHITEHEAT_STATUS 8 /* get status */
36 #define WHITEHEAT_PURGE 9 32 #define WHITEHEAT_PURGE 9 /* clear the UART fifos */
37 #define WHITEHEAT_GET_DTR_RTS 10 33 #define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS for a port */
38 #define WHITEHEAT_GET_HW_INFO 11 34 #define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and hardware ID */
39 #define WHITEHEAT_REPORT_TX_DONE 12 35 #define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
40 #define WHITEHEAT_EVENT 13 36 #define WHITEHEAT_EVENT 13 /* unsolicited status events */
41 #define WHITEHEAT_ECHO 14 37 #define WHITEHEAT_ECHO 14 /* send data to the indicated IN endpoint */
42 #define WHITEHEAT_DO_TEST 15 38 #define WHITEHEAT_DO_TEST 15 /* perform the specified test */
43 #define WHITEHEAT_CMD_COMPLETE 16 39 #define WHITEHEAT_CMD_COMPLETE 16 /* reply for certain commands */
44 #define WHITEHEAT_CMD_FAILURE 17 40 #define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
45 41
46 42
47 /* 43 /*
48 * Commands to the firmware 44 * Commands to the firmware
49 */ 45 */
50 46
51 47
52 /* 48 /*
53 * WHITEHEAT_OPEN 49 * WHITEHEAT_OPEN
54 * WHITEHEAT_CLOSE 50 * WHITEHEAT_CLOSE
55 * WHITEHEAT_STATUS 51 * WHITEHEAT_STATUS
56 * WHITEHEAT_GET_DTR_RTS 52 * WHITEHEAT_GET_DTR_RTS
57 * WHITEHEAT_REPORT_TX_DONE 53 * WHITEHEAT_REPORT_TX_DONE
58 */ 54 */
59 struct whiteheat_simple { 55 struct whiteheat_simple {
60 __u8 port; /* port number (1 to N 56 __u8 port; /* port number (1 to N) */
61 }; 57 };
62 58
63 59
64 /* 60 /*
65 * WHITEHEAT_SETUP_PORT 61 * WHITEHEAT_SETUP_PORT
66 */ 62 */
67 #define WHITEHEAT_PAR_NONE 'n' /* no 63 #define WHITEHEAT_PAR_NONE 'n' /* no parity */
68 #define WHITEHEAT_PAR_EVEN 'e' /* eve 64 #define WHITEHEAT_PAR_EVEN 'e' /* even parity */
69 #define WHITEHEAT_PAR_ODD 'o' /* odd 65 #define WHITEHEAT_PAR_ODD 'o' /* odd parity */
70 #define WHITEHEAT_PAR_SPACE '' /* spac 66 #define WHITEHEAT_PAR_SPACE '' /* space (force 0) parity */
71 #define WHITEHEAT_PAR_MARK '1' /* mar 67 #define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */
72 68
73 #define WHITEHEAT_SFLOW_NONE 'n' /* no 69 #define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */
74 #define WHITEHEAT_SFLOW_RX 'r' /* XOF 70 #define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX fills/empties */
75 #define WHITEHEAT_SFLOW_TX 't' /* whe 71 #define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will stop/start TX */
76 #define WHITEHEAT_SFLOW_RXTX 'b' /* bot 72 #define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */
77 73
78 #define WHITEHEAT_HFLOW_NONE 0x00 74 #define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */
79 #define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 75 #define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit, off otherwise */
80 #define WHITEHEAT_HFLOW_DTR 0x02 76 #define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX fills/empties */
81 #define WHITEHEAT_HFLOW_CTS 0x08 77 #define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on will stop/start TX */
82 #define WHITEHEAT_HFLOW_DSR 0x10 78 #define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on will stop/start TX */
83 #define WHITEHEAT_HFLOW_RTS 0x80 79 #define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX fills/empties */
84 80
85 struct whiteheat_port_settings { 81 struct whiteheat_port_settings {
86 __u8 port; /* port number 82 __u8 port; /* port number (1 to N) */
87 __u32 baud; /* any value 7 83 __u32 baud; /* any value 7 - 460800, firmware calculates best fit; arrives little endian */
88 __u8 bits; /* 5, 6, 7, or 84 __u8 bits; /* 5, 6, 7, or 8 */
89 __u8 stop; /* 1 or 2, def 85 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
90 __u8 parity; /* see WHITEHE 86 __u8 parity; /* see WHITEHEAT_PAR_* above */
91 __u8 sflow; /* see WHITEHE 87 __u8 sflow; /* see WHITEHEAT_SFLOW_* above */
92 __u8 xoff; /* XOFF byte v 88 __u8 xoff; /* XOFF byte value */
93 __u8 xon; /* XON byte va 89 __u8 xon; /* XON byte value */
94 __u8 hflow; /* see WHITEHE 90 __u8 hflow; /* see WHITEHEAT_HFLOW_* above */
95 __u8 lloop; /* 0/1 turns l 91 __u8 lloop; /* 0/1 turns local loopback mode off/on */
96 } __attribute__ ((packed)); 92 } __attribute__ ((packed));
97 93
98 94
99 /* 95 /*
100 * WHITEHEAT_SET_RTS 96 * WHITEHEAT_SET_RTS
101 * WHITEHEAT_SET_DTR 97 * WHITEHEAT_SET_DTR
102 * WHITEHEAT_SET_BREAK 98 * WHITEHEAT_SET_BREAK
103 */ 99 */
104 #define WHITEHEAT_RTS_OFF 0x00 100 #define WHITEHEAT_RTS_OFF 0x00
105 #define WHITEHEAT_RTS_ON 0x01 101 #define WHITEHEAT_RTS_ON 0x01
106 #define WHITEHEAT_DTR_OFF 0x00 102 #define WHITEHEAT_DTR_OFF 0x00
107 #define WHITEHEAT_DTR_ON 0x01 103 #define WHITEHEAT_DTR_ON 0x01
108 #define WHITEHEAT_BREAK_OFF 0x00 104 #define WHITEHEAT_BREAK_OFF 0x00
109 #define WHITEHEAT_BREAK_ON 0x01 105 #define WHITEHEAT_BREAK_ON 0x01
110 106
111 struct whiteheat_set_rdb { 107 struct whiteheat_set_rdb {
112 __u8 port; /* port number 108 __u8 port; /* port number (1 to N) */
113 __u8 state; /* 0/1 turns s 109 __u8 state; /* 0/1 turns signal off/on */
114 }; 110 };
115 111
116 112
117 /* 113 /*
118 * WHITEHEAT_DUMP 114 * WHITEHEAT_DUMP
119 */ 115 */
120 #define WHITEHEAT_DUMP_MEM_DATA 'd' / 116 #define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */
121 #define WHITEHEAT_DUMP_MEM_IDATA 'i' / 117 #define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */
122 #define WHITEHEAT_DUMP_MEM_BDATA 'b' / 118 #define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */
123 #define WHITEHEAT_DUMP_MEM_XDATA 'x' / 119 #define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */
124 120
125 /* 121 /*
126 * Allowable address ranges (firmware checks a 122 * Allowable address ranges (firmware checks address):
127 * Type DATA: 0x00 - 0xff 123 * Type DATA: 0x00 - 0xff
128 * Type IDATA: 0x80 - 0xff 124 * Type IDATA: 0x80 - 0xff
129 * Type BDATA: 0x20 - 0x2f 125 * Type BDATA: 0x20 - 0x2f
130 * Type XDATA: 0x0000 - 0xffff 126 * Type XDATA: 0x0000 - 0xffff
131 * 127 *
132 * B/I/DATA all read the local memory space 128 * B/I/DATA all read the local memory space
133 * XDATA reads the external memory space 129 * XDATA reads the external memory space
134 * BDATA returns bits as bytes 130 * BDATA returns bits as bytes
135 * 131 *
136 * NOTE: 0x80 - 0xff (local space) are the Spe 132 * NOTE: 0x80 - 0xff (local space) are the Special Function Registers
137 * of the 8051, and some have on-read si 133 * of the 8051, and some have on-read side-effects.
138 */ 134 */
139 135
140 struct whiteheat_dump { 136 struct whiteheat_dump {
141 __u8 mem_type; /* see WHITEHE 137 __u8 mem_type; /* see WHITEHEAT_DUMP_* above */
142 __u16 addr; /* address, se 138 __u16 addr; /* address, see restrictions above */
143 __u16 length; /* number of b 139 __u16 length; /* number of bytes to dump, max 63 bytes */
144 }; 140 };
145 141
146 142
147 /* 143 /*
148 * WHITEHEAT_PURGE 144 * WHITEHEAT_PURGE
149 */ 145 */
150 #define WHITEHEAT_PURGE_RX 0x01 /* pur 146 #define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
151 #define WHITEHEAT_PURGE_TX 0x02 /* pur 147 #define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
152 148
153 struct whiteheat_purge { 149 struct whiteheat_purge {
154 __u8 port; /* port number 150 __u8 port; /* port number (1 to N) */
155 __u8 what; /* bit pattern 151 __u8 what; /* bit pattern of what to purge */
156 }; 152 };
157 153
158 154
159 /* 155 /*
160 * WHITEHEAT_ECHO 156 * WHITEHEAT_ECHO
161 */ 157 */
162 struct whiteheat_echo { 158 struct whiteheat_echo {
163 __u8 port; /* port number 159 __u8 port; /* port number (1 to N) */
164 __u8 length; /* length of m 160 __u8 length; /* length of message to echo, max 61 bytes */
165 __u8 echo_data[61]; /* data to ech 161 __u8 echo_data[61]; /* data to echo */
166 }; 162 };
167 163
168 164
169 /* 165 /*
170 * WHITEHEAT_DO_TEST 166 * WHITEHEAT_DO_TEST
171 */ 167 */
172 #define WHITEHEAT_TEST_UART_RW 0x01 168 #define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
173 #define WHITEHEAT_TEST_UART_INTR 0x02 169 #define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
174 #define WHITEHEAT_TEST_SETUP_CONT 0x03 170 #define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for PORT_CONT/PORT_DISCONT */
175 #define WHITEHEAT_TEST_PORT_CONT 0x04 171 #define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */
176 #define WHITEHEAT_TEST_PORT_DISCONT 0x05 172 #define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */
177 #define WHITEHEAT_TEST_UART_CLK_START 0x06 173 #define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
178 #define WHITEHEAT_TEST_UART_CLK_STOP 0x07 174 #define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
179 #define WHITEHEAT_TEST_MODEM_FT 0x08 175 #define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a loopback cable/connector */
180 #define WHITEHEAT_TEST_ERASE_EEPROM 0x09 176 #define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */
181 #define WHITEHEAT_TEST_READ_EEPROM 0x0a 177 #define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */
182 #define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b 178 #define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */
183 179
184 struct whiteheat_test { 180 struct whiteheat_test {
185 __u8 port; /* port number 181 __u8 port; /* port number (1 to n) */
186 __u8 test; /* see WHITEHE 182 __u8 test; /* see WHITEHEAT_TEST_* above*/
187 __u8 info[32]; /* additional 183 __u8 info[32]; /* additional info */
188 }; 184 };
189 185
190 186
191 /* 187 /*
192 * Replies from the firmware 188 * Replies from the firmware
193 */ 189 */
194 190
195 191
196 /* 192 /*
197 * WHITEHEAT_STATUS 193 * WHITEHEAT_STATUS
198 */ 194 */
199 #define WHITEHEAT_EVENT_MODEM 0x01 195 #define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */
200 #define WHITEHEAT_EVENT_ERROR 0x02 196 #define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */
201 #define WHITEHEAT_EVENT_FLOW 0x04 197 #define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */
202 #define WHITEHEAT_EVENT_CONNECT 0x08 198 #define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */
203 199
204 #define WHITEHEAT_FLOW_NONE 0x00 200 #define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */
205 #define WHITEHEAT_FLOW_HARD_OUT 0x01 201 #define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS (waiting for CTS to go on) */
206 #define WHITEHEAT_FLOW_HARD_IN 0x02 202 #define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped by RTS */
207 #define WHITEHEAT_FLOW_SOFT_OUT 0x04 203 #define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF received (waiting for XON) */
208 #define WHITEHEAT_FLOW_SOFT_IN 0x08 204 #define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF transmitted */
209 #define WHITEHEAT_FLOW_TX_DONE 0x80 205 #define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */
210 206
211 struct whiteheat_status_info { 207 struct whiteheat_status_info {
212 __u8 port; /* port number 208 __u8 port; /* port number (1 to N) */
213 __u8 event; /* indicates w 209 __u8 event; /* indicates what the current event is, see WHITEHEAT_EVENT_* above */
214 __u8 modem; /* modem signa 210 __u8 modem; /* modem signal status (copy of uart's MSR register) */
215 __u8 error; /* line status 211 __u8 error; /* line status (copy of uart's LSR register) */
216 __u8 flow; /* flow contro 212 __u8 flow; /* flow control state, see WHITEHEAT_FLOW_* above */
217 __u8 connect; /* 0 means not 213 __u8 connect; /* 0 means not connected, non-zero means connected */
218 }; 214 };
219 215
220 216
221 /* 217 /*
222 * WHITEHEAT_GET_DTR_RTS 218 * WHITEHEAT_GET_DTR_RTS
223 */ 219 */
224 struct whiteheat_dr_info { 220 struct whiteheat_dr_info {
225 __u8 mcr; /* copy of uar 221 __u8 mcr; /* copy of uart's MCR register */
226 }; 222 };
227 223
228 224
229 /* 225 /*
230 * WHITEHEAT_GET_HW_INFO 226 * WHITEHEAT_GET_HW_INFO
231 */ 227 */
232 struct whiteheat_hw_info { 228 struct whiteheat_hw_info {
233 __u8 hw_id; /* hardware id 229 __u8 hw_id; /* hardware id number, WhiteHEAT = 0 */
234 __u8 sw_major_rev; /* major versi 230 __u8 sw_major_rev; /* major version number */
235 __u8 sw_minor_rev; /* minor versi 231 __u8 sw_minor_rev; /* minor version number */
236 struct whiteheat_hw_eeprom_info { 232 struct whiteheat_hw_eeprom_info {
237 __u8 b0; 233 __u8 b0; /* B0 */
238 __u8 vendor_id_low; 234 __u8 vendor_id_low; /* vendor id (low byte) */
239 __u8 vendor_id_high; 235 __u8 vendor_id_high; /* vendor id (high byte) */
240 __u8 product_id_low; 236 __u8 product_id_low; /* product id (low byte) */
241 __u8 product_id_high; 237 __u8 product_id_high; /* product id (high byte) */
242 __u8 device_id_low; 238 __u8 device_id_low; /* device id (low byte) */
243 __u8 device_id_high; 239 __u8 device_id_high; /* device id (high byte) */
244 __u8 not_used_1; 240 __u8 not_used_1;
245 __u8 serial_number_0; 241 __u8 serial_number_0; /* serial number (low byte) */
246 __u8 serial_number_1; 242 __u8 serial_number_1; /* serial number */
247 __u8 serial_number_2; 243 __u8 serial_number_2; /* serial number */
248 __u8 serial_number_3; 244 __u8 serial_number_3; /* serial number (high byte) */
249 __u8 not_used_2; 245 __u8 not_used_2;
250 __u8 not_used_3; 246 __u8 not_used_3;
251 __u8 checksum_low; 247 __u8 checksum_low; /* checksum (low byte) */
252 __u8 checksum_high; 248 __u8 checksum_high; /* checksum (high byte */
253 } hw_eeprom_info; /* EEPROM cont 249 } hw_eeprom_info; /* EEPROM contents */
254 }; 250 };
255 251
256 252
257 /* 253 /*
258 * WHITEHEAT_EVENT 254 * WHITEHEAT_EVENT
259 */ 255 */
260 struct whiteheat_event_info { 256 struct whiteheat_event_info {
261 __u8 port; /* port number 257 __u8 port; /* port number (1 to N) */
262 __u8 event; /* see whitehe 258 __u8 event; /* see whiteheat_status_info.event */
263 __u8 info; /* see whitehe 259 __u8 info; /* see whiteheat_status_info.modem, .error, .flow, .connect */
264 }; 260 };
265 261
266 262
267 /* 263 /*
268 * WHITEHEAT_DO_TEST 264 * WHITEHEAT_DO_TEST
269 */ 265 */
270 #define WHITEHEAT_TEST_FAIL 0x00 /* test 266 #define WHITEHEAT_TEST_FAIL 0x00 /* test failed */
271 #define WHITEHEAT_TEST_UNKNOWN 0x01 /* unkno 267 #define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */
272 #define WHITEHEAT_TEST_PASS 0xff /* test 268 #define WHITEHEAT_TEST_PASS 0xff /* test passed */
273 269
274 struct whiteheat_test_info { 270 struct whiteheat_test_info {
275 __u8 port; /* port number 271 __u8 port; /* port number (1 to N) */
276 __u8 test; /* indicates w 272 __u8 test; /* indicates which test this is a response for, see WHITEHEAT_DO_TEST above */
277 __u8 status; /* see WHITEHE 273 __u8 status; /* see WHITEHEAT_TEST_* above */
278 __u8 results[32]; /* test-depend 274 __u8 results[32]; /* test-dependent results */
279 }; 275 };
280 276
281 277
282 #endif 278 #endif
283 279
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