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1 /* 1 /*
2 * Driver for the PSC of the Freescale MPC52xx 2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 * 3 *
4 * FIXME According to the usermanual the statu 4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals acces 5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits 6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-tim 7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this 8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking 9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition. 10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At 11 * Update: Actually, they seem updated ... At least the bits we use.
12 * 12 *
13 * 13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com 14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
15 * 15 *
16 * Some of the code has been inspired/copied f 16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com> 17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
18 * 18 *
19 * Copyright (C) 2008 Freescale Semiconductor 19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail 20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121 21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies 22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.like 23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt 24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, In 25 * Copyright (C) 2003 MontaVista, Software, Inc.
26 * 26 *
27 * This file is licensed under the terms of th 27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" 28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied. 29 * kind, whether express or implied.
30 */ 30 */
31 31
32 /* Platform device Usage : 32 /* Platform device Usage :
33 * 33 *
34 * Since PSCs can have multiple function, the 34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_fu 35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart". 36 * handled by this driver is "uart".
37 * 37 *
38 * The driver init all necessary registers to 38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't c 39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init c 40 * by the bootloader or in the platform init code.
41 * 41 *
42 * The idx field must be equal to the PSC inde 42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/t 43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQU 44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 map 45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC? 46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
47 * will be mapped to. 47 * will be mapped to.
48 */ 48 */
49 49
50 /* OF Platform device Usage : 50 /* OF Platform device Usage :
51 * 51 *
52 * This driver is only used for PSCs configure 52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart !! 53 * tree will have a node for each PSC with "mpc52xx-psc-uart" in the compatible
54 * and "mpc52xx-psc-uart" in the compatible st !! 54 * list.
55 * 55 *
56 * By default, PSC devices are enumerated in t 56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by ad 57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node. 58 * to the device node.
59 * 59 *
60 * The driver init all necessary registers to 60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't c 61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init c 62 * by the bootloader or in the platform init code.
63 */ 63 */
64 64
65 #undef DEBUG 65 #undef DEBUG
66 66
67 #include <linux/device.h> 67 #include <linux/device.h>
68 #include <linux/module.h> 68 #include <linux/module.h>
69 #include <linux/tty.h> 69 #include <linux/tty.h>
70 #include <linux/serial.h> 70 #include <linux/serial.h>
71 #include <linux/sysrq.h> 71 #include <linux/sysrq.h>
72 #include <linux/console.h> 72 #include <linux/console.h>
73 #include <linux/delay.h> 73 #include <linux/delay.h>
74 #include <linux/io.h> 74 #include <linux/io.h>
75 <<
76 #if defined(CONFIG_PPC_MERGE) <<
77 #include <linux/of.h> 75 #include <linux/of.h>
78 #include <linux/of_platform.h> 76 #include <linux/of_platform.h>
79 #else <<
80 #include <linux/platform_device.h> <<
81 #endif <<
82 77
83 #include <asm/mpc52xx.h> 78 #include <asm/mpc52xx.h>
84 #include <asm/mpc512x.h> <<
85 #include <asm/mpc52xx_psc.h> 79 #include <asm/mpc52xx_psc.h>
86 80
87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && 81 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
88 #define SUPPORT_SYSRQ 82 #define SUPPORT_SYSRQ
89 #endif 83 #endif
90 84
91 #include <linux/serial_core.h> 85 #include <linux/serial_core.h>
92 86
93 87
94 /* We've been assigned a range on the "Low-den 88 /* We've been assigned a range on the "Low-density serial ports" major */
95 #define SERIAL_PSC_MAJOR 204 89 #define SERIAL_PSC_MAJOR 204
96 #define SERIAL_PSC_MINOR 148 90 #define SERIAL_PSC_MINOR 148
97 91
98 92
99 #define ISR_PASS_LIMIT 256 /* Max number 93 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
100 94
101 95
102 static struct uart_port mpc52xx_uart_ports[MPC 96 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask 97 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr 98 * psc->mpc52xx_psc_imr
105 * - It's important that is array 99 * - It's important that is array is all zero on start as we
106 * use it to know if it's initi 100 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset( 101 * it's cleared, then a memset(...,0,...) should be added to
108 * the console_init 102 * the console_init
109 */ 103 */
110 #if defined(CONFIG_PPC_MERGE) !! 104
111 /* lookup table for matching device nodes to i 105 /* lookup table for matching device nodes to index numbers */
112 static struct device_node *mpc52xx_uart_nodes[ 106 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
113 107
114 static void mpc52xx_uart_of_enumerate(void); 108 static void mpc52xx_uart_of_enumerate(void);
115 #endif <<
116 109
117 110
118 #define PSC(port) ((struct mpc52xx_psc __iomem 111 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
119 112
120 113
121 /* Forward declaration of the interruption han 114 /* Forward declaration of the interruption handling routine */
122 static irqreturn_t mpc52xx_uart_int(int irq, v 115 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
123 116
124 117
125 /* Simple macro to test if a port is console o 118 /* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved 119 * for serial_core.c and maybe should be moved to serial_core.h ? */
127 #ifdef CONFIG_SERIAL_CORE_CONSOLE 120 #ifdef CONFIG_SERIAL_CORE_CONSOLE
128 #define uart_console(port) \ 121 #define uart_console(port) \
129 ((port)->cons && (port)->cons->index = 122 ((port)->cons && (port)->cons->index == (port)->line)
130 #else 123 #else
131 #define uart_console(port) (0) 124 #define uart_console(port) (0)
132 #endif 125 #endif
133 126
134 /* =========================================== 127 /* ======================================================================== */
135 /* PSC fifo operations for isolating differenc 128 /* PSC fifo operations for isolating differences between 52xx and 512x */
136 /* =========================================== 129 /* ======================================================================== */
137 130
138 struct psc_ops { 131 struct psc_ops {
139 void (*fifo_init)(struct ua 132 void (*fifo_init)(struct uart_port *port);
140 int (*raw_rx_rdy)(struct u 133 int (*raw_rx_rdy)(struct uart_port *port);
141 int (*raw_tx_rdy)(struct u 134 int (*raw_tx_rdy)(struct uart_port *port);
142 int (*rx_rdy)(struct uart_ 135 int (*rx_rdy)(struct uart_port *port);
143 int (*tx_rdy)(struct uart_ 136 int (*tx_rdy)(struct uart_port *port);
144 int (*tx_empty)(struct uar 137 int (*tx_empty)(struct uart_port *port);
145 void (*stop_rx)(struct uart 138 void (*stop_rx)(struct uart_port *port);
146 void (*start_tx)(struct uar 139 void (*start_tx)(struct uart_port *port);
147 void (*stop_tx)(struct uart 140 void (*stop_tx)(struct uart_port *port);
148 void (*rx_clr_irq)(struct u 141 void (*rx_clr_irq)(struct uart_port *port);
149 void (*tx_clr_irq)(struct u 142 void (*tx_clr_irq)(struct uart_port *port);
150 void (*write_char)(struct u 143 void (*write_char)(struct uart_port *port, unsigned char c);
151 unsigned char (*read_char)(struct ua 144 unsigned char (*read_char)(struct uart_port *port);
152 void (*cw_disable_ints)(str 145 void (*cw_disable_ints)(struct uart_port *port);
153 void (*cw_restore_ints)(str 146 void (*cw_restore_ints)(struct uart_port *port);
154 unsigned long (*getuartclk)(void *p) 147 unsigned long (*getuartclk)(void *p);
155 }; 148 };
156 149
157 #ifdef CONFIG_PPC_MPC52xx 150 #ifdef CONFIG_PPC_MPC52xx
158 #define FIFO_52xx(port) ((struct mpc52xx_psc_f 151 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
159 static void mpc52xx_psc_fifo_init(struct uart_ 152 static void mpc52xx_psc_fifo_init(struct uart_port *port)
160 { 153 {
161 struct mpc52xx_psc __iomem *psc = PSC( 154 struct mpc52xx_psc __iomem *psc = PSC(port);
162 struct mpc52xx_psc_fifo __iomem *fifo 155 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
163 156
164 /* /32 prescaler */ 157 /* /32 prescaler */
165 out_be16(&psc->mpc52xx_psc_clock_selec 158 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
166 159
167 out_8(&fifo->rfcntl, 0x00); 160 out_8(&fifo->rfcntl, 0x00);
168 out_be16(&fifo->rfalarm, 0x1ff); 161 out_be16(&fifo->rfalarm, 0x1ff);
169 out_8(&fifo->tfcntl, 0x07); 162 out_8(&fifo->tfcntl, 0x07);
170 out_be16(&fifo->tfalarm, 0x80); 163 out_be16(&fifo->tfalarm, 0x80);
171 164
172 port->read_status_mask |= MPC52xx_PSC_ 165 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
173 out_be16(&psc->mpc52xx_psc_imr, port-> 166 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
174 } 167 }
175 168
176 static int mpc52xx_psc_raw_rx_rdy(struct uart_ 169 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
177 { 170 {
178 return in_be16(&PSC(port)->mpc52xx_psc 171 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_RXRDY; 172 & MPC52xx_PSC_SR_RXRDY;
180 } 173 }
181 174
182 static int mpc52xx_psc_raw_tx_rdy(struct uart_ 175 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
183 { 176 {
184 return in_be16(&PSC(port)->mpc52xx_psc 177 return in_be16(&PSC(port)->mpc52xx_psc_status)
185 & MPC52xx_PSC_SR_TXRDY; 178 & MPC52xx_PSC_SR_TXRDY;
186 } 179 }
187 180
188 181
189 static int mpc52xx_psc_rx_rdy(struct uart_port 182 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
190 { 183 {
191 return in_be16(&PSC(port)->mpc52xx_psc 184 return in_be16(&PSC(port)->mpc52xx_psc_isr)
192 & port->read_status_mask 185 & port->read_status_mask
193 & MPC52xx_PSC_IMR_RXRDY; 186 & MPC52xx_PSC_IMR_RXRDY;
194 } 187 }
195 188
196 static int mpc52xx_psc_tx_rdy(struct uart_port 189 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
197 { 190 {
198 return in_be16(&PSC(port)->mpc52xx_psc 191 return in_be16(&PSC(port)->mpc52xx_psc_isr)
199 & port->read_status_mask 192 & port->read_status_mask
200 & MPC52xx_PSC_IMR_TXRDY; 193 & MPC52xx_PSC_IMR_TXRDY;
201 } 194 }
202 195
203 static int mpc52xx_psc_tx_empty(struct uart_po 196 static int mpc52xx_psc_tx_empty(struct uart_port *port)
204 { 197 {
205 return in_be16(&PSC(port)->mpc52xx_psc 198 return in_be16(&PSC(port)->mpc52xx_psc_status)
206 & MPC52xx_PSC_SR_TXEMP; 199 & MPC52xx_PSC_SR_TXEMP;
207 } 200 }
208 201
209 static void mpc52xx_psc_start_tx(struct uart_p 202 static void mpc52xx_psc_start_tx(struct uart_port *port)
210 { 203 {
211 port->read_status_mask |= MPC52xx_PSC_ 204 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, 205 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213 } 206 }
214 207
215 static void mpc52xx_psc_stop_tx(struct uart_po 208 static void mpc52xx_psc_stop_tx(struct uart_port *port)
216 { 209 {
217 port->read_status_mask &= ~MPC52xx_PSC 210 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, 211 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219 } 212 }
220 213
221 static void mpc52xx_psc_stop_rx(struct uart_po 214 static void mpc52xx_psc_stop_rx(struct uart_port *port)
222 { 215 {
223 port->read_status_mask &= ~MPC52xx_PSC 216 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
224 out_be16(&PSC(port)->mpc52xx_psc_imr, 217 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
225 } 218 }
226 219
227 static void mpc52xx_psc_rx_clr_irq(struct uart 220 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
228 { 221 {
229 } 222 }
230 223
231 static void mpc52xx_psc_tx_clr_irq(struct uart 224 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
232 { 225 {
233 } 226 }
234 227
235 static void mpc52xx_psc_write_char(struct uart 228 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
236 { 229 {
237 out_8(&PSC(port)->mpc52xx_psc_buffer_8 230 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
238 } 231 }
239 232
240 static unsigned char mpc52xx_psc_read_char(str 233 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
241 { 234 {
242 return in_8(&PSC(port)->mpc52xx_psc_bu 235 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
243 } 236 }
244 237
245 static void mpc52xx_psc_cw_disable_ints(struct 238 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
246 { 239 {
247 out_be16(&PSC(port)->mpc52xx_psc_imr, 240 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
248 } 241 }
249 242
250 static void mpc52xx_psc_cw_restore_ints(struct 243 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
251 { 244 {
252 out_be16(&PSC(port)->mpc52xx_psc_imr, 245 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
253 } 246 }
254 247
255 /* Search for bus-frequency property in this n 248 /* Search for bus-frequency property in this node or a parent */
256 static unsigned long mpc52xx_getuartclk(void * 249 static unsigned long mpc52xx_getuartclk(void *p)
257 { 250 {
258 #if defined(CONFIG_PPC_MERGE) <<
259 /* 251 /*
260 * 5200 UARTs have a / 32 prescaler 252 * 5200 UARTs have a / 32 prescaler
261 * but the generic serial code assumes 253 * but the generic serial code assumes 16
262 * so return ipb freq / 2 254 * so return ipb freq / 2
263 */ 255 */
264 return mpc52xx_find_ipb_freq(p) / 2; !! 256 return mpc5xxx_get_bus_frequency(p) / 2;
265 #else <<
266 pr_debug("unexpected call to mpc52xx_g <<
267 return NULL; <<
268 #endif <<
269 } 257 }
270 258
271 static struct psc_ops mpc52xx_psc_ops = { 259 static struct psc_ops mpc52xx_psc_ops = {
272 .fifo_init = mpc52xx_psc_fifo_init, 260 .fifo_init = mpc52xx_psc_fifo_init,
273 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, 261 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
274 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, 262 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
275 .rx_rdy = mpc52xx_psc_rx_rdy, 263 .rx_rdy = mpc52xx_psc_rx_rdy,
276 .tx_rdy = mpc52xx_psc_tx_rdy, 264 .tx_rdy = mpc52xx_psc_tx_rdy,
277 .tx_empty = mpc52xx_psc_tx_empty, 265 .tx_empty = mpc52xx_psc_tx_empty,
278 .stop_rx = mpc52xx_psc_stop_rx, 266 .stop_rx = mpc52xx_psc_stop_rx,
279 .start_tx = mpc52xx_psc_start_tx, 267 .start_tx = mpc52xx_psc_start_tx,
280 .stop_tx = mpc52xx_psc_stop_tx, 268 .stop_tx = mpc52xx_psc_stop_tx,
281 .rx_clr_irq = mpc52xx_psc_rx_clr_irq, 269 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
282 .tx_clr_irq = mpc52xx_psc_tx_clr_irq, 270 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
283 .write_char = mpc52xx_psc_write_char, 271 .write_char = mpc52xx_psc_write_char,
284 .read_char = mpc52xx_psc_read_char, 272 .read_char = mpc52xx_psc_read_char,
285 .cw_disable_ints = mpc52xx_psc_cw_disa 273 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
286 .cw_restore_ints = mpc52xx_psc_cw_rest 274 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
287 .getuartclk = mpc52xx_getuartclk, 275 .getuartclk = mpc52xx_getuartclk,
288 }; 276 };
289 277
290 #endif /* CONFIG_MPC52xx */ 278 #endif /* CONFIG_MPC52xx */
291 279
292 #ifdef CONFIG_PPC_MPC512x 280 #ifdef CONFIG_PPC_MPC512x
293 #define FIFO_512x(port) ((struct mpc512x_psc_f 281 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
294 static void mpc512x_psc_fifo_init(struct uart_ 282 static void mpc512x_psc_fifo_init(struct uart_port *port)
295 { 283 {
296 out_be32(&FIFO_512x(port)->txcmd, MPC5 284 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
297 out_be32(&FIFO_512x(port)->txcmd, MPC5 285 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
298 out_be32(&FIFO_512x(port)->txalarm, 1) 286 out_be32(&FIFO_512x(port)->txalarm, 1);
299 out_be32(&FIFO_512x(port)->tximr, 0); 287 out_be32(&FIFO_512x(port)->tximr, 0);
300 288
301 out_be32(&FIFO_512x(port)->rxcmd, MPC5 289 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
302 out_be32(&FIFO_512x(port)->rxcmd, MPC5 290 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
303 out_be32(&FIFO_512x(port)->rxalarm, 1) 291 out_be32(&FIFO_512x(port)->rxalarm, 1);
304 out_be32(&FIFO_512x(port)->rximr, 0); 292 out_be32(&FIFO_512x(port)->rximr, 0);
305 293
306 out_be32(&FIFO_512x(port)->tximr, MPC5 294 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
307 out_be32(&FIFO_512x(port)->rximr, MPC5 295 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
308 } 296 }
309 297
310 static int mpc512x_psc_raw_rx_rdy(struct uart_ 298 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
311 { 299 {
312 return !(in_be32(&FIFO_512x(port)->rxs 300 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
313 } 301 }
314 302
315 static int mpc512x_psc_raw_tx_rdy(struct uart_ 303 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
316 { 304 {
317 return !(in_be32(&FIFO_512x(port)->txs 305 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
318 } 306 }
319 307
320 static int mpc512x_psc_rx_rdy(struct uart_port 308 static int mpc512x_psc_rx_rdy(struct uart_port *port)
321 { 309 {
322 return in_be32(&FIFO_512x(port)->rxsr) 310 return in_be32(&FIFO_512x(port)->rxsr)
323 & in_be32(&FIFO_512x(port)->rximr) 311 & in_be32(&FIFO_512x(port)->rximr)
324 & MPC512x_PSC_FIFO_ALARM; 312 & MPC512x_PSC_FIFO_ALARM;
325 } 313 }
326 314
327 static int mpc512x_psc_tx_rdy(struct uart_port 315 static int mpc512x_psc_tx_rdy(struct uart_port *port)
328 { 316 {
329 return in_be32(&FIFO_512x(port)->txsr) 317 return in_be32(&FIFO_512x(port)->txsr)
330 & in_be32(&FIFO_512x(port)->tximr) 318 & in_be32(&FIFO_512x(port)->tximr)
331 & MPC512x_PSC_FIFO_ALARM; 319 & MPC512x_PSC_FIFO_ALARM;
332 } 320 }
333 321
334 static int mpc512x_psc_tx_empty(struct uart_po 322 static int mpc512x_psc_tx_empty(struct uart_port *port)
335 { 323 {
336 return in_be32(&FIFO_512x(port)->txsr) 324 return in_be32(&FIFO_512x(port)->txsr)
337 & MPC512x_PSC_FIFO_EMPTY; 325 & MPC512x_PSC_FIFO_EMPTY;
338 } 326 }
339 327
340 static void mpc512x_psc_stop_rx(struct uart_po 328 static void mpc512x_psc_stop_rx(struct uart_port *port)
341 { 329 {
342 unsigned long rx_fifo_imr; 330 unsigned long rx_fifo_imr;
343 331
344 rx_fifo_imr = in_be32(&FIFO_512x(port) 332 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
345 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM 333 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
346 out_be32(&FIFO_512x(port)->rximr, rx_f 334 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
347 } 335 }
348 336
349 static void mpc512x_psc_start_tx(struct uart_p 337 static void mpc512x_psc_start_tx(struct uart_port *port)
350 { 338 {
351 unsigned long tx_fifo_imr; 339 unsigned long tx_fifo_imr;
352 340
353 tx_fifo_imr = in_be32(&FIFO_512x(port) 341 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
354 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM; 342 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
355 out_be32(&FIFO_512x(port)->tximr, tx_f 343 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
356 } 344 }
357 345
358 static void mpc512x_psc_stop_tx(struct uart_po 346 static void mpc512x_psc_stop_tx(struct uart_port *port)
359 { 347 {
360 unsigned long tx_fifo_imr; 348 unsigned long tx_fifo_imr;
361 349
362 tx_fifo_imr = in_be32(&FIFO_512x(port) 350 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
363 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM 351 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
364 out_be32(&FIFO_512x(port)->tximr, tx_f 352 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
365 } 353 }
366 354
367 static void mpc512x_psc_rx_clr_irq(struct uart 355 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
368 { 356 {
369 out_be32(&FIFO_512x(port)->rxisr, in_b 357 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
370 } 358 }
371 359
372 static void mpc512x_psc_tx_clr_irq(struct uart 360 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
373 { 361 {
374 out_be32(&FIFO_512x(port)->txisr, in_b 362 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
375 } 363 }
376 364
377 static void mpc512x_psc_write_char(struct uart 365 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
378 { 366 {
379 out_8(&FIFO_512x(port)->txdata_8, c); 367 out_8(&FIFO_512x(port)->txdata_8, c);
380 } 368 }
381 369
382 static unsigned char mpc512x_psc_read_char(str 370 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
383 { 371 {
384 return in_8(&FIFO_512x(port)->rxdata_8 372 return in_8(&FIFO_512x(port)->rxdata_8);
385 } 373 }
386 374
387 static void mpc512x_psc_cw_disable_ints(struct 375 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
388 { 376 {
389 port->read_status_mask = 377 port->read_status_mask =
390 in_be32(&FIFO_512x(port)->txim 378 in_be32(&FIFO_512x(port)->tximr) << 16 |
391 in_be32(&FIFO_512x(port)->rxim 379 in_be32(&FIFO_512x(port)->rximr);
392 out_be32(&FIFO_512x(port)->tximr, 0); 380 out_be32(&FIFO_512x(port)->tximr, 0);
393 out_be32(&FIFO_512x(port)->rximr, 0); 381 out_be32(&FIFO_512x(port)->rximr, 0);
394 } 382 }
395 383
396 static void mpc512x_psc_cw_restore_ints(struct 384 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
397 { 385 {
398 out_be32(&FIFO_512x(port)->tximr, 386 out_be32(&FIFO_512x(port)->tximr,
399 (port->read_status_mask >> 16) 387 (port->read_status_mask >> 16) & 0x7f);
400 out_be32(&FIFO_512x(port)->rximr, port 388 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
401 } 389 }
402 390
403 static unsigned long mpc512x_getuartclk(void * 391 static unsigned long mpc512x_getuartclk(void *p)
404 { 392 {
405 return mpc512x_find_ips_freq(p); !! 393 return mpc5xxx_get_bus_frequency(p);
406 } 394 }
407 395
408 static struct psc_ops mpc512x_psc_ops = { 396 static struct psc_ops mpc512x_psc_ops = {
409 .fifo_init = mpc512x_psc_fifo_init, 397 .fifo_init = mpc512x_psc_fifo_init,
410 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, 398 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
411 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy, 399 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
412 .rx_rdy = mpc512x_psc_rx_rdy, 400 .rx_rdy = mpc512x_psc_rx_rdy,
413 .tx_rdy = mpc512x_psc_tx_rdy, 401 .tx_rdy = mpc512x_psc_tx_rdy,
414 .tx_empty = mpc512x_psc_tx_empty, 402 .tx_empty = mpc512x_psc_tx_empty,
415 .stop_rx = mpc512x_psc_stop_rx, 403 .stop_rx = mpc512x_psc_stop_rx,
416 .start_tx = mpc512x_psc_start_tx, 404 .start_tx = mpc512x_psc_start_tx,
417 .stop_tx = mpc512x_psc_stop_tx, 405 .stop_tx = mpc512x_psc_stop_tx,
418 .rx_clr_irq = mpc512x_psc_rx_clr_irq, 406 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
419 .tx_clr_irq = mpc512x_psc_tx_clr_irq, 407 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
420 .write_char = mpc512x_psc_write_char, 408 .write_char = mpc512x_psc_write_char,
421 .read_char = mpc512x_psc_read_char, 409 .read_char = mpc512x_psc_read_char,
422 .cw_disable_ints = mpc512x_psc_cw_disa 410 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
423 .cw_restore_ints = mpc512x_psc_cw_rest 411 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
424 .getuartclk = mpc512x_getuartclk, 412 .getuartclk = mpc512x_getuartclk,
425 }; 413 };
426 #endif 414 #endif
427 415
428 static struct psc_ops *psc_ops; 416 static struct psc_ops *psc_ops;
429 417
430 /* =========================================== 418 /* ======================================================================== */
431 /* UART operations 419 /* UART operations */
432 /* =========================================== 420 /* ======================================================================== */
433 421
434 static unsigned int 422 static unsigned int
435 mpc52xx_uart_tx_empty(struct uart_port *port) 423 mpc52xx_uart_tx_empty(struct uart_port *port)
436 { 424 {
437 return psc_ops->tx_empty(port) ? TIOCS 425 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
438 } 426 }
439 427
440 static void 428 static void
441 mpc52xx_uart_set_mctrl(struct uart_port *port, 429 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
442 { 430 {
443 /* Not implemented */ !! 431 if (mctrl & TIOCM_RTS)
>> 432 out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS);
>> 433 else
>> 434 out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS);
444 } 435 }
445 436
446 static unsigned int 437 static unsigned int
447 mpc52xx_uart_get_mctrl(struct uart_port *port) 438 mpc52xx_uart_get_mctrl(struct uart_port *port)
448 { 439 {
449 /* Not implemented */ !! 440 unsigned int ret = TIOCM_DSR;
450 return TIOCM_CTS | TIOCM_DSR | TIOCM_C !! 441 u8 status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
>> 442
>> 443 if (!(status & MPC52xx_PSC_CTS))
>> 444 ret |= TIOCM_CTS;
>> 445 if (!(status & MPC52xx_PSC_DCD))
>> 446 ret |= TIOCM_CAR;
>> 447
>> 448 return ret;
451 } 449 }
452 450
453 static void 451 static void
454 mpc52xx_uart_stop_tx(struct uart_port *port) 452 mpc52xx_uart_stop_tx(struct uart_port *port)
455 { 453 {
456 /* port->lock taken by caller */ 454 /* port->lock taken by caller */
457 psc_ops->stop_tx(port); 455 psc_ops->stop_tx(port);
458 } 456 }
459 457
460 static void 458 static void
461 mpc52xx_uart_start_tx(struct uart_port *port) 459 mpc52xx_uart_start_tx(struct uart_port *port)
462 { 460 {
463 /* port->lock taken by caller */ 461 /* port->lock taken by caller */
464 psc_ops->start_tx(port); 462 psc_ops->start_tx(port);
465 } 463 }
466 464
467 static void 465 static void
468 mpc52xx_uart_send_xchar(struct uart_port *port 466 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
469 { 467 {
470 unsigned long flags; 468 unsigned long flags;
471 spin_lock_irqsave(&port->lock, flags); 469 spin_lock_irqsave(&port->lock, flags);
472 470
473 port->x_char = ch; 471 port->x_char = ch;
474 if (ch) { 472 if (ch) {
475 /* Make sure tx interrupts are 473 /* Make sure tx interrupts are on */
476 /* Truly necessary ??? They sh 474 /* Truly necessary ??? They should be anyway */
477 psc_ops->start_tx(port); 475 psc_ops->start_tx(port);
478 } 476 }
479 477
480 spin_unlock_irqrestore(&port->lock, fl 478 spin_unlock_irqrestore(&port->lock, flags);
481 } 479 }
482 480
483 static void 481 static void
484 mpc52xx_uart_stop_rx(struct uart_port *port) 482 mpc52xx_uart_stop_rx(struct uart_port *port)
485 { 483 {
486 /* port->lock taken by caller */ 484 /* port->lock taken by caller */
487 psc_ops->stop_rx(port); 485 psc_ops->stop_rx(port);
488 } 486 }
489 487
490 static void 488 static void
491 mpc52xx_uart_enable_ms(struct uart_port *port) 489 mpc52xx_uart_enable_ms(struct uart_port *port)
492 { 490 {
493 /* Not implemented */ !! 491 struct mpc52xx_psc __iomem *psc = PSC(port);
>> 492
>> 493 /* clear D_*-bits by reading them */
>> 494 in_8(&psc->mpc52xx_psc_ipcr);
>> 495 /* enable CTS and DCD as IPC interrupts */
>> 496 out_8(&psc->mpc52xx_psc_acr, MPC52xx_PSC_IEC_CTS | MPC52xx_PSC_IEC_DCD);
>> 497
>> 498 port->read_status_mask |= MPC52xx_PSC_IMR_IPC;
>> 499 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
494 } 500 }
495 501
496 static void 502 static void
497 mpc52xx_uart_break_ctl(struct uart_port *port, 503 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
498 { 504 {
499 unsigned long flags; 505 unsigned long flags;
500 spin_lock_irqsave(&port->lock, flags); 506 spin_lock_irqsave(&port->lock, flags);
501 507
502 if (ctl == -1) 508 if (ctl == -1)
503 out_8(&PSC(port)->command, MPC 509 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
504 else 510 else
505 out_8(&PSC(port)->command, MPC 511 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
506 512
507 spin_unlock_irqrestore(&port->lock, fl 513 spin_unlock_irqrestore(&port->lock, flags);
508 } 514 }
509 515
510 static int 516 static int
511 mpc52xx_uart_startup(struct uart_port *port) 517 mpc52xx_uart_startup(struct uart_port *port)
512 { 518 {
513 struct mpc52xx_psc __iomem *psc = PSC( 519 struct mpc52xx_psc __iomem *psc = PSC(port);
514 int ret; 520 int ret;
515 521
516 /* Request IRQ */ 522 /* Request IRQ */
517 ret = request_irq(port->irq, mpc52xx_u 523 ret = request_irq(port->irq, mpc52xx_uart_int,
518 IRQF_DISABLED | IRQF_SAMPLE_RA !! 524 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
519 "mpc52xx_psc_uart", port); 525 "mpc52xx_psc_uart", port);
520 if (ret) 526 if (ret)
521 return ret; 527 return ret;
522 528
523 /* Reset/activate the port, clear and 529 /* Reset/activate the port, clear and enable interrupts */
524 out_8(&psc->command, MPC52xx_PSC_RST_R 530 out_8(&psc->command, MPC52xx_PSC_RST_RX);
525 out_8(&psc->command, MPC52xx_PSC_RST_T 531 out_8(&psc->command, MPC52xx_PSC_RST_TX);
526 532
527 out_be32(&psc->sicr, 0); /* UAR 533 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
528 534
529 psc_ops->fifo_init(port); 535 psc_ops->fifo_init(port);
530 536
531 out_8(&psc->command, MPC52xx_PSC_TX_EN 537 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
532 out_8(&psc->command, MPC52xx_PSC_RX_EN 538 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
533 539
534 return 0; 540 return 0;
535 } 541 }
536 542
537 static void 543 static void
538 mpc52xx_uart_shutdown(struct uart_port *port) 544 mpc52xx_uart_shutdown(struct uart_port *port)
539 { 545 {
540 struct mpc52xx_psc __iomem *psc = PSC( 546 struct mpc52xx_psc __iomem *psc = PSC(port);
541 547
542 /* Shut down the port. Leave TX activ 548 /* Shut down the port. Leave TX active if on a console port */
543 out_8(&psc->command, MPC52xx_PSC_RST_R 549 out_8(&psc->command, MPC52xx_PSC_RST_RX);
544 if (!uart_console(port)) 550 if (!uart_console(port))
545 out_8(&psc->command, MPC52xx_P 551 out_8(&psc->command, MPC52xx_PSC_RST_TX);
546 552
547 port->read_status_mask = 0; 553 port->read_status_mask = 0;
548 out_be16(&psc->mpc52xx_psc_imr, port-> 554 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
549 555
550 /* Release interrupt */ 556 /* Release interrupt */
551 free_irq(port->irq, port); 557 free_irq(port->irq, port);
552 } 558 }
553 559
554 static void 560 static void
555 mpc52xx_uart_set_termios(struct uart_port *por 561 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
556 struct ktermios *old) 562 struct ktermios *old)
557 { 563 {
558 struct mpc52xx_psc __iomem *psc = PSC( 564 struct mpc52xx_psc __iomem *psc = PSC(port);
559 unsigned long flags; 565 unsigned long flags;
560 unsigned char mr1, mr2; 566 unsigned char mr1, mr2;
561 unsigned short ctr; 567 unsigned short ctr;
562 unsigned int j, baud, quot; 568 unsigned int j, baud, quot;
563 569
564 /* Prepare what we're gonna write */ 570 /* Prepare what we're gonna write */
565 mr1 = 0; 571 mr1 = 0;
566 572
567 switch (new->c_cflag & CSIZE) { 573 switch (new->c_cflag & CSIZE) {
568 case CS5: mr1 |= MPC52xx_PSC_MOD 574 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
569 break; 575 break;
570 case CS6: mr1 |= MPC52xx_PSC_MOD 576 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
571 break; 577 break;
572 case CS7: mr1 |= MPC52xx_PSC_MOD 578 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
573 break; 579 break;
574 case CS8: 580 case CS8:
575 default: mr1 |= MPC52xx_PSC_MOD 581 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
576 } 582 }
577 583
578 if (new->c_cflag & PARENB) { 584 if (new->c_cflag & PARENB) {
579 mr1 |= (new->c_cflag & PARODD) 585 mr1 |= (new->c_cflag & PARODD) ?
580 MPC52xx_PSC_MODE_PAROD 586 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
581 } else 587 } else
582 mr1 |= MPC52xx_PSC_MODE_PARNON 588 mr1 |= MPC52xx_PSC_MODE_PARNONE;
583 589
584 590
585 mr2 = 0; 591 mr2 = 0;
586 592
587 if (new->c_cflag & CSTOPB) 593 if (new->c_cflag & CSTOPB)
588 mr2 |= MPC52xx_PSC_MODE_TWO_ST 594 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
589 else 595 else
590 mr2 |= ((new->c_cflag & CSIZE) 596 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
591 MPC52xx_PSC_MODE_ONE_S 597 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
592 MPC52xx_PSC_MODE_ONE_S 598 MPC52xx_PSC_MODE_ONE_STOP;
593 599
>> 600 if (new->c_cflag & CRTSCTS) {
>> 601 mr1 |= MPC52xx_PSC_MODE_RXRTS;
>> 602 mr2 |= MPC52xx_PSC_MODE_TXCTS;
>> 603 }
594 604
595 baud = uart_get_baud_rate(port, new, o 605 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
596 quot = uart_get_divisor(port, baud); 606 quot = uart_get_divisor(port, baud);
597 ctr = quot & 0xffff; 607 ctr = quot & 0xffff;
598 608
599 /* Get the lock */ 609 /* Get the lock */
600 spin_lock_irqsave(&port->lock, flags); 610 spin_lock_irqsave(&port->lock, flags);
601 611
602 /* Update the per-port timeout */ 612 /* Update the per-port timeout */
603 uart_update_timeout(port, new->c_cflag 613 uart_update_timeout(port, new->c_cflag, baud);
604 614
605 /* Do our best to flush TX & RX, so we !! 615 /* Do our best to flush TX & RX, so we don't lose anything */
606 /* But we don't wait indefinitly ! */ !! 616 /* But we don't wait indefinitely ! */
607 j = 5000000; /* Maximum wait */ 617 j = 5000000; /* Maximum wait */
608 /* FIXME Can't receive chars since set 618 /* FIXME Can't receive chars since set_termios might be called at early
609 * boot for the console, all stuff is 619 * boot for the console, all stuff is not yet ready to receive at that
610 * time and that just makes the kernel 620 * time and that just makes the kernel oops */
611 /* while (j-- && mpc52xx_uart_int_rx_c 621 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
612 while (!mpc52xx_uart_tx_empty(port) && 622 while (!mpc52xx_uart_tx_empty(port) && --j)
613 udelay(1); 623 udelay(1);
614 624
615 if (!j) 625 if (!j)
616 printk(KERN_ERR "mpc52xx_uart. 626 printk(KERN_ERR "mpc52xx_uart.c: "
617 "Unable to flush RX & 627 "Unable to flush RX & TX fifos in-time in set_termios."
618 "Some chars may have b 628 "Some chars may have been lost.\n");
619 629
620 /* Reset the TX & RX */ 630 /* Reset the TX & RX */
621 out_8(&psc->command, MPC52xx_PSC_RST_R 631 out_8(&psc->command, MPC52xx_PSC_RST_RX);
622 out_8(&psc->command, MPC52xx_PSC_RST_T 632 out_8(&psc->command, MPC52xx_PSC_RST_TX);
623 633
624 /* Send new mode settings */ 634 /* Send new mode settings */
625 out_8(&psc->command, MPC52xx_PSC_SEL_M 635 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
626 out_8(&psc->mode, mr1); 636 out_8(&psc->mode, mr1);
627 out_8(&psc->mode, mr2); 637 out_8(&psc->mode, mr2);
628 out_8(&psc->ctur, ctr >> 8); 638 out_8(&psc->ctur, ctr >> 8);
629 out_8(&psc->ctlr, ctr & 0xff); 639 out_8(&psc->ctlr, ctr & 0xff);
630 640
>> 641 if (UART_ENABLE_MS(port, new->c_cflag))
>> 642 mpc52xx_uart_enable_ms(port);
>> 643
631 /* Reenable TX & RX */ 644 /* Reenable TX & RX */
632 out_8(&psc->command, MPC52xx_PSC_TX_EN 645 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
633 out_8(&psc->command, MPC52xx_PSC_RX_EN 646 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
634 647
635 /* We're all set, release the lock */ 648 /* We're all set, release the lock */
636 spin_unlock_irqrestore(&port->lock, fl 649 spin_unlock_irqrestore(&port->lock, flags);
637 } 650 }
638 651
639 static const char * 652 static const char *
640 mpc52xx_uart_type(struct uart_port *port) 653 mpc52xx_uart_type(struct uart_port *port)
641 { 654 {
642 return port->type == PORT_MPC52xx ? "M 655 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
643 } 656 }
644 657
645 static void 658 static void
646 mpc52xx_uart_release_port(struct uart_port *po 659 mpc52xx_uart_release_port(struct uart_port *port)
647 { 660 {
648 /* remapped by us ? */ 661 /* remapped by us ? */
649 if (port->flags & UPF_IOREMAP) { 662 if (port->flags & UPF_IOREMAP) {
650 iounmap(port->membase); 663 iounmap(port->membase);
651 port->membase = NULL; 664 port->membase = NULL;
652 } 665 }
653 666
654 release_mem_region(port->mapbase, size 667 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
655 } 668 }
656 669
657 static int 670 static int
658 mpc52xx_uart_request_port(struct uart_port *po 671 mpc52xx_uart_request_port(struct uart_port *port)
659 { 672 {
660 int err; 673 int err;
661 674
662 if (port->flags & UPF_IOREMAP) /* Need 675 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
663 port->membase = ioremap(port-> 676 port->membase = ioremap(port->mapbase,
664 sizeof 677 sizeof(struct mpc52xx_psc));
665 678
666 if (!port->membase) 679 if (!port->membase)
667 return -EINVAL; 680 return -EINVAL;
668 681
669 err = request_mem_region(port->mapbase 682 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
670 "mpc52xx_psc_uart") != 683 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
671 684
672 if (err && (port->flags & UPF_IOREMAP) 685 if (err && (port->flags & UPF_IOREMAP)) {
673 iounmap(port->membase); 686 iounmap(port->membase);
674 port->membase = NULL; 687 port->membase = NULL;
675 } 688 }
676 689
677 return err; 690 return err;
678 } 691 }
679 692
680 static void 693 static void
681 mpc52xx_uart_config_port(struct uart_port *por 694 mpc52xx_uart_config_port(struct uart_port *port, int flags)
682 { 695 {
683 if ((flags & UART_CONFIG_TYPE) 696 if ((flags & UART_CONFIG_TYPE)
684 && (mpc52xx_uart_request_port( 697 && (mpc52xx_uart_request_port(port) == 0))
685 port->type = PORT_MPC52xx; 698 port->type = PORT_MPC52xx;
686 } 699 }
687 700
688 static int 701 static int
689 mpc52xx_uart_verify_port(struct uart_port *por 702 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
690 { 703 {
691 if (ser->type != PORT_UNKNOWN && ser-> 704 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
692 return -EINVAL; 705 return -EINVAL;
693 706
694 if ((ser->irq != port->irq) || 707 if ((ser->irq != port->irq) ||
695 (ser->io_type != SERIAL_IO_MEM) || 708 (ser->io_type != SERIAL_IO_MEM) ||
696 (ser->baud_base != port->uartclk) 709 (ser->baud_base != port->uartclk) ||
697 (ser->iomem_base != (void *)port-> 710 (ser->iomem_base != (void *)port->mapbase) ||
698 (ser->hub6 != 0)) 711 (ser->hub6 != 0))
699 return -EINVAL; 712 return -EINVAL;
700 713
701 return 0; 714 return 0;
702 } 715 }
703 716
704 717
705 static struct uart_ops mpc52xx_uart_ops = { 718 static struct uart_ops mpc52xx_uart_ops = {
706 .tx_empty = mpc52xx_uart_tx_empt 719 .tx_empty = mpc52xx_uart_tx_empty,
707 .set_mctrl = mpc52xx_uart_set_mct 720 .set_mctrl = mpc52xx_uart_set_mctrl,
708 .get_mctrl = mpc52xx_uart_get_mct 721 .get_mctrl = mpc52xx_uart_get_mctrl,
709 .stop_tx = mpc52xx_uart_stop_tx 722 .stop_tx = mpc52xx_uart_stop_tx,
710 .start_tx = mpc52xx_uart_start_t 723 .start_tx = mpc52xx_uart_start_tx,
711 .send_xchar = mpc52xx_uart_send_xc 724 .send_xchar = mpc52xx_uart_send_xchar,
712 .stop_rx = mpc52xx_uart_stop_rx 725 .stop_rx = mpc52xx_uart_stop_rx,
713 .enable_ms = mpc52xx_uart_enable_ 726 .enable_ms = mpc52xx_uart_enable_ms,
714 .break_ctl = mpc52xx_uart_break_c 727 .break_ctl = mpc52xx_uart_break_ctl,
715 .startup = mpc52xx_uart_startup 728 .startup = mpc52xx_uart_startup,
716 .shutdown = mpc52xx_uart_shutdow 729 .shutdown = mpc52xx_uart_shutdown,
717 .set_termios = mpc52xx_uart_set_ter 730 .set_termios = mpc52xx_uart_set_termios,
718 /* .pm = mpc52xx_uart_pm, 731 /* .pm = mpc52xx_uart_pm, Not supported yet */
719 /* .set_wake = mpc52xx_uart_set_wak 732 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
720 .type = mpc52xx_uart_type, 733 .type = mpc52xx_uart_type,
721 .release_port = mpc52xx_uart_release 734 .release_port = mpc52xx_uart_release_port,
722 .request_port = mpc52xx_uart_request 735 .request_port = mpc52xx_uart_request_port,
723 .config_port = mpc52xx_uart_config_ 736 .config_port = mpc52xx_uart_config_port,
724 .verify_port = mpc52xx_uart_verify_ 737 .verify_port = mpc52xx_uart_verify_port
725 }; 738 };
726 739
727 740
728 /* =========================================== 741 /* ======================================================================== */
729 /* Interrupt handling 742 /* Interrupt handling */
730 /* =========================================== 743 /* ======================================================================== */
731 744
732 static inline int 745 static inline int
733 mpc52xx_uart_int_rx_chars(struct uart_port *po 746 mpc52xx_uart_int_rx_chars(struct uart_port *port)
734 { 747 {
735 struct tty_struct *tty = port->info->t !! 748 struct tty_struct *tty = port->info->port.tty;
736 unsigned char ch, flag; 749 unsigned char ch, flag;
737 unsigned short status; 750 unsigned short status;
738 751
739 /* While we can read, do so ! */ 752 /* While we can read, do so ! */
740 while (psc_ops->raw_rx_rdy(port)) { 753 while (psc_ops->raw_rx_rdy(port)) {
741 /* Get the char */ 754 /* Get the char */
742 ch = psc_ops->read_char(port); 755 ch = psc_ops->read_char(port);
743 756
744 /* Handle sysreq char */ 757 /* Handle sysreq char */
745 #ifdef SUPPORT_SYSRQ 758 #ifdef SUPPORT_SYSRQ
746 if (uart_handle_sysrq_char(por 759 if (uart_handle_sysrq_char(port, ch)) {
747 port->sysrq = 0; 760 port->sysrq = 0;
748 continue; 761 continue;
749 } 762 }
750 #endif 763 #endif
751 764
752 /* Store it */ 765 /* Store it */
753 766
754 flag = TTY_NORMAL; 767 flag = TTY_NORMAL;
755 port->icount.rx++; 768 port->icount.rx++;
756 769
757 status = in_be16(&PSC(port)->m 770 status = in_be16(&PSC(port)->mpc52xx_psc_status);
758 771
759 if (status & (MPC52xx_PSC_SR_P 772 if (status & (MPC52xx_PSC_SR_PE |
760 MPC52xx_PSC_SR_F 773 MPC52xx_PSC_SR_FE |
761 MPC52xx_PSC_SR_R 774 MPC52xx_PSC_SR_RB)) {
762 775
763 if (status & MPC52xx_P 776 if (status & MPC52xx_PSC_SR_RB) {
764 flag = TTY_BRE 777 flag = TTY_BREAK;
765 uart_handle_br 778 uart_handle_break(port);
766 } else if (status & MP !! 779 port->icount.brk++;
>> 780 } else if (status & MPC52xx_PSC_SR_PE) {
767 flag = TTY_PAR 781 flag = TTY_PARITY;
768 else if (status & MPC5 !! 782 port->icount.parity++;
>> 783 }
>> 784 else if (status & MPC52xx_PSC_SR_FE) {
769 flag = TTY_FRA 785 flag = TTY_FRAME;
>> 786 port->icount.frame++;
>> 787 }
770 788
771 /* Clear error conditi 789 /* Clear error condition */
772 out_8(&PSC(port)->comm 790 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
773 791
774 } 792 }
775 tty_insert_flip_char(tty, ch, 793 tty_insert_flip_char(tty, ch, flag);
776 if (status & MPC52xx_PSC_SR_OE 794 if (status & MPC52xx_PSC_SR_OE) {
777 /* 795 /*
778 * Overrun is special, 796 * Overrun is special, since it's
779 * reported immediatel 797 * reported immediately, and doesn't
780 * affect the current 798 * affect the current character
781 */ 799 */
782 tty_insert_flip_char(t 800 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
>> 801 port->icount.overrun++;
783 } 802 }
784 } 803 }
785 804
>> 805 spin_unlock(&port->lock);
786 tty_flip_buffer_push(tty); 806 tty_flip_buffer_push(tty);
>> 807 spin_lock(&port->lock);
787 808
788 return psc_ops->raw_rx_rdy(port); 809 return psc_ops->raw_rx_rdy(port);
789 } 810 }
790 811
791 static inline int 812 static inline int
792 mpc52xx_uart_int_tx_chars(struct uart_port *po 813 mpc52xx_uart_int_tx_chars(struct uart_port *port)
793 { 814 {
794 struct circ_buf *xmit = &port->info->x 815 struct circ_buf *xmit = &port->info->xmit;
795 816
796 /* Process out of band chars */ 817 /* Process out of band chars */
797 if (port->x_char) { 818 if (port->x_char) {
798 psc_ops->write_char(port, port 819 psc_ops->write_char(port, port->x_char);
799 port->icount.tx++; 820 port->icount.tx++;
800 port->x_char = 0; 821 port->x_char = 0;
801 return 1; 822 return 1;
802 } 823 }
803 824
804 /* Nothing to do ? */ 825 /* Nothing to do ? */
805 if (uart_circ_empty(xmit) || uart_tx_s 826 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
806 mpc52xx_uart_stop_tx(port); 827 mpc52xx_uart_stop_tx(port);
807 return 0; 828 return 0;
808 } 829 }
809 830
810 /* Send chars */ 831 /* Send chars */
811 while (psc_ops->raw_tx_rdy(port)) { 832 while (psc_ops->raw_tx_rdy(port)) {
812 psc_ops->write_char(port, xmit 833 psc_ops->write_char(port, xmit->buf[xmit->tail]);
813 xmit->tail = (xmit->tail + 1) 834 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
814 port->icount.tx++; 835 port->icount.tx++;
815 if (uart_circ_empty(xmit)) 836 if (uart_circ_empty(xmit))
816 break; 837 break;
817 } 838 }
818 839
819 /* Wake up */ 840 /* Wake up */
820 if (uart_circ_chars_pending(xmit) < WA 841 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
821 uart_write_wakeup(port); 842 uart_write_wakeup(port);
822 843
823 /* Maybe we're done after all */ 844 /* Maybe we're done after all */
824 if (uart_circ_empty(xmit)) { 845 if (uart_circ_empty(xmit)) {
825 mpc52xx_uart_stop_tx(port); 846 mpc52xx_uart_stop_tx(port);
826 return 0; 847 return 0;
827 } 848 }
828 849
829 return 1; 850 return 1;
830 } 851 }
831 852
832 static irqreturn_t 853 static irqreturn_t
833 mpc52xx_uart_int(int irq, void *dev_id) 854 mpc52xx_uart_int(int irq, void *dev_id)
834 { 855 {
835 struct uart_port *port = dev_id; 856 struct uart_port *port = dev_id;
836 unsigned long pass = ISR_PASS_LIMIT; 857 unsigned long pass = ISR_PASS_LIMIT;
837 unsigned int keepgoing; 858 unsigned int keepgoing;
>> 859 u8 status;
838 860
839 spin_lock(&port->lock); 861 spin_lock(&port->lock);
840 862
841 /* While we have stuff to do, we conti 863 /* While we have stuff to do, we continue */
842 do { 864 do {
843 /* If we don't find anything t 865 /* If we don't find anything to do, we stop */
844 keepgoing = 0; 866 keepgoing = 0;
845 867
846 psc_ops->rx_clr_irq(port); 868 psc_ops->rx_clr_irq(port);
847 if (psc_ops->rx_rdy(port)) 869 if (psc_ops->rx_rdy(port))
848 keepgoing |= mpc52xx_u 870 keepgoing |= mpc52xx_uart_int_rx_chars(port);
849 871
850 psc_ops->tx_clr_irq(port); 872 psc_ops->tx_clr_irq(port);
851 if (psc_ops->tx_rdy(port)) 873 if (psc_ops->tx_rdy(port))
852 keepgoing |= mpc52xx_u 874 keepgoing |= mpc52xx_uart_int_tx_chars(port);
853 875
>> 876 status = in_8(&PSC(port)->mpc52xx_psc_ipcr);
>> 877 if (status & MPC52xx_PSC_D_DCD)
>> 878 uart_handle_dcd_change(port, !(status & MPC52xx_PSC_DCD));
>> 879
>> 880 if (status & MPC52xx_PSC_D_CTS)
>> 881 uart_handle_cts_change(port, !(status & MPC52xx_PSC_CTS));
>> 882
854 /* Limit number of iteration * 883 /* Limit number of iteration */
855 if (!(--pass)) 884 if (!(--pass))
856 keepgoing = 0; 885 keepgoing = 0;
857 886
858 } while (keepgoing); 887 } while (keepgoing);
859 888
860 spin_unlock(&port->lock); 889 spin_unlock(&port->lock);
861 890
862 return IRQ_HANDLED; 891 return IRQ_HANDLED;
863 } 892 }
864 893
865 894
866 /* =========================================== 895 /* ======================================================================== */
867 /* Console ( if applicable ) 896 /* Console ( if applicable ) */
868 /* =========================================== 897 /* ======================================================================== */
869 898
870 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE 899 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
871 900
872 static void __init 901 static void __init
873 mpc52xx_console_get_options(struct uart_port * 902 mpc52xx_console_get_options(struct uart_port *port,
874 int *baud, int *pa 903 int *baud, int *parity, int *bits, int *flow)
875 { 904 {
876 struct mpc52xx_psc __iomem *psc = PSC( 905 struct mpc52xx_psc __iomem *psc = PSC(port);
877 unsigned char mr1; 906 unsigned char mr1;
878 907
879 pr_debug("mpc52xx_console_get_options( 908 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
880 909
881 /* Read the mode registers */ 910 /* Read the mode registers */
882 out_8(&psc->command, MPC52xx_PSC_SEL_M 911 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
883 mr1 = in_8(&psc->mode); 912 mr1 = in_8(&psc->mode);
884 913
885 /* CT{U,L}R are write-only ! */ 914 /* CT{U,L}R are write-only ! */
886 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_ 915 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
887 #if !defined(CONFIG_PPC_MERGE) <<
888 if (__res.bi_baudrate) <<
889 *baud = __res.bi_baudrate; <<
890 #endif <<
891 916
892 /* Parse them */ 917 /* Parse them */
893 switch (mr1 & MPC52xx_PSC_MODE_BITS_MA 918 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
894 case MPC52xx_PSC_MODE_5_BITS: 919 case MPC52xx_PSC_MODE_5_BITS:
895 *bits = 5; 920 *bits = 5;
896 break; 921 break;
897 case MPC52xx_PSC_MODE_6_BITS: 922 case MPC52xx_PSC_MODE_6_BITS:
898 *bits = 6; 923 *bits = 6;
899 break; 924 break;
900 case MPC52xx_PSC_MODE_7_BITS: 925 case MPC52xx_PSC_MODE_7_BITS:
901 *bits = 7; 926 *bits = 7;
902 break; 927 break;
903 case MPC52xx_PSC_MODE_8_BITS: 928 case MPC52xx_PSC_MODE_8_BITS:
904 default: 929 default:
905 *bits = 8; 930 *bits = 8;
906 } 931 }
907 932
908 if (mr1 & MPC52xx_PSC_MODE_PARNONE) 933 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
909 *parity = 'n'; 934 *parity = 'n';
910 else 935 else
911 *parity = mr1 & MPC52xx_PSC_MO 936 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
912 } 937 }
913 938
914 static void 939 static void
915 mpc52xx_console_write(struct console *co, cons 940 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
916 { 941 {
917 struct uart_port *port = &mpc52xx_uart 942 struct uart_port *port = &mpc52xx_uart_ports[co->index];
918 unsigned int i, j; 943 unsigned int i, j;
919 944
920 /* Disable interrupts */ 945 /* Disable interrupts */
921 psc_ops->cw_disable_ints(port); 946 psc_ops->cw_disable_ints(port);
922 947
923 /* Wait the TX buffer to be empty */ 948 /* Wait the TX buffer to be empty */
924 j = 5000000; /* Maximum wait */ 949 j = 5000000; /* Maximum wait */
925 while (!mpc52xx_uart_tx_empty(port) && 950 while (!mpc52xx_uart_tx_empty(port) && --j)
926 udelay(1); 951 udelay(1);
927 952
928 /* Write all the chars */ 953 /* Write all the chars */
929 for (i = 0; i < count; i++, s++) { 954 for (i = 0; i < count; i++, s++) {
930 /* Line return handling */ 955 /* Line return handling */
931 if (*s == '\n') 956 if (*s == '\n')
932 psc_ops->write_char(po 957 psc_ops->write_char(port, '\r');
933 958
934 /* Send the char */ 959 /* Send the char */
935 psc_ops->write_char(port, *s); 960 psc_ops->write_char(port, *s);
936 961
937 /* Wait the TX buffer to be em 962 /* Wait the TX buffer to be empty */
938 j = 20000; /* Maximum wai 963 j = 20000; /* Maximum wait */
939 while (!mpc52xx_uart_tx_empty( 964 while (!mpc52xx_uart_tx_empty(port) && --j)
940 udelay(1); 965 udelay(1);
941 } 966 }
942 967
943 /* Restore interrupt state */ 968 /* Restore interrupt state */
944 psc_ops->cw_restore_ints(port); 969 psc_ops->cw_restore_ints(port);
945 } 970 }
946 971
947 #if !defined(CONFIG_PPC_MERGE) <<
948 static int __init <<
949 mpc52xx_console_setup(struct console *co, char <<
950 { <<
951 struct uart_port *port = &mpc52xx_uart <<
952 <<
953 int baud = CONFIG_SERIAL_MPC52xx_CONSO <<
954 int bits = 8; <<
955 int parity = 'n'; <<
956 int flow = 'n'; <<
957 <<
958 if (co->index < 0 || co->index >= MPC5 <<
959 return -EINVAL; <<
960 <<
961 /* Basic port init. Needed since we us <<
962 * real init for early access */ <<
963 spin_lock_init(&port->lock); <<
964 port->uartclk = __res.bi_ipbfreq / 2 <<
965 port->ops = &mpc52xx_uart_ops; <<
966 port->mapbase = MPC52xx_PA(MPC52xx_P <<
967 <<
968 /* We ioremap ourself */ <<
969 port->membase = ioremap(port->mapbase, <<
970 if (port->membase == NULL) <<
971 return -EINVAL; <<
972 <<
973 /* Setup the port parameters accoding <<
974 if (options) <<
975 uart_parse_options(options, &b <<
976 else <<
977 mpc52xx_console_get_options(po <<
978 <<
979 return uart_set_options(port, co, baud <<
980 } <<
981 <<
982 #else <<
983 972
984 static int __init 973 static int __init
985 mpc52xx_console_setup(struct console *co, char 974 mpc52xx_console_setup(struct console *co, char *options)
986 { 975 {
987 struct uart_port *port = &mpc52xx_uart 976 struct uart_port *port = &mpc52xx_uart_ports[co->index];
988 struct device_node *np = mpc52xx_uart_ 977 struct device_node *np = mpc52xx_uart_nodes[co->index];
989 unsigned int uartclk; 978 unsigned int uartclk;
990 struct resource res; 979 struct resource res;
991 int ret; 980 int ret;
992 981
993 int baud = CONFIG_SERIAL_MPC52xx_CONSO 982 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
994 int bits = 8; 983 int bits = 8;
995 int parity = 'n'; 984 int parity = 'n';
996 int flow = 'n'; 985 int flow = 'n';
997 986
998 pr_debug("mpc52xx_console_setup co=%p, 987 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
999 co, co->index, options); 988 co, co->index, options);
1000 989
1001 if ((co->index < 0) || (co->index > M !! 990 if ((co->index < 0) || (co->index >= MPC52xx_PSC_MAXNUM)) {
1002 pr_debug("PSC%x out of range\ 991 pr_debug("PSC%x out of range\n", co->index);
1003 return -EINVAL; 992 return -EINVAL;
1004 } 993 }
1005 994
1006 if (!np) { 995 if (!np) {
1007 pr_debug("PSC%x not found in 996 pr_debug("PSC%x not found in device tree\n", co->index);
1008 return -EINVAL; 997 return -EINVAL;
1009 } 998 }
1010 999
1011 pr_debug("Console on ttyPSC%x is %s\n 1000 pr_debug("Console on ttyPSC%x is %s\n",
1012 co->index, mpc52xx_uart_node 1001 co->index, mpc52xx_uart_nodes[co->index]->full_name);
1013 1002
1014 /* Fetch register locations */ 1003 /* Fetch register locations */
1015 ret = of_address_to_resource(np, 0, & 1004 ret = of_address_to_resource(np, 0, &res);
1016 if (ret) { 1005 if (ret) {
1017 pr_debug("Could not get resou 1006 pr_debug("Could not get resources for PSC%x\n", co->index);
1018 return ret; 1007 return ret;
1019 } 1008 }
1020 1009
1021 uartclk = psc_ops->getuartclk(np); 1010 uartclk = psc_ops->getuartclk(np);
1022 if (uartclk == 0) { 1011 if (uartclk == 0) {
1023 pr_debug("Could not find uart 1012 pr_debug("Could not find uart clock frequency!\n");
1024 return -EINVAL; 1013 return -EINVAL;
1025 } 1014 }
1026 1015
1027 /* Basic port init. Needed since we u 1016 /* Basic port init. Needed since we use some uart_??? func before
1028 * real init for early access */ 1017 * real init for early access */
1029 spin_lock_init(&port->lock); 1018 spin_lock_init(&port->lock);
1030 port->uartclk = uartclk; 1019 port->uartclk = uartclk;
1031 port->ops = &mpc52xx_uart_ops; 1020 port->ops = &mpc52xx_uart_ops;
1032 port->mapbase = res.start; 1021 port->mapbase = res.start;
1033 port->membase = ioremap(res.start, si 1022 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1034 port->irq = irq_of_parse_and_map(np, 1023 port->irq = irq_of_parse_and_map(np, 0);
1035 1024
1036 if (port->membase == NULL) 1025 if (port->membase == NULL)
1037 return -EINVAL; 1026 return -EINVAL;
1038 1027
1039 pr_debug("mpc52xx-psc uart at %p, map 1028 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1040 (void *)port->mapbase, port- 1029 (void *)port->mapbase, port->membase,
1041 port->irq, port->uartclk); 1030 port->irq, port->uartclk);
1042 1031
1043 /* Setup the port parameters accoding 1032 /* Setup the port parameters accoding to options */
1044 if (options) 1033 if (options)
1045 uart_parse_options(options, & 1034 uart_parse_options(options, &baud, &parity, &bits, &flow);
1046 else 1035 else
1047 mpc52xx_console_get_options(p 1036 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1048 1037
1049 pr_debug("Setting console parameters: 1038 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1050 baud, bits, parity, flow); 1039 baud, bits, parity, flow);
1051 1040
1052 return uart_set_options(port, co, bau 1041 return uart_set_options(port, co, baud, parity, bits, flow);
1053 } 1042 }
1054 #endif /* defined(CONFIG_PPC_MERGE) */ <<
1055 1043
1056 1044
1057 static struct uart_driver mpc52xx_uart_driver 1045 static struct uart_driver mpc52xx_uart_driver;
1058 1046
1059 static struct console mpc52xx_console = { 1047 static struct console mpc52xx_console = {
1060 .name = "ttyPSC", 1048 .name = "ttyPSC",
1061 .write = mpc52xx_console_write, 1049 .write = mpc52xx_console_write,
1062 .device = uart_console_device, 1050 .device = uart_console_device,
1063 .setup = mpc52xx_console_setup, 1051 .setup = mpc52xx_console_setup,
1064 .flags = CON_PRINTBUFFER, 1052 .flags = CON_PRINTBUFFER,
1065 .index = -1, /* Specified on the c 1053 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1066 .data = &mpc52xx_uart_driver, 1054 .data = &mpc52xx_uart_driver,
1067 }; 1055 };
1068 1056
1069 1057
1070 static int __init 1058 static int __init
1071 mpc52xx_console_init(void) 1059 mpc52xx_console_init(void)
1072 { 1060 {
1073 #if defined(CONFIG_PPC_MERGE) <<
1074 mpc52xx_uart_of_enumerate(); 1061 mpc52xx_uart_of_enumerate();
1075 #endif <<
1076 register_console(&mpc52xx_console); 1062 register_console(&mpc52xx_console);
1077 return 0; 1063 return 0;
1078 } 1064 }
1079 1065
1080 console_initcall(mpc52xx_console_init); 1066 console_initcall(mpc52xx_console_init);
1081 1067
1082 #define MPC52xx_PSC_CONSOLE &mpc52xx_console 1068 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1083 #else 1069 #else
1084 #define MPC52xx_PSC_CONSOLE NULL 1070 #define MPC52xx_PSC_CONSOLE NULL
1085 #endif 1071 #endif
1086 1072
1087 1073
1088 /* ========================================== 1074 /* ======================================================================== */
1089 /* UART Driver 1075 /* UART Driver */
1090 /* ========================================== 1076 /* ======================================================================== */
1091 1077
1092 static struct uart_driver mpc52xx_uart_driver 1078 static struct uart_driver mpc52xx_uart_driver = {
1093 .driver_name = "mpc52xx_psc_uart", 1079 .driver_name = "mpc52xx_psc_uart",
1094 .dev_name = "ttyPSC", 1080 .dev_name = "ttyPSC",
1095 .major = SERIAL_PSC_MAJOR, 1081 .major = SERIAL_PSC_MAJOR,
1096 .minor = SERIAL_PSC_MINOR, 1082 .minor = SERIAL_PSC_MINOR,
1097 .nr = MPC52xx_PSC_MAXNUM, 1083 .nr = MPC52xx_PSC_MAXNUM,
1098 .cons = MPC52xx_PSC_CONSOLE 1084 .cons = MPC52xx_PSC_CONSOLE,
1099 }; 1085 };
1100 1086
1101 <<
1102 #if !defined(CONFIG_PPC_MERGE) <<
1103 /* ========================================== <<
1104 /* Platform Driver <<
1105 /* ========================================== <<
1106 <<
1107 static int __devinit <<
1108 mpc52xx_uart_probe(struct platform_device *de <<
1109 { <<
1110 struct resource *res = dev->resource; <<
1111 <<
1112 struct uart_port *port = NULL; <<
1113 int i, idx, ret; <<
1114 <<
1115 /* Check validity & presence */ <<
1116 idx = dev->id; <<
1117 if (idx < 0 || idx >= MPC52xx_PSC_MAX <<
1118 return -EINVAL; <<
1119 <<
1120 if (!mpc52xx_match_psc_function(idx, <<
1121 return -ENODEV; <<
1122 <<
1123 /* Init the port structure */ <<
1124 port = &mpc52xx_uart_ports[idx]; <<
1125 <<
1126 spin_lock_init(&port->lock); <<
1127 port->uartclk = __res.bi_ipbfreq / <<
1128 port->fifosize = 512; <<
1129 port->iotype = UPIO_MEM; <<
1130 port->flags = UPF_BOOT_AUTOCONF | <<
1131 (uart_console(port) <<
1132 port->line = idx; <<
1133 port->ops = &mpc52xx_uart_ops; <<
1134 port->dev = &dev->dev; <<
1135 <<
1136 /* Search for IRQ and mapbase */ <<
1137 for (i = 0 ; i < dev->num_resources ; <<
1138 if (res->flags & IORESOURCE_M <<
1139 port->mapbase = res-> <<
1140 else if (res->flags & IORESOU <<
1141 port->irq = res->star <<
1142 } <<
1143 if (!port->irq || !port->mapbase) <<
1144 return -EINVAL; <<
1145 <<
1146 /* Add the port to the uart sub-syste <<
1147 ret = uart_add_one_port(&mpc52xx_uart <<
1148 if (!ret) <<
1149 platform_set_drvdata(dev, (vo <<
1150 <<
1151 return ret; <<
1152 } <<
1153 <<
1154 static int <<
1155 mpc52xx_uart_remove(struct platform_device *d <<
1156 { <<
1157 struct uart_port *port = (struct uart <<
1158 <<
1159 platform_set_drvdata(dev, NULL); <<
1160 <<
1161 if (port) <<
1162 uart_remove_one_port(&mpc52xx <<
1163 <<
1164 return 0; <<
1165 } <<
1166 <<
1167 #ifdef CONFIG_PM <<
1168 static int <<
1169 mpc52xx_uart_suspend(struct platform_device * <<
1170 { <<
1171 struct uart_port *port = (struct uart <<
1172 <<
1173 if (port) <<
1174 uart_suspend_port(&mpc52xx_ua <<
1175 <<
1176 return 0; <<
1177 } <<
1178 <<
1179 static int <<
1180 mpc52xx_uart_resume(struct platform_device *d <<
1181 { <<
1182 struct uart_port *port = (struct uart <<
1183 <<
1184 if (port) <<
1185 uart_resume_port(&mpc52xx_uar <<
1186 <<
1187 return 0; <<
1188 } <<
1189 #endif <<
1190 <<
1191 /* work with hotplug and coldplug */ <<
1192 MODULE_ALIAS("platform:mpc52xx-psc"); <<
1193 <<
1194 static struct platform_driver mpc52xx_uart_pl <<
1195 .probe = mpc52xx_uart_probe, <<
1196 .remove = mpc52xx_uart_remove <<
1197 #ifdef CONFIG_PM <<
1198 .suspend = mpc52xx_uart_suspen <<
1199 .resume = mpc52xx_uart_resume <<
1200 #endif <<
1201 .driver = { <<
1202 .owner = THIS_MODULE, <<
1203 .name = "mpc52xx-psc", <<
1204 }, <<
1205 }; <<
1206 #endif /* !defined(CONFIG_PPC_MERGE) */ <<
1207 <<
1208 <<
1209 #if defined(CONFIG_PPC_MERGE) <<
1210 /* ========================================== 1087 /* ======================================================================== */
1211 /* OF Platform Driver 1088 /* OF Platform Driver */
1212 /* ========================================== 1089 /* ======================================================================== */
1213 1090
1214 static struct of_device_id mpc52xx_uart_of_ma 1091 static struct of_device_id mpc52xx_uart_of_match[] = {
1215 #ifdef CONFIG_PPC_MPC52xx 1092 #ifdef CONFIG_PPC_MPC52xx
1216 { .compatible = "fsl,mpc5200-psc-uart 1093 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1217 /* binding used by old lite5200 devic 1094 /* binding used by old lite5200 device trees: */
1218 { .compatible = "mpc5200-psc-uart", . 1095 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1219 /* binding used by efika: */ 1096 /* binding used by efika: */
1220 { .compatible = "mpc5200-serial", .da 1097 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1221 #endif 1098 #endif
1222 #ifdef CONFIG_PPC_MPC512x 1099 #ifdef CONFIG_PPC_MPC512x
1223 { .compatible = "fsl,mpc5121-psc-uart 1100 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1224 {}, <<
1225 #endif 1101 #endif
>> 1102 {},
1226 }; 1103 };
1227 1104
1228 static int __devinit 1105 static int __devinit
1229 mpc52xx_uart_of_probe(struct of_device *op, c 1106 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1230 { 1107 {
1231 int idx = -1; 1108 int idx = -1;
1232 unsigned int uartclk; 1109 unsigned int uartclk;
1233 struct uart_port *port = NULL; 1110 struct uart_port *port = NULL;
1234 struct resource res; 1111 struct resource res;
1235 int ret; 1112 int ret;
1236 1113
1237 dev_dbg(&op->dev, "mpc52xx_uart_probe 1114 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1238 1115
1239 /* Check validity & presence */ 1116 /* Check validity & presence */
1240 for (idx = 0; idx < MPC52xx_PSC_MAXNU 1117 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1241 if (mpc52xx_uart_nodes[idx] = 1118 if (mpc52xx_uart_nodes[idx] == op->node)
1242 break; 1119 break;
1243 if (idx >= MPC52xx_PSC_MAXNUM) 1120 if (idx >= MPC52xx_PSC_MAXNUM)
1244 return -EINVAL; 1121 return -EINVAL;
1245 pr_debug("Found %s assigned to ttyPSC 1122 pr_debug("Found %s assigned to ttyPSC%x\n",
1246 mpc52xx_uart_nodes[idx]->ful 1123 mpc52xx_uart_nodes[idx]->full_name, idx);
1247 1124
1248 uartclk = psc_ops->getuartclk(op->nod 1125 uartclk = psc_ops->getuartclk(op->node);
1249 if (uartclk == 0) { 1126 if (uartclk == 0) {
1250 dev_dbg(&op->dev, "Could not 1127 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1251 return -EINVAL; 1128 return -EINVAL;
1252 } 1129 }
1253 1130
1254 /* Init the port structure */ 1131 /* Init the port structure */
1255 port = &mpc52xx_uart_ports[idx]; 1132 port = &mpc52xx_uart_ports[idx];
1256 1133
1257 spin_lock_init(&port->lock); 1134 spin_lock_init(&port->lock);
1258 port->uartclk = uartclk; 1135 port->uartclk = uartclk;
1259 port->fifosize = 512; 1136 port->fifosize = 512;
1260 port->iotype = UPIO_MEM; 1137 port->iotype = UPIO_MEM;
1261 port->flags = UPF_BOOT_AUTOCONF | 1138 port->flags = UPF_BOOT_AUTOCONF |
1262 (uart_console(port) 1139 (uart_console(port) ? 0 : UPF_IOREMAP);
1263 port->line = idx; 1140 port->line = idx;
1264 port->ops = &mpc52xx_uart_ops; 1141 port->ops = &mpc52xx_uart_ops;
1265 port->dev = &op->dev; 1142 port->dev = &op->dev;
1266 1143
1267 /* Search for IRQ and mapbase */ 1144 /* Search for IRQ and mapbase */
1268 ret = of_address_to_resource(op->node 1145 ret = of_address_to_resource(op->node, 0, &res);
1269 if (ret) 1146 if (ret)
1270 return ret; 1147 return ret;
1271 1148
1272 port->mapbase = res.start; 1149 port->mapbase = res.start;
>> 1150 if (!port->mapbase) {
>> 1151 dev_dbg(&op->dev, "Could not allocate resources for PSC\n");
>> 1152 return -EINVAL;
>> 1153 }
>> 1154
1273 port->irq = irq_of_parse_and_map(op-> 1155 port->irq = irq_of_parse_and_map(op->node, 0);
>> 1156 if (port->irq == NO_IRQ) {
>> 1157 dev_dbg(&op->dev, "Could not get irq\n");
>> 1158 return -EINVAL;
>> 1159 }
1274 1160
1275 dev_dbg(&op->dev, "mpc52xx-psc uart a 1161 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1276 (void *)port->mapbase, port-> 1162 (void *)port->mapbase, port->irq, port->uartclk);
1277 1163
1278 if ((port->irq == NO_IRQ) || !port->m <<
1279 printk(KERN_ERR "Could not al <<
1280 return -EINVAL; <<
1281 } <<
1282 <<
1283 /* Add the port to the uart sub-syste 1164 /* Add the port to the uart sub-system */
1284 ret = uart_add_one_port(&mpc52xx_uart 1165 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1285 if (!ret) !! 1166 if (ret) {
1286 dev_set_drvdata(&op->dev, (vo !! 1167 irq_dispose_mapping(port->irq);
>> 1168 return ret;
>> 1169 }
1287 1170
1288 return ret; !! 1171 dev_set_drvdata(&op->dev, (void *)port);
>> 1172 return 0;
1289 } 1173 }
1290 1174
1291 static int 1175 static int
1292 mpc52xx_uart_of_remove(struct of_device *op) 1176 mpc52xx_uart_of_remove(struct of_device *op)
1293 { 1177 {
1294 struct uart_port *port = dev_get_drvd 1178 struct uart_port *port = dev_get_drvdata(&op->dev);
1295 dev_set_drvdata(&op->dev, NULL); 1179 dev_set_drvdata(&op->dev, NULL);
1296 1180
1297 if (port) { 1181 if (port) {
1298 uart_remove_one_port(&mpc52xx 1182 uart_remove_one_port(&mpc52xx_uart_driver, port);
1299 irq_dispose_mapping(port->irq 1183 irq_dispose_mapping(port->irq);
1300 } 1184 }
1301 1185
1302 return 0; 1186 return 0;
1303 } 1187 }
1304 1188
1305 #ifdef CONFIG_PM 1189 #ifdef CONFIG_PM
1306 static int 1190 static int
1307 mpc52xx_uart_of_suspend(struct of_device *op, 1191 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1308 { 1192 {
1309 struct uart_port *port = (struct uart 1193 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1310 1194
1311 if (port) 1195 if (port)
1312 uart_suspend_port(&mpc52xx_ua 1196 uart_suspend_port(&mpc52xx_uart_driver, port);
1313 1197
1314 return 0; 1198 return 0;
1315 } 1199 }
1316 1200
1317 static int 1201 static int
1318 mpc52xx_uart_of_resume(struct of_device *op) 1202 mpc52xx_uart_of_resume(struct of_device *op)
1319 { 1203 {
1320 struct uart_port *port = (struct uart 1204 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1321 1205
1322 if (port) 1206 if (port)
1323 uart_resume_port(&mpc52xx_uar 1207 uart_resume_port(&mpc52xx_uart_driver, port);
1324 1208
1325 return 0; 1209 return 0;
1326 } 1210 }
1327 #endif 1211 #endif
1328 1212
1329 static void 1213 static void
1330 mpc52xx_uart_of_assign(struct device_node *np !! 1214 mpc52xx_uart_of_assign(struct device_node *np)
1331 { 1215 {
1332 int free_idx = -1; <<
1333 int i; 1216 int i;
1334 1217
1335 /* Find the first free node */ !! 1218 /* Find the first free PSC number */
1336 for (i = 0; i < MPC52xx_PSC_MAXNUM; i 1219 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1337 if (mpc52xx_uart_nodes[i] == 1220 if (mpc52xx_uart_nodes[i] == NULL) {
1338 free_idx = i; !! 1221 of_node_get(np);
1339 break; !! 1222 mpc52xx_uart_nodes[i] = np;
>> 1223 return;
1340 } 1224 }
1341 } 1225 }
1342 <<
1343 if ((idx < 0) || (idx >= MPC52xx_PSC_ <<
1344 idx = free_idx; <<
1345 <<
1346 if (idx < 0) <<
1347 return; /* No free slot; abor <<
1348 <<
1349 of_node_get(np); <<
1350 /* If the slot is already occupied, t <<
1351 if (mpc52xx_uart_nodes[idx] && (free_ <<
1352 mpc52xx_uart_nodes[free_idx] <<
1353 mpc52xx_uart_nodes[idx] = np; <<
1354 } 1226 }
1355 1227
1356 static void 1228 static void
1357 mpc52xx_uart_of_enumerate(void) 1229 mpc52xx_uart_of_enumerate(void)
1358 { 1230 {
1359 static int enum_done; 1231 static int enum_done;
1360 struct device_node *np; 1232 struct device_node *np;
1361 const unsigned int *devno; <<
1362 const struct of_device_id *match; 1233 const struct of_device_id *match;
1363 int i; 1234 int i;
1364 1235
1365 if (enum_done) 1236 if (enum_done)
1366 return; 1237 return;
1367 1238
1368 for_each_node_by_type(np, "serial") { !! 1239 /* Assign index to each PSC in device tree */
>> 1240 for_each_matching_node(np, mpc52xx_uart_of_match) {
1369 match = of_match_node(mpc52xx 1241 match = of_match_node(mpc52xx_uart_of_match, np);
1370 if (!match) <<
1371 continue; <<
1372 <<
1373 psc_ops = match->data; 1242 psc_ops = match->data;
1374 !! 1243 mpc52xx_uart_of_assign(np);
1375 /* Is a particular device num <<
1376 devno = of_get_property(np, " <<
1377 mpc52xx_uart_of_assign(np, de <<
1378 } 1244 }
1379 1245
1380 enum_done = 1; 1246 enum_done = 1;
1381 1247
1382 for (i = 0; i < MPC52xx_PSC_MAXNUM; i 1248 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1383 if (mpc52xx_uart_nodes[i]) 1249 if (mpc52xx_uart_nodes[i])
1384 pr_debug("%s assigned 1250 pr_debug("%s assigned to ttyPSC%x\n",
1385 mpc52xx_uart 1251 mpc52xx_uart_nodes[i]->full_name, i);
1386 } 1252 }
1387 } 1253 }
1388 1254
1389 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match 1255 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1390 1256
1391 static struct of_platform_driver mpc52xx_uart 1257 static struct of_platform_driver mpc52xx_uart_of_driver = {
1392 .match_table = mpc52xx_uart_of_mat 1258 .match_table = mpc52xx_uart_of_match,
1393 .probe = mpc52xx_uart_of_pro 1259 .probe = mpc52xx_uart_of_probe,
1394 .remove = mpc52xx_uart_of_rem 1260 .remove = mpc52xx_uart_of_remove,
1395 #ifdef CONFIG_PM 1261 #ifdef CONFIG_PM
1396 .suspend = mpc52xx_uart_of_sus 1262 .suspend = mpc52xx_uart_of_suspend,
1397 .resume = mpc52xx_uart_of_res 1263 .resume = mpc52xx_uart_of_resume,
1398 #endif 1264 #endif
1399 .driver = { 1265 .driver = {
1400 .name = "mpc52xx-psc-uart", 1266 .name = "mpc52xx-psc-uart",
1401 }, 1267 },
1402 }; 1268 };
1403 #endif /* defined(CONFIG_PPC_MERGE) */ <<
1404 1269
1405 1270
1406 /* ========================================== 1271 /* ======================================================================== */
1407 /* Module 1272 /* Module */
1408 /* ========================================== 1273 /* ======================================================================== */
1409 1274
1410 static int __init 1275 static int __init
1411 mpc52xx_uart_init(void) 1276 mpc52xx_uart_init(void)
1412 { 1277 {
1413 int ret; 1278 int ret;
1414 1279
1415 printk(KERN_INFO "Serial: MPC52xx PSC 1280 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1416 1281
1417 ret = uart_register_driver(&mpc52xx_u 1282 ret = uart_register_driver(&mpc52xx_uart_driver);
1418 if (ret) { 1283 if (ret) {
1419 printk(KERN_ERR "%s: uart_reg 1284 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1420 __FILE__, ret); 1285 __FILE__, ret);
1421 return ret; 1286 return ret;
1422 } 1287 }
1423 1288
1424 #if defined(CONFIG_PPC_MERGE) <<
1425 mpc52xx_uart_of_enumerate(); 1289 mpc52xx_uart_of_enumerate();
1426 1290
1427 ret = of_register_platform_driver(&mp 1291 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1428 if (ret) { 1292 if (ret) {
1429 printk(KERN_ERR "%s: of_regis 1293 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1430 __FILE__, ret); 1294 __FILE__, ret);
1431 uart_unregister_driver(&mpc52 1295 uart_unregister_driver(&mpc52xx_uart_driver);
1432 return ret; 1296 return ret;
1433 } 1297 }
1434 #else <<
1435 psc_ops = &mpc52xx_psc_ops; <<
1436 ret = platform_driver_register(&mpc52 <<
1437 if (ret) { <<
1438 printk(KERN_ERR "%s: platform <<
1439 __FILE__, ret); <<
1440 uart_unregister_driver(&mpc52 <<
1441 return ret; <<
1442 } <<
1443 #endif <<
1444 1298
1445 return 0; 1299 return 0;
1446 } 1300 }
1447 1301
1448 static void __exit 1302 static void __exit
1449 mpc52xx_uart_exit(void) 1303 mpc52xx_uart_exit(void)
1450 { 1304 {
1451 #if defined(CONFIG_PPC_MERGE) <<
1452 of_unregister_platform_driver(&mpc52x 1305 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1453 #else <<
1454 platform_driver_unregister(&mpc52xx_u <<
1455 #endif <<
1456 uart_unregister_driver(&mpc52xx_uart_ 1306 uart_unregister_driver(&mpc52xx_uart_driver);
1457 } 1307 }
1458 1308
1459 1309
1460 module_init(mpc52xx_uart_init); 1310 module_init(mpc52xx_uart_init);
1461 module_exit(mpc52xx_uart_exit); 1311 module_exit(mpc52xx_uart_exit);
1462 1312
1463 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com 1313 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1464 MODULE_DESCRIPTION("Freescale MPC52xx PSC UAR 1314 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1465 MODULE_LICENSE("GPL"); 1315 MODULE_LICENSE("GPL");
1466 1316
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