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1 /* 1 /*
2 * Driver for the PSC of the Freescale MPC52xx 2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 * 3 *
4 * FIXME According to the usermanual the statu 4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals acces 5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits 6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-tim 7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this 8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking 9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition. 10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At 11 * Update: Actually, they seem updated ... At least the bits we use.
12 * 12 *
13 * 13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com 14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
15 * 15 *
16 * Some of the code has been inspired/copied f 16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com> 17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
18 * 18 *
19 * Copyright (C) 2008 Freescale Semiconductor 19 * Copyright (C) 2008 Freescale Semiconductor Inc.
20 * John Rigby <jrigby@gmail 20 * John Rigby <jrigby@gmail.com>
21 * Added support for MPC5121 21 * Added support for MPC5121
22 * Copyright (C) 2006 Secret Lab Technologies 22 * Copyright (C) 2006 Secret Lab Technologies Ltd.
23 * Grant Likely <grant.like 23 * Grant Likely <grant.likely@secretlab.ca>
24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt 24 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
25 * Copyright (C) 2003 MontaVista, Software, In 25 * Copyright (C) 2003 MontaVista, Software, Inc.
26 * 26 *
27 * This file is licensed under the terms of th 27 * This file is licensed under the terms of the GNU General Public License
28 * version 2. This program is licensed "as is" 28 * version 2. This program is licensed "as is" without any warranty of any
29 * kind, whether express or implied. 29 * kind, whether express or implied.
30 */ 30 */
31 31
32 /* Platform device Usage : 32 /* Platform device Usage :
33 * 33 *
34 * Since PSCs can have multiple function, the 34 * Since PSCs can have multiple function, the correct driver for each one
35 * is selected by calling mpc52xx_match_psc_fu 35 * is selected by calling mpc52xx_match_psc_function(...). The function
36 * handled by this driver is "uart". 36 * handled by this driver is "uart".
37 * 37 *
38 * The driver init all necessary registers to 38 * The driver init all necessary registers to place the PSC in uart mode without
39 * DCD. However, the pin multiplexing aren't c 39 * DCD. However, the pin multiplexing aren't changed and should be set either
40 * by the bootloader or in the platform init c 40 * by the bootloader or in the platform init code.
41 * 41 *
42 * The idx field must be equal to the PSC inde 42 * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
43 * and so on). So the PSC1 is mapped to /dev/t 43 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
44 * so on. But be warned, it's an ABSOLUTE REQU 44 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
45 * fpr the console code : without this 1:1 map 45 * fpr the console code : without this 1:1 mapping, at early boot time, when we
46 * are parsing the kernel args console=ttyPSC? 46 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
47 * will be mapped to. 47 * will be mapped to.
48 */ 48 */
49 49
50 /* OF Platform device Usage : 50 /* OF Platform device Usage :
51 * 51 *
52 * This driver is only used for PSCs configure 52 * This driver is only used for PSCs configured in uart mode. The device
53 * tree will have a node for each PSC in uart 53 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
54 * and "mpc52xx-psc-uart" in the compatible st 54 * and "mpc52xx-psc-uart" in the compatible string
55 * 55 *
56 * By default, PSC devices are enumerated in t 56 * By default, PSC devices are enumerated in the order they are found. However
57 * a particular PSC number can be forces by ad 57 * a particular PSC number can be forces by adding 'device_no = <port#>'
58 * to the device node. 58 * to the device node.
59 * 59 *
60 * The driver init all necessary registers to 60 * The driver init all necessary registers to place the PSC in uart mode without
61 * DCD. However, the pin multiplexing aren't c 61 * DCD. However, the pin multiplexing aren't changed and should be set either
62 * by the bootloader or in the platform init c 62 * by the bootloader or in the platform init code.
63 */ 63 */
64 64
65 #undef DEBUG 65 #undef DEBUG
66 66
67 #include <linux/device.h> 67 #include <linux/device.h>
68 #include <linux/module.h> 68 #include <linux/module.h>
69 #include <linux/tty.h> 69 #include <linux/tty.h>
70 #include <linux/serial.h> 70 #include <linux/serial.h>
71 #include <linux/sysrq.h> 71 #include <linux/sysrq.h>
72 #include <linux/console.h> 72 #include <linux/console.h>
73 #include <linux/delay.h> 73 #include <linux/delay.h>
74 #include <linux/io.h> 74 #include <linux/io.h>
75 75
76 #if defined(CONFIG_PPC_MERGE) 76 #if defined(CONFIG_PPC_MERGE)
77 #include <linux/of.h> 77 #include <linux/of.h>
78 #include <linux/of_platform.h> 78 #include <linux/of_platform.h>
79 #else 79 #else
80 #include <linux/platform_device.h> 80 #include <linux/platform_device.h>
81 #endif 81 #endif
82 82
83 #include <asm/mpc52xx.h> 83 #include <asm/mpc52xx.h>
84 #include <asm/mpc512x.h> 84 #include <asm/mpc512x.h>
85 #include <asm/mpc52xx_psc.h> 85 #include <asm/mpc52xx_psc.h>
86 86
87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && 87 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
88 #define SUPPORT_SYSRQ 88 #define SUPPORT_SYSRQ
89 #endif 89 #endif
90 90
91 #include <linux/serial_core.h> 91 #include <linux/serial_core.h>
92 92
93 93
94 /* We've been assigned a range on the "Low-den 94 /* We've been assigned a range on the "Low-density serial ports" major */
95 #define SERIAL_PSC_MAJOR 204 95 #define SERIAL_PSC_MAJOR 204
96 #define SERIAL_PSC_MINOR 148 96 #define SERIAL_PSC_MINOR 148
97 97
98 98
99 #define ISR_PASS_LIMIT 256 /* Max number 99 #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
100 100
101 101
102 static struct uart_port mpc52xx_uart_ports[MPC 102 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
103 /* Rem: - We use the read_status_mask 103 /* Rem: - We use the read_status_mask as a shadow of
104 * psc->mpc52xx_psc_imr 104 * psc->mpc52xx_psc_imr
105 * - It's important that is array 105 * - It's important that is array is all zero on start as we
106 * use it to know if it's initi 106 * use it to know if it's initialized or not ! If it's not sure
107 * it's cleared, then a memset( 107 * it's cleared, then a memset(...,0,...) should be added to
108 * the console_init 108 * the console_init
109 */ 109 */
110 #if defined(CONFIG_PPC_MERGE) 110 #if defined(CONFIG_PPC_MERGE)
111 /* lookup table for matching device nodes to i 111 /* lookup table for matching device nodes to index numbers */
112 static struct device_node *mpc52xx_uart_nodes[ 112 static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
113 113
114 static void mpc52xx_uart_of_enumerate(void); 114 static void mpc52xx_uart_of_enumerate(void);
115 #endif 115 #endif
116 116
117 117
118 #define PSC(port) ((struct mpc52xx_psc __iomem 118 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
119 119
120 120
121 /* Forward declaration of the interruption han 121 /* Forward declaration of the interruption handling routine */
122 static irqreturn_t mpc52xx_uart_int(int irq, v 122 static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
123 123
124 124
125 /* Simple macro to test if a port is console o 125 /* Simple macro to test if a port is console or not. This one is taken
126 * for serial_core.c and maybe should be moved 126 * for serial_core.c and maybe should be moved to serial_core.h ? */
127 #ifdef CONFIG_SERIAL_CORE_CONSOLE 127 #ifdef CONFIG_SERIAL_CORE_CONSOLE
128 #define uart_console(port) \ 128 #define uart_console(port) \
129 ((port)->cons && (port)->cons->index = 129 ((port)->cons && (port)->cons->index == (port)->line)
130 #else 130 #else
131 #define uart_console(port) (0) 131 #define uart_console(port) (0)
132 #endif 132 #endif
133 133
134 /* =========================================== 134 /* ======================================================================== */
135 /* PSC fifo operations for isolating differenc 135 /* PSC fifo operations for isolating differences between 52xx and 512x */
136 /* =========================================== 136 /* ======================================================================== */
137 137
138 struct psc_ops { 138 struct psc_ops {
139 void (*fifo_init)(struct ua 139 void (*fifo_init)(struct uart_port *port);
140 int (*raw_rx_rdy)(struct u 140 int (*raw_rx_rdy)(struct uart_port *port);
141 int (*raw_tx_rdy)(struct u 141 int (*raw_tx_rdy)(struct uart_port *port);
142 int (*rx_rdy)(struct uart_ 142 int (*rx_rdy)(struct uart_port *port);
143 int (*tx_rdy)(struct uart_ 143 int (*tx_rdy)(struct uart_port *port);
144 int (*tx_empty)(struct uar 144 int (*tx_empty)(struct uart_port *port);
145 void (*stop_rx)(struct uart 145 void (*stop_rx)(struct uart_port *port);
146 void (*start_tx)(struct uar 146 void (*start_tx)(struct uart_port *port);
147 void (*stop_tx)(struct uart 147 void (*stop_tx)(struct uart_port *port);
148 void (*rx_clr_irq)(struct u 148 void (*rx_clr_irq)(struct uart_port *port);
149 void (*tx_clr_irq)(struct u 149 void (*tx_clr_irq)(struct uart_port *port);
150 void (*write_char)(struct u 150 void (*write_char)(struct uart_port *port, unsigned char c);
151 unsigned char (*read_char)(struct ua 151 unsigned char (*read_char)(struct uart_port *port);
152 void (*cw_disable_ints)(str 152 void (*cw_disable_ints)(struct uart_port *port);
153 void (*cw_restore_ints)(str 153 void (*cw_restore_ints)(struct uart_port *port);
154 unsigned long (*getuartclk)(void *p) 154 unsigned long (*getuartclk)(void *p);
155 }; 155 };
156 156
157 #ifdef CONFIG_PPC_MPC52xx 157 #ifdef CONFIG_PPC_MPC52xx
158 #define FIFO_52xx(port) ((struct mpc52xx_psc_f 158 #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
159 static void mpc52xx_psc_fifo_init(struct uart_ 159 static void mpc52xx_psc_fifo_init(struct uart_port *port)
160 { 160 {
161 struct mpc52xx_psc __iomem *psc = PSC( 161 struct mpc52xx_psc __iomem *psc = PSC(port);
162 struct mpc52xx_psc_fifo __iomem *fifo 162 struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
163 163
164 /* /32 prescaler */ 164 /* /32 prescaler */
165 out_be16(&psc->mpc52xx_psc_clock_selec 165 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
166 166
167 out_8(&fifo->rfcntl, 0x00); 167 out_8(&fifo->rfcntl, 0x00);
168 out_be16(&fifo->rfalarm, 0x1ff); 168 out_be16(&fifo->rfalarm, 0x1ff);
169 out_8(&fifo->tfcntl, 0x07); 169 out_8(&fifo->tfcntl, 0x07);
170 out_be16(&fifo->tfalarm, 0x80); 170 out_be16(&fifo->tfalarm, 0x80);
171 171
172 port->read_status_mask |= MPC52xx_PSC_ 172 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
173 out_be16(&psc->mpc52xx_psc_imr, port-> 173 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
174 } 174 }
175 175
176 static int mpc52xx_psc_raw_rx_rdy(struct uart_ 176 static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
177 { 177 {
178 return in_be16(&PSC(port)->mpc52xx_psc 178 return in_be16(&PSC(port)->mpc52xx_psc_status)
179 & MPC52xx_PSC_SR_RXRDY; 179 & MPC52xx_PSC_SR_RXRDY;
180 } 180 }
181 181
182 static int mpc52xx_psc_raw_tx_rdy(struct uart_ 182 static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
183 { 183 {
184 return in_be16(&PSC(port)->mpc52xx_psc 184 return in_be16(&PSC(port)->mpc52xx_psc_status)
185 & MPC52xx_PSC_SR_TXRDY; 185 & MPC52xx_PSC_SR_TXRDY;
186 } 186 }
187 187
188 188
189 static int mpc52xx_psc_rx_rdy(struct uart_port 189 static int mpc52xx_psc_rx_rdy(struct uart_port *port)
190 { 190 {
191 return in_be16(&PSC(port)->mpc52xx_psc 191 return in_be16(&PSC(port)->mpc52xx_psc_isr)
192 & port->read_status_mask 192 & port->read_status_mask
193 & MPC52xx_PSC_IMR_RXRDY; 193 & MPC52xx_PSC_IMR_RXRDY;
194 } 194 }
195 195
196 static int mpc52xx_psc_tx_rdy(struct uart_port 196 static int mpc52xx_psc_tx_rdy(struct uart_port *port)
197 { 197 {
198 return in_be16(&PSC(port)->mpc52xx_psc 198 return in_be16(&PSC(port)->mpc52xx_psc_isr)
199 & port->read_status_mask 199 & port->read_status_mask
200 & MPC52xx_PSC_IMR_TXRDY; 200 & MPC52xx_PSC_IMR_TXRDY;
201 } 201 }
202 202
203 static int mpc52xx_psc_tx_empty(struct uart_po 203 static int mpc52xx_psc_tx_empty(struct uart_port *port)
204 { 204 {
205 return in_be16(&PSC(port)->mpc52xx_psc 205 return in_be16(&PSC(port)->mpc52xx_psc_status)
206 & MPC52xx_PSC_SR_TXEMP; 206 & MPC52xx_PSC_SR_TXEMP;
207 } 207 }
208 208
209 static void mpc52xx_psc_start_tx(struct uart_p 209 static void mpc52xx_psc_start_tx(struct uart_port *port)
210 { 210 {
211 port->read_status_mask |= MPC52xx_PSC_ 211 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
212 out_be16(&PSC(port)->mpc52xx_psc_imr, 212 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
213 } 213 }
214 214
215 static void mpc52xx_psc_stop_tx(struct uart_po 215 static void mpc52xx_psc_stop_tx(struct uart_port *port)
216 { 216 {
217 port->read_status_mask &= ~MPC52xx_PSC 217 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
218 out_be16(&PSC(port)->mpc52xx_psc_imr, 218 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
219 } 219 }
220 220
221 static void mpc52xx_psc_stop_rx(struct uart_po 221 static void mpc52xx_psc_stop_rx(struct uart_port *port)
222 { 222 {
223 port->read_status_mask &= ~MPC52xx_PSC 223 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
224 out_be16(&PSC(port)->mpc52xx_psc_imr, 224 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
225 } 225 }
226 226
227 static void mpc52xx_psc_rx_clr_irq(struct uart 227 static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
228 { 228 {
229 } 229 }
230 230
231 static void mpc52xx_psc_tx_clr_irq(struct uart 231 static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
232 { 232 {
233 } 233 }
234 234
235 static void mpc52xx_psc_write_char(struct uart 235 static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
236 { 236 {
237 out_8(&PSC(port)->mpc52xx_psc_buffer_8 237 out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
238 } 238 }
239 239
240 static unsigned char mpc52xx_psc_read_char(str 240 static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
241 { 241 {
242 return in_8(&PSC(port)->mpc52xx_psc_bu 242 return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
243 } 243 }
244 244
245 static void mpc52xx_psc_cw_disable_ints(struct 245 static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
246 { 246 {
247 out_be16(&PSC(port)->mpc52xx_psc_imr, 247 out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
248 } 248 }
249 249
250 static void mpc52xx_psc_cw_restore_ints(struct 250 static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
251 { 251 {
252 out_be16(&PSC(port)->mpc52xx_psc_imr, 252 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
253 } 253 }
254 254
255 /* Search for bus-frequency property in this n 255 /* Search for bus-frequency property in this node or a parent */
256 static unsigned long mpc52xx_getuartclk(void * 256 static unsigned long mpc52xx_getuartclk(void *p)
257 { 257 {
258 #if defined(CONFIG_PPC_MERGE) 258 #if defined(CONFIG_PPC_MERGE)
259 /* 259 /*
260 * 5200 UARTs have a / 32 prescaler 260 * 5200 UARTs have a / 32 prescaler
261 * but the generic serial code assumes 261 * but the generic serial code assumes 16
262 * so return ipb freq / 2 262 * so return ipb freq / 2
263 */ 263 */
264 return mpc52xx_find_ipb_freq(p) / 2; 264 return mpc52xx_find_ipb_freq(p) / 2;
265 #else 265 #else
266 pr_debug("unexpected call to mpc52xx_g 266 pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
267 return NULL; 267 return NULL;
268 #endif 268 #endif
269 } 269 }
270 270
271 static struct psc_ops mpc52xx_psc_ops = { 271 static struct psc_ops mpc52xx_psc_ops = {
272 .fifo_init = mpc52xx_psc_fifo_init, 272 .fifo_init = mpc52xx_psc_fifo_init,
273 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, 273 .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
274 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, 274 .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
275 .rx_rdy = mpc52xx_psc_rx_rdy, 275 .rx_rdy = mpc52xx_psc_rx_rdy,
276 .tx_rdy = mpc52xx_psc_tx_rdy, 276 .tx_rdy = mpc52xx_psc_tx_rdy,
277 .tx_empty = mpc52xx_psc_tx_empty, 277 .tx_empty = mpc52xx_psc_tx_empty,
278 .stop_rx = mpc52xx_psc_stop_rx, 278 .stop_rx = mpc52xx_psc_stop_rx,
279 .start_tx = mpc52xx_psc_start_tx, 279 .start_tx = mpc52xx_psc_start_tx,
280 .stop_tx = mpc52xx_psc_stop_tx, 280 .stop_tx = mpc52xx_psc_stop_tx,
281 .rx_clr_irq = mpc52xx_psc_rx_clr_irq, 281 .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
282 .tx_clr_irq = mpc52xx_psc_tx_clr_irq, 282 .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
283 .write_char = mpc52xx_psc_write_char, 283 .write_char = mpc52xx_psc_write_char,
284 .read_char = mpc52xx_psc_read_char, 284 .read_char = mpc52xx_psc_read_char,
285 .cw_disable_ints = mpc52xx_psc_cw_disa 285 .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
286 .cw_restore_ints = mpc52xx_psc_cw_rest 286 .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
287 .getuartclk = mpc52xx_getuartclk, 287 .getuartclk = mpc52xx_getuartclk,
288 }; 288 };
289 289
290 #endif /* CONFIG_MPC52xx */ 290 #endif /* CONFIG_MPC52xx */
291 291
292 #ifdef CONFIG_PPC_MPC512x 292 #ifdef CONFIG_PPC_MPC512x
293 #define FIFO_512x(port) ((struct mpc512x_psc_f 293 #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
294 static void mpc512x_psc_fifo_init(struct uart_ 294 static void mpc512x_psc_fifo_init(struct uart_port *port)
295 { 295 {
296 out_be32(&FIFO_512x(port)->txcmd, MPC5 296 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
297 out_be32(&FIFO_512x(port)->txcmd, MPC5 297 out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
298 out_be32(&FIFO_512x(port)->txalarm, 1) 298 out_be32(&FIFO_512x(port)->txalarm, 1);
299 out_be32(&FIFO_512x(port)->tximr, 0); 299 out_be32(&FIFO_512x(port)->tximr, 0);
300 300
301 out_be32(&FIFO_512x(port)->rxcmd, MPC5 301 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
302 out_be32(&FIFO_512x(port)->rxcmd, MPC5 302 out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
303 out_be32(&FIFO_512x(port)->rxalarm, 1) 303 out_be32(&FIFO_512x(port)->rxalarm, 1);
304 out_be32(&FIFO_512x(port)->rximr, 0); 304 out_be32(&FIFO_512x(port)->rximr, 0);
305 305
306 out_be32(&FIFO_512x(port)->tximr, MPC5 306 out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
307 out_be32(&FIFO_512x(port)->rximr, MPC5 307 out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
308 } 308 }
309 309
310 static int mpc512x_psc_raw_rx_rdy(struct uart_ 310 static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
311 { 311 {
312 return !(in_be32(&FIFO_512x(port)->rxs 312 return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
313 } 313 }
314 314
315 static int mpc512x_psc_raw_tx_rdy(struct uart_ 315 static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
316 { 316 {
317 return !(in_be32(&FIFO_512x(port)->txs 317 return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
318 } 318 }
319 319
320 static int mpc512x_psc_rx_rdy(struct uart_port 320 static int mpc512x_psc_rx_rdy(struct uart_port *port)
321 { 321 {
322 return in_be32(&FIFO_512x(port)->rxsr) 322 return in_be32(&FIFO_512x(port)->rxsr)
323 & in_be32(&FIFO_512x(port)->rximr) 323 & in_be32(&FIFO_512x(port)->rximr)
324 & MPC512x_PSC_FIFO_ALARM; 324 & MPC512x_PSC_FIFO_ALARM;
325 } 325 }
326 326
327 static int mpc512x_psc_tx_rdy(struct uart_port 327 static int mpc512x_psc_tx_rdy(struct uart_port *port)
328 { 328 {
329 return in_be32(&FIFO_512x(port)->txsr) 329 return in_be32(&FIFO_512x(port)->txsr)
330 & in_be32(&FIFO_512x(port)->tximr) 330 & in_be32(&FIFO_512x(port)->tximr)
331 & MPC512x_PSC_FIFO_ALARM; 331 & MPC512x_PSC_FIFO_ALARM;
332 } 332 }
333 333
334 static int mpc512x_psc_tx_empty(struct uart_po 334 static int mpc512x_psc_tx_empty(struct uart_port *port)
335 { 335 {
336 return in_be32(&FIFO_512x(port)->txsr) 336 return in_be32(&FIFO_512x(port)->txsr)
337 & MPC512x_PSC_FIFO_EMPTY; 337 & MPC512x_PSC_FIFO_EMPTY;
338 } 338 }
339 339
340 static void mpc512x_psc_stop_rx(struct uart_po 340 static void mpc512x_psc_stop_rx(struct uart_port *port)
341 { 341 {
342 unsigned long rx_fifo_imr; 342 unsigned long rx_fifo_imr;
343 343
344 rx_fifo_imr = in_be32(&FIFO_512x(port) 344 rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
345 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM 345 rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
346 out_be32(&FIFO_512x(port)->rximr, rx_f 346 out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
347 } 347 }
348 348
349 static void mpc512x_psc_start_tx(struct uart_p 349 static void mpc512x_psc_start_tx(struct uart_port *port)
350 { 350 {
351 unsigned long tx_fifo_imr; 351 unsigned long tx_fifo_imr;
352 352
353 tx_fifo_imr = in_be32(&FIFO_512x(port) 353 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
354 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM; 354 tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
355 out_be32(&FIFO_512x(port)->tximr, tx_f 355 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
356 } 356 }
357 357
358 static void mpc512x_psc_stop_tx(struct uart_po 358 static void mpc512x_psc_stop_tx(struct uart_port *port)
359 { 359 {
360 unsigned long tx_fifo_imr; 360 unsigned long tx_fifo_imr;
361 361
362 tx_fifo_imr = in_be32(&FIFO_512x(port) 362 tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
363 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM 363 tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
364 out_be32(&FIFO_512x(port)->tximr, tx_f 364 out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
365 } 365 }
366 366
367 static void mpc512x_psc_rx_clr_irq(struct uart 367 static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
368 { 368 {
369 out_be32(&FIFO_512x(port)->rxisr, in_b 369 out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
370 } 370 }
371 371
372 static void mpc512x_psc_tx_clr_irq(struct uart 372 static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
373 { 373 {
374 out_be32(&FIFO_512x(port)->txisr, in_b 374 out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
375 } 375 }
376 376
377 static void mpc512x_psc_write_char(struct uart 377 static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
378 { 378 {
379 out_8(&FIFO_512x(port)->txdata_8, c); 379 out_8(&FIFO_512x(port)->txdata_8, c);
380 } 380 }
381 381
382 static unsigned char mpc512x_psc_read_char(str 382 static unsigned char mpc512x_psc_read_char(struct uart_port *port)
383 { 383 {
384 return in_8(&FIFO_512x(port)->rxdata_8 384 return in_8(&FIFO_512x(port)->rxdata_8);
385 } 385 }
386 386
387 static void mpc512x_psc_cw_disable_ints(struct 387 static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
388 { 388 {
389 port->read_status_mask = 389 port->read_status_mask =
390 in_be32(&FIFO_512x(port)->txim 390 in_be32(&FIFO_512x(port)->tximr) << 16 |
391 in_be32(&FIFO_512x(port)->rxim 391 in_be32(&FIFO_512x(port)->rximr);
392 out_be32(&FIFO_512x(port)->tximr, 0); 392 out_be32(&FIFO_512x(port)->tximr, 0);
393 out_be32(&FIFO_512x(port)->rximr, 0); 393 out_be32(&FIFO_512x(port)->rximr, 0);
394 } 394 }
395 395
396 static void mpc512x_psc_cw_restore_ints(struct 396 static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
397 { 397 {
398 out_be32(&FIFO_512x(port)->tximr, 398 out_be32(&FIFO_512x(port)->tximr,
399 (port->read_status_mask >> 16) 399 (port->read_status_mask >> 16) & 0x7f);
400 out_be32(&FIFO_512x(port)->rximr, port 400 out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
401 } 401 }
402 402
403 static unsigned long mpc512x_getuartclk(void * 403 static unsigned long mpc512x_getuartclk(void *p)
404 { 404 {
405 return mpc512x_find_ips_freq(p); 405 return mpc512x_find_ips_freq(p);
406 } 406 }
407 407
408 static struct psc_ops mpc512x_psc_ops = { 408 static struct psc_ops mpc512x_psc_ops = {
409 .fifo_init = mpc512x_psc_fifo_init, 409 .fifo_init = mpc512x_psc_fifo_init,
410 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, 410 .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
411 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy, 411 .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
412 .rx_rdy = mpc512x_psc_rx_rdy, 412 .rx_rdy = mpc512x_psc_rx_rdy,
413 .tx_rdy = mpc512x_psc_tx_rdy, 413 .tx_rdy = mpc512x_psc_tx_rdy,
414 .tx_empty = mpc512x_psc_tx_empty, 414 .tx_empty = mpc512x_psc_tx_empty,
415 .stop_rx = mpc512x_psc_stop_rx, 415 .stop_rx = mpc512x_psc_stop_rx,
416 .start_tx = mpc512x_psc_start_tx, 416 .start_tx = mpc512x_psc_start_tx,
417 .stop_tx = mpc512x_psc_stop_tx, 417 .stop_tx = mpc512x_psc_stop_tx,
418 .rx_clr_irq = mpc512x_psc_rx_clr_irq, 418 .rx_clr_irq = mpc512x_psc_rx_clr_irq,
419 .tx_clr_irq = mpc512x_psc_tx_clr_irq, 419 .tx_clr_irq = mpc512x_psc_tx_clr_irq,
420 .write_char = mpc512x_psc_write_char, 420 .write_char = mpc512x_psc_write_char,
421 .read_char = mpc512x_psc_read_char, 421 .read_char = mpc512x_psc_read_char,
422 .cw_disable_ints = mpc512x_psc_cw_disa 422 .cw_disable_ints = mpc512x_psc_cw_disable_ints,
423 .cw_restore_ints = mpc512x_psc_cw_rest 423 .cw_restore_ints = mpc512x_psc_cw_restore_ints,
424 .getuartclk = mpc512x_getuartclk, 424 .getuartclk = mpc512x_getuartclk,
425 }; 425 };
426 #endif 426 #endif
427 427
428 static struct psc_ops *psc_ops; 428 static struct psc_ops *psc_ops;
429 429
430 /* =========================================== 430 /* ======================================================================== */
431 /* UART operations 431 /* UART operations */
432 /* =========================================== 432 /* ======================================================================== */
433 433
434 static unsigned int 434 static unsigned int
435 mpc52xx_uart_tx_empty(struct uart_port *port) 435 mpc52xx_uart_tx_empty(struct uart_port *port)
436 { 436 {
437 return psc_ops->tx_empty(port) ? TIOCS 437 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
438 } 438 }
439 439
440 static void 440 static void
441 mpc52xx_uart_set_mctrl(struct uart_port *port, 441 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
442 { 442 {
443 /* Not implemented */ 443 /* Not implemented */
444 } 444 }
445 445
446 static unsigned int 446 static unsigned int
447 mpc52xx_uart_get_mctrl(struct uart_port *port) 447 mpc52xx_uart_get_mctrl(struct uart_port *port)
448 { 448 {
449 /* Not implemented */ 449 /* Not implemented */
450 return TIOCM_CTS | TIOCM_DSR | TIOCM_C 450 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
451 } 451 }
452 452
453 static void 453 static void
454 mpc52xx_uart_stop_tx(struct uart_port *port) 454 mpc52xx_uart_stop_tx(struct uart_port *port)
455 { 455 {
456 /* port->lock taken by caller */ 456 /* port->lock taken by caller */
457 psc_ops->stop_tx(port); 457 psc_ops->stop_tx(port);
458 } 458 }
459 459
460 static void 460 static void
461 mpc52xx_uart_start_tx(struct uart_port *port) 461 mpc52xx_uart_start_tx(struct uart_port *port)
462 { 462 {
463 /* port->lock taken by caller */ 463 /* port->lock taken by caller */
464 psc_ops->start_tx(port); 464 psc_ops->start_tx(port);
465 } 465 }
466 466
467 static void 467 static void
468 mpc52xx_uart_send_xchar(struct uart_port *port 468 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
469 { 469 {
470 unsigned long flags; 470 unsigned long flags;
471 spin_lock_irqsave(&port->lock, flags); 471 spin_lock_irqsave(&port->lock, flags);
472 472
473 port->x_char = ch; 473 port->x_char = ch;
474 if (ch) { 474 if (ch) {
475 /* Make sure tx interrupts are 475 /* Make sure tx interrupts are on */
476 /* Truly necessary ??? They sh 476 /* Truly necessary ??? They should be anyway */
477 psc_ops->start_tx(port); 477 psc_ops->start_tx(port);
478 } 478 }
479 479
480 spin_unlock_irqrestore(&port->lock, fl 480 spin_unlock_irqrestore(&port->lock, flags);
481 } 481 }
482 482
483 static void 483 static void
484 mpc52xx_uart_stop_rx(struct uart_port *port) 484 mpc52xx_uart_stop_rx(struct uart_port *port)
485 { 485 {
486 /* port->lock taken by caller */ 486 /* port->lock taken by caller */
487 psc_ops->stop_rx(port); 487 psc_ops->stop_rx(port);
488 } 488 }
489 489
490 static void 490 static void
491 mpc52xx_uart_enable_ms(struct uart_port *port) 491 mpc52xx_uart_enable_ms(struct uart_port *port)
492 { 492 {
493 /* Not implemented */ 493 /* Not implemented */
494 } 494 }
495 495
496 static void 496 static void
497 mpc52xx_uart_break_ctl(struct uart_port *port, 497 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
498 { 498 {
499 unsigned long flags; 499 unsigned long flags;
500 spin_lock_irqsave(&port->lock, flags); 500 spin_lock_irqsave(&port->lock, flags);
501 501
502 if (ctl == -1) 502 if (ctl == -1)
503 out_8(&PSC(port)->command, MPC 503 out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
504 else 504 else
505 out_8(&PSC(port)->command, MPC 505 out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
506 506
507 spin_unlock_irqrestore(&port->lock, fl 507 spin_unlock_irqrestore(&port->lock, flags);
508 } 508 }
509 509
510 static int 510 static int
511 mpc52xx_uart_startup(struct uart_port *port) 511 mpc52xx_uart_startup(struct uart_port *port)
512 { 512 {
513 struct mpc52xx_psc __iomem *psc = PSC( 513 struct mpc52xx_psc __iomem *psc = PSC(port);
514 int ret; 514 int ret;
515 515
516 /* Request IRQ */ 516 /* Request IRQ */
517 ret = request_irq(port->irq, mpc52xx_u 517 ret = request_irq(port->irq, mpc52xx_uart_int,
518 IRQF_DISABLED | IRQF_SAMPLE_RA 518 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
519 "mpc52xx_psc_uart", port); 519 "mpc52xx_psc_uart", port);
520 if (ret) 520 if (ret)
521 return ret; 521 return ret;
522 522
523 /* Reset/activate the port, clear and 523 /* Reset/activate the port, clear and enable interrupts */
524 out_8(&psc->command, MPC52xx_PSC_RST_R 524 out_8(&psc->command, MPC52xx_PSC_RST_RX);
525 out_8(&psc->command, MPC52xx_PSC_RST_T 525 out_8(&psc->command, MPC52xx_PSC_RST_TX);
526 526
527 out_be32(&psc->sicr, 0); /* UAR 527 out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
528 528
529 psc_ops->fifo_init(port); 529 psc_ops->fifo_init(port);
530 530
531 out_8(&psc->command, MPC52xx_PSC_TX_EN 531 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
532 out_8(&psc->command, MPC52xx_PSC_RX_EN 532 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
533 533
534 return 0; 534 return 0;
535 } 535 }
536 536
537 static void 537 static void
538 mpc52xx_uart_shutdown(struct uart_port *port) 538 mpc52xx_uart_shutdown(struct uart_port *port)
539 { 539 {
540 struct mpc52xx_psc __iomem *psc = PSC( 540 struct mpc52xx_psc __iomem *psc = PSC(port);
541 541
542 /* Shut down the port. Leave TX activ 542 /* Shut down the port. Leave TX active if on a console port */
543 out_8(&psc->command, MPC52xx_PSC_RST_R 543 out_8(&psc->command, MPC52xx_PSC_RST_RX);
544 if (!uart_console(port)) 544 if (!uart_console(port))
545 out_8(&psc->command, MPC52xx_P 545 out_8(&psc->command, MPC52xx_PSC_RST_TX);
546 546
547 port->read_status_mask = 0; 547 port->read_status_mask = 0;
548 out_be16(&psc->mpc52xx_psc_imr, port-> 548 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
549 549
550 /* Release interrupt */ 550 /* Release interrupt */
551 free_irq(port->irq, port); 551 free_irq(port->irq, port);
552 } 552 }
553 553
554 static void 554 static void
555 mpc52xx_uart_set_termios(struct uart_port *por 555 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
556 struct ktermios *old) 556 struct ktermios *old)
557 { 557 {
558 struct mpc52xx_psc __iomem *psc = PSC( 558 struct mpc52xx_psc __iomem *psc = PSC(port);
559 unsigned long flags; 559 unsigned long flags;
560 unsigned char mr1, mr2; 560 unsigned char mr1, mr2;
561 unsigned short ctr; 561 unsigned short ctr;
562 unsigned int j, baud, quot; 562 unsigned int j, baud, quot;
563 563
564 /* Prepare what we're gonna write */ 564 /* Prepare what we're gonna write */
565 mr1 = 0; 565 mr1 = 0;
566 566
567 switch (new->c_cflag & CSIZE) { 567 switch (new->c_cflag & CSIZE) {
568 case CS5: mr1 |= MPC52xx_PSC_MOD 568 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
569 break; 569 break;
570 case CS6: mr1 |= MPC52xx_PSC_MOD 570 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
571 break; 571 break;
572 case CS7: mr1 |= MPC52xx_PSC_MOD 572 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
573 break; 573 break;
574 case CS8: 574 case CS8:
575 default: mr1 |= MPC52xx_PSC_MOD 575 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
576 } 576 }
577 577
578 if (new->c_cflag & PARENB) { 578 if (new->c_cflag & PARENB) {
579 mr1 |= (new->c_cflag & PARODD) 579 mr1 |= (new->c_cflag & PARODD) ?
580 MPC52xx_PSC_MODE_PAROD 580 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
581 } else 581 } else
582 mr1 |= MPC52xx_PSC_MODE_PARNON 582 mr1 |= MPC52xx_PSC_MODE_PARNONE;
583 583
584 584
585 mr2 = 0; 585 mr2 = 0;
586 586
587 if (new->c_cflag & CSTOPB) 587 if (new->c_cflag & CSTOPB)
588 mr2 |= MPC52xx_PSC_MODE_TWO_ST 588 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
589 else 589 else
590 mr2 |= ((new->c_cflag & CSIZE) 590 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
591 MPC52xx_PSC_MODE_ONE_S 591 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
592 MPC52xx_PSC_MODE_ONE_S 592 MPC52xx_PSC_MODE_ONE_STOP;
593 593
594 594
595 baud = uart_get_baud_rate(port, new, o 595 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
596 quot = uart_get_divisor(port, baud); 596 quot = uart_get_divisor(port, baud);
597 ctr = quot & 0xffff; 597 ctr = quot & 0xffff;
598 598
599 /* Get the lock */ 599 /* Get the lock */
600 spin_lock_irqsave(&port->lock, flags); 600 spin_lock_irqsave(&port->lock, flags);
601 601
602 /* Update the per-port timeout */ 602 /* Update the per-port timeout */
603 uart_update_timeout(port, new->c_cflag 603 uart_update_timeout(port, new->c_cflag, baud);
604 604
605 /* Do our best to flush TX & RX, so we 605 /* Do our best to flush TX & RX, so we don't loose anything */
606 /* But we don't wait indefinitly ! */ 606 /* But we don't wait indefinitly ! */
607 j = 5000000; /* Maximum wait */ 607 j = 5000000; /* Maximum wait */
608 /* FIXME Can't receive chars since set 608 /* FIXME Can't receive chars since set_termios might be called at early
609 * boot for the console, all stuff is 609 * boot for the console, all stuff is not yet ready to receive at that
610 * time and that just makes the kernel 610 * time and that just makes the kernel oops */
611 /* while (j-- && mpc52xx_uart_int_rx_c 611 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
612 while (!mpc52xx_uart_tx_empty(port) && 612 while (!mpc52xx_uart_tx_empty(port) && --j)
613 udelay(1); 613 udelay(1);
614 614
615 if (!j) 615 if (!j)
616 printk(KERN_ERR "mpc52xx_uart. 616 printk(KERN_ERR "mpc52xx_uart.c: "
617 "Unable to flush RX & 617 "Unable to flush RX & TX fifos in-time in set_termios."
618 "Some chars may have b 618 "Some chars may have been lost.\n");
619 619
620 /* Reset the TX & RX */ 620 /* Reset the TX & RX */
621 out_8(&psc->command, MPC52xx_PSC_RST_R 621 out_8(&psc->command, MPC52xx_PSC_RST_RX);
622 out_8(&psc->command, MPC52xx_PSC_RST_T 622 out_8(&psc->command, MPC52xx_PSC_RST_TX);
623 623
624 /* Send new mode settings */ 624 /* Send new mode settings */
625 out_8(&psc->command, MPC52xx_PSC_SEL_M 625 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
626 out_8(&psc->mode, mr1); 626 out_8(&psc->mode, mr1);
627 out_8(&psc->mode, mr2); 627 out_8(&psc->mode, mr2);
628 out_8(&psc->ctur, ctr >> 8); 628 out_8(&psc->ctur, ctr >> 8);
629 out_8(&psc->ctlr, ctr & 0xff); 629 out_8(&psc->ctlr, ctr & 0xff);
630 630
631 /* Reenable TX & RX */ 631 /* Reenable TX & RX */
632 out_8(&psc->command, MPC52xx_PSC_TX_EN 632 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
633 out_8(&psc->command, MPC52xx_PSC_RX_EN 633 out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
634 634
635 /* We're all set, release the lock */ 635 /* We're all set, release the lock */
636 spin_unlock_irqrestore(&port->lock, fl 636 spin_unlock_irqrestore(&port->lock, flags);
637 } 637 }
638 638
639 static const char * 639 static const char *
640 mpc52xx_uart_type(struct uart_port *port) 640 mpc52xx_uart_type(struct uart_port *port)
641 { 641 {
642 return port->type == PORT_MPC52xx ? "M 642 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
643 } 643 }
644 644
645 static void 645 static void
646 mpc52xx_uart_release_port(struct uart_port *po 646 mpc52xx_uart_release_port(struct uart_port *port)
647 { 647 {
648 /* remapped by us ? */ 648 /* remapped by us ? */
649 if (port->flags & UPF_IOREMAP) { 649 if (port->flags & UPF_IOREMAP) {
650 iounmap(port->membase); 650 iounmap(port->membase);
651 port->membase = NULL; 651 port->membase = NULL;
652 } 652 }
653 653
654 release_mem_region(port->mapbase, size 654 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
655 } 655 }
656 656
657 static int 657 static int
658 mpc52xx_uart_request_port(struct uart_port *po 658 mpc52xx_uart_request_port(struct uart_port *port)
659 { 659 {
660 int err; 660 int err;
661 661
662 if (port->flags & UPF_IOREMAP) /* Need 662 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
663 port->membase = ioremap(port-> 663 port->membase = ioremap(port->mapbase,
664 sizeof 664 sizeof(struct mpc52xx_psc));
665 665
666 if (!port->membase) 666 if (!port->membase)
667 return -EINVAL; 667 return -EINVAL;
668 668
669 err = request_mem_region(port->mapbase 669 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
670 "mpc52xx_psc_uart") != 670 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
671 671
672 if (err && (port->flags & UPF_IOREMAP) 672 if (err && (port->flags & UPF_IOREMAP)) {
673 iounmap(port->membase); 673 iounmap(port->membase);
674 port->membase = NULL; 674 port->membase = NULL;
675 } 675 }
676 676
677 return err; 677 return err;
678 } 678 }
679 679
680 static void 680 static void
681 mpc52xx_uart_config_port(struct uart_port *por 681 mpc52xx_uart_config_port(struct uart_port *port, int flags)
682 { 682 {
683 if ((flags & UART_CONFIG_TYPE) 683 if ((flags & UART_CONFIG_TYPE)
684 && (mpc52xx_uart_request_port( 684 && (mpc52xx_uart_request_port(port) == 0))
685 port->type = PORT_MPC52xx; 685 port->type = PORT_MPC52xx;
686 } 686 }
687 687
688 static int 688 static int
689 mpc52xx_uart_verify_port(struct uart_port *por 689 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
690 { 690 {
691 if (ser->type != PORT_UNKNOWN && ser-> 691 if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
692 return -EINVAL; 692 return -EINVAL;
693 693
694 if ((ser->irq != port->irq) || 694 if ((ser->irq != port->irq) ||
695 (ser->io_type != SERIAL_IO_MEM) || 695 (ser->io_type != SERIAL_IO_MEM) ||
696 (ser->baud_base != port->uartclk) 696 (ser->baud_base != port->uartclk) ||
697 (ser->iomem_base != (void *)port-> 697 (ser->iomem_base != (void *)port->mapbase) ||
698 (ser->hub6 != 0)) 698 (ser->hub6 != 0))
699 return -EINVAL; 699 return -EINVAL;
700 700
701 return 0; 701 return 0;
702 } 702 }
703 703
704 704
705 static struct uart_ops mpc52xx_uart_ops = { 705 static struct uart_ops mpc52xx_uart_ops = {
706 .tx_empty = mpc52xx_uart_tx_empt 706 .tx_empty = mpc52xx_uart_tx_empty,
707 .set_mctrl = mpc52xx_uart_set_mct 707 .set_mctrl = mpc52xx_uart_set_mctrl,
708 .get_mctrl = mpc52xx_uart_get_mct 708 .get_mctrl = mpc52xx_uart_get_mctrl,
709 .stop_tx = mpc52xx_uart_stop_tx 709 .stop_tx = mpc52xx_uart_stop_tx,
710 .start_tx = mpc52xx_uart_start_t 710 .start_tx = mpc52xx_uart_start_tx,
711 .send_xchar = mpc52xx_uart_send_xc 711 .send_xchar = mpc52xx_uart_send_xchar,
712 .stop_rx = mpc52xx_uart_stop_rx 712 .stop_rx = mpc52xx_uart_stop_rx,
713 .enable_ms = mpc52xx_uart_enable_ 713 .enable_ms = mpc52xx_uart_enable_ms,
714 .break_ctl = mpc52xx_uart_break_c 714 .break_ctl = mpc52xx_uart_break_ctl,
715 .startup = mpc52xx_uart_startup 715 .startup = mpc52xx_uart_startup,
716 .shutdown = mpc52xx_uart_shutdow 716 .shutdown = mpc52xx_uart_shutdown,
717 .set_termios = mpc52xx_uart_set_ter 717 .set_termios = mpc52xx_uart_set_termios,
718 /* .pm = mpc52xx_uart_pm, 718 /* .pm = mpc52xx_uart_pm, Not supported yet */
719 /* .set_wake = mpc52xx_uart_set_wak 719 /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
720 .type = mpc52xx_uart_type, 720 .type = mpc52xx_uart_type,
721 .release_port = mpc52xx_uart_release 721 .release_port = mpc52xx_uart_release_port,
722 .request_port = mpc52xx_uart_request 722 .request_port = mpc52xx_uart_request_port,
723 .config_port = mpc52xx_uart_config_ 723 .config_port = mpc52xx_uart_config_port,
724 .verify_port = mpc52xx_uart_verify_ 724 .verify_port = mpc52xx_uart_verify_port
725 }; 725 };
726 726
727 727
728 /* =========================================== 728 /* ======================================================================== */
729 /* Interrupt handling 729 /* Interrupt handling */
730 /* =========================================== 730 /* ======================================================================== */
731 731
732 static inline int 732 static inline int
733 mpc52xx_uart_int_rx_chars(struct uart_port *po 733 mpc52xx_uart_int_rx_chars(struct uart_port *port)
734 { 734 {
735 struct tty_struct *tty = port->info->t 735 struct tty_struct *tty = port->info->tty;
736 unsigned char ch, flag; 736 unsigned char ch, flag;
737 unsigned short status; 737 unsigned short status;
738 738
739 /* While we can read, do so ! */ 739 /* While we can read, do so ! */
740 while (psc_ops->raw_rx_rdy(port)) { 740 while (psc_ops->raw_rx_rdy(port)) {
741 /* Get the char */ 741 /* Get the char */
742 ch = psc_ops->read_char(port); 742 ch = psc_ops->read_char(port);
743 743
744 /* Handle sysreq char */ 744 /* Handle sysreq char */
745 #ifdef SUPPORT_SYSRQ 745 #ifdef SUPPORT_SYSRQ
746 if (uart_handle_sysrq_char(por 746 if (uart_handle_sysrq_char(port, ch)) {
747 port->sysrq = 0; 747 port->sysrq = 0;
748 continue; 748 continue;
749 } 749 }
750 #endif 750 #endif
751 751
752 /* Store it */ 752 /* Store it */
753 753
754 flag = TTY_NORMAL; 754 flag = TTY_NORMAL;
755 port->icount.rx++; 755 port->icount.rx++;
756 756
757 status = in_be16(&PSC(port)->m 757 status = in_be16(&PSC(port)->mpc52xx_psc_status);
758 758
759 if (status & (MPC52xx_PSC_SR_P 759 if (status & (MPC52xx_PSC_SR_PE |
760 MPC52xx_PSC_SR_F 760 MPC52xx_PSC_SR_FE |
761 MPC52xx_PSC_SR_R 761 MPC52xx_PSC_SR_RB)) {
762 762
763 if (status & MPC52xx_P 763 if (status & MPC52xx_PSC_SR_RB) {
764 flag = TTY_BRE 764 flag = TTY_BREAK;
765 uart_handle_br 765 uart_handle_break(port);
766 } else if (status & MP 766 } else if (status & MPC52xx_PSC_SR_PE)
767 flag = TTY_PAR 767 flag = TTY_PARITY;
768 else if (status & MPC5 768 else if (status & MPC52xx_PSC_SR_FE)
769 flag = TTY_FRA 769 flag = TTY_FRAME;
770 770
771 /* Clear error conditi 771 /* Clear error condition */
772 out_8(&PSC(port)->comm 772 out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
773 773
774 } 774 }
775 tty_insert_flip_char(tty, ch, 775 tty_insert_flip_char(tty, ch, flag);
776 if (status & MPC52xx_PSC_SR_OE 776 if (status & MPC52xx_PSC_SR_OE) {
777 /* 777 /*
778 * Overrun is special, 778 * Overrun is special, since it's
779 * reported immediatel 779 * reported immediately, and doesn't
780 * affect the current 780 * affect the current character
781 */ 781 */
782 tty_insert_flip_char(t 782 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
783 } 783 }
784 } 784 }
785 785
>> 786 spin_unlock(&port->lock);
786 tty_flip_buffer_push(tty); 787 tty_flip_buffer_push(tty);
>> 788 spin_lock(&port->lock);
787 789
788 return psc_ops->raw_rx_rdy(port); 790 return psc_ops->raw_rx_rdy(port);
789 } 791 }
790 792
791 static inline int 793 static inline int
792 mpc52xx_uart_int_tx_chars(struct uart_port *po 794 mpc52xx_uart_int_tx_chars(struct uart_port *port)
793 { 795 {
794 struct circ_buf *xmit = &port->info->x 796 struct circ_buf *xmit = &port->info->xmit;
795 797
796 /* Process out of band chars */ 798 /* Process out of band chars */
797 if (port->x_char) { 799 if (port->x_char) {
798 psc_ops->write_char(port, port 800 psc_ops->write_char(port, port->x_char);
799 port->icount.tx++; 801 port->icount.tx++;
800 port->x_char = 0; 802 port->x_char = 0;
801 return 1; 803 return 1;
802 } 804 }
803 805
804 /* Nothing to do ? */ 806 /* Nothing to do ? */
805 if (uart_circ_empty(xmit) || uart_tx_s 807 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
806 mpc52xx_uart_stop_tx(port); 808 mpc52xx_uart_stop_tx(port);
807 return 0; 809 return 0;
808 } 810 }
809 811
810 /* Send chars */ 812 /* Send chars */
811 while (psc_ops->raw_tx_rdy(port)) { 813 while (psc_ops->raw_tx_rdy(port)) {
812 psc_ops->write_char(port, xmit 814 psc_ops->write_char(port, xmit->buf[xmit->tail]);
813 xmit->tail = (xmit->tail + 1) 815 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
814 port->icount.tx++; 816 port->icount.tx++;
815 if (uart_circ_empty(xmit)) 817 if (uart_circ_empty(xmit))
816 break; 818 break;
817 } 819 }
818 820
819 /* Wake up */ 821 /* Wake up */
820 if (uart_circ_chars_pending(xmit) < WA 822 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
821 uart_write_wakeup(port); 823 uart_write_wakeup(port);
822 824
823 /* Maybe we're done after all */ 825 /* Maybe we're done after all */
824 if (uart_circ_empty(xmit)) { 826 if (uart_circ_empty(xmit)) {
825 mpc52xx_uart_stop_tx(port); 827 mpc52xx_uart_stop_tx(port);
826 return 0; 828 return 0;
827 } 829 }
828 830
829 return 1; 831 return 1;
830 } 832 }
831 833
832 static irqreturn_t 834 static irqreturn_t
833 mpc52xx_uart_int(int irq, void *dev_id) 835 mpc52xx_uart_int(int irq, void *dev_id)
834 { 836 {
835 struct uart_port *port = dev_id; 837 struct uart_port *port = dev_id;
836 unsigned long pass = ISR_PASS_LIMIT; 838 unsigned long pass = ISR_PASS_LIMIT;
837 unsigned int keepgoing; 839 unsigned int keepgoing;
838 840
839 spin_lock(&port->lock); 841 spin_lock(&port->lock);
840 842
841 /* While we have stuff to do, we conti 843 /* While we have stuff to do, we continue */
842 do { 844 do {
843 /* If we don't find anything t 845 /* If we don't find anything to do, we stop */
844 keepgoing = 0; 846 keepgoing = 0;
845 847
846 psc_ops->rx_clr_irq(port); 848 psc_ops->rx_clr_irq(port);
847 if (psc_ops->rx_rdy(port)) 849 if (psc_ops->rx_rdy(port))
848 keepgoing |= mpc52xx_u 850 keepgoing |= mpc52xx_uart_int_rx_chars(port);
849 851
850 psc_ops->tx_clr_irq(port); 852 psc_ops->tx_clr_irq(port);
851 if (psc_ops->tx_rdy(port)) 853 if (psc_ops->tx_rdy(port))
852 keepgoing |= mpc52xx_u 854 keepgoing |= mpc52xx_uart_int_tx_chars(port);
853 855
854 /* Limit number of iteration * 856 /* Limit number of iteration */
855 if (!(--pass)) 857 if (!(--pass))
856 keepgoing = 0; 858 keepgoing = 0;
857 859
858 } while (keepgoing); 860 } while (keepgoing);
859 861
860 spin_unlock(&port->lock); 862 spin_unlock(&port->lock);
861 863
862 return IRQ_HANDLED; 864 return IRQ_HANDLED;
863 } 865 }
864 866
865 867
866 /* =========================================== 868 /* ======================================================================== */
867 /* Console ( if applicable ) 869 /* Console ( if applicable ) */
868 /* =========================================== 870 /* ======================================================================== */
869 871
870 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE 872 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
871 873
872 static void __init 874 static void __init
873 mpc52xx_console_get_options(struct uart_port * 875 mpc52xx_console_get_options(struct uart_port *port,
874 int *baud, int *pa 876 int *baud, int *parity, int *bits, int *flow)
875 { 877 {
876 struct mpc52xx_psc __iomem *psc = PSC( 878 struct mpc52xx_psc __iomem *psc = PSC(port);
877 unsigned char mr1; 879 unsigned char mr1;
878 880
879 pr_debug("mpc52xx_console_get_options( 881 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
880 882
881 /* Read the mode registers */ 883 /* Read the mode registers */
882 out_8(&psc->command, MPC52xx_PSC_SEL_M 884 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
883 mr1 = in_8(&psc->mode); 885 mr1 = in_8(&psc->mode);
884 886
885 /* CT{U,L}R are write-only ! */ 887 /* CT{U,L}R are write-only ! */
886 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_ 888 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
887 #if !defined(CONFIG_PPC_MERGE) 889 #if !defined(CONFIG_PPC_MERGE)
888 if (__res.bi_baudrate) 890 if (__res.bi_baudrate)
889 *baud = __res.bi_baudrate; 891 *baud = __res.bi_baudrate;
890 #endif 892 #endif
891 893
892 /* Parse them */ 894 /* Parse them */
893 switch (mr1 & MPC52xx_PSC_MODE_BITS_MA 895 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
894 case MPC52xx_PSC_MODE_5_BITS: 896 case MPC52xx_PSC_MODE_5_BITS:
895 *bits = 5; 897 *bits = 5;
896 break; 898 break;
897 case MPC52xx_PSC_MODE_6_BITS: 899 case MPC52xx_PSC_MODE_6_BITS:
898 *bits = 6; 900 *bits = 6;
899 break; 901 break;
900 case MPC52xx_PSC_MODE_7_BITS: 902 case MPC52xx_PSC_MODE_7_BITS:
901 *bits = 7; 903 *bits = 7;
902 break; 904 break;
903 case MPC52xx_PSC_MODE_8_BITS: 905 case MPC52xx_PSC_MODE_8_BITS:
904 default: 906 default:
905 *bits = 8; 907 *bits = 8;
906 } 908 }
907 909
908 if (mr1 & MPC52xx_PSC_MODE_PARNONE) 910 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
909 *parity = 'n'; 911 *parity = 'n';
910 else 912 else
911 *parity = mr1 & MPC52xx_PSC_MO 913 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
912 } 914 }
913 915
914 static void 916 static void
915 mpc52xx_console_write(struct console *co, cons 917 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
916 { 918 {
917 struct uart_port *port = &mpc52xx_uart 919 struct uart_port *port = &mpc52xx_uart_ports[co->index];
918 unsigned int i, j; 920 unsigned int i, j;
919 921
920 /* Disable interrupts */ 922 /* Disable interrupts */
921 psc_ops->cw_disable_ints(port); 923 psc_ops->cw_disable_ints(port);
922 924
923 /* Wait the TX buffer to be empty */ 925 /* Wait the TX buffer to be empty */
924 j = 5000000; /* Maximum wait */ 926 j = 5000000; /* Maximum wait */
925 while (!mpc52xx_uart_tx_empty(port) && 927 while (!mpc52xx_uart_tx_empty(port) && --j)
926 udelay(1); 928 udelay(1);
927 929
928 /* Write all the chars */ 930 /* Write all the chars */
929 for (i = 0; i < count; i++, s++) { 931 for (i = 0; i < count; i++, s++) {
930 /* Line return handling */ 932 /* Line return handling */
931 if (*s == '\n') 933 if (*s == '\n')
932 psc_ops->write_char(po 934 psc_ops->write_char(port, '\r');
933 935
934 /* Send the char */ 936 /* Send the char */
935 psc_ops->write_char(port, *s); 937 psc_ops->write_char(port, *s);
936 938
937 /* Wait the TX buffer to be em 939 /* Wait the TX buffer to be empty */
938 j = 20000; /* Maximum wai 940 j = 20000; /* Maximum wait */
939 while (!mpc52xx_uart_tx_empty( 941 while (!mpc52xx_uart_tx_empty(port) && --j)
940 udelay(1); 942 udelay(1);
941 } 943 }
942 944
943 /* Restore interrupt state */ 945 /* Restore interrupt state */
944 psc_ops->cw_restore_ints(port); 946 psc_ops->cw_restore_ints(port);
945 } 947 }
946 948
947 #if !defined(CONFIG_PPC_MERGE) 949 #if !defined(CONFIG_PPC_MERGE)
948 static int __init 950 static int __init
949 mpc52xx_console_setup(struct console *co, char 951 mpc52xx_console_setup(struct console *co, char *options)
950 { 952 {
951 struct uart_port *port = &mpc52xx_uart 953 struct uart_port *port = &mpc52xx_uart_ports[co->index];
952 954
953 int baud = CONFIG_SERIAL_MPC52xx_CONSO 955 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
954 int bits = 8; 956 int bits = 8;
955 int parity = 'n'; 957 int parity = 'n';
956 int flow = 'n'; 958 int flow = 'n';
957 959
958 if (co->index < 0 || co->index >= MPC5 960 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
959 return -EINVAL; 961 return -EINVAL;
960 962
961 /* Basic port init. Needed since we us 963 /* Basic port init. Needed since we use some uart_??? func before
962 * real init for early access */ 964 * real init for early access */
963 spin_lock_init(&port->lock); 965 spin_lock_init(&port->lock);
964 port->uartclk = __res.bi_ipbfreq / 2 966 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
965 port->ops = &mpc52xx_uart_ops; 967 port->ops = &mpc52xx_uart_ops;
966 port->mapbase = MPC52xx_PA(MPC52xx_P 968 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
967 969
968 /* We ioremap ourself */ 970 /* We ioremap ourself */
969 port->membase = ioremap(port->mapbase, 971 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
970 if (port->membase == NULL) 972 if (port->membase == NULL)
971 return -EINVAL; 973 return -EINVAL;
972 974
973 /* Setup the port parameters accoding 975 /* Setup the port parameters accoding to options */
974 if (options) 976 if (options)
975 uart_parse_options(options, &b 977 uart_parse_options(options, &baud, &parity, &bits, &flow);
976 else 978 else
977 mpc52xx_console_get_options(po 979 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
978 980
979 return uart_set_options(port, co, baud 981 return uart_set_options(port, co, baud, parity, bits, flow);
980 } 982 }
981 983
982 #else 984 #else
983 985
984 static int __init 986 static int __init
985 mpc52xx_console_setup(struct console *co, char 987 mpc52xx_console_setup(struct console *co, char *options)
986 { 988 {
987 struct uart_port *port = &mpc52xx_uart 989 struct uart_port *port = &mpc52xx_uart_ports[co->index];
988 struct device_node *np = mpc52xx_uart_ 990 struct device_node *np = mpc52xx_uart_nodes[co->index];
989 unsigned int uartclk; 991 unsigned int uartclk;
990 struct resource res; 992 struct resource res;
991 int ret; 993 int ret;
992 994
993 int baud = CONFIG_SERIAL_MPC52xx_CONSO 995 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
994 int bits = 8; 996 int bits = 8;
995 int parity = 'n'; 997 int parity = 'n';
996 int flow = 'n'; 998 int flow = 'n';
997 999
998 pr_debug("mpc52xx_console_setup co=%p, 1000 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
999 co, co->index, options); 1001 co, co->index, options);
1000 1002
1001 if ((co->index < 0) || (co->index > M 1003 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
1002 pr_debug("PSC%x out of range\ 1004 pr_debug("PSC%x out of range\n", co->index);
1003 return -EINVAL; 1005 return -EINVAL;
1004 } 1006 }
1005 1007
1006 if (!np) { 1008 if (!np) {
1007 pr_debug("PSC%x not found in 1009 pr_debug("PSC%x not found in device tree\n", co->index);
1008 return -EINVAL; 1010 return -EINVAL;
1009 } 1011 }
1010 1012
1011 pr_debug("Console on ttyPSC%x is %s\n 1013 pr_debug("Console on ttyPSC%x is %s\n",
1012 co->index, mpc52xx_uart_node 1014 co->index, mpc52xx_uart_nodes[co->index]->full_name);
1013 1015
1014 /* Fetch register locations */ 1016 /* Fetch register locations */
1015 ret = of_address_to_resource(np, 0, & 1017 ret = of_address_to_resource(np, 0, &res);
1016 if (ret) { 1018 if (ret) {
1017 pr_debug("Could not get resou 1019 pr_debug("Could not get resources for PSC%x\n", co->index);
1018 return ret; 1020 return ret;
1019 } 1021 }
1020 1022
1021 uartclk = psc_ops->getuartclk(np); 1023 uartclk = psc_ops->getuartclk(np);
1022 if (uartclk == 0) { 1024 if (uartclk == 0) {
1023 pr_debug("Could not find uart 1025 pr_debug("Could not find uart clock frequency!\n");
1024 return -EINVAL; 1026 return -EINVAL;
1025 } 1027 }
1026 1028
1027 /* Basic port init. Needed since we u 1029 /* Basic port init. Needed since we use some uart_??? func before
1028 * real init for early access */ 1030 * real init for early access */
1029 spin_lock_init(&port->lock); 1031 spin_lock_init(&port->lock);
1030 port->uartclk = uartclk; 1032 port->uartclk = uartclk;
1031 port->ops = &mpc52xx_uart_ops; 1033 port->ops = &mpc52xx_uart_ops;
1032 port->mapbase = res.start; 1034 port->mapbase = res.start;
1033 port->membase = ioremap(res.start, si 1035 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
1034 port->irq = irq_of_parse_and_map(np, 1036 port->irq = irq_of_parse_and_map(np, 0);
1035 1037
1036 if (port->membase == NULL) 1038 if (port->membase == NULL)
1037 return -EINVAL; 1039 return -EINVAL;
1038 1040
1039 pr_debug("mpc52xx-psc uart at %p, map 1041 pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
1040 (void *)port->mapbase, port- 1042 (void *)port->mapbase, port->membase,
1041 port->irq, port->uartclk); 1043 port->irq, port->uartclk);
1042 1044
1043 /* Setup the port parameters accoding 1045 /* Setup the port parameters accoding to options */
1044 if (options) 1046 if (options)
1045 uart_parse_options(options, & 1047 uart_parse_options(options, &baud, &parity, &bits, &flow);
1046 else 1048 else
1047 mpc52xx_console_get_options(p 1049 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
1048 1050
1049 pr_debug("Setting console parameters: 1051 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
1050 baud, bits, parity, flow); 1052 baud, bits, parity, flow);
1051 1053
1052 return uart_set_options(port, co, bau 1054 return uart_set_options(port, co, baud, parity, bits, flow);
1053 } 1055 }
1054 #endif /* defined(CONFIG_PPC_MERGE) */ 1056 #endif /* defined(CONFIG_PPC_MERGE) */
1055 1057
1056 1058
1057 static struct uart_driver mpc52xx_uart_driver 1059 static struct uart_driver mpc52xx_uart_driver;
1058 1060
1059 static struct console mpc52xx_console = { 1061 static struct console mpc52xx_console = {
1060 .name = "ttyPSC", 1062 .name = "ttyPSC",
1061 .write = mpc52xx_console_write, 1063 .write = mpc52xx_console_write,
1062 .device = uart_console_device, 1064 .device = uart_console_device,
1063 .setup = mpc52xx_console_setup, 1065 .setup = mpc52xx_console_setup,
1064 .flags = CON_PRINTBUFFER, 1066 .flags = CON_PRINTBUFFER,
1065 .index = -1, /* Specified on the c 1067 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
1066 .data = &mpc52xx_uart_driver, 1068 .data = &mpc52xx_uart_driver,
1067 }; 1069 };
1068 1070
1069 1071
1070 static int __init 1072 static int __init
1071 mpc52xx_console_init(void) 1073 mpc52xx_console_init(void)
1072 { 1074 {
1073 #if defined(CONFIG_PPC_MERGE) 1075 #if defined(CONFIG_PPC_MERGE)
1074 mpc52xx_uart_of_enumerate(); 1076 mpc52xx_uart_of_enumerate();
1075 #endif 1077 #endif
1076 register_console(&mpc52xx_console); 1078 register_console(&mpc52xx_console);
1077 return 0; 1079 return 0;
1078 } 1080 }
1079 1081
1080 console_initcall(mpc52xx_console_init); 1082 console_initcall(mpc52xx_console_init);
1081 1083
1082 #define MPC52xx_PSC_CONSOLE &mpc52xx_console 1084 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
1083 #else 1085 #else
1084 #define MPC52xx_PSC_CONSOLE NULL 1086 #define MPC52xx_PSC_CONSOLE NULL
1085 #endif 1087 #endif
1086 1088
1087 1089
1088 /* ========================================== 1090 /* ======================================================================== */
1089 /* UART Driver 1091 /* UART Driver */
1090 /* ========================================== 1092 /* ======================================================================== */
1091 1093
1092 static struct uart_driver mpc52xx_uart_driver 1094 static struct uart_driver mpc52xx_uart_driver = {
1093 .driver_name = "mpc52xx_psc_uart", 1095 .driver_name = "mpc52xx_psc_uart",
1094 .dev_name = "ttyPSC", 1096 .dev_name = "ttyPSC",
1095 .major = SERIAL_PSC_MAJOR, 1097 .major = SERIAL_PSC_MAJOR,
1096 .minor = SERIAL_PSC_MINOR, 1098 .minor = SERIAL_PSC_MINOR,
1097 .nr = MPC52xx_PSC_MAXNUM, 1099 .nr = MPC52xx_PSC_MAXNUM,
1098 .cons = MPC52xx_PSC_CONSOLE 1100 .cons = MPC52xx_PSC_CONSOLE,
1099 }; 1101 };
1100 1102
1101 1103
1102 #if !defined(CONFIG_PPC_MERGE) 1104 #if !defined(CONFIG_PPC_MERGE)
1103 /* ========================================== 1105 /* ======================================================================== */
1104 /* Platform Driver 1106 /* Platform Driver */
1105 /* ========================================== 1107 /* ======================================================================== */
1106 1108
1107 static int __devinit 1109 static int __devinit
1108 mpc52xx_uart_probe(struct platform_device *de 1110 mpc52xx_uart_probe(struct platform_device *dev)
1109 { 1111 {
1110 struct resource *res = dev->resource; 1112 struct resource *res = dev->resource;
1111 1113
1112 struct uart_port *port = NULL; 1114 struct uart_port *port = NULL;
1113 int i, idx, ret; 1115 int i, idx, ret;
1114 1116
1115 /* Check validity & presence */ 1117 /* Check validity & presence */
1116 idx = dev->id; 1118 idx = dev->id;
1117 if (idx < 0 || idx >= MPC52xx_PSC_MAX 1119 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
1118 return -EINVAL; 1120 return -EINVAL;
1119 1121
1120 if (!mpc52xx_match_psc_function(idx, 1122 if (!mpc52xx_match_psc_function(idx, "uart"))
1121 return -ENODEV; 1123 return -ENODEV;
1122 1124
1123 /* Init the port structure */ 1125 /* Init the port structure */
1124 port = &mpc52xx_uart_ports[idx]; 1126 port = &mpc52xx_uart_ports[idx];
1125 1127
1126 spin_lock_init(&port->lock); 1128 spin_lock_init(&port->lock);
1127 port->uartclk = __res.bi_ipbfreq / 1129 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
1128 port->fifosize = 512; 1130 port->fifosize = 512;
1129 port->iotype = UPIO_MEM; 1131 port->iotype = UPIO_MEM;
1130 port->flags = UPF_BOOT_AUTOCONF | 1132 port->flags = UPF_BOOT_AUTOCONF |
1131 (uart_console(port) 1133 (uart_console(port) ? 0 : UPF_IOREMAP);
1132 port->line = idx; 1134 port->line = idx;
1133 port->ops = &mpc52xx_uart_ops; 1135 port->ops = &mpc52xx_uart_ops;
1134 port->dev = &dev->dev; 1136 port->dev = &dev->dev;
1135 1137
1136 /* Search for IRQ and mapbase */ 1138 /* Search for IRQ and mapbase */
1137 for (i = 0 ; i < dev->num_resources ; 1139 for (i = 0 ; i < dev->num_resources ; i++, res++) {
1138 if (res->flags & IORESOURCE_M 1140 if (res->flags & IORESOURCE_MEM)
1139 port->mapbase = res-> 1141 port->mapbase = res->start;
1140 else if (res->flags & IORESOU 1142 else if (res->flags & IORESOURCE_IRQ)
1141 port->irq = res->star 1143 port->irq = res->start;
1142 } 1144 }
1143 if (!port->irq || !port->mapbase) 1145 if (!port->irq || !port->mapbase)
1144 return -EINVAL; 1146 return -EINVAL;
1145 1147
1146 /* Add the port to the uart sub-syste 1148 /* Add the port to the uart sub-system */
1147 ret = uart_add_one_port(&mpc52xx_uart 1149 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1148 if (!ret) 1150 if (!ret)
1149 platform_set_drvdata(dev, (vo 1151 platform_set_drvdata(dev, (void *)port);
1150 1152
1151 return ret; 1153 return ret;
1152 } 1154 }
1153 1155
1154 static int 1156 static int
1155 mpc52xx_uart_remove(struct platform_device *d 1157 mpc52xx_uart_remove(struct platform_device *dev)
1156 { 1158 {
1157 struct uart_port *port = (struct uart 1159 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1158 1160
1159 platform_set_drvdata(dev, NULL); 1161 platform_set_drvdata(dev, NULL);
1160 1162
1161 if (port) 1163 if (port)
1162 uart_remove_one_port(&mpc52xx 1164 uart_remove_one_port(&mpc52xx_uart_driver, port);
1163 1165
1164 return 0; 1166 return 0;
1165 } 1167 }
1166 1168
1167 #ifdef CONFIG_PM 1169 #ifdef CONFIG_PM
1168 static int 1170 static int
1169 mpc52xx_uart_suspend(struct platform_device * 1171 mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1170 { 1172 {
1171 struct uart_port *port = (struct uart 1173 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1172 1174
1173 if (port) 1175 if (port)
1174 uart_suspend_port(&mpc52xx_ua 1176 uart_suspend_port(&mpc52xx_uart_driver, port);
1175 1177
1176 return 0; 1178 return 0;
1177 } 1179 }
1178 1180
1179 static int 1181 static int
1180 mpc52xx_uart_resume(struct platform_device *d 1182 mpc52xx_uart_resume(struct platform_device *dev)
1181 { 1183 {
1182 struct uart_port *port = (struct uart 1184 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1183 1185
1184 if (port) 1186 if (port)
1185 uart_resume_port(&mpc52xx_uar 1187 uart_resume_port(&mpc52xx_uart_driver, port);
1186 1188
1187 return 0; 1189 return 0;
1188 } 1190 }
1189 #endif 1191 #endif
1190 1192
1191 /* work with hotplug and coldplug */ 1193 /* work with hotplug and coldplug */
1192 MODULE_ALIAS("platform:mpc52xx-psc"); 1194 MODULE_ALIAS("platform:mpc52xx-psc");
1193 1195
1194 static struct platform_driver mpc52xx_uart_pl 1196 static struct platform_driver mpc52xx_uart_platform_driver = {
1195 .probe = mpc52xx_uart_probe, 1197 .probe = mpc52xx_uart_probe,
1196 .remove = mpc52xx_uart_remove 1198 .remove = mpc52xx_uart_remove,
1197 #ifdef CONFIG_PM 1199 #ifdef CONFIG_PM
1198 .suspend = mpc52xx_uart_suspen 1200 .suspend = mpc52xx_uart_suspend,
1199 .resume = mpc52xx_uart_resume 1201 .resume = mpc52xx_uart_resume,
1200 #endif 1202 #endif
1201 .driver = { 1203 .driver = {
1202 .owner = THIS_MODULE, 1204 .owner = THIS_MODULE,
1203 .name = "mpc52xx-psc", 1205 .name = "mpc52xx-psc",
1204 }, 1206 },
1205 }; 1207 };
1206 #endif /* !defined(CONFIG_PPC_MERGE) */ 1208 #endif /* !defined(CONFIG_PPC_MERGE) */
1207 1209
1208 1210
1209 #if defined(CONFIG_PPC_MERGE) 1211 #if defined(CONFIG_PPC_MERGE)
1210 /* ========================================== 1212 /* ======================================================================== */
1211 /* OF Platform Driver 1213 /* OF Platform Driver */
1212 /* ========================================== 1214 /* ======================================================================== */
1213 1215
1214 static struct of_device_id mpc52xx_uart_of_ma 1216 static struct of_device_id mpc52xx_uart_of_match[] = {
1215 #ifdef CONFIG_PPC_MPC52xx 1217 #ifdef CONFIG_PPC_MPC52xx
1216 { .compatible = "fsl,mpc5200-psc-uart 1218 { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1217 /* binding used by old lite5200 devic 1219 /* binding used by old lite5200 device trees: */
1218 { .compatible = "mpc5200-psc-uart", . 1220 { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
1219 /* binding used by efika: */ 1221 /* binding used by efika: */
1220 { .compatible = "mpc5200-serial", .da 1222 { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
1221 #endif 1223 #endif
1222 #ifdef CONFIG_PPC_MPC512x 1224 #ifdef CONFIG_PPC_MPC512x
1223 { .compatible = "fsl,mpc5121-psc-uart 1225 { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
1224 {}, <<
1225 #endif 1226 #endif
>> 1227 {},
1226 }; 1228 };
1227 1229
1228 static int __devinit 1230 static int __devinit
1229 mpc52xx_uart_of_probe(struct of_device *op, c 1231 mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
1230 { 1232 {
1231 int idx = -1; 1233 int idx = -1;
1232 unsigned int uartclk; 1234 unsigned int uartclk;
1233 struct uart_port *port = NULL; 1235 struct uart_port *port = NULL;
1234 struct resource res; 1236 struct resource res;
1235 int ret; 1237 int ret;
1236 1238
1237 dev_dbg(&op->dev, "mpc52xx_uart_probe 1239 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
1238 1240
1239 /* Check validity & presence */ 1241 /* Check validity & presence */
1240 for (idx = 0; idx < MPC52xx_PSC_MAXNU 1242 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
1241 if (mpc52xx_uart_nodes[idx] = 1243 if (mpc52xx_uart_nodes[idx] == op->node)
1242 break; 1244 break;
1243 if (idx >= MPC52xx_PSC_MAXNUM) 1245 if (idx >= MPC52xx_PSC_MAXNUM)
1244 return -EINVAL; 1246 return -EINVAL;
1245 pr_debug("Found %s assigned to ttyPSC 1247 pr_debug("Found %s assigned to ttyPSC%x\n",
1246 mpc52xx_uart_nodes[idx]->ful 1248 mpc52xx_uart_nodes[idx]->full_name, idx);
1247 1249
1248 uartclk = psc_ops->getuartclk(op->nod 1250 uartclk = psc_ops->getuartclk(op->node);
1249 if (uartclk == 0) { 1251 if (uartclk == 0) {
1250 dev_dbg(&op->dev, "Could not 1252 dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
1251 return -EINVAL; 1253 return -EINVAL;
1252 } 1254 }
1253 1255
1254 /* Init the port structure */ 1256 /* Init the port structure */
1255 port = &mpc52xx_uart_ports[idx]; 1257 port = &mpc52xx_uart_ports[idx];
1256 1258
1257 spin_lock_init(&port->lock); 1259 spin_lock_init(&port->lock);
1258 port->uartclk = uartclk; 1260 port->uartclk = uartclk;
1259 port->fifosize = 512; 1261 port->fifosize = 512;
1260 port->iotype = UPIO_MEM; 1262 port->iotype = UPIO_MEM;
1261 port->flags = UPF_BOOT_AUTOCONF | 1263 port->flags = UPF_BOOT_AUTOCONF |
1262 (uart_console(port) 1264 (uart_console(port) ? 0 : UPF_IOREMAP);
1263 port->line = idx; 1265 port->line = idx;
1264 port->ops = &mpc52xx_uart_ops; 1266 port->ops = &mpc52xx_uart_ops;
1265 port->dev = &op->dev; 1267 port->dev = &op->dev;
1266 1268
1267 /* Search for IRQ and mapbase */ 1269 /* Search for IRQ and mapbase */
1268 ret = of_address_to_resource(op->node 1270 ret = of_address_to_resource(op->node, 0, &res);
1269 if (ret) 1271 if (ret)
1270 return ret; 1272 return ret;
1271 1273
1272 port->mapbase = res.start; 1274 port->mapbase = res.start;
1273 port->irq = irq_of_parse_and_map(op-> 1275 port->irq = irq_of_parse_and_map(op->node, 0);
1274 1276
1275 dev_dbg(&op->dev, "mpc52xx-psc uart a 1277 dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
1276 (void *)port->mapbase, port-> 1278 (void *)port->mapbase, port->irq, port->uartclk);
1277 1279
1278 if ((port->irq == NO_IRQ) || !port->m 1280 if ((port->irq == NO_IRQ) || !port->mapbase) {
1279 printk(KERN_ERR "Could not al 1281 printk(KERN_ERR "Could not allocate resources for PSC\n");
1280 return -EINVAL; 1282 return -EINVAL;
1281 } 1283 }
1282 1284
1283 /* Add the port to the uart sub-syste 1285 /* Add the port to the uart sub-system */
1284 ret = uart_add_one_port(&mpc52xx_uart 1286 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
1285 if (!ret) 1287 if (!ret)
1286 dev_set_drvdata(&op->dev, (vo 1288 dev_set_drvdata(&op->dev, (void *)port);
1287 1289
1288 return ret; 1290 return ret;
1289 } 1291 }
1290 1292
1291 static int 1293 static int
1292 mpc52xx_uart_of_remove(struct of_device *op) 1294 mpc52xx_uart_of_remove(struct of_device *op)
1293 { 1295 {
1294 struct uart_port *port = dev_get_drvd 1296 struct uart_port *port = dev_get_drvdata(&op->dev);
1295 dev_set_drvdata(&op->dev, NULL); 1297 dev_set_drvdata(&op->dev, NULL);
1296 1298
1297 if (port) { 1299 if (port) {
1298 uart_remove_one_port(&mpc52xx 1300 uart_remove_one_port(&mpc52xx_uart_driver, port);
1299 irq_dispose_mapping(port->irq 1301 irq_dispose_mapping(port->irq);
1300 } 1302 }
1301 1303
1302 return 0; 1304 return 0;
1303 } 1305 }
1304 1306
1305 #ifdef CONFIG_PM 1307 #ifdef CONFIG_PM
1306 static int 1308 static int
1307 mpc52xx_uart_of_suspend(struct of_device *op, 1309 mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1308 { 1310 {
1309 struct uart_port *port = (struct uart 1311 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1310 1312
1311 if (port) 1313 if (port)
1312 uart_suspend_port(&mpc52xx_ua 1314 uart_suspend_port(&mpc52xx_uart_driver, port);
1313 1315
1314 return 0; 1316 return 0;
1315 } 1317 }
1316 1318
1317 static int 1319 static int
1318 mpc52xx_uart_of_resume(struct of_device *op) 1320 mpc52xx_uart_of_resume(struct of_device *op)
1319 { 1321 {
1320 struct uart_port *port = (struct uart 1322 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1321 1323
1322 if (port) 1324 if (port)
1323 uart_resume_port(&mpc52xx_uar 1325 uart_resume_port(&mpc52xx_uart_driver, port);
1324 1326
1325 return 0; 1327 return 0;
1326 } 1328 }
1327 #endif 1329 #endif
1328 1330
1329 static void 1331 static void
1330 mpc52xx_uart_of_assign(struct device_node *np 1332 mpc52xx_uart_of_assign(struct device_node *np, int idx)
1331 { 1333 {
1332 int free_idx = -1; 1334 int free_idx = -1;
1333 int i; 1335 int i;
1334 1336
1335 /* Find the first free node */ 1337 /* Find the first free node */
1336 for (i = 0; i < MPC52xx_PSC_MAXNUM; i 1338 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1337 if (mpc52xx_uart_nodes[i] == 1339 if (mpc52xx_uart_nodes[i] == NULL) {
1338 free_idx = i; 1340 free_idx = i;
1339 break; 1341 break;
1340 } 1342 }
1341 } 1343 }
1342 1344
1343 if ((idx < 0) || (idx >= MPC52xx_PSC_ 1345 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1344 idx = free_idx; 1346 idx = free_idx;
1345 1347
1346 if (idx < 0) 1348 if (idx < 0)
1347 return; /* No free slot; abor 1349 return; /* No free slot; abort */
1348 1350
1349 of_node_get(np); 1351 of_node_get(np);
1350 /* If the slot is already occupied, t 1352 /* If the slot is already occupied, then swap slots */
1351 if (mpc52xx_uart_nodes[idx] && (free_ 1353 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1352 mpc52xx_uart_nodes[free_idx] 1354 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1353 mpc52xx_uart_nodes[idx] = np; 1355 mpc52xx_uart_nodes[idx] = np;
1354 } 1356 }
1355 1357
1356 static void 1358 static void
1357 mpc52xx_uart_of_enumerate(void) 1359 mpc52xx_uart_of_enumerate(void)
1358 { 1360 {
1359 static int enum_done; 1361 static int enum_done;
1360 struct device_node *np; 1362 struct device_node *np;
1361 const unsigned int *devno; 1363 const unsigned int *devno;
1362 const struct of_device_id *match; 1364 const struct of_device_id *match;
1363 int i; 1365 int i;
1364 1366
1365 if (enum_done) 1367 if (enum_done)
1366 return; 1368 return;
1367 1369
1368 for_each_node_by_type(np, "serial") { 1370 for_each_node_by_type(np, "serial") {
1369 match = of_match_node(mpc52xx 1371 match = of_match_node(mpc52xx_uart_of_match, np);
1370 if (!match) 1372 if (!match)
1371 continue; 1373 continue;
1372 1374
1373 psc_ops = match->data; 1375 psc_ops = match->data;
1374 1376
1375 /* Is a particular device num 1377 /* Is a particular device number requested? */
1376 devno = of_get_property(np, " 1378 devno = of_get_property(np, "port-number", NULL);
1377 mpc52xx_uart_of_assign(np, de 1379 mpc52xx_uart_of_assign(np, devno ? *devno : -1);
1378 } 1380 }
1379 1381
1380 enum_done = 1; 1382 enum_done = 1;
1381 1383
1382 for (i = 0; i < MPC52xx_PSC_MAXNUM; i 1384 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1383 if (mpc52xx_uart_nodes[i]) 1385 if (mpc52xx_uart_nodes[i])
1384 pr_debug("%s assigned 1386 pr_debug("%s assigned to ttyPSC%x\n",
1385 mpc52xx_uart 1387 mpc52xx_uart_nodes[i]->full_name, i);
1386 } 1388 }
1387 } 1389 }
1388 1390
1389 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match 1391 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1390 1392
1391 static struct of_platform_driver mpc52xx_uart 1393 static struct of_platform_driver mpc52xx_uart_of_driver = {
1392 .match_table = mpc52xx_uart_of_mat 1394 .match_table = mpc52xx_uart_of_match,
1393 .probe = mpc52xx_uart_of_pro 1395 .probe = mpc52xx_uart_of_probe,
1394 .remove = mpc52xx_uart_of_rem 1396 .remove = mpc52xx_uart_of_remove,
1395 #ifdef CONFIG_PM 1397 #ifdef CONFIG_PM
1396 .suspend = mpc52xx_uart_of_sus 1398 .suspend = mpc52xx_uart_of_suspend,
1397 .resume = mpc52xx_uart_of_res 1399 .resume = mpc52xx_uart_of_resume,
1398 #endif 1400 #endif
1399 .driver = { 1401 .driver = {
1400 .name = "mpc52xx-psc-uart", 1402 .name = "mpc52xx-psc-uart",
1401 }, 1403 },
1402 }; 1404 };
1403 #endif /* defined(CONFIG_PPC_MERGE) */ 1405 #endif /* defined(CONFIG_PPC_MERGE) */
1404 1406
1405 1407
1406 /* ========================================== 1408 /* ======================================================================== */
1407 /* Module 1409 /* Module */
1408 /* ========================================== 1410 /* ======================================================================== */
1409 1411
1410 static int __init 1412 static int __init
1411 mpc52xx_uart_init(void) 1413 mpc52xx_uart_init(void)
1412 { 1414 {
1413 int ret; 1415 int ret;
1414 1416
1415 printk(KERN_INFO "Serial: MPC52xx PSC 1417 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1416 1418
1417 ret = uart_register_driver(&mpc52xx_u 1419 ret = uart_register_driver(&mpc52xx_uart_driver);
1418 if (ret) { 1420 if (ret) {
1419 printk(KERN_ERR "%s: uart_reg 1421 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1420 __FILE__, ret); 1422 __FILE__, ret);
1421 return ret; 1423 return ret;
1422 } 1424 }
1423 1425
1424 #if defined(CONFIG_PPC_MERGE) 1426 #if defined(CONFIG_PPC_MERGE)
1425 mpc52xx_uart_of_enumerate(); 1427 mpc52xx_uart_of_enumerate();
1426 1428
1427 ret = of_register_platform_driver(&mp 1429 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1428 if (ret) { 1430 if (ret) {
1429 printk(KERN_ERR "%s: of_regis 1431 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1430 __FILE__, ret); 1432 __FILE__, ret);
1431 uart_unregister_driver(&mpc52 1433 uart_unregister_driver(&mpc52xx_uart_driver);
1432 return ret; 1434 return ret;
1433 } 1435 }
1434 #else 1436 #else
1435 psc_ops = &mpc52xx_psc_ops; 1437 psc_ops = &mpc52xx_psc_ops;
1436 ret = platform_driver_register(&mpc52 1438 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1437 if (ret) { 1439 if (ret) {
1438 printk(KERN_ERR "%s: platform 1440 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1439 __FILE__, ret); 1441 __FILE__, ret);
1440 uart_unregister_driver(&mpc52 1442 uart_unregister_driver(&mpc52xx_uart_driver);
1441 return ret; 1443 return ret;
1442 } 1444 }
1443 #endif 1445 #endif
1444 1446
1445 return 0; 1447 return 0;
1446 } 1448 }
1447 1449
1448 static void __exit 1450 static void __exit
1449 mpc52xx_uart_exit(void) 1451 mpc52xx_uart_exit(void)
1450 { 1452 {
1451 #if defined(CONFIG_PPC_MERGE) 1453 #if defined(CONFIG_PPC_MERGE)
1452 of_unregister_platform_driver(&mpc52x 1454 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1453 #else 1455 #else
1454 platform_driver_unregister(&mpc52xx_u 1456 platform_driver_unregister(&mpc52xx_uart_platform_driver);
1455 #endif 1457 #endif
1456 uart_unregister_driver(&mpc52xx_uart_ 1458 uart_unregister_driver(&mpc52xx_uart_driver);
1457 } 1459 }
1458 1460
1459 1461
1460 module_init(mpc52xx_uart_init); 1462 module_init(mpc52xx_uart_init);
1461 module_exit(mpc52xx_uart_exit); 1463 module_exit(mpc52xx_uart_exit);
1462 1464
1463 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com 1465 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1464 MODULE_DESCRIPTION("Freescale MPC52xx PSC UAR 1466 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1465 MODULE_LICENSE("GPL"); 1467 MODULE_LICENSE("GPL");
1466 1468
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