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1 /* sun_esp.c: ESP front-end for Sparc SBUS sys 1 /* sun_esp.c: ESP front-end for Sparc SBUS systems.
2 * 2 *
3 * Copyright (C) 2007, 2008 David S. Miller (d !! 3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6 #include <linux/kernel.h> 6 #include <linux/kernel.h>
7 #include <linux/types.h> 7 #include <linux/types.h>
8 #include <linux/delay.h> 8 #include <linux/delay.h>
9 #include <linux/module.h> 9 #include <linux/module.h>
10 #include <linux/mm.h> <<
11 #include <linux/init.h> 10 #include <linux/init.h>
12 #include <linux/dma-mapping.h> <<
13 #include <linux/of.h> <<
14 #include <linux/of_device.h> <<
15 11
16 #include <asm/irq.h> 12 #include <asm/irq.h>
17 #include <asm/io.h> 13 #include <asm/io.h>
18 #include <asm/dma.h> 14 #include <asm/dma.h>
19 15
>> 16 #include <asm/sbus.h>
>> 17
20 #include <scsi/scsi_host.h> 18 #include <scsi/scsi_host.h>
21 19
22 #include "esp_scsi.h" 20 #include "esp_scsi.h"
23 21
24 #define DRV_MODULE_NAME "sun_esp" 22 #define DRV_MODULE_NAME "sun_esp"
25 #define PFX DRV_MODULE_NAME ": " 23 #define PFX DRV_MODULE_NAME ": "
26 #define DRV_VERSION "1.100" !! 24 #define DRV_VERSION "1.000"
27 #define DRV_MODULE_RELDATE "August 27, 20 !! 25 #define DRV_MODULE_RELDATE "April 19, 2007"
28 26
29 #define dma_read32(REG) \ 27 #define dma_read32(REG) \
30 sbus_readl(esp->dma_regs + (REG)) 28 sbus_readl(esp->dma_regs + (REG))
31 #define dma_write32(VAL, REG) \ 29 #define dma_write32(VAL, REG) \
32 sbus_writel((VAL), esp->dma_regs + (RE 30 sbus_writel((VAL), esp->dma_regs + (REG))
33 31
34 /* DVMA chip revisions */ !! 32 static int __devinit esp_sbus_find_dma(struct esp *esp, struct sbus_dev *dma_sdev)
35 enum dvma_rev { <<
36 dvmarev0, <<
37 dvmaesc1, <<
38 dvmarev1, <<
39 dvmarev2, <<
40 dvmarev3, <<
41 dvmarevplus, <<
42 dvmahme <<
43 }; <<
44 <<
45 static int __devinit esp_sbus_setup_dma(struct <<
46 struct <<
47 { 33 {
48 esp->dma = dma_of; !! 34 struct sbus_dev *sdev = esp->dev;
>> 35 struct sbus_dma *dma;
49 36
50 esp->dma_regs = of_ioremap(&dma_of->re !! 37 if (dma_sdev != NULL) {
51 resource_si !! 38 for_each_dvma(dma) {
52 "espdma"); !! 39 if (dma->sdev == dma_sdev)
53 if (!esp->dma_regs) !! 40 break;
54 return -ENOMEM; !! 41 }
>> 42 } else {
>> 43 for_each_dvma(dma) {
>> 44 if (dma->sdev == NULL)
>> 45 break;
55 46
56 switch (dma_read32(DMA_CSR) & DMA_DEVI !! 47 /* If bus + slot are the same and it has the
57 case DMA_VERS0: !! 48 * correct OBP name, it's ours.
58 esp->dmarev = dvmarev0; !! 49 */
59 break; !! 50 if (sdev->bus == dma->sdev->bus &&
60 case DMA_ESCV1: !! 51 sdev->slot == dma->sdev->slot &&
61 esp->dmarev = dvmaesc1; !! 52 (!strcmp(dma->sdev->prom_name, "dma") ||
62 break; !! 53 !strcmp(dma->sdev->prom_name, "espdma")))
63 case DMA_VERS1: !! 54 break;
64 esp->dmarev = dvmarev1; !! 55 }
65 break; <<
66 case DMA_VERS2: <<
67 esp->dmarev = dvmarev2; <<
68 break; <<
69 case DMA_VERHME: <<
70 esp->dmarev = dvmahme; <<
71 break; <<
72 case DMA_VERSPLUS: <<
73 esp->dmarev = dvmarevplus; <<
74 break; <<
75 } 56 }
76 57
>> 58 if (dma == NULL) {
>> 59 printk(KERN_ERR PFX "[%s] Cannot find dma.\n",
>> 60 sdev->ofdev.node->full_name);
>> 61 return -ENODEV;
>> 62 }
>> 63 esp->dma = dma;
>> 64 esp->dma_regs = dma->regs;
>> 65
77 return 0; 66 return 0;
78 67
79 } 68 }
80 69
81 static int __devinit esp_sbus_map_regs(struct 70 static int __devinit esp_sbus_map_regs(struct esp *esp, int hme)
82 { 71 {
83 struct of_device *op = esp->dev; !! 72 struct sbus_dev *sdev = esp->dev;
84 struct resource *res; 73 struct resource *res;
85 74
86 /* On HME, two reg sets exist, first i 75 /* On HME, two reg sets exist, first is DVMA,
87 * second is ESP registers. 76 * second is ESP registers.
88 */ 77 */
89 if (hme) 78 if (hme)
90 res = &op->resource[1]; !! 79 res = &sdev->resource[1];
91 else 80 else
92 res = &op->resource[0]; !! 81 res = &sdev->resource[0];
93 82
94 esp->regs = of_ioremap(res, 0, SBUS_ES !! 83 esp->regs = sbus_ioremap(res, 0, SBUS_ESP_REG_SIZE, "ESP");
95 if (!esp->regs) 84 if (!esp->regs)
96 return -ENOMEM; 85 return -ENOMEM;
97 86
98 return 0; 87 return 0;
99 } 88 }
100 89
101 static int __devinit esp_sbus_map_command_bloc 90 static int __devinit esp_sbus_map_command_block(struct esp *esp)
102 { 91 {
103 struct of_device *op = esp->dev; !! 92 struct sbus_dev *sdev = esp->dev;
104 93
105 esp->command_block = dma_alloc_coheren !! 94 esp->command_block = sbus_alloc_consistent(sdev, 16,
106 !! 95 &esp->command_block_dma);
107 <<
108 if (!esp->command_block) 96 if (!esp->command_block)
109 return -ENOMEM; 97 return -ENOMEM;
110 return 0; 98 return 0;
111 } 99 }
112 100
113 static int __devinit esp_sbus_register_irq(str 101 static int __devinit esp_sbus_register_irq(struct esp *esp)
114 { 102 {
115 struct Scsi_Host *host = esp->host; 103 struct Scsi_Host *host = esp->host;
116 struct of_device *op = esp->dev; !! 104 struct sbus_dev *sdev = esp->dev;
117 105
118 host->irq = op->irqs[0]; !! 106 host->irq = sdev->irqs[0];
119 return request_irq(host->irq, scsi_esp 107 return request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, "ESP", esp);
120 } 108 }
121 109
122 static void __devinit esp_get_scsi_id(struct e !! 110 static void __devinit esp_get_scsi_id(struct esp *esp)
123 { 111 {
124 struct of_device *op = esp->dev; !! 112 struct sbus_dev *sdev = esp->dev;
125 struct device_node *dp; !! 113 struct device_node *dp = sdev->ofdev.node;
126 114
127 dp = op->node; <<
128 esp->scsi_id = of_getintprop_default(d 115 esp->scsi_id = of_getintprop_default(dp, "initiator-id", 0xff);
129 if (esp->scsi_id != 0xff) 116 if (esp->scsi_id != 0xff)
130 goto done; 117 goto done;
131 118
132 esp->scsi_id = of_getintprop_default(d 119 esp->scsi_id = of_getintprop_default(dp, "scsi-initiator-id", 0xff);
133 if (esp->scsi_id != 0xff) 120 if (esp->scsi_id != 0xff)
134 goto done; 121 goto done;
135 122
136 esp->scsi_id = of_getintprop_default(e !! 123 if (!sdev->bus) {
>> 124 /* SUN4 */
>> 125 esp->scsi_id = 7;
>> 126 goto done;
>> 127 }
>> 128
>> 129 esp->scsi_id = of_getintprop_default(sdev->bus->ofdev.node,
137 " 130 "scsi-initiator-id", 7);
138 131
139 done: 132 done:
140 esp->host->this_id = esp->scsi_id; 133 esp->host->this_id = esp->scsi_id;
141 esp->scsi_id_mask = (1 << esp->scsi_id 134 esp->scsi_id_mask = (1 << esp->scsi_id);
142 } 135 }
143 136
144 static void __devinit esp_get_differential(str 137 static void __devinit esp_get_differential(struct esp *esp)
145 { 138 {
146 struct of_device *op = esp->dev; !! 139 struct sbus_dev *sdev = esp->dev;
147 struct device_node *dp; !! 140 struct device_node *dp = sdev->ofdev.node;
148 141
149 dp = op->node; <<
150 if (of_find_property(dp, "differential 142 if (of_find_property(dp, "differential", NULL))
151 esp->flags |= ESP_FLAG_DIFFERE 143 esp->flags |= ESP_FLAG_DIFFERENTIAL;
152 else 144 else
153 esp->flags &= ~ESP_FLAG_DIFFER 145 esp->flags &= ~ESP_FLAG_DIFFERENTIAL;
154 } 146 }
155 147
156 static void __devinit esp_get_clock_params(str 148 static void __devinit esp_get_clock_params(struct esp *esp)
157 { 149 {
158 struct of_device *op = esp->dev; !! 150 struct sbus_dev *sdev = esp->dev;
159 struct device_node *bus_dp, *dp; !! 151 struct device_node *dp = sdev->ofdev.node;
>> 152 struct device_node *bus_dp;
160 int fmhz; 153 int fmhz;
161 154
162 dp = op->node; !! 155 bus_dp = NULL;
163 bus_dp = dp->parent; !! 156 if (sdev != NULL && sdev->bus != NULL)
>> 157 bus_dp = sdev->bus->ofdev.node;
164 158
165 fmhz = of_getintprop_default(dp, "cloc 159 fmhz = of_getintprop_default(dp, "clock-frequency", 0);
166 if (fmhz == 0) 160 if (fmhz == 0)
167 fmhz = of_getintprop_default(b !! 161 fmhz = (!bus_dp) ? 0 :
>> 162 of_getintprop_default(bus_dp, "clock-frequency", 0);
168 163
169 esp->cfreq = fmhz; 164 esp->cfreq = fmhz;
170 } 165 }
171 166
172 static void __devinit esp_get_bursts(struct es !! 167 static void __devinit esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
173 { 168 {
174 struct device_node *dma_dp = dma_of->n !! 169 struct sbus_dev *sdev = esp->dev;
175 struct of_device *op = esp->dev; !! 170 struct device_node *dp = sdev->ofdev.node;
176 struct device_node *dp; !! 171 u8 bursts;
177 u8 bursts, val; <<
178 172
179 dp = op->node; <<
180 bursts = of_getintprop_default(dp, "bu 173 bursts = of_getintprop_default(dp, "burst-sizes", 0xff);
181 val = of_getintprop_default(dma_dp, "b !! 174 if (dma) {
182 if (val != 0xff) !! 175 struct device_node *dma_dp = dma->ofdev.node;
183 bursts &= val; !! 176 u8 val = of_getintprop_default(dma_dp, "burst-sizes", 0xff);
184 !! 177 if (val != 0xff)
185 val = of_getintprop_default(dma_dp->pa !! 178 bursts &= val;
186 if (val != 0xff) !! 179 }
187 bursts &= val; !! 180
>> 181 if (sdev->bus) {
>> 182 u8 val = of_getintprop_default(sdev->bus->ofdev.node,
>> 183 "burst-sizes", 0xff);
>> 184 if (val != 0xff)
>> 185 bursts &= val;
>> 186 }
188 187
189 if (bursts == 0xff || 188 if (bursts == 0xff ||
190 (bursts & DMA_BURST16) == 0 || 189 (bursts & DMA_BURST16) == 0 ||
191 (bursts & DMA_BURST32) == 0) 190 (bursts & DMA_BURST32) == 0)
192 bursts = (DMA_BURST32 - 1); 191 bursts = (DMA_BURST32 - 1);
193 192
194 esp->bursts = bursts; 193 esp->bursts = bursts;
195 } 194 }
196 195
197 static void __devinit esp_sbus_get_props(struc !! 196 static void __devinit esp_sbus_get_props(struct esp *esp, struct sbus_dev *espdma)
198 { 197 {
199 esp_get_scsi_id(esp, espdma); !! 198 esp_get_scsi_id(esp);
200 esp_get_differential(esp); 199 esp_get_differential(esp);
201 esp_get_clock_params(esp); 200 esp_get_clock_params(esp);
202 esp_get_bursts(esp, espdma); 201 esp_get_bursts(esp, espdma);
203 } 202 }
204 203
205 static void sbus_esp_write8(struct esp *esp, u 204 static void sbus_esp_write8(struct esp *esp, u8 val, unsigned long reg)
206 { 205 {
207 sbus_writeb(val, esp->regs + (reg * 4U 206 sbus_writeb(val, esp->regs + (reg * 4UL));
208 } 207 }
209 208
210 static u8 sbus_esp_read8(struct esp *esp, unsi 209 static u8 sbus_esp_read8(struct esp *esp, unsigned long reg)
211 { 210 {
212 return sbus_readb(esp->regs + (reg * 4 211 return sbus_readb(esp->regs + (reg * 4UL));
213 } 212 }
214 213
215 static dma_addr_t sbus_esp_map_single(struct e 214 static dma_addr_t sbus_esp_map_single(struct esp *esp, void *buf,
216 size_t s 215 size_t sz, int dir)
217 { 216 {
218 struct of_device *op = esp->dev; !! 217 return sbus_map_single(esp->dev, buf, sz, dir);
219 <<
220 return dma_map_single(&op->dev, buf, s <<
221 } 218 }
222 219
223 static int sbus_esp_map_sg(struct esp *esp, st 220 static int sbus_esp_map_sg(struct esp *esp, struct scatterlist *sg,
224 int num_sg, 221 int num_sg, int dir)
225 { 222 {
226 struct of_device *op = esp->dev; !! 223 return sbus_map_sg(esp->dev, sg, num_sg, dir);
227 <<
228 return dma_map_sg(&op->dev, sg, num_sg <<
229 } 224 }
230 225
231 static void sbus_esp_unmap_single(struct esp * 226 static void sbus_esp_unmap_single(struct esp *esp, dma_addr_t addr,
232 size_t sz, i 227 size_t sz, int dir)
233 { 228 {
234 struct of_device *op = esp->dev; !! 229 sbus_unmap_single(esp->dev, addr, sz, dir);
235 <<
236 dma_unmap_single(&op->dev, addr, sz, d <<
237 } 230 }
238 231
239 static void sbus_esp_unmap_sg(struct esp *esp, 232 static void sbus_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
240 int num_sg, int 233 int num_sg, int dir)
241 { 234 {
242 struct of_device *op = esp->dev; !! 235 sbus_unmap_sg(esp->dev, sg, num_sg, dir);
243 <<
244 dma_unmap_sg(&op->dev, sg, num_sg, dir <<
245 } 236 }
246 237
247 static int sbus_esp_irq_pending(struct esp *es 238 static int sbus_esp_irq_pending(struct esp *esp)
248 { 239 {
249 if (dma_read32(DMA_CSR) & (DMA_HNDL_IN 240 if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
250 return 1; 241 return 1;
251 return 0; 242 return 0;
252 } 243 }
253 244
254 static void sbus_esp_reset_dma(struct esp *esp 245 static void sbus_esp_reset_dma(struct esp *esp)
255 { 246 {
256 int can_do_burst16, can_do_burst32, ca 247 int can_do_burst16, can_do_burst32, can_do_burst64;
257 int can_do_sbus64, lim; 248 int can_do_sbus64, lim;
258 struct of_device *op; <<
259 u32 val; 249 u32 val;
260 250
261 can_do_burst16 = (esp->bursts & DMA_BU 251 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
262 can_do_burst32 = (esp->bursts & DMA_BU 252 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
263 can_do_burst64 = 0; 253 can_do_burst64 = 0;
264 can_do_sbus64 = 0; 254 can_do_sbus64 = 0;
265 op = esp->dev; !! 255 if (sbus_can_dma_64bit(esp->dev))
266 if (sbus_can_dma_64bit()) <<
267 can_do_sbus64 = 1; 256 can_do_sbus64 = 1;
268 if (sbus_can_burst64()) !! 257 if (sbus_can_burst64(esp->sdev))
269 can_do_burst64 = (esp->bursts 258 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
270 259
271 /* Put the DVMA into a known state. */ 260 /* Put the DVMA into a known state. */
272 if (esp->dmarev != dvmahme) { !! 261 if (esp->dma->revision != dvmahme) {
273 val = dma_read32(DMA_CSR); 262 val = dma_read32(DMA_CSR);
274 dma_write32(val | DMA_RST_SCSI 263 dma_write32(val | DMA_RST_SCSI, DMA_CSR);
275 dma_write32(val & ~DMA_RST_SCS 264 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
276 } 265 }
277 switch (esp->dmarev) { !! 266 switch (esp->dma->revision) {
278 case dvmahme: 267 case dvmahme:
279 dma_write32(DMA_RESET_FAS366, 268 dma_write32(DMA_RESET_FAS366, DMA_CSR);
280 dma_write32(DMA_RST_SCSI, DMA_ 269 dma_write32(DMA_RST_SCSI, DMA_CSR);
281 270
282 esp->prev_hme_dmacsr = (DMA_PA 271 esp->prev_hme_dmacsr = (DMA_PARITY_OFF | DMA_2CLKS |
283 DMA_SC 272 DMA_SCSI_DISAB | DMA_INT_ENAB);
284 273
285 esp->prev_hme_dmacsr &= ~(DMA_ 274 esp->prev_hme_dmacsr &= ~(DMA_ENABLE | DMA_ST_WRITE |
286 DMA_ 275 DMA_BRST_SZ);
287 276
288 if (can_do_burst64) 277 if (can_do_burst64)
289 esp->prev_hme_dmacsr | 278 esp->prev_hme_dmacsr |= DMA_BRST64;
290 else if (can_do_burst32) 279 else if (can_do_burst32)
291 esp->prev_hme_dmacsr | 280 esp->prev_hme_dmacsr |= DMA_BRST32;
292 281
293 if (can_do_sbus64) { 282 if (can_do_sbus64) {
294 esp->prev_hme_dmacsr | 283 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
295 sbus_set_sbus64(&op->d !! 284 sbus_set_sbus64(esp->dev, esp->bursts);
296 } 285 }
297 286
298 lim = 1000; 287 lim = 1000;
299 while (dma_read32(DMA_CSR) & D 288 while (dma_read32(DMA_CSR) & DMA_PEND_READ) {
300 if (--lim == 0) { 289 if (--lim == 0) {
301 printk(KERN_AL 290 printk(KERN_ALERT PFX "esp%d: DMA_PEND_READ "
302 "will n 291 "will not clear!\n",
303 esp->ho 292 esp->host->unique_id);
304 break; 293 break;
305 } 294 }
306 udelay(1); 295 udelay(1);
307 } 296 }
308 297
309 dma_write32(0, DMA_CSR); 298 dma_write32(0, DMA_CSR);
310 dma_write32(esp->prev_hme_dmac 299 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
311 300
312 dma_write32(0, DMA_ADDR); 301 dma_write32(0, DMA_ADDR);
313 break; 302 break;
314 303
315 case dvmarev2: 304 case dvmarev2:
316 if (esp->rev != ESP100) { 305 if (esp->rev != ESP100) {
317 val = dma_read32(DMA_C 306 val = dma_read32(DMA_CSR);
318 dma_write32(val | DMA_ 307 dma_write32(val | DMA_3CLKS, DMA_CSR);
319 } 308 }
320 break; 309 break;
321 310
322 case dvmarev3: 311 case dvmarev3:
323 val = dma_read32(DMA_CSR); 312 val = dma_read32(DMA_CSR);
324 val &= ~DMA_3CLKS; 313 val &= ~DMA_3CLKS;
325 val |= DMA_2CLKS; 314 val |= DMA_2CLKS;
326 if (can_do_burst32) { 315 if (can_do_burst32) {
327 val &= ~DMA_BRST_SZ; 316 val &= ~DMA_BRST_SZ;
328 val |= DMA_BRST32; 317 val |= DMA_BRST32;
329 } 318 }
330 dma_write32(val, DMA_CSR); 319 dma_write32(val, DMA_CSR);
331 break; 320 break;
332 321
333 case dvmaesc1: 322 case dvmaesc1:
334 val = dma_read32(DMA_CSR); 323 val = dma_read32(DMA_CSR);
335 val |= DMA_ADD_ENABLE; 324 val |= DMA_ADD_ENABLE;
336 val &= ~DMA_BCNT_ENAB; 325 val &= ~DMA_BCNT_ENAB;
337 if (!can_do_burst32 && can_do_ 326 if (!can_do_burst32 && can_do_burst16) {
338 val |= DMA_ESC_BURST; 327 val |= DMA_ESC_BURST;
339 } else { 328 } else {
340 val &= ~(DMA_ESC_BURST 329 val &= ~(DMA_ESC_BURST);
341 } 330 }
342 dma_write32(val, DMA_CSR); 331 dma_write32(val, DMA_CSR);
343 break; 332 break;
344 333
345 default: 334 default:
346 break; 335 break;
347 } 336 }
348 337
349 /* Enable interrupts. */ 338 /* Enable interrupts. */
350 val = dma_read32(DMA_CSR); 339 val = dma_read32(DMA_CSR);
351 dma_write32(val | DMA_INT_ENAB, DMA_CS 340 dma_write32(val | DMA_INT_ENAB, DMA_CSR);
352 } 341 }
353 342
354 static void sbus_esp_dma_drain(struct esp *esp 343 static void sbus_esp_dma_drain(struct esp *esp)
355 { 344 {
356 u32 csr; 345 u32 csr;
357 int lim; 346 int lim;
358 347
359 if (esp->dmarev == dvmahme) !! 348 if (esp->dma->revision == dvmahme)
360 return; 349 return;
361 350
362 csr = dma_read32(DMA_CSR); 351 csr = dma_read32(DMA_CSR);
363 if (!(csr & DMA_FIFO_ISDRAIN)) 352 if (!(csr & DMA_FIFO_ISDRAIN))
364 return; 353 return;
365 354
366 if (esp->dmarev != dvmarev3 && esp->dm !! 355 if (esp->dma->revision != dvmarev3 && esp->dma->revision != dvmaesc1)
367 dma_write32(csr | DMA_FIFO_STD 356 dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
368 357
369 lim = 1000; 358 lim = 1000;
370 while (dma_read32(DMA_CSR) & DMA_FIFO_ 359 while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
371 if (--lim == 0) { 360 if (--lim == 0) {
372 printk(KERN_ALERT PFX 361 printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
373 esp->host->uniq 362 esp->host->unique_id);
374 break; 363 break;
375 } 364 }
376 udelay(1); 365 udelay(1);
377 } 366 }
378 } 367 }
379 368
380 static void sbus_esp_dma_invalidate(struct esp 369 static void sbus_esp_dma_invalidate(struct esp *esp)
381 { 370 {
382 if (esp->dmarev == dvmahme) { !! 371 if (esp->dma->revision == dvmahme) {
383 dma_write32(DMA_RST_SCSI, DMA_ 372 dma_write32(DMA_RST_SCSI, DMA_CSR);
384 373
385 esp->prev_hme_dmacsr = ((esp-> 374 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
386 (DMA_ 375 (DMA_PARITY_OFF | DMA_2CLKS |
387 DMA_ 376 DMA_SCSI_DISAB | DMA_INT_ENAB)) &
388 ~(DMA_ 377 ~(DMA_ST_WRITE | DMA_ENABLE));
389 378
390 dma_write32(0, DMA_CSR); 379 dma_write32(0, DMA_CSR);
391 dma_write32(esp->prev_hme_dmac 380 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
392 381
393 /* This is necessary to avoid 382 /* This is necessary to avoid having the SCSI channel
394 * engine lock up on us. 383 * engine lock up on us.
395 */ 384 */
396 dma_write32(0, DMA_ADDR); 385 dma_write32(0, DMA_ADDR);
397 } else { 386 } else {
398 u32 val; 387 u32 val;
399 int lim; 388 int lim;
400 389
401 lim = 1000; 390 lim = 1000;
402 while ((val = dma_read32(DMA_C 391 while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
403 if (--lim == 0) { 392 if (--lim == 0) {
404 printk(KERN_AL 393 printk(KERN_ALERT PFX "esp%d: DMA will not "
405 "invali 394 "invalidate!\n", esp->host->unique_id);
406 break; 395 break;
407 } 396 }
408 udelay(1); 397 udelay(1);
409 } 398 }
410 399
411 val &= ~(DMA_ENABLE | DMA_ST_W 400 val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
412 val |= DMA_FIFO_INV; 401 val |= DMA_FIFO_INV;
413 dma_write32(val, DMA_CSR); 402 dma_write32(val, DMA_CSR);
414 val &= ~DMA_FIFO_INV; 403 val &= ~DMA_FIFO_INV;
415 dma_write32(val, DMA_CSR); 404 dma_write32(val, DMA_CSR);
416 } 405 }
417 } 406 }
418 407
419 static void sbus_esp_send_dma_cmd(struct esp * 408 static void sbus_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
420 u32 dma_coun 409 u32 dma_count, int write, u8 cmd)
421 { 410 {
422 u32 csr; 411 u32 csr;
423 412
424 BUG_ON(!(cmd & ESP_CMD_DMA)); 413 BUG_ON(!(cmd & ESP_CMD_DMA));
425 414
426 sbus_esp_write8(esp, (esp_count >> 0) 415 sbus_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
427 sbus_esp_write8(esp, (esp_count >> 8) 416 sbus_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
428 if (esp->rev == FASHME) { 417 if (esp->rev == FASHME) {
429 sbus_esp_write8(esp, (esp_coun 418 sbus_esp_write8(esp, (esp_count >> 16) & 0xff, FAS_RLO);
430 sbus_esp_write8(esp, 0, FAS_RH 419 sbus_esp_write8(esp, 0, FAS_RHI);
431 420
432 scsi_esp_cmd(esp, cmd); 421 scsi_esp_cmd(esp, cmd);
433 422
434 csr = esp->prev_hme_dmacsr; 423 csr = esp->prev_hme_dmacsr;
435 csr |= DMA_SCSI_DISAB | DMA_EN 424 csr |= DMA_SCSI_DISAB | DMA_ENABLE;
436 if (write) 425 if (write)
437 csr |= DMA_ST_WRITE; 426 csr |= DMA_ST_WRITE;
438 else 427 else
439 csr &= ~DMA_ST_WRITE; 428 csr &= ~DMA_ST_WRITE;
440 esp->prev_hme_dmacsr = csr; 429 esp->prev_hme_dmacsr = csr;
441 430
442 dma_write32(dma_count, DMA_COU 431 dma_write32(dma_count, DMA_COUNT);
443 dma_write32(addr, DMA_ADDR); 432 dma_write32(addr, DMA_ADDR);
444 dma_write32(csr, DMA_CSR); 433 dma_write32(csr, DMA_CSR);
445 } else { 434 } else {
446 csr = dma_read32(DMA_CSR); 435 csr = dma_read32(DMA_CSR);
447 csr |= DMA_ENABLE; 436 csr |= DMA_ENABLE;
448 if (write) 437 if (write)
449 csr |= DMA_ST_WRITE; 438 csr |= DMA_ST_WRITE;
450 else 439 else
451 csr &= ~DMA_ST_WRITE; 440 csr &= ~DMA_ST_WRITE;
452 dma_write32(csr, DMA_CSR); 441 dma_write32(csr, DMA_CSR);
453 if (esp->dmarev == dvmaesc1) { !! 442 if (esp->dma->revision == dvmaesc1) {
454 u32 end = PAGE_ALIGN(a 443 u32 end = PAGE_ALIGN(addr + dma_count + 16U);
455 dma_write32(end - addr 444 dma_write32(end - addr, DMA_COUNT);
456 } 445 }
457 dma_write32(addr, DMA_ADDR); 446 dma_write32(addr, DMA_ADDR);
458 447
459 scsi_esp_cmd(esp, cmd); 448 scsi_esp_cmd(esp, cmd);
460 } 449 }
461 450
462 } 451 }
463 452
464 static int sbus_esp_dma_error(struct esp *esp) 453 static int sbus_esp_dma_error(struct esp *esp)
465 { 454 {
466 u32 csr = dma_read32(DMA_CSR); 455 u32 csr = dma_read32(DMA_CSR);
467 456
468 if (csr & DMA_HNDL_ERROR) 457 if (csr & DMA_HNDL_ERROR)
469 return 1; 458 return 1;
470 459
471 return 0; 460 return 0;
472 } 461 }
473 462
474 static const struct esp_driver_ops sbus_esp_op 463 static const struct esp_driver_ops sbus_esp_ops = {
475 .esp_write8 = sbus_esp_write 464 .esp_write8 = sbus_esp_write8,
476 .esp_read8 = sbus_esp_read8 465 .esp_read8 = sbus_esp_read8,
477 .map_single = sbus_esp_map_s 466 .map_single = sbus_esp_map_single,
478 .map_sg = sbus_esp_map_s 467 .map_sg = sbus_esp_map_sg,
479 .unmap_single = sbus_esp_unmap 468 .unmap_single = sbus_esp_unmap_single,
480 .unmap_sg = sbus_esp_unmap 469 .unmap_sg = sbus_esp_unmap_sg,
481 .irq_pending = sbus_esp_irq_p 470 .irq_pending = sbus_esp_irq_pending,
482 .reset_dma = sbus_esp_reset 471 .reset_dma = sbus_esp_reset_dma,
483 .dma_drain = sbus_esp_dma_d 472 .dma_drain = sbus_esp_dma_drain,
484 .dma_invalidate = sbus_esp_dma_i 473 .dma_invalidate = sbus_esp_dma_invalidate,
485 .send_dma_cmd = sbus_esp_send_ 474 .send_dma_cmd = sbus_esp_send_dma_cmd,
486 .dma_error = sbus_esp_dma_e 475 .dma_error = sbus_esp_dma_error,
487 }; 476 };
488 477
489 static int __devinit esp_sbus_probe_one(struct !! 478 static int __devinit esp_sbus_probe_one(struct device *dev,
490 struct !! 479 struct sbus_dev *esp_dev,
>> 480 struct sbus_dev *espdma,
>> 481 struct sbus_bus *sbus,
491 int hm 482 int hme)
492 { 483 {
493 struct scsi_host_template *tpnt = &scs 484 struct scsi_host_template *tpnt = &scsi_esp_template;
494 struct Scsi_Host *host; 485 struct Scsi_Host *host;
495 struct esp *esp; 486 struct esp *esp;
496 int err; 487 int err;
497 488
498 host = scsi_host_alloc(tpnt, sizeof(st 489 host = scsi_host_alloc(tpnt, sizeof(struct esp));
499 490
500 err = -ENOMEM; 491 err = -ENOMEM;
501 if (!host) 492 if (!host)
502 goto fail; 493 goto fail;
503 494
504 host->max_id = (hme ? 16 : 8); 495 host->max_id = (hme ? 16 : 8);
505 esp = shost_priv(host); 496 esp = shost_priv(host);
506 497
507 esp->host = host; 498 esp->host = host;
508 esp->dev = op; !! 499 esp->dev = esp_dev;
509 esp->ops = &sbus_esp_ops; 500 esp->ops = &sbus_esp_ops;
510 501
511 if (hme) 502 if (hme)
512 esp->flags |= ESP_FLAG_WIDE_CA 503 esp->flags |= ESP_FLAG_WIDE_CAPABLE;
513 504
514 err = esp_sbus_setup_dma(esp, espdma); !! 505 err = esp_sbus_find_dma(esp, espdma);
515 if (err < 0) 506 if (err < 0)
516 goto fail_unlink; 507 goto fail_unlink;
517 508
518 err = esp_sbus_map_regs(esp, hme); 509 err = esp_sbus_map_regs(esp, hme);
519 if (err < 0) 510 if (err < 0)
520 goto fail_unlink; 511 goto fail_unlink;
521 512
522 err = esp_sbus_map_command_block(esp); 513 err = esp_sbus_map_command_block(esp);
523 if (err < 0) 514 if (err < 0)
524 goto fail_unmap_regs; 515 goto fail_unmap_regs;
525 516
526 err = esp_sbus_register_irq(esp); 517 err = esp_sbus_register_irq(esp);
527 if (err < 0) 518 if (err < 0)
528 goto fail_unmap_command_block; 519 goto fail_unmap_command_block;
529 520
530 esp_sbus_get_props(esp, espdma); 521 esp_sbus_get_props(esp, espdma);
531 522
532 /* Before we try to touch the ESP chip 523 /* Before we try to touch the ESP chip, ESC1 dma can
533 * come up with the reset bit set, so 524 * come up with the reset bit set, so make sure that
534 * is clear first. 525 * is clear first.
535 */ 526 */
536 if (esp->dmarev == dvmaesc1) { !! 527 if (esp->dma->revision == dvmaesc1) {
537 u32 val = dma_read32(DMA_CSR); 528 u32 val = dma_read32(DMA_CSR);
538 529
539 dma_write32(val & ~DMA_RST_SCS 530 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
540 } 531 }
541 532
542 dev_set_drvdata(&op->dev, esp); !! 533 dev_set_drvdata(&esp_dev->ofdev.dev, esp);
543 534
544 err = scsi_esp_register(esp, &op->dev) !! 535 err = scsi_esp_register(esp, dev);
545 if (err) 536 if (err)
546 goto fail_free_irq; 537 goto fail_free_irq;
547 538
548 return 0; 539 return 0;
549 540
550 fail_free_irq: 541 fail_free_irq:
551 free_irq(host->irq, esp); 542 free_irq(host->irq, esp);
552 fail_unmap_command_block: 543 fail_unmap_command_block:
553 dma_free_coherent(&op->dev, 16, !! 544 sbus_free_consistent(esp->dev, 16,
554 esp->command_block, !! 545 esp->command_block,
555 esp->command_block_d !! 546 esp->command_block_dma);
556 fail_unmap_regs: 547 fail_unmap_regs:
557 of_iounmap(&op->resource[(hme ? 1 : 0) !! 548 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
558 fail_unlink: 549 fail_unlink:
559 scsi_host_put(host); 550 scsi_host_put(host);
560 fail: 551 fail:
561 return err; 552 return err;
562 } 553 }
563 554
564 static int __devinit esp_sbus_probe(struct of_ !! 555 static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
565 { 556 {
566 struct device_node *dma_node = NULL; !! 557 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
567 struct device_node *dp = op->node; !! 558 struct device_node *dp = dev->node;
568 struct of_device *dma_of = NULL; !! 559 struct sbus_dev *dma_sdev = NULL;
569 int hme = 0; 560 int hme = 0;
570 561
571 if (dp->parent && 562 if (dp->parent &&
572 (!strcmp(dp->parent->name, "espdma 563 (!strcmp(dp->parent->name, "espdma") ||
573 !strcmp(dp->parent->name, "dma")) 564 !strcmp(dp->parent->name, "dma")))
574 dma_node = dp->parent; !! 565 dma_sdev = sdev->parent;
575 else if (!strcmp(dp->name, "SUNW,fas") 566 else if (!strcmp(dp->name, "SUNW,fas")) {
576 dma_node = op->node; !! 567 dma_sdev = sdev;
577 hme = 1; 568 hme = 1;
578 } 569 }
579 if (dma_node) <<
580 dma_of = of_find_device_by_nod <<
581 if (!dma_of) <<
582 return -ENODEV; <<
583 570
584 return esp_sbus_probe_one(op, dma_of, !! 571 return esp_sbus_probe_one(&dev->dev, sdev, dma_sdev,
>> 572 sdev->bus, hme);
585 } 573 }
586 574
587 static int __devexit esp_sbus_remove(struct of !! 575 static int __devexit esp_sbus_remove(struct of_device *dev)
588 { 576 {
589 struct esp *esp = dev_get_drvdata(&op- !! 577 struct esp *esp = dev_get_drvdata(&dev->dev);
590 struct of_device *dma_of = esp->dma; <<
591 unsigned int irq = esp->host->irq; 578 unsigned int irq = esp->host->irq;
592 bool is_hme; <<
593 u32 val; 579 u32 val;
594 580
595 scsi_esp_unregister(esp); 581 scsi_esp_unregister(esp);
596 582
597 /* Disable interrupts. */ 583 /* Disable interrupts. */
598 val = dma_read32(DMA_CSR); 584 val = dma_read32(DMA_CSR);
599 dma_write32(val & ~DMA_INT_ENAB, DMA_C 585 dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
600 586
601 free_irq(irq, esp); 587 free_irq(irq, esp);
602 !! 588 sbus_free_consistent(esp->dev, 16,
603 is_hme = (esp->dmarev == dvmahme); !! 589 esp->command_block,
604 !! 590 esp->command_block_dma);
605 dma_free_coherent(&op->dev, 16, !! 591 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
606 esp->command_block, <<
607 esp->command_block_d <<
608 of_iounmap(&op->resource[(is_hme ? 1 : <<
609 SBUS_ESP_REG_SIZE); <<
610 of_iounmap(&dma_of->resource[0], esp-> <<
611 resource_size(&dma_of->reso <<
612 592
613 scsi_host_put(esp->host); 593 scsi_host_put(esp->host);
614 594
615 dev_set_drvdata(&op->dev, NULL); <<
616 <<
617 return 0; 595 return 0;
618 } 596 }
619 597
620 static const struct of_device_id esp_match[] = !! 598 static struct of_device_id esp_match[] = {
621 { 599 {
622 .name = "SUNW,esp", 600 .name = "SUNW,esp",
623 }, 601 },
624 { 602 {
625 .name = "SUNW,fas", 603 .name = "SUNW,fas",
626 }, 604 },
627 { 605 {
628 .name = "esp", 606 .name = "esp",
629 }, 607 },
630 {}, 608 {},
631 }; 609 };
632 MODULE_DEVICE_TABLE(of, esp_match); 610 MODULE_DEVICE_TABLE(of, esp_match);
633 611
634 static struct of_platform_driver esp_sbus_driv 612 static struct of_platform_driver esp_sbus_driver = {
635 .name = "esp", 613 .name = "esp",
636 .match_table = esp_match, 614 .match_table = esp_match,
637 .probe = esp_sbus_probe, 615 .probe = esp_sbus_probe,
638 .remove = __devexit_p(esp_sbus 616 .remove = __devexit_p(esp_sbus_remove),
639 }; 617 };
640 618
641 static int __init sunesp_init(void) 619 static int __init sunesp_init(void)
642 { 620 {
643 return of_register_driver(&esp_sbus_dr !! 621 return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
644 } 622 }
645 623
646 static void __exit sunesp_exit(void) 624 static void __exit sunesp_exit(void)
647 { 625 {
648 of_unregister_driver(&esp_sbus_driver) 626 of_unregister_driver(&esp_sbus_driver);
649 } 627 }
650 628
651 MODULE_DESCRIPTION("Sun ESP SCSI driver"); 629 MODULE_DESCRIPTION("Sun ESP SCSI driver");
652 MODULE_AUTHOR("David S. Miller (davem@davemlof 630 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
653 MODULE_LICENSE("GPL"); 631 MODULE_LICENSE("GPL");
654 MODULE_VERSION(DRV_VERSION); 632 MODULE_VERSION(DRV_VERSION);
655 633
656 module_init(sunesp_init); 634 module_init(sunesp_init);
657 module_exit(sunesp_exit); 635 module_exit(sunesp_exit);
658 636
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