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1 /* 1
2 * Copyright (c) 2004, 2005 Topspin Communicat
3 * Copyright (c) 2005 Mellanox Technologies. A
4 * Copyright (c) 2006, 2007 Cisco Systems, Inc
5 *
6 * This software is available to you under a c
7 * licenses. You may choose to be licensed un
8 * General Public License (GPL) Version 2, ava
9 * COPYING in the main directory of this sourc
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and bi
13 * without modification, are permitted pro
14 * conditions are met:
15 *
16 * - Redistributions of source code must
17 * copyright notice, this list of condi
18 * disclaimer.
19 *
20 * - Redistributions in binary form must
21 * copyright notice, this list of condi
22 * disclaimer in the documentation and/
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT W
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMIT
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR P
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTH
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER L
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARIS
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR
32 * SOFTWARE.
33 */
34
35 #include <linux/init.h>
36
37 #include "mlx4.h"
38 #include "fw.h"
39
40 enum {
41 MLX4_RES_QP,
42 MLX4_RES_RDMARC,
43 MLX4_RES_ALTC,
44 MLX4_RES_AUXC,
45 MLX4_RES_SRQ,
46 MLX4_RES_CQ,
47 MLX4_RES_EQ,
48 MLX4_RES_DMPT,
49 MLX4_RES_CMPT,
50 MLX4_RES_MTT,
51 MLX4_RES_MCG,
52 MLX4_RES_NUM
53 };
54
55 static const char *res_name[] = {
56 [MLX4_RES_QP] = "QP",
57 [MLX4_RES_RDMARC] = "RDMARC",
58 [MLX4_RES_ALTC] = "ALTC",
59 [MLX4_RES_AUXC] = "AUXC",
60 [MLX4_RES_SRQ] = "SRQ",
61 [MLX4_RES_CQ] = "CQ",
62 [MLX4_RES_EQ] = "EQ",
63 [MLX4_RES_DMPT] = "DMPT",
64 [MLX4_RES_CMPT] = "CMPT",
65 [MLX4_RES_MTT] = "MTT",
66 [MLX4_RES_MCG] = "MCG",
67 };
68
69 u64 mlx4_make_profile(struct mlx4_dev *dev,
70 struct mlx4_profile *req
71 struct mlx4_dev_cap *dev
72 struct mlx4_init_hca_par
73 {
74 struct mlx4_priv *priv = mlx4_priv(dev
75 struct mlx4_resource {
76 u64 size;
77 u64 start;
78 int type;
79 int num;
80 int log_num;
81 };
82
83 u64 total_size = 0;
84 struct mlx4_resource *profile;
85 struct mlx4_resource tmp;
86 int i, j;
87
88 profile = kzalloc(MLX4_RES_NUM * sizeo
89 if (!profile)
90 return -ENOMEM;
91
92 profile[MLX4_RES_QP].size = dev_ca
93 profile[MLX4_RES_RDMARC].size = dev_ca
94 profile[MLX4_RES_ALTC].size = dev_ca
95 profile[MLX4_RES_AUXC].size = dev_ca
96 profile[MLX4_RES_SRQ].size = dev_ca
97 profile[MLX4_RES_CQ].size = dev_ca
98 profile[MLX4_RES_EQ].size = dev_ca
99 profile[MLX4_RES_DMPT].size = dev_ca
100 profile[MLX4_RES_CMPT].size = dev_ca
101 profile[MLX4_RES_MTT].size = MLX4_M
102 profile[MLX4_RES_MCG].size = MLX4_M
103
104 profile[MLX4_RES_QP].num = reques
105 profile[MLX4_RES_RDMARC].num = reques
106 profile[MLX4_RES_ALTC].num = reques
107 profile[MLX4_RES_AUXC].num = reques
108 profile[MLX4_RES_SRQ].num = reques
109 profile[MLX4_RES_CQ].num = reques
110 profile[MLX4_RES_EQ].num = MLX4_N
111 profile[MLX4_RES_DMPT].num = reques
112 profile[MLX4_RES_CMPT].num = MLX4_N
113 profile[MLX4_RES_MTT].num = reques
114 profile[MLX4_RES_MCG].num = reques
115
116 for (i = 0; i < MLX4_RES_NUM; ++i) {
117 profile[i].type = i;
118 profile[i].num = roundup_
119 profile[i].log_num = ilog2(pr
120 profile[i].size *= profile[
121 profile[i].size = max(prof
122 }
123
124 /*
125 * Sort the resources in decreasing or
126 * all have sizes that are powers of 2
127 * resources aligned to their size and
128 * using the sorted order.
129 */
130 for (i = MLX4_RES_NUM; i > 0; --i)
131 for (j = 1; j < i; ++j) {
132 if (profile[j].size >
133 tmp
134 profile[j]
135 profile[j - 1]
136 }
137 }
138
139 for (i = 0; i < MLX4_RES_NUM; ++i) {
140 if (profile[i].size) {
141 profile[i].start = tot
142 total_size += pro
143 }
144
145 if (total_size > dev_cap->max_
146 mlx4_err(dev, "Profile
147 "won't fit i
148 (unsigned lo
149 (unsigned lo
150 kfree(profile);
151 return -ENOMEM;
152 }
153
154 if (profile[i].size)
155 mlx4_dbg(dev, " profi
156 "size 0x%10l
157 i, res_name[p
158 (unsigned lon
159 (unsigned lon
160 }
161
162 mlx4_dbg(dev, "HCA context memory: res
163 (int) (total_size >> 10));
164
165 for (i = 0; i < MLX4_RES_NUM; ++i) {
166 switch (profile[i].type) {
167 case MLX4_RES_QP:
168 dev->caps.num_qps
169 init_hca->qpc_base
170 init_hca->log_num_qps
171 break;
172 case MLX4_RES_RDMARC:
173 for (priv->qp_table.rd
174 request->num_qp <
175 ++priv->qp_table.
176 ; /* nothing *
177 dev->caps.max_qp_dest_
178 priv->qp_table.rdmarc_
179 init_hca->rdmarc_base
180 init_hca->log_rd_per_q
181 break;
182 case MLX4_RES_ALTC:
183 init_hca->altc_base =
184 break;
185 case MLX4_RES_AUXC:
186 init_hca->auxc_base =
187 break;
188 case MLX4_RES_SRQ:
189 dev->caps.num_srqs
190 init_hca->srqc_base
191 init_hca->log_num_srqs
192 break;
193 case MLX4_RES_CQ:
194 dev->caps.num_cqs
195 init_hca->cqc_base
196 init_hca->log_num_cqs
197 break;
198 case MLX4_RES_EQ:
199 dev->caps.num_eqs
200 init_hca->eqc_base
201 init_hca->log_num_eqs
202 break;
203 case MLX4_RES_DMPT:
204 dev->caps.num_mpts
205 priv->mr_table.mpt_bas
206 init_hca->dmpt_base
207 init_hca->log_mpt_sz
208 break;
209 case MLX4_RES_CMPT:
210 init_hca->cmpt_base
211 break;
212 case MLX4_RES_MTT:
213 dev->caps.num_mtt_segs
214 priv->mr_table.mtt_bas
215 init_hca->mtt_base
216 break;
217 case MLX4_RES_MCG:
218 dev->caps.num_mgms
219 dev->caps.num_amgms
220 init_hca->mc_base
221 init_hca->log_mc_entry
222 init_hca->log_mc_table
223 init_hca->log_mc_hash_
224 break;
225 default:
226 break;
227 }
228 }
229
230 /*
231 * PDs don't take any HCA memory, but
232 * of the HCA profile anyway.
233 */
234 dev->caps.num_pds = MLX4_NUM_PDS;
235
236 kfree(profile);
237 return total_size;
238 }
239
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