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1 /********************************************* 1 /*******************************************************************************
2 2
3 Intel PRO/10GbE Linux driver 3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation. 4 Copyright(c) 1999 - 2006 Intel Corporation.
5 5
6 This program is free software; you can redis 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU Ge 7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software 8 version 2, as published by the Free Software Foundation.
9 9
10 This program is distributed in the hope it w 10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warra 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the G 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details. 13 more details.
14 14
15 You should have received a copy of the GNU G 15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Soft 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 021 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 18
19 The full GNU General Public License is inclu 19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING". 20 the file called "COPYING".
21 21
22 Contact Information: 22 Contact Information:
23 Linux NICS <linux.nics@intel.com> 23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists. 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Park 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 26
27 ********************************************** 27 *******************************************************************************/
28 28
29 #include "ixgb_hw.h" 29 #include "ixgb_hw.h"
30 #include "ixgb_ee.h" 30 #include "ixgb_ee.h"
31 /* Local prototypes */ 31 /* Local prototypes */
32 static uint16_t ixgb_shift_in_bits(struct ixgb 32 static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw);
33 33
34 static void ixgb_shift_out_bits(struct ixgb_hw 34 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
35 uint16_t data, 35 uint16_t data,
36 uint16_t count 36 uint16_t count);
37 static void ixgb_standby_eeprom(struct ixgb_hw 37 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
38 38
39 static boolean_t ixgb_wait_eeprom_command(stru 39 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw);
40 40
41 static void ixgb_cleanup_eeprom(struct ixgb_hw 41 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
42 42
43 /********************************************* 43 /******************************************************************************
44 * Raises the EEPROM's clock input. 44 * Raises the EEPROM's clock input.
45 * 45 *
46 * hw - Struct containing variables accessed b 46 * hw - Struct containing variables accessed by shared code
47 * eecd_reg - EECD's current value 47 * eecd_reg - EECD's current value
48 ********************************************* 48 *****************************************************************************/
49 static void 49 static void
50 ixgb_raise_clock(struct ixgb_hw *hw, 50 ixgb_raise_clock(struct ixgb_hw *hw,
51 uint32_t *eecd_reg) 51 uint32_t *eecd_reg)
52 { 52 {
53 /* Raise the clock input to the EEPROM 53 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
54 * wait 50 microseconds. 54 * wait 50 microseconds.
55 */ 55 */
56 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 56 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
57 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 57 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
58 udelay(50); 58 udelay(50);
59 return; 59 return;
60 } 60 }
61 61
62 /********************************************* 62 /******************************************************************************
63 * Lowers the EEPROM's clock input. 63 * Lowers the EEPROM's clock input.
64 * 64 *
65 * hw - Struct containing variables accessed b 65 * hw - Struct containing variables accessed by shared code
66 * eecd_reg - EECD's current value 66 * eecd_reg - EECD's current value
67 ********************************************* 67 *****************************************************************************/
68 static void 68 static void
69 ixgb_lower_clock(struct ixgb_hw *hw, 69 ixgb_lower_clock(struct ixgb_hw *hw,
70 uint32_t *eecd_reg) 70 uint32_t *eecd_reg)
71 { 71 {
72 /* Lower the clock input to the EEPROM 72 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
73 * wait 50 microseconds. 73 * wait 50 microseconds.
74 */ 74 */
75 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 75 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
76 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 76 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
77 udelay(50); 77 udelay(50);
78 return; 78 return;
79 } 79 }
80 80
81 /********************************************* 81 /******************************************************************************
82 * Shift data bits out to the EEPROM. 82 * Shift data bits out to the EEPROM.
83 * 83 *
84 * hw - Struct containing variables accessed b 84 * hw - Struct containing variables accessed by shared code
85 * data - data to send to the EEPROM 85 * data - data to send to the EEPROM
86 * count - number of bits to shift out 86 * count - number of bits to shift out
87 ********************************************* 87 *****************************************************************************/
88 static void 88 static void
89 ixgb_shift_out_bits(struct ixgb_hw *hw, 89 ixgb_shift_out_bits(struct ixgb_hw *hw,
90 uint1 90 uint16_t data,
91 uint1 91 uint16_t count)
92 { 92 {
93 uint32_t eecd_reg; 93 uint32_t eecd_reg;
94 uint32_t mask; 94 uint32_t mask;
95 95
96 /* We need to shift "count" bits out t 96 /* We need to shift "count" bits out to the EEPROM. So, value in the
97 * "data" parameter will be shifted ou 97 * "data" parameter will be shifted out to the EEPROM one bit at a time.
98 * In order to do this, "data" must be 98 * In order to do this, "data" must be broken down into bits.
99 */ 99 */
100 mask = 0x01 << (count - 1); 100 mask = 0x01 << (count - 1);
101 eecd_reg = IXGB_READ_REG(hw, EECD); 101 eecd_reg = IXGB_READ_REG(hw, EECD);
102 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD 102 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
103 do { 103 do {
104 /* A "1" is shifted out to the 104 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
105 * and then raising and then l 105 * and then raising and then lowering the clock (the SK bit controls
106 * the clock input to the EEPR 106 * the clock input to the EEPROM). A "" is shifted out to the EEPROM
107 * by setting "DI" to "" and t 107 * by setting "DI" to "" and then raising and then lowering the clock.
108 */ 108 */
109 eecd_reg &= ~IXGB_EECD_DI; 109 eecd_reg &= ~IXGB_EECD_DI;
110 110
111 if(data & mask) 111 if(data & mask)
112 eecd_reg |= IXGB_EECD_ 112 eecd_reg |= IXGB_EECD_DI;
113 113
114 IXGB_WRITE_REG(hw, EECD, eecd_ 114 IXGB_WRITE_REG(hw, EECD, eecd_reg);
115 115
116 udelay(50); 116 udelay(50);
117 117
118 ixgb_raise_clock(hw, &eecd_reg 118 ixgb_raise_clock(hw, &eecd_reg);
119 ixgb_lower_clock(hw, &eecd_reg 119 ixgb_lower_clock(hw, &eecd_reg);
120 120
121 mask = mask >> 1; 121 mask = mask >> 1;
122 122
123 } while(mask); 123 } while(mask);
124 124
125 /* We leave the "DI" bit set to "" whe 125 /* We leave the "DI" bit set to "" when we leave this routine. */
126 eecd_reg &= ~IXGB_EECD_DI; 126 eecd_reg &= ~IXGB_EECD_DI;
127 IXGB_WRITE_REG(hw, EECD, eecd_reg); 127 IXGB_WRITE_REG(hw, EECD, eecd_reg);
128 return; 128 return;
129 } 129 }
130 130
131 /********************************************* 131 /******************************************************************************
132 * Shift data bits in from the EEPROM 132 * Shift data bits in from the EEPROM
133 * 133 *
134 * hw - Struct containing variables accessed b 134 * hw - Struct containing variables accessed by shared code
135 ********************************************* 135 *****************************************************************************/
136 static uint16_t 136 static uint16_t
137 ixgb_shift_in_bits(struct ixgb_hw *hw) 137 ixgb_shift_in_bits(struct ixgb_hw *hw)
138 { 138 {
139 uint32_t eecd_reg; 139 uint32_t eecd_reg;
140 uint32_t i; 140 uint32_t i;
141 uint16_t data; 141 uint16_t data;
142 142
143 /* In order to read a register from th 143 /* In order to read a register from the EEPROM, we need to shift 16 bits
144 * in from the EEPROM. Bits are "shift 144 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
145 * the EEPROM (setting the SK bit), an 145 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
146 * bit. During this "shifting in" pro 146 * bit. During this "shifting in" process the "DI" bit should always be
147 * clear.. 147 * clear..
148 */ 148 */
149 149
150 eecd_reg = IXGB_READ_REG(hw, EECD); 150 eecd_reg = IXGB_READ_REG(hw, EECD);
151 151
152 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD 152 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
153 data = 0; 153 data = 0;
154 154
155 for(i = 0; i < 16; i++) { 155 for(i = 0; i < 16; i++) {
156 data = data << 1; 156 data = data << 1;
157 ixgb_raise_clock(hw, &eecd_reg 157 ixgb_raise_clock(hw, &eecd_reg);
158 158
159 eecd_reg = IXGB_READ_REG(hw, E 159 eecd_reg = IXGB_READ_REG(hw, EECD);
160 160
161 eecd_reg &= ~(IXGB_EECD_DI); 161 eecd_reg &= ~(IXGB_EECD_DI);
162 if(eecd_reg & IXGB_EECD_DO) 162 if(eecd_reg & IXGB_EECD_DO)
163 data |= 1; 163 data |= 1;
164 164
165 ixgb_lower_clock(hw, &eecd_reg 165 ixgb_lower_clock(hw, &eecd_reg);
166 } 166 }
167 167
168 return data; 168 return data;
169 } 169 }
170 170
171 /********************************************* 171 /******************************************************************************
172 * Prepares EEPROM for access 172 * Prepares EEPROM for access
173 * 173 *
174 * hw - Struct containing variables accessed b 174 * hw - Struct containing variables accessed by shared code
175 * 175 *
176 * Lowers EEPROM clock. Clears input pin. Sets 176 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
177 * function should be called before issuing a 177 * function should be called before issuing a command to the EEPROM.
178 ********************************************* 178 *****************************************************************************/
179 static void 179 static void
180 ixgb_setup_eeprom(struct ixgb_hw *hw) 180 ixgb_setup_eeprom(struct ixgb_hw *hw)
181 { 181 {
182 uint32_t eecd_reg; 182 uint32_t eecd_reg;
183 183
184 eecd_reg = IXGB_READ_REG(hw, EECD); 184 eecd_reg = IXGB_READ_REG(hw, EECD);
185 185
186 /* Clear SK and DI */ 186 /* Clear SK and DI */
187 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD 187 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
188 IXGB_WRITE_REG(hw, EECD, eecd_reg); 188 IXGB_WRITE_REG(hw, EECD, eecd_reg);
189 189
190 /* Set CS */ 190 /* Set CS */
191 eecd_reg |= IXGB_EECD_CS; 191 eecd_reg |= IXGB_EECD_CS;
192 IXGB_WRITE_REG(hw, EECD, eecd_reg); 192 IXGB_WRITE_REG(hw, EECD, eecd_reg);
193 return; 193 return;
194 } 194 }
195 195
196 /********************************************* 196 /******************************************************************************
197 * Returns EEPROM to a "standby" state 197 * Returns EEPROM to a "standby" state
198 * 198 *
199 * hw - Struct containing variables accessed b 199 * hw - Struct containing variables accessed by shared code
200 ********************************************* 200 *****************************************************************************/
201 static void 201 static void
202 ixgb_standby_eeprom(struct ixgb_hw *hw) 202 ixgb_standby_eeprom(struct ixgb_hw *hw)
203 { 203 {
204 uint32_t eecd_reg; 204 uint32_t eecd_reg;
205 205
206 eecd_reg = IXGB_READ_REG(hw, EECD); 206 eecd_reg = IXGB_READ_REG(hw, EECD);
207 207
208 /* Deselct EEPROM */ 208 /* Deselct EEPROM */
209 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD 209 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
210 IXGB_WRITE_REG(hw, EECD, eecd_reg); 210 IXGB_WRITE_REG(hw, EECD, eecd_reg);
211 udelay(50); 211 udelay(50);
212 212
213 /* Clock high */ 213 /* Clock high */
214 eecd_reg |= IXGB_EECD_SK; 214 eecd_reg |= IXGB_EECD_SK;
215 IXGB_WRITE_REG(hw, EECD, eecd_reg); 215 IXGB_WRITE_REG(hw, EECD, eecd_reg);
216 udelay(50); 216 udelay(50);
217 217
218 /* Select EEPROM */ 218 /* Select EEPROM */
219 eecd_reg |= IXGB_EECD_CS; 219 eecd_reg |= IXGB_EECD_CS;
220 IXGB_WRITE_REG(hw, EECD, eecd_reg); 220 IXGB_WRITE_REG(hw, EECD, eecd_reg);
221 udelay(50); 221 udelay(50);
222 222
223 /* Clock low */ 223 /* Clock low */
224 eecd_reg &= ~IXGB_EECD_SK; 224 eecd_reg &= ~IXGB_EECD_SK;
225 IXGB_WRITE_REG(hw, EECD, eecd_reg); 225 IXGB_WRITE_REG(hw, EECD, eecd_reg);
226 udelay(50); 226 udelay(50);
227 return; 227 return;
228 } 228 }
229 229
230 /********************************************* 230 /******************************************************************************
231 * Raises then lowers the EEPROM's clock pin 231 * Raises then lowers the EEPROM's clock pin
232 * 232 *
233 * hw - Struct containing variables accessed b 233 * hw - Struct containing variables accessed by shared code
234 ********************************************* 234 *****************************************************************************/
235 static void 235 static void
236 ixgb_clock_eeprom(struct ixgb_hw *hw) 236 ixgb_clock_eeprom(struct ixgb_hw *hw)
237 { 237 {
238 uint32_t eecd_reg; 238 uint32_t eecd_reg;
239 239
240 eecd_reg = IXGB_READ_REG(hw, EECD); 240 eecd_reg = IXGB_READ_REG(hw, EECD);
241 241
242 /* Rising edge of clock */ 242 /* Rising edge of clock */
243 eecd_reg |= IXGB_EECD_SK; 243 eecd_reg |= IXGB_EECD_SK;
244 IXGB_WRITE_REG(hw, EECD, eecd_reg); 244 IXGB_WRITE_REG(hw, EECD, eecd_reg);
245 udelay(50); 245 udelay(50);
246 246
247 /* Falling edge of clock */ 247 /* Falling edge of clock */
248 eecd_reg &= ~IXGB_EECD_SK; 248 eecd_reg &= ~IXGB_EECD_SK;
249 IXGB_WRITE_REG(hw, EECD, eecd_reg); 249 IXGB_WRITE_REG(hw, EECD, eecd_reg);
250 udelay(50); 250 udelay(50);
251 return; 251 return;
252 } 252 }
253 253
254 /********************************************* 254 /******************************************************************************
255 * Terminates a command by lowering the EEPROM 255 * Terminates a command by lowering the EEPROM's chip select pin
256 * 256 *
257 * hw - Struct containing variables accessed b 257 * hw - Struct containing variables accessed by shared code
258 ********************************************* 258 *****************************************************************************/
259 static void 259 static void
260 ixgb_cleanup_eeprom(struct ixgb_hw *hw) 260 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
261 { 261 {
262 uint32_t eecd_reg; 262 uint32_t eecd_reg;
263 263
264 eecd_reg = IXGB_READ_REG(hw, EECD); 264 eecd_reg = IXGB_READ_REG(hw, EECD);
265 265
266 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD 266 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
267 267
268 IXGB_WRITE_REG(hw, EECD, eecd_reg); 268 IXGB_WRITE_REG(hw, EECD, eecd_reg);
269 269
270 ixgb_clock_eeprom(hw); 270 ixgb_clock_eeprom(hw);
271 return; 271 return;
272 } 272 }
273 273
274 /********************************************* 274 /******************************************************************************
275 * Waits for the EEPROM to finish the current 275 * Waits for the EEPROM to finish the current command.
276 * 276 *
277 * hw - Struct containing variables accessed b 277 * hw - Struct containing variables accessed by shared code
278 * 278 *
279 * The command is done when the EEPROM's data 279 * The command is done when the EEPROM's data out pin goes high.
280 * 280 *
281 * Returns: 281 * Returns:
282 * TRUE: EEPROM data pin is high before t 282 * TRUE: EEPROM data pin is high before timeout.
283 * FALSE: Time expired. 283 * FALSE: Time expired.
284 ********************************************* 284 *****************************************************************************/
285 static boolean_t 285 static boolean_t
286 ixgb_wait_eeprom_command(struct ixgb_hw *hw) 286 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
287 { 287 {
288 uint32_t eecd_reg; 288 uint32_t eecd_reg;
289 uint32_t i; 289 uint32_t i;
290 290
291 /* Toggle the CS line. This in effect 291 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
292 * the command in question. 292 * the command in question.
293 */ 293 */
294 ixgb_standby_eeprom(hw); 294 ixgb_standby_eeprom(hw);
295 295
296 /* Now read DO repeatedly until is hig 296 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM will
297 * signal that the command has been co 297 * signal that the command has been completed by raising the DO signal.
298 * If DO does not go high in 10 millis 298 * If DO does not go high in 10 milliseconds, then error out.
299 */ 299 */
300 for(i = 0; i < 200; i++) { 300 for(i = 0; i < 200; i++) {
301 eecd_reg = IXGB_READ_REG(hw, E 301 eecd_reg = IXGB_READ_REG(hw, EECD);
302 302
303 if(eecd_reg & IXGB_EECD_DO) 303 if(eecd_reg & IXGB_EECD_DO)
304 return (TRUE); 304 return (TRUE);
305 305
306 udelay(50); 306 udelay(50);
307 } 307 }
308 ASSERT(0); 308 ASSERT(0);
309 return (FALSE); 309 return (FALSE);
310 } 310 }
311 311
312 /********************************************* 312 /******************************************************************************
313 * Verifies that the EEPROM has a valid checks 313 * Verifies that the EEPROM has a valid checksum
314 * 314 *
315 * hw - Struct containing variables accessed b 315 * hw - Struct containing variables accessed by shared code
316 * 316 *
317 * Reads the first 64 16 bit words of the EEPR 317 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
318 * If the sum of the 64 16 bit words is 0xBABA 318 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
319 * valid. 319 * valid.
320 * 320 *
321 * Returns: 321 * Returns:
322 * TRUE: Checksum is valid 322 * TRUE: Checksum is valid
323 * FALSE: Checksum is not valid. 323 * FALSE: Checksum is not valid.
324 ********************************************* 324 *****************************************************************************/
325 boolean_t 325 boolean_t
326 ixgb_validate_eeprom_checksum(struct ixgb_hw * 326 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw)
327 { 327 {
328 uint16_t checksum = 0; 328 uint16_t checksum = 0;
329 uint16_t i; 329 uint16_t i;
330 330
331 for(i = 0; i < (EEPROM_CHECKSUM_REG + 331 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
332 checksum += ixgb_read_eeprom(h 332 checksum += ixgb_read_eeprom(hw, i);
333 333
334 if(checksum == (uint16_t) EEPROM_SUM) 334 if(checksum == (uint16_t) EEPROM_SUM)
335 return (TRUE); 335 return (TRUE);
336 else 336 else
337 return (FALSE); 337 return (FALSE);
338 } 338 }
339 339
340 /********************************************* 340 /******************************************************************************
341 * Calculates the EEPROM checksum and writes i 341 * Calculates the EEPROM checksum and writes it to the EEPROM
342 * 342 *
343 * hw - Struct containing variables accessed b 343 * hw - Struct containing variables accessed by shared code
344 * 344 *
345 * Sums the first 63 16 bit words of the EEPRO 345 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
346 * Writes the difference to word offset 63 of 346 * Writes the difference to word offset 63 of the EEPROM.
347 ********************************************* 347 *****************************************************************************/
348 void 348 void
349 ixgb_update_eeprom_checksum(struct ixgb_hw *hw 349 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
350 { 350 {
351 uint16_t checksum = 0; 351 uint16_t checksum = 0;
352 uint16_t i; 352 uint16_t i;
353 353
354 for(i = 0; i < EEPROM_CHECKSUM_REG; i+ 354 for(i = 0; i < EEPROM_CHECKSUM_REG; i++)
355 checksum += ixgb_read_eeprom(h 355 checksum += ixgb_read_eeprom(hw, i);
356 356
357 checksum = (uint16_t) EEPROM_SUM - che 357 checksum = (uint16_t) EEPROM_SUM - checksum;
358 358
359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_ 359 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
360 return; 360 return;
361 } 361 }
362 362
363 /********************************************* 363 /******************************************************************************
364 * Writes a 16 bit word to a given offset in t 364 * Writes a 16 bit word to a given offset in the EEPROM.
365 * 365 *
366 * hw - Struct containing variables accessed b 366 * hw - Struct containing variables accessed by shared code
367 * reg - offset within the EEPROM to be writte 367 * reg - offset within the EEPROM to be written to
368 * data - 16 bit word to be writen to the EEPR 368 * data - 16 bit word to be writen to the EEPROM
369 * 369 *
370 * If ixgb_update_eeprom_checksum is not calle 370 * If ixgb_update_eeprom_checksum is not called after this function, the
371 * EEPROM will most likely contain an invalid 371 * EEPROM will most likely contain an invalid checksum.
372 * 372 *
373 ********************************************* 373 *****************************************************************************/
374 void 374 void
375 ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t 375 ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
376 { 376 {
377 struct ixgb_ee_map_type *ee_map = (str 377 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
378 378
379 /* Prepare the EEPROM for writing */ 379 /* Prepare the EEPROM for writing */
380 ixgb_setup_eeprom(hw); 380 ixgb_setup_eeprom(hw);
381 381
382 /* Send the 9-bit EWEN (write enable) 382 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
383 * plus 4-bit dummy). This puts the 383 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
384 */ 384 */
385 ixgb_shift_out_bits(hw, EEPROM_EWEN_OP 385 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5);
386 ixgb_shift_out_bits(hw, 0, 4); 386 ixgb_shift_out_bits(hw, 0, 4);
387 387
388 /* Prepare the EEPROM */ 388 /* Prepare the EEPROM */
389 ixgb_standby_eeprom(hw); 389 ixgb_standby_eeprom(hw);
390 390
391 /* Send the Write command (3-bit opco 391 /* Send the Write command (3-bit opcode + 6-bit addr) */
392 ixgb_shift_out_bits(hw, EEPROM_WRITE_O 392 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3);
393 ixgb_shift_out_bits(hw, offset, 6); 393 ixgb_shift_out_bits(hw, offset, 6);
394 394
395 /* Send the data */ 395 /* Send the data */
396 ixgb_shift_out_bits(hw, data, 16); 396 ixgb_shift_out_bits(hw, data, 16);
397 397
398 ixgb_wait_eeprom_command(hw); 398 ixgb_wait_eeprom_command(hw);
399 399
400 /* Recover from write */ 400 /* Recover from write */
401 ixgb_standby_eeprom(hw); 401 ixgb_standby_eeprom(hw);
402 402
403 /* Send the 9-bit EWDS (write disable) 403 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
404 * opcode plus 4-bit dummy). This tak 404 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
405 * mode. 405 * mode.
406 */ 406 */
407 ixgb_shift_out_bits(hw, EEPROM_EWDS_OP 407 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5);
408 ixgb_shift_out_bits(hw, 0, 4); 408 ixgb_shift_out_bits(hw, 0, 4);
409 409
410 /* Done with writing */ 410 /* Done with writing */
411 ixgb_cleanup_eeprom(hw); 411 ixgb_cleanup_eeprom(hw);
412 412
413 /* clear the init_ctrl_reg_1 to signif 413 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
414 ee_map->init_ctrl_reg_1 = cpu_to_le16( 414 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
415 415
416 return; 416 return;
417 } 417 }
418 418
419 /********************************************* 419 /******************************************************************************
420 * Reads a 16 bit word from the EEPROM. 420 * Reads a 16 bit word from the EEPROM.
421 * 421 *
422 * hw - Struct containing variables accessed b 422 * hw - Struct containing variables accessed by shared code
423 * offset - offset of 16 bit word in the EEPRO 423 * offset - offset of 16 bit word in the EEPROM to read
424 * 424 *
425 * Returns: 425 * Returns:
426 * The 16-bit value read from the eeprom 426 * The 16-bit value read from the eeprom
427 ********************************************* 427 *****************************************************************************/
428 uint16_t 428 uint16_t
429 ixgb_read_eeprom(struct ixgb_hw *hw, 429 ixgb_read_eeprom(struct ixgb_hw *hw,
430 uint16_t offset) 430 uint16_t offset)
431 { 431 {
432 uint16_t data; 432 uint16_t data;
433 433
434 /* Prepare the EEPROM for reading */ 434 /* Prepare the EEPROM for reading */
435 ixgb_setup_eeprom(hw); 435 ixgb_setup_eeprom(hw);
436 436
437 /* Send the READ command (opcode + ad 437 /* Send the READ command (opcode + addr) */
438 ixgb_shift_out_bits(hw, EEPROM_READ_OP 438 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3);
439 /* 439 /*
440 * We have a 64 word EEPROM, there are 440 * We have a 64 word EEPROM, there are 6 address bits
441 */ 441 */
442 ixgb_shift_out_bits(hw, offset, 6); 442 ixgb_shift_out_bits(hw, offset, 6);
443 443
444 /* Read the data */ 444 /* Read the data */
445 data = ixgb_shift_in_bits(hw); 445 data = ixgb_shift_in_bits(hw);
446 446
447 /* End this read operation */ 447 /* End this read operation */
448 ixgb_standby_eeprom(hw); 448 ixgb_standby_eeprom(hw);
449 449
450 return (data); 450 return (data);
451 } 451 }
452 452
453 /********************************************* 453 /******************************************************************************
454 * Reads eeprom and stores data in shared stru 454 * Reads eeprom and stores data in shared structure.
455 * Validates eeprom checksum and eeprom signat 455 * Validates eeprom checksum and eeprom signature.
456 * 456 *
457 * hw - Struct containing variables accessed b 457 * hw - Struct containing variables accessed by shared code
458 * 458 *
459 * Returns: 459 * Returns:
460 * TRUE: if eeprom read is successful 460 * TRUE: if eeprom read is successful
461 * FALSE: otherwise. 461 * FALSE: otherwise.
462 ********************************************* 462 *****************************************************************************/
463 boolean_t 463 boolean_t
464 ixgb_get_eeprom_data(struct ixgb_hw *hw) 464 ixgb_get_eeprom_data(struct ixgb_hw *hw)
465 { 465 {
466 uint16_t i; 466 uint16_t i;
467 uint16_t checksum = 0; 467 uint16_t checksum = 0;
468 struct ixgb_ee_map_type *ee_map; 468 struct ixgb_ee_map_type *ee_map;
469 469
470 DEBUGFUNC("ixgb_get_eeprom_data"); 470 DEBUGFUNC("ixgb_get_eeprom_data");
471 471
472 ee_map = (struct ixgb_ee_map_type *)hw 472 ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
473 473
474 DEBUGOUT("ixgb_ee: Reading eeprom data 474 DEBUGOUT("ixgb_ee: Reading eeprom data\n");
475 for(i = 0; i < IXGB_EEPROM_SIZE ; i++) 475 for(i = 0; i < IXGB_EEPROM_SIZE ; i++) {
476 uint16_t ee_data; 476 uint16_t ee_data;
477 ee_data = ixgb_read_eeprom(hw, 477 ee_data = ixgb_read_eeprom(hw, i);
478 checksum += ee_data; 478 checksum += ee_data;
479 hw->eeprom[i] = cpu_to_le16(ee 479 hw->eeprom[i] = cpu_to_le16(ee_data);
480 } 480 }
481 481
482 if (checksum != (uint16_t) EEPROM_SUM) 482 if (checksum != (uint16_t) EEPROM_SUM) {
483 DEBUGOUT("ixgb_ee: Checksum in 483 DEBUGOUT("ixgb_ee: Checksum invalid.\n");
484 /* clear the init_ctrl_reg_1 t 484 /* clear the init_ctrl_reg_1 to signify that the cache is
485 * invalidated */ 485 * invalidated */
486 ee_map->init_ctrl_reg_1 = cpu_ 486 ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR);
487 return (FALSE); 487 return (FALSE);
488 } 488 }
489 489
490 if ((ee_map->init_ctrl_reg_1 & cpu_to_ 490 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
491 != cpu_to_le16(EEPROM_ICW1_SI 491 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
492 DEBUGOUT("ixgb_ee: Signature i 492 DEBUGOUT("ixgb_ee: Signature invalid.\n");
493 return(FALSE); 493 return(FALSE);
494 } 494 }
495 495
496 return(TRUE); 496 return(TRUE);
497 } 497 }
498 498
499 /********************************************* 499 /******************************************************************************
500 * Local function to check if the eeprom signa 500 * Local function to check if the eeprom signature is good
501 * If the eeprom signature is good, calls ixgb 501 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
502 * 502 *
503 * hw - Struct containing variables accessed b 503 * hw - Struct containing variables accessed by shared code
504 * 504 *
505 * Returns: 505 * Returns:
506 * TRUE: eeprom signature was good and th 506 * TRUE: eeprom signature was good and the eeprom read was successful
507 * FALSE: otherwise. 507 * FALSE: otherwise.
508 ********************************************* 508 ******************************************************************************/
509 static boolean_t 509 static boolean_t
510 ixgb_check_and_get_eeprom_data (struct ixgb_hw 510 ixgb_check_and_get_eeprom_data (struct ixgb_hw* hw)
511 { 511 {
512 struct ixgb_ee_map_type *ee_map = (str 512 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
513 513
514 if ((ee_map->init_ctrl_reg_1 & cpu_to_ 514 if ((ee_map->init_ctrl_reg_1 & cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK))
515 == cpu_to_le16(EEPROM_ICW1_SIGNATU 515 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID)) {
516 return (TRUE); 516 return (TRUE);
517 } else { 517 } else {
518 return ixgb_get_eeprom_data(hw 518 return ixgb_get_eeprom_data(hw);
519 } 519 }
520 } 520 }
521 521
522 /********************************************* 522 /******************************************************************************
523 * return a word from the eeprom 523 * return a word from the eeprom
524 * 524 *
525 * hw - Struct containing variables accessed b 525 * hw - Struct containing variables accessed by shared code
526 * index - Offset of eeprom word 526 * index - Offset of eeprom word
527 * 527 *
528 * Returns: 528 * Returns:
529 * Word at indexed offset in eeprom, 529 * Word at indexed offset in eeprom, if valid, 0 otherwise.
530 ********************************************* 530 ******************************************************************************/
531 __le16 531 __le16
532 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint1 532 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index)
533 { 533 {
534 534
535 if ((index < IXGB_EEPROM_SIZE) && 535 if ((index < IXGB_EEPROM_SIZE) &&
536 (ixgb_check_and_get_eeprom_dat 536 (ixgb_check_and_get_eeprom_data(hw) == TRUE)) {
537 return(hw->eeprom[index]); 537 return(hw->eeprom[index]);
538 } 538 }
539 539
540 return(0); 540 return(0);
541 } 541 }
542 542
543 /********************************************* 543 /******************************************************************************
544 * return the mac address from EEPROM 544 * return the mac address from EEPROM
545 * 545 *
546 * hw - Struct containing variables acce 546 * hw - Struct containing variables accessed by shared code
547 * mac_addr - Ethernet Address if EEPROM conte 547 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
548 * 548 *
549 * Returns: None. 549 * Returns: None.
550 ********************************************* 550 ******************************************************************************/
551 void 551 void
552 ixgb_get_ee_mac_addr(struct ixgb_hw *hw, 552 ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
553 uint8_t *mac_addr) 553 uint8_t *mac_addr)
554 { 554 {
555 int i; 555 int i;
556 struct ixgb_ee_map_type *ee_map = (str 556 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
557 557
558 DEBUGFUNC("ixgb_get_ee_mac_addr"); 558 DEBUGFUNC("ixgb_get_ee_mac_addr");
559 559
560 if (ixgb_check_and_get_eeprom_data(hw) 560 if (ixgb_check_and_get_eeprom_data(hw) == TRUE) {
561 for (i = 0; i < IXGB_ETH_LENGT 561 for (i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) {
562 mac_addr[i] = ee_map-> 562 mac_addr[i] = ee_map->mac_addr[i];
563 DEBUGOUT2("mac(%d) = % 563 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]);
564 } 564 }
565 } 565 }
566 } 566 }
567 567
568 568
569 /********************************************* 569 /******************************************************************************
570 * return the Printed Board Assembly number fr 570 * return the Printed Board Assembly number from EEPROM
571 * 571 *
572 * hw - Struct containing variables accessed b 572 * hw - Struct containing variables accessed by shared code
573 * 573 *
574 * Returns: 574 * Returns:
575 * PBA number if EEPROM contents are 575 * PBA number if EEPROM contents are valid, 0 otherwise
576 ********************************************* 576 ******************************************************************************/
577 uint32_t 577 uint32_t
578 ixgb_get_ee_pba_number(struct ixgb_hw *hw) 578 ixgb_get_ee_pba_number(struct ixgb_hw *hw)
579 { 579 {
580 if(ixgb_check_and_get_eeprom_data(hw) 580 if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
581 return (le16_to_cpu(hw->eeprom 581 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
582 | (le16_to_cpu(hw->eep 582 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16));
583 583
584 return(0); 584 return(0);
585 } 585 }
586 586
587 587
588 /********************************************* 588 /******************************************************************************
589 * return the Device Id from EEPROM 589 * return the Device Id from EEPROM
590 * 590 *
591 * hw - Struct containing variables accessed b 591 * hw - Struct containing variables accessed by shared code
592 * 592 *
593 * Returns: 593 * Returns:
594 * Device Id if EEPROM contents are v 594 * Device Id if EEPROM contents are valid, 0 otherwise
595 ********************************************* 595 ******************************************************************************/
596 uint16_t 596 uint16_t
597 ixgb_get_ee_device_id(struct ixgb_hw *hw) 597 ixgb_get_ee_device_id(struct ixgb_hw *hw)
598 { 598 {
599 struct ixgb_ee_map_type *ee_map = (str 599 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
600 600
601 if(ixgb_check_and_get_eeprom_data(hw) 601 if(ixgb_check_and_get_eeprom_data(hw) == TRUE)
602 return (le16_to_cpu(ee_map->de 602 return (le16_to_cpu(ee_map->device_id));
603 603
604 return (0); 604 return (0);
605 } 605 }
606 606
607 607
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