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1 /* 1 /*
2 * Davicom DM9000 Fast Ethernet driver fo 2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang 3 * Copyright (C) 1997 Sten Wang
4 * 4 *
5 * This program is free software; you can 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU G 6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foun 7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) an 8 * of the License, or (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hop 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTI 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more de 13 * GNU General Public License for more details.
14 * 14 *
15 * (C) Copyright 1997-1998 DAVICOM Semiconduct 15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
16 * 16 *
17 * Additional updates, Copyright: 17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk> 18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de> 19 * Sascha Hauer <s.hauer@pengutronix.de>
20 */ 20 */
21 21
22 #include <linux/module.h> 22 #include <linux/module.h>
23 #include <linux/ioport.h> 23 #include <linux/ioport.h>
24 #include <linux/netdevice.h> 24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h> 25 #include <linux/etherdevice.h>
26 #include <linux/init.h> 26 #include <linux/init.h>
27 #include <linux/skbuff.h> 27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h> 28 #include <linux/spinlock.h>
29 #include <linux/crc32.h> 29 #include <linux/crc32.h>
30 #include <linux/mii.h> 30 #include <linux/mii.h>
31 #include <linux/ethtool.h> 31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h> 32 #include <linux/dm9000.h>
33 #include <linux/delay.h> 33 #include <linux/delay.h>
34 #include <linux/platform_device.h> 34 #include <linux/platform_device.h>
35 #include <linux/irq.h> 35 #include <linux/irq.h>
36 36
37 #include <asm/delay.h> 37 #include <asm/delay.h>
38 #include <asm/irq.h> 38 #include <asm/irq.h>
39 #include <asm/io.h> 39 #include <asm/io.h>
40 40
41 #include "dm9000.h" 41 #include "dm9000.h"
42 42
43 /* Board/System/Debug information/definition - 43 /* Board/System/Debug information/definition ---------------- */
44 44
45 #define DM9000_PHY 0x40 /* PHY 45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
46 46
47 #define CARDNAME "dm9000" !! 47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31" !! 48 #define PFX CARDNAME ": "
>> 49 #define DRV_VERSION "1.30"
>> 50
>> 51 #ifdef CONFIG_BLACKFIN
>> 52 #define readsb insb
>> 53 #define readsw insw
>> 54 #define readsl insl
>> 55 #define writesb outsb
>> 56 #define writesw outsw
>> 57 #define writesl outsl
>> 58 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
>> 59 #else
>> 60 #define DEFAULT_TRIGGER (0)
>> 61 #endif
49 62
50 /* 63 /*
51 * Transmit timeout, default 5 seconds. 64 * Transmit timeout, default 5 seconds.
52 */ 65 */
53 static int watchdog = 5000; 66 static int watchdog = 5000;
54 module_param(watchdog, int, 0400); 67 module_param(watchdog, int, 0400);
55 MODULE_PARM_DESC(watchdog, "transmit timeout i 68 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
56 69
57 /* DM9000 register address locking. 70 /* DM9000 register address locking.
58 * 71 *
59 * The DM9000 uses an address register to cont 72 * The DM9000 uses an address register to control where data written
60 * to the data register goes. This means that 73 * to the data register goes. This means that the address register
61 * must be preserved over interrupts or simila 74 * must be preserved over interrupts or similar calls.
62 * 75 *
63 * During interrupt and other critical calls, 76 * During interrupt and other critical calls, a spinlock is used to
64 * protect the system, but the calls themselve 77 * protect the system, but the calls themselves save the address
65 * in the address register in case they are in 78 * in the address register in case they are interrupting another
66 * access to the device. 79 * access to the device.
67 * 80 *
68 * For general accesses a lock is provided so 81 * For general accesses a lock is provided so that calls which are
69 * allowed to sleep are serialised so that the 82 * allowed to sleep are serialised so that the address register does
70 * not need to be saved. This lock also serves 83 * not need to be saved. This lock also serves to serialise access
71 * to the EEPROM and PHY access registers whic 84 * to the EEPROM and PHY access registers which are shared between
72 * these two devices. 85 * these two devices.
73 */ 86 */
74 87
75 /* The driver supports the original DM9000E, a <<
76 * devices, DM9000A and DM9000B. <<
77 */ <<
78 <<
79 enum dm9000_type { <<
80 TYPE_DM9000E, /* original DM9000 */ <<
81 TYPE_DM9000A, <<
82 TYPE_DM9000B <<
83 }; <<
84 <<
85 /* Structure/enum declaration ---------------- 88 /* Structure/enum declaration ------------------------------- */
86 typedef struct board_info { 89 typedef struct board_info {
87 90
88 void __iomem *io_addr; /* Reg !! 91 void __iomem *io_addr; /* Register I/O base address */
89 void __iomem *io_data; /* Dat !! 92 void __iomem *io_data; /* Data I/O address */
90 u16 irq; /* IRQ !! 93 u16 irq; /* IRQ */
91 !! 94
92 u16 tx_pkt_cnt; !! 95 u16 tx_pkt_cnt;
93 u16 queue_pkt_len; !! 96 u16 queue_pkt_len;
94 u16 queue_start_addr; !! 97 u16 queue_start_addr;
95 u16 dbug_cnt; !! 98 u16 dbug_cnt;
96 u8 io_mode; !! 99 u8 io_mode; /* 0:word, 2:byte */
97 u8 phy_addr; !! 100 u8 phy_addr;
98 u8 imr_all; !! 101 unsigned int flags;
99 !! 102 unsigned int in_suspend :1;
100 unsigned int flags; <<
101 unsigned int in_suspend :1; <<
102 int debug_level; <<
103 103
104 enum dm9000_type type; !! 104 int debug_level;
105 105
106 void (*inblk)(void __iomem *port, void 106 void (*inblk)(void __iomem *port, void *data, int length);
107 void (*outblk)(void __iomem *port, voi 107 void (*outblk)(void __iomem *port, void *data, int length);
108 void (*dumpblk)(void __iomem *port, in 108 void (*dumpblk)(void __iomem *port, int length);
109 109
110 struct device *dev; /* parent 110 struct device *dev; /* parent device */
111 111
112 struct resource *addr_res; /* resour 112 struct resource *addr_res; /* resources found */
113 struct resource *data_res; 113 struct resource *data_res;
114 struct resource *addr_req; /* resour 114 struct resource *addr_req; /* resources requested */
115 struct resource *data_req; 115 struct resource *data_req;
116 struct resource *irq_res; 116 struct resource *irq_res;
117 117
118 struct mutex addr_lock; /* phy 118 struct mutex addr_lock; /* phy and eeprom access lock */
119 119
120 struct delayed_work phy_poll; !! 120 spinlock_t lock;
121 struct net_device *ndev; <<
122 <<
123 spinlock_t lock; <<
124 121
125 struct mii_if_info mii; 122 struct mii_if_info mii;
126 u32 msg_enable; !! 123 u32 msg_enable;
127 } board_info_t; 124 } board_info_t;
128 125
129 /* debug code */ 126 /* debug code */
130 127
131 #define dm9000_dbg(db, lev, msg...) do { 128 #define dm9000_dbg(db, lev, msg...) do { \
132 if ((lev) < CONFIG_DM9000_DEBUGLEVEL & 129 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
133 (lev) < db->debug_level) { 130 (lev) < db->debug_level) { \
134 dev_dbg(db->dev, msg); 131 dev_dbg(db->dev, msg); \
135 } 132 } \
136 } while (0) 133 } while (0)
137 134
138 static inline board_info_t *to_dm9000_board(st 135 static inline board_info_t *to_dm9000_board(struct net_device *dev)
139 { 136 {
140 return netdev_priv(dev); !! 137 return dev->priv;
141 } 138 }
142 139
>> 140 /* function declaration ------------------------------------- */
>> 141 static int dm9000_probe(struct platform_device *);
>> 142 static int dm9000_open(struct net_device *);
>> 143 static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
>> 144 static int dm9000_stop(struct net_device *);
>> 145 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd);
>> 146
>> 147 static void dm9000_init_dm9000(struct net_device *);
>> 148
>> 149 static irqreturn_t dm9000_interrupt(int, void *);
>> 150
>> 151 static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
>> 152 static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
>> 153 int value);
>> 154
>> 155 static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to);
>> 156 static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp);
>> 157 static void dm9000_rx(struct net_device *);
>> 158 static void dm9000_hash_table(struct net_device *);
>> 159
143 /* DM9000 network board routine -------------- 160 /* DM9000 network board routine ---------------------------- */
144 161
145 static void 162 static void
146 dm9000_reset(board_info_t * db) 163 dm9000_reset(board_info_t * db)
147 { 164 {
148 dev_dbg(db->dev, "resetting device\n") 165 dev_dbg(db->dev, "resetting device\n");
149 166
150 /* RESET device */ 167 /* RESET device */
151 writeb(DM9000_NCR, db->io_addr); 168 writeb(DM9000_NCR, db->io_addr);
152 udelay(200); 169 udelay(200);
153 writeb(NCR_RST, db->io_data); 170 writeb(NCR_RST, db->io_data);
154 udelay(200); 171 udelay(200);
155 } 172 }
156 173
157 /* 174 /*
158 * Read a byte from I/O port 175 * Read a byte from I/O port
159 */ 176 */
160 static u8 177 static u8
161 ior(board_info_t * db, int reg) 178 ior(board_info_t * db, int reg)
162 { 179 {
163 writeb(reg, db->io_addr); 180 writeb(reg, db->io_addr);
164 return readb(db->io_data); 181 return readb(db->io_data);
165 } 182 }
166 183
167 /* 184 /*
168 * Write a byte to I/O port 185 * Write a byte to I/O port
169 */ 186 */
170 187
171 static void 188 static void
172 iow(board_info_t * db, int reg, int value) 189 iow(board_info_t * db, int reg, int value)
173 { 190 {
174 writeb(reg, db->io_addr); 191 writeb(reg, db->io_addr);
175 writeb(value, db->io_data); 192 writeb(value, db->io_data);
176 } 193 }
177 194
178 /* routines for sending block to chip */ 195 /* routines for sending block to chip */
179 196
180 static void dm9000_outblk_8bit(void __iomem *r 197 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
181 { 198 {
182 writesb(reg, data, count); 199 writesb(reg, data, count);
183 } 200 }
184 201
185 static void dm9000_outblk_16bit(void __iomem * 202 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
186 { 203 {
187 writesw(reg, data, (count+1) >> 1); 204 writesw(reg, data, (count+1) >> 1);
188 } 205 }
189 206
190 static void dm9000_outblk_32bit(void __iomem * 207 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
191 { 208 {
192 writesl(reg, data, (count+3) >> 2); 209 writesl(reg, data, (count+3) >> 2);
193 } 210 }
194 211
195 /* input block from chip to memory */ 212 /* input block from chip to memory */
196 213
197 static void dm9000_inblk_8bit(void __iomem *re 214 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
198 { 215 {
199 readsb(reg, data, count); 216 readsb(reg, data, count);
200 } 217 }
201 218
202 219
203 static void dm9000_inblk_16bit(void __iomem *r 220 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
204 { 221 {
205 readsw(reg, data, (count+1) >> 1); 222 readsw(reg, data, (count+1) >> 1);
206 } 223 }
207 224
208 static void dm9000_inblk_32bit(void __iomem *r 225 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
209 { 226 {
210 readsl(reg, data, (count+3) >> 2); 227 readsl(reg, data, (count+3) >> 2);
211 } 228 }
212 229
213 /* dump block from chip to null */ 230 /* dump block from chip to null */
214 231
215 static void dm9000_dumpblk_8bit(void __iomem * 232 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
216 { 233 {
217 int i; 234 int i;
218 int tmp; 235 int tmp;
219 236
220 for (i = 0; i < count; i++) 237 for (i = 0; i < count; i++)
221 tmp = readb(reg); 238 tmp = readb(reg);
222 } 239 }
223 240
224 static void dm9000_dumpblk_16bit(void __iomem 241 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
225 { 242 {
226 int i; 243 int i;
227 int tmp; 244 int tmp;
228 245
229 count = (count + 1) >> 1; 246 count = (count + 1) >> 1;
230 247
231 for (i = 0; i < count; i++) 248 for (i = 0; i < count; i++)
232 tmp = readw(reg); 249 tmp = readw(reg);
233 } 250 }
234 251
235 static void dm9000_dumpblk_32bit(void __iomem 252 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
236 { 253 {
237 int i; 254 int i;
238 int tmp; 255 int tmp;
239 256
240 count = (count + 3) >> 2; 257 count = (count + 3) >> 2;
241 258
242 for (i = 0; i < count; i++) 259 for (i = 0; i < count; i++)
243 tmp = readl(reg); 260 tmp = readl(reg);
244 } 261 }
245 262
246 /* dm9000_set_io 263 /* dm9000_set_io
247 * 264 *
248 * select the specified set of io routines to 265 * select the specified set of io routines to use with the
249 * device 266 * device
250 */ 267 */
251 268
252 static void dm9000_set_io(struct board_info *d 269 static void dm9000_set_io(struct board_info *db, int byte_width)
253 { 270 {
254 /* use the size of the data resource t 271 /* use the size of the data resource to work out what IO
255 * routines we want to use 272 * routines we want to use
256 */ 273 */
257 274
258 switch (byte_width) { 275 switch (byte_width) {
259 case 1: 276 case 1:
260 db->dumpblk = dm9000_dumpblk_8 277 db->dumpblk = dm9000_dumpblk_8bit;
261 db->outblk = dm9000_outblk_8b 278 db->outblk = dm9000_outblk_8bit;
262 db->inblk = dm9000_inblk_8bi 279 db->inblk = dm9000_inblk_8bit;
263 break; 280 break;
264 281
265 282
266 case 3: 283 case 3:
267 dev_dbg(db->dev, ": 3 byte IO, 284 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
268 case 2: 285 case 2:
269 db->dumpblk = dm9000_dumpblk_1 286 db->dumpblk = dm9000_dumpblk_16bit;
270 db->outblk = dm9000_outblk_16 287 db->outblk = dm9000_outblk_16bit;
271 db->inblk = dm9000_inblk_16b 288 db->inblk = dm9000_inblk_16bit;
272 break; 289 break;
273 290
274 case 4: 291 case 4:
275 default: 292 default:
276 db->dumpblk = dm9000_dumpblk_3 293 db->dumpblk = dm9000_dumpblk_32bit;
277 db->outblk = dm9000_outblk_32 294 db->outblk = dm9000_outblk_32bit;
278 db->inblk = dm9000_inblk_32b 295 db->inblk = dm9000_inblk_32bit;
279 break; 296 break;
280 } 297 }
281 } 298 }
282 299
283 static void dm9000_schedule_poll(board_info_t <<
284 { <<
285 if (db->type == TYPE_DM9000E) <<
286 schedule_delayed_work(&db->phy <<
287 } <<
288 <<
289 static int dm9000_ioctl(struct net_device *dev <<
290 { <<
291 board_info_t *dm = to_dm9000_board(dev <<
292 <<
293 if (!netif_running(dev)) <<
294 return -EINVAL; <<
295 <<
296 return generic_mii_ioctl(&dm->mii, if_ <<
297 } <<
298 300
299 static unsigned int !! 301 /* Our watchdog timed out. Called by the networking layer */
300 dm9000_read_locked(board_info_t *db, int reg) !! 302 static void dm9000_timeout(struct net_device *dev)
301 { 303 {
>> 304 board_info_t *db = (board_info_t *) dev->priv;
>> 305 u8 reg_save;
302 unsigned long flags; 306 unsigned long flags;
303 unsigned int ret; <<
304 <<
305 spin_lock_irqsave(&db->lock, flags); <<
306 ret = ior(db, reg); <<
307 spin_unlock_irqrestore(&db->lock, flag <<
308 <<
309 return ret; <<
310 } <<
311 <<
312 static int dm9000_wait_eeprom(board_info_t *db <<
313 { <<
314 unsigned int status; <<
315 int timeout = 8; /* wait max 8m <<
316 <<
317 /* The DM9000 data sheets say we shoul <<
318 * poll the ERRE bit in EPCR to wait f <<
319 * operation. From testing several chi <<
320 * does not seem to work. <<
321 * <<
322 * We attempt to use the bit, but fall <<
323 * timeout (which is why we do not ret <<
324 * on expiry) to say that the EEPROM o <<
325 * completed. <<
326 */ <<
327 <<
328 while (1) { <<
329 status = dm9000_read_locked(db <<
330 <<
331 if ((status & EPCR_ERRE) == 0) <<
332 break; <<
333 307
334 msleep(1); !! 308 /* Save previous register address */
>> 309 reg_save = readb(db->io_addr);
>> 310 spin_lock_irqsave(&db->lock,flags);
335 311
336 if (timeout-- < 0) { !! 312 netif_stop_queue(dev);
337 dev_dbg(db->dev, "time !! 313 dm9000_reset(db);
338 break; !! 314 dm9000_init_dm9000(dev);
339 } !! 315 /* We can accept TX packets again */
340 } !! 316 dev->trans_start = jiffies;
>> 317 netif_wake_queue(dev);
341 318
342 return 0; !! 319 /* Restore previous register address */
>> 320 writeb(reg_save, db->io_addr);
>> 321 spin_unlock_irqrestore(&db->lock,flags);
343 } 322 }
344 323
>> 324 #ifdef CONFIG_NET_POLL_CONTROLLER
345 /* 325 /*
346 * Read a word data from EEPROM !! 326 *Used by netconsole
347 */ 327 */
348 static void !! 328 static void dm9000_poll_controller(struct net_device *dev)
349 dm9000_read_eeprom(board_info_t *db, int offse <<
350 { 329 {
351 unsigned long flags; !! 330 disable_irq(dev->irq);
352 !! 331 dm9000_interrupt(dev->irq,dev);
353 if (db->flags & DM9000_PLATF_NO_EEPROM !! 332 enable_irq(dev->irq);
354 to[0] = 0xff; <<
355 to[1] = 0xff; <<
356 return; <<
357 } <<
358 <<
359 mutex_lock(&db->addr_lock); <<
360 <<
361 spin_lock_irqsave(&db->lock, flags); <<
362 <<
363 iow(db, DM9000_EPAR, offset); <<
364 iow(db, DM9000_EPCR, EPCR_ERPRR); <<
365 <<
366 spin_unlock_irqrestore(&db->lock, flag <<
367 <<
368 dm9000_wait_eeprom(db); <<
369 <<
370 /* delay for at-least 150uS */ <<
371 msleep(1); <<
372 <<
373 spin_lock_irqsave(&db->lock, flags); <<
374 <<
375 iow(db, DM9000_EPCR, 0x0); <<
376 <<
377 to[0] = ior(db, DM9000_EPDRL); <<
378 to[1] = ior(db, DM9000_EPDRH); <<
379 <<
380 spin_unlock_irqrestore(&db->lock, flag <<
381 <<
382 mutex_unlock(&db->addr_lock); <<
383 } 333 }
>> 334 #endif
384 335
385 /* !! 336 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
386 * Write a word data to SROM <<
387 */ <<
388 static void <<
389 dm9000_write_eeprom(board_info_t *db, int offs <<
390 { 337 {
391 unsigned long flags; !! 338 board_info_t *dm = to_dm9000_board(dev);
392 <<
393 if (db->flags & DM9000_PLATF_NO_EEPROM <<
394 return; <<
395 <<
396 mutex_lock(&db->addr_lock); <<
397 <<
398 spin_lock_irqsave(&db->lock, flags); <<
399 iow(db, DM9000_EPAR, offset); <<
400 iow(db, DM9000_EPDRH, data[1]); <<
401 iow(db, DM9000_EPDRL, data[0]); <<
402 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_E <<
403 spin_unlock_irqrestore(&db->lock, flag <<
404 <<
405 dm9000_wait_eeprom(db); <<
406 <<
407 mdelay(1); /* wait at least 150uS <<
408 339
409 spin_lock_irqsave(&db->lock, flags); !! 340 if (!netif_running(dev))
410 iow(db, DM9000_EPCR, 0); !! 341 return -EINVAL;
411 spin_unlock_irqrestore(&db->lock, flag <<
412 342
413 mutex_unlock(&db->addr_lock); !! 343 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
414 } 344 }
415 345
416 /* ethtool ops */ 346 /* ethtool ops */
417 347
418 static void dm9000_get_drvinfo(struct net_devi 348 static void dm9000_get_drvinfo(struct net_device *dev,
419 struct ethtool_ 349 struct ethtool_drvinfo *info)
420 { 350 {
421 board_info_t *dm = to_dm9000_board(dev 351 board_info_t *dm = to_dm9000_board(dev);
422 352
423 strcpy(info->driver, CARDNAME); 353 strcpy(info->driver, CARDNAME);
424 strcpy(info->version, DRV_VERSION); 354 strcpy(info->version, DRV_VERSION);
425 strcpy(info->bus_info, to_platform_dev 355 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
426 } 356 }
427 357
428 static u32 dm9000_get_msglevel(struct net_devi 358 static u32 dm9000_get_msglevel(struct net_device *dev)
429 { 359 {
430 board_info_t *dm = to_dm9000_board(dev 360 board_info_t *dm = to_dm9000_board(dev);
431 361
432 return dm->msg_enable; 362 return dm->msg_enable;
433 } 363 }
434 364
435 static void dm9000_set_msglevel(struct net_dev 365 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
436 { 366 {
437 board_info_t *dm = to_dm9000_board(dev 367 board_info_t *dm = to_dm9000_board(dev);
438 368
439 dm->msg_enable = value; 369 dm->msg_enable = value;
440 } 370 }
441 371
442 static int dm9000_get_settings(struct net_devi 372 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
443 { 373 {
444 board_info_t *dm = to_dm9000_board(dev 374 board_info_t *dm = to_dm9000_board(dev);
445 375
446 mii_ethtool_gset(&dm->mii, cmd); 376 mii_ethtool_gset(&dm->mii, cmd);
447 return 0; 377 return 0;
448 } 378 }
449 379
450 static int dm9000_set_settings(struct net_devi 380 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
451 { 381 {
452 board_info_t *dm = to_dm9000_board(dev 382 board_info_t *dm = to_dm9000_board(dev);
453 383
454 return mii_ethtool_sset(&dm->mii, cmd) 384 return mii_ethtool_sset(&dm->mii, cmd);
455 } 385 }
456 386
457 static int dm9000_nway_reset(struct net_device 387 static int dm9000_nway_reset(struct net_device *dev)
458 { 388 {
459 board_info_t *dm = to_dm9000_board(dev 389 board_info_t *dm = to_dm9000_board(dev);
460 return mii_nway_restart(&dm->mii); 390 return mii_nway_restart(&dm->mii);
461 } 391 }
462 392
463 static u32 dm9000_get_link(struct net_device * 393 static u32 dm9000_get_link(struct net_device *dev)
464 { 394 {
465 board_info_t *dm = to_dm9000_board(dev 395 board_info_t *dm = to_dm9000_board(dev);
466 u32 ret; !! 396 return mii_link_ok(&dm->mii);
467 <<
468 if (dm->flags & DM9000_PLATF_EXT_PHY) <<
469 ret = mii_link_ok(&dm->mii); <<
470 else <<
471 ret = dm9000_read_locked(dm, D <<
472 <<
473 return ret; <<
474 } 397 }
475 398
476 #define DM_EEPROM_MAGIC (0x444D394B) 399 #define DM_EEPROM_MAGIC (0x444D394B)
477 400
478 static int dm9000_get_eeprom_len(struct net_de 401 static int dm9000_get_eeprom_len(struct net_device *dev)
479 { 402 {
480 return 128; 403 return 128;
481 } 404 }
482 405
483 static int dm9000_get_eeprom(struct net_device 406 static int dm9000_get_eeprom(struct net_device *dev,
484 struct ethtool_ee 407 struct ethtool_eeprom *ee, u8 *data)
485 { 408 {
486 board_info_t *dm = to_dm9000_board(dev 409 board_info_t *dm = to_dm9000_board(dev);
487 int offset = ee->offset; 410 int offset = ee->offset;
488 int len = ee->len; 411 int len = ee->len;
489 int i; 412 int i;
490 413
491 /* EEPROM access is aligned to two byt 414 /* EEPROM access is aligned to two bytes */
492 415
493 if ((len & 1) != 0 || (offset & 1) != 416 if ((len & 1) != 0 || (offset & 1) != 0)
494 return -EINVAL; 417 return -EINVAL;
495 418
496 if (dm->flags & DM9000_PLATF_NO_EEPROM 419 if (dm->flags & DM9000_PLATF_NO_EEPROM)
497 return -ENOENT; 420 return -ENOENT;
498 421
499 ee->magic = DM_EEPROM_MAGIC; 422 ee->magic = DM_EEPROM_MAGIC;
500 423
501 for (i = 0; i < len; i += 2) 424 for (i = 0; i < len; i += 2)
502 dm9000_read_eeprom(dm, (offset 425 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
503 426
504 return 0; 427 return 0;
505 } 428 }
506 429
507 static int dm9000_set_eeprom(struct net_device 430 static int dm9000_set_eeprom(struct net_device *dev,
508 struct ethtool_ee 431 struct ethtool_eeprom *ee, u8 *data)
509 { 432 {
510 board_info_t *dm = to_dm9000_board(dev 433 board_info_t *dm = to_dm9000_board(dev);
511 int offset = ee->offset; 434 int offset = ee->offset;
512 int len = ee->len; 435 int len = ee->len;
513 int i; 436 int i;
514 437
515 /* EEPROM access is aligned to two byt 438 /* EEPROM access is aligned to two bytes */
516 439
517 if ((len & 1) != 0 || (offset & 1) != 440 if ((len & 1) != 0 || (offset & 1) != 0)
518 return -EINVAL; 441 return -EINVAL;
519 442
520 if (dm->flags & DM9000_PLATF_NO_EEPROM 443 if (dm->flags & DM9000_PLATF_NO_EEPROM)
521 return -ENOENT; 444 return -ENOENT;
522 445
523 if (ee->magic != DM_EEPROM_MAGIC) 446 if (ee->magic != DM_EEPROM_MAGIC)
524 return -EINVAL; 447 return -EINVAL;
525 448
526 for (i = 0; i < len; i += 2) 449 for (i = 0; i < len; i += 2)
527 dm9000_write_eeprom(dm, (offse 450 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
528 451
529 return 0; 452 return 0;
530 } 453 }
531 454
532 static const struct ethtool_ops dm9000_ethtool 455 static const struct ethtool_ops dm9000_ethtool_ops = {
533 .get_drvinfo = dm9000_get_d 456 .get_drvinfo = dm9000_get_drvinfo,
534 .get_settings = dm9000_get_s 457 .get_settings = dm9000_get_settings,
535 .set_settings = dm9000_set_s 458 .set_settings = dm9000_set_settings,
536 .get_msglevel = dm9000_get_m 459 .get_msglevel = dm9000_get_msglevel,
537 .set_msglevel = dm9000_set_m 460 .set_msglevel = dm9000_set_msglevel,
538 .nway_reset = dm9000_nway_ 461 .nway_reset = dm9000_nway_reset,
539 .get_link = dm9000_get_l 462 .get_link = dm9000_get_link,
540 .get_eeprom_len = dm9000_get_e 463 .get_eeprom_len = dm9000_get_eeprom_len,
541 .get_eeprom = dm9000_get_e 464 .get_eeprom = dm9000_get_eeprom,
542 .set_eeprom = dm9000_set_e 465 .set_eeprom = dm9000_set_eeprom,
543 }; 466 };
544 467
545 static void dm9000_show_carrier(board_info_t * <<
546 unsigned carri <<
547 { <<
548 struct net_device *ndev = db->ndev; <<
549 unsigned ncr = dm9000_read_locked(db, <<
550 <<
551 if (carrier) <<
552 dev_info(db->dev, "%s: link up <<
553 ndev->name, (nsr & NS <<
554 (ncr & NCR_FDX) ? "fu <<
555 else <<
556 dev_info(db->dev, "%s: link do <<
557 } <<
558 <<
559 static void <<
560 dm9000_poll_work(struct work_struct *w) <<
561 { <<
562 struct delayed_work *dw = to_delayed_w <<
563 board_info_t *db = container_of(dw, bo <<
564 struct net_device *ndev = db->ndev; <<
565 <<
566 if (db->flags & DM9000_PLATF_SIMPLE_PH <<
567 !(db->flags & DM9000_PLATF_EXT_PHY <<
568 unsigned nsr = dm9000_read_loc <<
569 unsigned old_carrier = netif_c <<
570 unsigned new_carrier; <<
571 <<
572 new_carrier = (nsr & NSR_LINKS <<
573 <<
574 if (old_carrier != new_carrier <<
575 if (netif_msg_link(db) <<
576 dm9000_show_ca <<
577 <<
578 if (!new_carrier) <<
579 netif_carrier_ <<
580 else <<
581 netif_carrier_ <<
582 } <<
583 } else <<
584 mii_check_media(&db->mii, neti <<
585 <<
586 if (netif_running(ndev)) <<
587 dm9000_schedule_poll(db); <<
588 } <<
589 468
590 /* dm9000_release_board 469 /* dm9000_release_board
591 * 470 *
592 * release a board, and any mapped resources 471 * release a board, and any mapped resources
593 */ 472 */
594 473
595 static void 474 static void
596 dm9000_release_board(struct platform_device *p 475 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
597 { 476 {
>> 477 if (db->data_res == NULL) {
>> 478 if (db->addr_res != NULL)
>> 479 release_mem_region((unsigned long)db->io_addr, 4);
>> 480 return;
>> 481 }
>> 482
598 /* unmap our resources */ 483 /* unmap our resources */
599 484
600 iounmap(db->io_addr); 485 iounmap(db->io_addr);
601 iounmap(db->io_data); 486 iounmap(db->io_data);
602 487
603 /* release the resources */ 488 /* release the resources */
604 489
605 release_resource(db->data_req); !! 490 if (db->data_req != NULL) {
606 kfree(db->data_req); !! 491 release_resource(db->data_req);
607 !! 492 kfree(db->data_req);
608 release_resource(db->addr_req); <<
609 kfree(db->addr_req); <<
610 } <<
611 <<
612 static unsigned char dm9000_type_to_char(enum <<
613 { <<
614 switch (type) { <<
615 case TYPE_DM9000E: return 'e'; <<
616 case TYPE_DM9000A: return 'a'; <<
617 case TYPE_DM9000B: return 'b'; <<
618 } 493 }
619 494
620 return '?'; !! 495 if (db->addr_req != NULL) {
>> 496 release_resource(db->addr_req);
>> 497 kfree(db->addr_req);
>> 498 }
621 } 499 }
622 500
>> 501 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
>> 502
623 /* 503 /*
624 * Set DM9000 multicast address !! 504 * Search DM9000 board, allocate space and register it
625 */ 505 */
626 static void !! 506 static int
627 dm9000_hash_table(struct net_device *dev) !! 507 dm9000_probe(struct platform_device *pdev)
628 { 508 {
629 board_info_t *db = netdev_priv(dev); !! 509 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
630 struct dev_mc_list *mcptr = dev->mc_li !! 510 struct board_info *db; /* Point a board information structure */
631 int mc_cnt = dev->mc_count; !! 511 struct net_device *ndev;
632 int i, oft; !! 512 const unsigned char *mac_src;
633 u32 hash_val; !! 513 unsigned long base;
634 u16 hash_table[4]; !! 514 int ret = 0;
635 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | !! 515 int iosize;
636 unsigned long flags; !! 516 int i;
>> 517 u32 id_val;
637 518
638 dm9000_dbg(db, 1, "entering %s\n", __f !! 519 /* Init network device */
>> 520 ndev = alloc_etherdev(sizeof (struct board_info));
>> 521 if (!ndev) {
>> 522 dev_err(&pdev->dev, "could not allocate device.\n");
>> 523 return -ENOMEM;
>> 524 }
639 525
640 spin_lock_irqsave(&db->lock, flags); !! 526 SET_NETDEV_DEV(ndev, &pdev->dev);
641 527
642 for (i = 0, oft = DM9000_PAR; i < 6; i !! 528 dev_dbg(&pdev->dev, "dm9000_probe()");
643 iow(db, oft, dev->dev_addr[i]) <<
644 529
645 /* Clear Hash Table */ !! 530 /* setup board info structure */
646 for (i = 0; i < 4; i++) !! 531 db = (struct board_info *) ndev->priv;
647 hash_table[i] = 0x0; !! 532 memset(db, 0, sizeof (*db));
648 533
649 /* broadcast address */ !! 534 db->dev = &pdev->dev;
650 hash_table[3] = 0x8000; <<
651 535
652 if (dev->flags & IFF_PROMISC) !! 536 spin_lock_init(&db->lock);
653 rcr |= RCR_PRMSC; !! 537 mutex_init(&db->addr_lock);
654 538
655 if (dev->flags & IFF_ALLMULTI) !! 539 if (pdev->num_resources < 2) {
656 rcr |= RCR_ALL; !! 540 ret = -ENODEV;
>> 541 goto out;
>> 542 } else if (pdev->num_resources == 2) {
>> 543 base = pdev->resource[0].start;
657 544
658 /* the multicast address in Hash Table !! 545 if (!request_mem_region(base, 4, ndev->name)) {
659 for (i = 0; i < mc_cnt; i++, mcptr = m !! 546 ret = -EBUSY;
660 hash_val = ether_crc_le(6, mcp !! 547 goto out;
661 hash_table[hash_val / 16] |= ( !! 548 }
662 } <<
663 549
664 /* Write the hash table to MAC MD tabl !! 550 ndev->base_addr = base;
665 for (i = 0, oft = DM9000_MAR; i < 4; i !! 551 ndev->irq = pdev->resource[1].start;
666 iow(db, oft++, hash_table[i]); !! 552 db->io_addr = (void __iomem *)base;
667 iow(db, oft++, hash_table[i] > !! 553 db->io_data = (void __iomem *)(base + 4);
668 } <<
669 554
670 iow(db, DM9000_RCR, rcr); !! 555 /* ensure at least we have a default set of IO routines */
671 spin_unlock_irqrestore(&db->lock, flag !! 556 dm9000_set_io(db, 2);
672 } <<
673 557
674 /* !! 558 } else {
675 * Initilize dm9000 board !! 559 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
676 */ !! 560 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
677 static void !! 561 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
678 dm9000_init_dm9000(struct net_device *dev) !! 562
679 { !! 563 if (db->addr_res == NULL || db->data_res == NULL ||
680 board_info_t *db = netdev_priv(dev); !! 564 db->irq_res == NULL) {
681 unsigned int imr; !! 565 dev_err(db->dev, "insufficient resources\n");
>> 566 ret = -ENOENT;
>> 567 goto out;
>> 568 }
682 569
683 dm9000_dbg(db, 1, "entering %s\n", __f !! 570 i = res_size(db->addr_res);
>> 571 db->addr_req = request_mem_region(db->addr_res->start, i,
>> 572 pdev->name);
>> 573
>> 574 if (db->addr_req == NULL) {
>> 575 dev_err(db->dev, "cannot claim address reg area\n");
>> 576 ret = -EIO;
>> 577 goto out;
>> 578 }
684 579
685 /* I/O mode */ !! 580 db->io_addr = ioremap(db->addr_res->start, i);
686 db->io_mode = ior(db, DM9000_ISR) >> 6 <<
687 581
688 /* GPIO0 on pre-activate PHY */ !! 582 if (db->io_addr == NULL) {
689 iow(db, DM9000_GPR, 0); /* REG_1F bit0 !! 583 dev_err(db->dev, "failed to ioremap address reg\n");
690 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); !! 584 ret = -EINVAL;
691 iow(db, DM9000_GPR, 0); /* Enable PHY !! 585 goto out;
>> 586 }
692 587
693 if (db->flags & DM9000_PLATF_EXT_PHY) !! 588 iosize = res_size(db->data_res);
694 iow(db, DM9000_NCR, NCR_EXT_PH !! 589 db->data_req = request_mem_region(db->data_res->start, iosize,
>> 590 pdev->name);
>> 591
>> 592 if (db->data_req == NULL) {
>> 593 dev_err(db->dev, "cannot claim data reg area\n");
>> 594 ret = -EIO;
>> 595 goto out;
>> 596 }
695 597
696 /* Program operating register */ !! 598 db->io_data = ioremap(db->data_res->start, iosize);
697 iow(db, DM9000_TCR, 0); /* TX <<
698 iow(db, DM9000_BPTR, 0x3f); /* Les <<
699 iow(db, DM9000_FCR, 0xff); /* Flo <<
700 iow(db, DM9000_SMCR, 0); /* Spe <<
701 /* clear TX status */ <<
702 iow(db, DM9000_NSR, NSR_WAKEST | NSR_T <<
703 iow(db, DM9000_ISR, ISR_CLR_STATUS); / <<
704 599
705 /* Set address filter table */ !! 600 if (db->io_data == NULL) {
706 dm9000_hash_table(dev); !! 601 dev_err(db->dev,"failed to ioremap data reg\n");
>> 602 ret = -EINVAL;
>> 603 goto out;
>> 604 }
707 605
708 imr = IMR_PAR | IMR_PTM | IMR_PRM; !! 606 /* fill in parameters for net-dev structure */
709 if (db->type != TYPE_DM9000E) <<
710 imr |= IMR_LNKCHNG; <<
711 607
712 db->imr_all = imr; !! 608 ndev->base_addr = (unsigned long)db->io_addr;
>> 609 ndev->irq = db->irq_res->start;
713 610
714 /* Enable TX/RX interrupt mask */ !! 611 /* ensure at least we have a default set of IO routines */
715 iow(db, DM9000_IMR, imr); !! 612 dm9000_set_io(db, iosize);
>> 613 }
716 614
717 /* Init Driver variable */ !! 615 /* check to see if anything is being over-ridden */
718 db->tx_pkt_cnt = 0; !! 616 if (pdata != NULL) {
719 db->queue_pkt_len = 0; !! 617 /* check to see if the driver wants to over-ride the
720 dev->trans_start = 0; !! 618 * default IO width */
>> 619
>> 620 if (pdata->flags & DM9000_PLATF_8BITONLY)
>> 621 dm9000_set_io(db, 1);
>> 622
>> 623 if (pdata->flags & DM9000_PLATF_16BITONLY)
>> 624 dm9000_set_io(db, 2);
>> 625
>> 626 if (pdata->flags & DM9000_PLATF_32BITONLY)
>> 627 dm9000_set_io(db, 4);
>> 628
>> 629 /* check to see if there are any IO routine
>> 630 * over-rides */
>> 631
>> 632 if (pdata->inblk != NULL)
>> 633 db->inblk = pdata->inblk;
>> 634
>> 635 if (pdata->outblk != NULL)
>> 636 db->outblk = pdata->outblk;
>> 637
>> 638 if (pdata->dumpblk != NULL)
>> 639 db->dumpblk = pdata->dumpblk;
>> 640
>> 641 db->flags = pdata->flags;
>> 642 }
>> 643
>> 644 dm9000_reset(db);
>> 645
>> 646 /* try two times, DM9000 sometimes gets the first read wrong */
>> 647 for (i = 0; i < 8; i++) {
>> 648 id_val = ior(db, DM9000_VIDL);
>> 649 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
>> 650 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
>> 651 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
>> 652
>> 653 if (id_val == DM9000_ID)
>> 654 break;
>> 655 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
>> 656 }
>> 657
>> 658 if (id_val != DM9000_ID) {
>> 659 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
>> 660 ret = -ENODEV;
>> 661 goto out;
>> 662 }
>> 663
>> 664 /* from this point we assume that we have found a DM9000 */
>> 665
>> 666 /* driver system function */
>> 667 ether_setup(ndev);
>> 668
>> 669 ndev->open = &dm9000_open;
>> 670 ndev->hard_start_xmit = &dm9000_start_xmit;
>> 671 ndev->tx_timeout = &dm9000_timeout;
>> 672 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
>> 673 ndev->stop = &dm9000_stop;
>> 674 ndev->set_multicast_list = &dm9000_hash_table;
>> 675 ndev->ethtool_ops = &dm9000_ethtool_ops;
>> 676 ndev->do_ioctl = &dm9000_ioctl;
>> 677
>> 678 #ifdef CONFIG_NET_POLL_CONTROLLER
>> 679 ndev->poll_controller = &dm9000_poll_controller;
>> 680 #endif
>> 681
>> 682 db->msg_enable = NETIF_MSG_LINK;
>> 683 db->mii.phy_id_mask = 0x1f;
>> 684 db->mii.reg_num_mask = 0x1f;
>> 685 db->mii.force_media = 0;
>> 686 db->mii.full_duplex = 0;
>> 687 db->mii.dev = ndev;
>> 688 db->mii.mdio_read = dm9000_phy_read;
>> 689 db->mii.mdio_write = dm9000_phy_write;
>> 690
>> 691 mac_src = "eeprom";
>> 692
>> 693 /* try reading the node address from the attached EEPROM */
>> 694 for (i = 0; i < 6; i += 2)
>> 695 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
>> 696
>> 697 if (!is_valid_ether_addr(ndev->dev_addr)) {
>> 698 /* try reading from mac */
>> 699
>> 700 mac_src = "chip";
>> 701 for (i = 0; i < 6; i++)
>> 702 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
>> 703 }
>> 704
>> 705 if (!is_valid_ether_addr(ndev->dev_addr))
>> 706 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
>> 707 "set using ifconfig\n", ndev->name);
>> 708
>> 709 platform_set_drvdata(pdev, ndev);
>> 710 ret = register_netdev(ndev);
>> 711
>> 712 if (ret == 0) {
>> 713 DECLARE_MAC_BUF(mac);
>> 714 printk("%s: dm9000 at %p,%p IRQ %d MAC: %s (%s)\n",
>> 715 ndev->name, db->io_addr, db->io_data, ndev->irq,
>> 716 print_mac(mac, ndev->dev_addr), mac_src);
>> 717 }
>> 718 return 0;
>> 719
>> 720 out:
>> 721 dev_err(db->dev, "not found (%d).\n", ret);
>> 722
>> 723 dm9000_release_board(pdev, db);
>> 724 free_netdev(ndev);
>> 725
>> 726 return ret;
721 } 727 }
722 728
723 /* Our watchdog timed out. Called by the netwo !! 729 /*
724 static void dm9000_timeout(struct net_device * !! 730 * Open the interface.
>> 731 * The interface is opened whenever "ifconfig" actives it.
>> 732 */
>> 733 static int
>> 734 dm9000_open(struct net_device *dev)
725 { 735 {
726 board_info_t *db = netdev_priv(dev); !! 736 board_info_t *db = (board_info_t *) dev->priv;
727 u8 reg_save; !! 737 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
728 unsigned long flags; <<
729 738
730 /* Save previous register address */ !! 739 if (netif_msg_ifup(db))
731 reg_save = readb(db->io_addr); !! 740 dev_dbg(db->dev, "enabling %s\n", dev->name);
732 spin_lock_irqsave(&db->lock, flags); <<
733 741
734 netif_stop_queue(dev); !! 742 /* If there is no IRQ type specified, default to something that
>> 743 * may work, and tell the user that this is a problem */
>> 744
>> 745 if (irqflags == IRQF_TRIGGER_NONE) {
>> 746 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
>> 747 irqflags = DEFAULT_TRIGGER;
>> 748 }
>> 749
>> 750 irqflags |= IRQF_SHARED;
>> 751
>> 752 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
>> 753 return -EAGAIN;
>> 754
>> 755 /* Initialize DM9000 board */
735 dm9000_reset(db); 756 dm9000_reset(db);
736 dm9000_init_dm9000(dev); 757 dm9000_init_dm9000(dev);
737 /* We can accept TX packets again */ <<
738 dev->trans_start = jiffies; <<
739 netif_wake_queue(dev); <<
740 758
741 /* Restore previous register address * !! 759 /* Init driver variable */
742 writeb(reg_save, db->io_addr); !! 760 db->dbug_cnt = 0;
743 spin_unlock_irqrestore(&db->lock, flag !! 761
>> 762 mii_check_media(&db->mii, netif_msg_link(db), 1);
>> 763 netif_start_queue(dev);
>> 764
>> 765 return 0;
>> 766 }
>> 767
>> 768 /*
>> 769 * Initilize dm9000 board
>> 770 */
>> 771 static void
>> 772 dm9000_init_dm9000(struct net_device *dev)
>> 773 {
>> 774 board_info_t *db = (board_info_t *) dev->priv;
>> 775
>> 776 dm9000_dbg(db, 1, "entering %s\n", __func__);
>> 777
>> 778 /* I/O mode */
>> 779 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
>> 780
>> 781 /* GPIO0 on pre-activate PHY */
>> 782 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
>> 783 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
>> 784 iow(db, DM9000_GPR, 0); /* Enable PHY */
>> 785
>> 786 if (db->flags & DM9000_PLATF_EXT_PHY)
>> 787 iow(db, DM9000_NCR, NCR_EXT_PHY);
>> 788
>> 789 /* Program operating register */
>> 790 iow(db, DM9000_TCR, 0); /* TX Polling clear */
>> 791 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
>> 792 iow(db, DM9000_FCR, 0xff); /* Flow Control */
>> 793 iow(db, DM9000_SMCR, 0); /* Special Mode */
>> 794 /* clear TX status */
>> 795 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
>> 796 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
>> 797
>> 798 /* Set address filter table */
>> 799 dm9000_hash_table(dev);
>> 800
>> 801 /* Enable TX/RX interrupt mask */
>> 802 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
>> 803
>> 804 /* Init Driver variable */
>> 805 db->tx_pkt_cnt = 0;
>> 806 db->queue_pkt_len = 0;
>> 807 dev->trans_start = 0;
744 } 808 }
745 809
746 /* 810 /*
747 * Hardware start transmission. 811 * Hardware start transmission.
748 * Send a packet to media from the upper laye 812 * Send a packet to media from the upper layer.
749 */ 813 */
750 static int 814 static int
751 dm9000_start_xmit(struct sk_buff *skb, struct 815 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
752 { 816 {
753 unsigned long flags; 817 unsigned long flags;
754 board_info_t *db = netdev_priv(dev); !! 818 board_info_t *db = (board_info_t *) dev->priv;
755 819
756 dm9000_dbg(db, 3, "%s:\n", __func__); 820 dm9000_dbg(db, 3, "%s:\n", __func__);
757 821
758 if (db->tx_pkt_cnt > 1) 822 if (db->tx_pkt_cnt > 1)
759 return NETDEV_TX_BUSY; !! 823 return 1;
760 824
761 spin_lock_irqsave(&db->lock, flags); 825 spin_lock_irqsave(&db->lock, flags);
762 826
763 /* Move data to DM9000 TX RAM */ 827 /* Move data to DM9000 TX RAM */
764 writeb(DM9000_MWCMD, db->io_addr); 828 writeb(DM9000_MWCMD, db->io_addr);
765 829
766 (db->outblk)(db->io_data, skb->data, s 830 (db->outblk)(db->io_data, skb->data, skb->len);
767 dev->stats.tx_bytes += skb->len; 831 dev->stats.tx_bytes += skb->len;
768 832
769 db->tx_pkt_cnt++; 833 db->tx_pkt_cnt++;
770 /* TX control: First packet immediatel 834 /* TX control: First packet immediately send, second packet queue */
771 if (db->tx_pkt_cnt == 1) { 835 if (db->tx_pkt_cnt == 1) {
772 /* Set TX length to DM9000 */ 836 /* Set TX length to DM9000 */
773 iow(db, DM9000_TXPLL, skb->len 837 iow(db, DM9000_TXPLL, skb->len);
774 iow(db, DM9000_TXPLH, skb->len 838 iow(db, DM9000_TXPLH, skb->len >> 8);
775 839
776 /* Issue TX polling command */ 840 /* Issue TX polling command */
777 iow(db, DM9000_TCR, TCR_TXREQ) 841 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
778 842
779 dev->trans_start = jiffies; 843 dev->trans_start = jiffies; /* save the time stamp */
780 } else { 844 } else {
781 /* Second packet */ 845 /* Second packet */
782 db->queue_pkt_len = skb->len; 846 db->queue_pkt_len = skb->len;
783 netif_stop_queue(dev); 847 netif_stop_queue(dev);
784 } 848 }
785 849
786 spin_unlock_irqrestore(&db->lock, flag 850 spin_unlock_irqrestore(&db->lock, flags);
787 851
788 /* free this SKB */ 852 /* free this SKB */
789 dev_kfree_skb(skb); 853 dev_kfree_skb(skb);
790 854
791 return 0; 855 return 0;
792 } 856 }
793 857
>> 858 static void
>> 859 dm9000_shutdown(struct net_device *dev)
>> 860 {
>> 861 board_info_t *db = (board_info_t *) dev->priv;
>> 862
>> 863 /* RESET device */
>> 864 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
>> 865 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
>> 866 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
>> 867 iow(db, DM9000_RCR, 0x00); /* Disable RX */
>> 868 }
>> 869
>> 870 /*
>> 871 * Stop the interface.
>> 872 * The interface is stopped when it is brought.
>> 873 */
>> 874 static int
>> 875 dm9000_stop(struct net_device *ndev)
>> 876 {
>> 877 board_info_t *db = (board_info_t *) ndev->priv;
>> 878
>> 879 if (netif_msg_ifdown(db))
>> 880 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
>> 881
>> 882 netif_stop_queue(ndev);
>> 883 netif_carrier_off(ndev);
>> 884
>> 885 /* free interrupt */
>> 886 free_irq(ndev->irq, ndev);
>> 887
>> 888 dm9000_shutdown(ndev);
>> 889
>> 890 return 0;
>> 891 }
>> 892
794 /* 893 /*
795 * DM9000 interrupt handler 894 * DM9000 interrupt handler
796 * receive the packet to upper layer, free the 895 * receive the packet to upper layer, free the transmitted packet
797 */ 896 */
798 897
799 static void dm9000_tx_done(struct net_device * !! 898 static void
>> 899 dm9000_tx_done(struct net_device *dev, board_info_t * db)
800 { 900 {
801 int tx_status = ior(db, DM9000_NSR); 901 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
802 902
803 if (tx_status & (NSR_TX2END | NSR_TX1E 903 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
804 /* One packet sent complete */ 904 /* One packet sent complete */
805 db->tx_pkt_cnt--; 905 db->tx_pkt_cnt--;
806 dev->stats.tx_packets++; 906 dev->stats.tx_packets++;
807 907
808 if (netif_msg_tx_done(db)) 908 if (netif_msg_tx_done(db))
809 dev_dbg(db->dev, "tx d 909 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
810 910
811 /* Queue packet check & send * 911 /* Queue packet check & send */
812 if (db->tx_pkt_cnt > 0) { 912 if (db->tx_pkt_cnt > 0) {
813 iow(db, DM9000_TXPLL, 913 iow(db, DM9000_TXPLL, db->queue_pkt_len);
814 iow(db, DM9000_TXPLH, 914 iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
815 iow(db, DM9000_TCR, TC 915 iow(db, DM9000_TCR, TCR_TXREQ);
816 dev->trans_start = jif 916 dev->trans_start = jiffies;
817 } 917 }
818 netif_wake_queue(dev); 918 netif_wake_queue(dev);
819 } 919 }
820 } 920 }
821 921
>> 922 static irqreturn_t
>> 923 dm9000_interrupt(int irq, void *dev_id)
>> 924 {
>> 925 struct net_device *dev = dev_id;
>> 926 board_info_t *db = (board_info_t *) dev->priv;
>> 927 int int_status;
>> 928 u8 reg_save;
>> 929
>> 930 dm9000_dbg(db, 3, "entering %s\n", __func__);
>> 931
>> 932 /* A real interrupt coming */
>> 933
>> 934 spin_lock(&db->lock);
>> 935
>> 936 /* Save previous register address */
>> 937 reg_save = readb(db->io_addr);
>> 938
>> 939 /* Disable all interrupts */
>> 940 iow(db, DM9000_IMR, IMR_PAR);
>> 941
>> 942 /* Got DM9000 interrupt status */
>> 943 int_status = ior(db, DM9000_ISR); /* Got ISR */
>> 944 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
>> 945
>> 946 if (netif_msg_intr(db))
>> 947 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
>> 948
>> 949 /* Received the coming packet */
>> 950 if (int_status & ISR_PRS)
>> 951 dm9000_rx(dev);
>> 952
>> 953 /* Trnasmit Interrupt check */
>> 954 if (int_status & ISR_PTS)
>> 955 dm9000_tx_done(dev, db);
>> 956
>> 957 /* Re-enable interrupt mask */
>> 958 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
>> 959
>> 960 /* Restore previous register address */
>> 961 writeb(reg_save, db->io_addr);
>> 962
>> 963 spin_unlock(&db->lock);
>> 964
>> 965 return IRQ_HANDLED;
>> 966 }
>> 967
822 struct dm9000_rxhdr { 968 struct dm9000_rxhdr {
823 u8 RxPktReady; 969 u8 RxPktReady;
824 u8 RxStatus; 970 u8 RxStatus;
825 __le16 RxLen; 971 __le16 RxLen;
826 } __attribute__((__packed__)); 972 } __attribute__((__packed__));
827 973
828 /* 974 /*
829 * Received a packet and pass to upper layer 975 * Received a packet and pass to upper layer
830 */ 976 */
831 static void 977 static void
832 dm9000_rx(struct net_device *dev) 978 dm9000_rx(struct net_device *dev)
833 { 979 {
834 board_info_t *db = netdev_priv(dev); !! 980 board_info_t *db = (board_info_t *) dev->priv;
835 struct dm9000_rxhdr rxhdr; 981 struct dm9000_rxhdr rxhdr;
836 struct sk_buff *skb; 982 struct sk_buff *skb;
837 u8 rxbyte, *rdptr; 983 u8 rxbyte, *rdptr;
838 bool GoodPacket; 984 bool GoodPacket;
839 int RxLen; 985 int RxLen;
840 986
841 /* Check packet ready or not */ 987 /* Check packet ready or not */
842 do { 988 do {
843 ior(db, DM9000_MRCMDX); /* Dum 989 ior(db, DM9000_MRCMDX); /* Dummy read */
844 990
845 /* Get most updated data */ 991 /* Get most updated data */
846 rxbyte = readb(db->io_data); 992 rxbyte = readb(db->io_data);
847 993
848 /* Status check: this byte mus 994 /* Status check: this byte must be 0 or 1 */
849 if (rxbyte > DM9000_PKT_RDY) { 995 if (rxbyte > DM9000_PKT_RDY) {
850 dev_warn(db->dev, "sta 996 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
851 iow(db, DM9000_RCR, 0x 997 iow(db, DM9000_RCR, 0x00); /* Stop Device */
852 iow(db, DM9000_ISR, IM 998 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
853 return; 999 return;
854 } 1000 }
855 1001
856 if (rxbyte != DM9000_PKT_RDY) 1002 if (rxbyte != DM9000_PKT_RDY)
857 return; 1003 return;
858 1004
859 /* A packet ready now & Get s 1005 /* A packet ready now & Get status/length */
860 GoodPacket = true; 1006 GoodPacket = true;
861 writeb(DM9000_MRCMD, db->io_ad 1007 writeb(DM9000_MRCMD, db->io_addr);
862 1008
863 (db->inblk)(db->io_data, &rxhd 1009 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
864 1010
865 RxLen = le16_to_cpu(rxhdr.RxLe 1011 RxLen = le16_to_cpu(rxhdr.RxLen);
866 1012
867 if (netif_msg_rx_status(db)) 1013 if (netif_msg_rx_status(db))
868 dev_dbg(db->dev, "RX: 1014 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
869 rxhdr.RxStatus 1015 rxhdr.RxStatus, RxLen);
870 1016
871 /* Packet Status check */ 1017 /* Packet Status check */
872 if (RxLen < 0x40) { 1018 if (RxLen < 0x40) {
873 GoodPacket = false; 1019 GoodPacket = false;
874 if (netif_msg_rx_err(d 1020 if (netif_msg_rx_err(db))
875 dev_dbg(db->de 1021 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
876 } 1022 }
877 1023
878 if (RxLen > DM9000_PKT_MAX) { 1024 if (RxLen > DM9000_PKT_MAX) {
879 dev_dbg(db->dev, "RST: 1025 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
880 } 1026 }
881 1027
882 /* rxhdr.RxStatus is identical !! 1028 if (rxhdr.RxStatus & 0xbf) {
883 if (rxhdr.RxStatus & (RSR_FOE <<
884 RSR_PLE <<
885 RSR_LCS <<
886 GoodPacket = false; 1029 GoodPacket = false;
887 if (rxhdr.RxStatus & R !! 1030 if (rxhdr.RxStatus & 0x01) {
888 if (netif_msg_ 1031 if (netif_msg_rx_err(db))
889 dev_db 1032 dev_dbg(db->dev, "fifo error\n");
890 dev->stats.rx_ 1033 dev->stats.rx_fifo_errors++;
891 } 1034 }
892 if (rxhdr.RxStatus & R !! 1035 if (rxhdr.RxStatus & 0x02) {
893 if (netif_msg_ 1036 if (netif_msg_rx_err(db))
894 dev_db 1037 dev_dbg(db->dev, "crc error\n");
895 dev->stats.rx_ 1038 dev->stats.rx_crc_errors++;
896 } 1039 }
897 if (rxhdr.RxStatus & R !! 1040 if (rxhdr.RxStatus & 0x80) {
898 if (netif_msg_ 1041 if (netif_msg_rx_err(db))
899 dev_db 1042 dev_dbg(db->dev, "length error\n");
900 dev->stats.rx_ 1043 dev->stats.rx_length_errors++;
901 } 1044 }
902 } 1045 }
903 1046
904 /* Move data from DM9000 */ 1047 /* Move data from DM9000 */
905 if (GoodPacket 1048 if (GoodPacket
906 && ((skb = dev_alloc_skb(R 1049 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
907 skb_reserve(skb, 2); 1050 skb_reserve(skb, 2);
908 rdptr = (u8 *) skb_put 1051 rdptr = (u8 *) skb_put(skb, RxLen - 4);
909 1052
910 /* Read received packe 1053 /* Read received packet from RX SRAM */
911 1054
912 (db->inblk)(db->io_dat 1055 (db->inblk)(db->io_data, rdptr, RxLen);
913 dev->stats.rx_bytes += 1056 dev->stats.rx_bytes += RxLen;
914 1057
915 /* Pass to upper layer 1058 /* Pass to upper layer */
916 skb->protocol = eth_ty 1059 skb->protocol = eth_type_trans(skb, dev);
917 netif_rx(skb); 1060 netif_rx(skb);
918 dev->stats.rx_packets+ 1061 dev->stats.rx_packets++;
919 1062
920 } else { 1063 } else {
921 /* need to dump the pa 1064 /* need to dump the packet's data */
922 1065
923 (db->dumpblk)(db->io_d 1066 (db->dumpblk)(db->io_data, RxLen);
924 } 1067 }
925 } while (rxbyte == DM9000_PKT_RDY); 1068 } while (rxbyte == DM9000_PKT_RDY);
926 } 1069 }
927 1070
928 static irqreturn_t dm9000_interrupt(int irq, v !! 1071 static unsigned int
>> 1072 dm9000_read_locked(board_info_t *db, int reg)
929 { 1073 {
930 struct net_device *dev = dev_id; <<
931 board_info_t *db = netdev_priv(dev); <<
932 int int_status; <<
933 unsigned long flags; 1074 unsigned long flags;
934 u8 reg_save; !! 1075 unsigned int ret;
935 1076
936 dm9000_dbg(db, 3, "entering %s\n", __f !! 1077 spin_lock_irqsave(&db->lock, flags);
>> 1078 ret = ior(db, reg);
>> 1079 spin_unlock_irqrestore(&db->lock, flags);
937 1080
938 /* A real interrupt coming */ !! 1081 return ret;
>> 1082 }
939 1083
940 /* holders of db->lock must always blo !! 1084 static int dm9000_wait_eeprom(board_info_t *db)
941 spin_lock_irqsave(&db->lock, flags); !! 1085 {
>> 1086 unsigned int status;
>> 1087 int timeout = 8; /* wait max 8msec */
942 1088
943 /* Save previous register address */ !! 1089 /* The DM9000 data sheets say we should be able to
944 reg_save = readb(db->io_addr); !! 1090 * poll the ERRE bit in EPCR to wait for the EEPROM
>> 1091 * operation. From testing several chips, this bit
>> 1092 * does not seem to work.
>> 1093 *
>> 1094 * We attempt to use the bit, but fall back to the
>> 1095 * timeout (which is why we do not return an error
>> 1096 * on expiry) to say that the EEPROM operation has
>> 1097 * completed.
>> 1098 */
945 1099
946 /* Disable all interrupts */ !! 1100 while (1) {
947 iow(db, DM9000_IMR, IMR_PAR); !! 1101 status = dm9000_read_locked(db, DM9000_EPCR);
948 1102
949 /* Got DM9000 interrupt status */ !! 1103 if ((status & EPCR_ERRE) == 0)
950 int_status = ior(db, DM9000_ISR); !! 1104 break;
951 iow(db, DM9000_ISR, int_status); <<
952 1105
953 if (netif_msg_intr(db)) !! 1106 if (timeout-- < 0) {
954 dev_dbg(db->dev, "interrupt st !! 1107 dev_dbg(db->dev, "timeout waiting EEPROM\n");
>> 1108 break;
>> 1109 }
>> 1110 }
955 1111
956 /* Received the coming packet */ !! 1112 return 0;
957 if (int_status & ISR_PRS) !! 1113 }
958 dm9000_rx(dev); <<
959 1114
960 /* Trnasmit Interrupt check */ !! 1115 /*
961 if (int_status & ISR_PTS) !! 1116 * Read a word data from EEPROM
962 dm9000_tx_done(dev, db); !! 1117 */
>> 1118 static void
>> 1119 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
>> 1120 {
>> 1121 unsigned long flags;
963 1122
964 if (db->type != TYPE_DM9000E) { !! 1123 if (db->flags & DM9000_PLATF_NO_EEPROM) {
965 if (int_status & ISR_LNKCHNG) !! 1124 to[0] = 0xff;
966 /* fire a link-change !! 1125 to[1] = 0xff;
967 schedule_delayed_work( !! 1126 return;
968 } <<
969 } 1127 }
970 1128
971 /* Re-enable interrupt mask */ !! 1129 mutex_lock(&db->addr_lock);
972 iow(db, DM9000_IMR, db->imr_all); <<
973 1130
974 /* Restore previous register address * !! 1131 spin_lock_irqsave(&db->lock, flags);
975 writeb(reg_save, db->io_addr); !! 1132
>> 1133 iow(db, DM9000_EPAR, offset);
>> 1134 iow(db, DM9000_EPCR, EPCR_ERPRR);
976 1135
977 spin_unlock_irqrestore(&db->lock, flag 1136 spin_unlock_irqrestore(&db->lock, flags);
978 1137
979 return IRQ_HANDLED; !! 1138 dm9000_wait_eeprom(db);
>> 1139
>> 1140 /* delay for at-least 150uS */
>> 1141 msleep(1);
>> 1142
>> 1143 spin_lock_irqsave(&db->lock, flags);
>> 1144
>> 1145 iow(db, DM9000_EPCR, 0x0);
>> 1146
>> 1147 to[0] = ior(db, DM9000_EPDRL);
>> 1148 to[1] = ior(db, DM9000_EPDRH);
>> 1149
>> 1150 spin_unlock_irqrestore(&db->lock, flags);
>> 1151
>> 1152 mutex_unlock(&db->addr_lock);
980 } 1153 }
981 1154
982 #ifdef CONFIG_NET_POLL_CONTROLLER <<
983 /* 1155 /*
984 *Used by netconsole !! 1156 * Write a word data to SROM
985 */ 1157 */
986 static void dm9000_poll_controller(struct net_ !! 1158 static void
>> 1159 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
987 { 1160 {
988 disable_irq(dev->irq); !! 1161 unsigned long flags;
989 dm9000_interrupt(dev->irq, dev); !! 1162
990 enable_irq(dev->irq); !! 1163 if (db->flags & DM9000_PLATF_NO_EEPROM)
>> 1164 return;
>> 1165
>> 1166 mutex_lock(&db->addr_lock);
>> 1167
>> 1168 spin_lock_irqsave(&db->lock, flags);
>> 1169 iow(db, DM9000_EPAR, offset);
>> 1170 iow(db, DM9000_EPDRH, data[1]);
>> 1171 iow(db, DM9000_EPDRL, data[0]);
>> 1172 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
>> 1173 spin_unlock_irqrestore(&db->lock, flags);
>> 1174
>> 1175 dm9000_wait_eeprom(db);
>> 1176
>> 1177 mdelay(1); /* wait at least 150uS to clear */
>> 1178
>> 1179 spin_lock_irqsave(&db->lock, flags);
>> 1180 iow(db, DM9000_EPCR, 0);
>> 1181 spin_unlock_irqrestore(&db->lock, flags);
>> 1182
>> 1183 mutex_unlock(&db->addr_lock);
991 } 1184 }
992 #endif <<
993 1185
994 /* !! 1186 /*
995 * Open the interface. !! 1187 * Set DM9000 multicast address
996 * The interface is opened whenever "ifconfig <<
997 */ 1188 */
998 static int !! 1189 static void
999 dm9000_open(struct net_device *dev) !! 1190 dm9000_hash_table(struct net_device *dev)
1000 { 1191 {
1001 board_info_t *db = netdev_priv(dev); !! 1192 board_info_t *db = (board_info_t *) dev->priv;
1002 unsigned long irqflags = db->irq_res- !! 1193 struct dev_mc_list *mcptr = dev->mc_list;
>> 1194 int mc_cnt = dev->mc_count;
>> 1195 int i, oft;
>> 1196 u32 hash_val;
>> 1197 u16 hash_table[4];
>> 1198 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
>> 1199 unsigned long flags;
1003 1200
1004 if (netif_msg_ifup(db)) !! 1201 dm9000_dbg(db, 1, "entering %s\n", __func__);
1005 dev_dbg(db->dev, "enabling %s <<
1006 1202
1007 /* If there is no IRQ type specified, !! 1203 spin_lock_irqsave(&db->lock, flags);
1008 * may work, and tell the user that t <<
1009 1204
1010 if (irqflags == IRQF_TRIGGER_NONE) !! 1205 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
1011 dev_warn(db->dev, "WARNING: n !! 1206 iow(db, oft, dev->dev_addr[i]);
1012 1207
1013 irqflags |= IRQF_SHARED; !! 1208 /* Clear Hash Table */
>> 1209 for (i = 0; i < 4; i++)
>> 1210 hash_table[i] = 0x0;
1014 1211
1015 if (request_irq(dev->irq, &dm9000_int !! 1212 /* broadcast address */
1016 return -EAGAIN; !! 1213 hash_table[3] = 0x8000;
1017 1214
1018 /* Initialize DM9000 board */ !! 1215 if (dev->flags & IFF_PROMISC)
1019 dm9000_reset(db); !! 1216 rcr |= RCR_PRMSC;
1020 dm9000_init_dm9000(dev); <<
1021 1217
1022 /* Init driver variable */ !! 1218 if (dev->flags & IFF_ALLMULTI)
1023 db->dbug_cnt = 0; !! 1219 rcr |= RCR_ALL;
1024 1220
1025 mii_check_media(&db->mii, netif_msg_l !! 1221 /* the multicast address in Hash Table : 64 bits */
1026 netif_start_queue(dev); !! 1222 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1027 !! 1223 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
1028 dm9000_schedule_poll(db); !! 1224 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
>> 1225 }
1029 1226
1030 return 0; !! 1227 /* Write the hash table to MAC MD table */
>> 1228 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
>> 1229 iow(db, oft++, hash_table[i]);
>> 1230 iow(db, oft++, hash_table[i] >> 8);
>> 1231 }
>> 1232
>> 1233 iow(db, DM9000_RCR, rcr);
>> 1234 spin_unlock_irqrestore(&db->lock, flags);
1031 } 1235 }
1032 1236
>> 1237
1033 /* 1238 /*
1034 * Sleep, either by using msleep() or if we a 1239 * Sleep, either by using msleep() or if we are suspending, then
1035 * use mdelay() to sleep. 1240 * use mdelay() to sleep.
1036 */ 1241 */
1037 static void dm9000_msleep(board_info_t *db, u 1242 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1038 { 1243 {
1039 if (db->in_suspend) 1244 if (db->in_suspend)
1040 mdelay(ms); 1245 mdelay(ms);
1041 else 1246 else
1042 msleep(ms); 1247 msleep(ms);
1043 } 1248 }
1044 1249
1045 /* 1250 /*
1046 * Read a word from phyxcer 1251 * Read a word from phyxcer
1047 */ 1252 */
1048 static int 1253 static int
1049 dm9000_phy_read(struct net_device *dev, int p 1254 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1050 { 1255 {
1051 board_info_t *db = netdev_priv(dev); !! 1256 board_info_t *db = (board_info_t *) dev->priv;
1052 unsigned long flags; 1257 unsigned long flags;
1053 unsigned int reg_save; 1258 unsigned int reg_save;
1054 int ret; 1259 int ret;
1055 1260
1056 mutex_lock(&db->addr_lock); 1261 mutex_lock(&db->addr_lock);
1057 1262
1058 spin_lock_irqsave(&db->lock,flags); 1263 spin_lock_irqsave(&db->lock,flags);
1059 1264
1060 /* Save previous register address */ 1265 /* Save previous register address */
1061 reg_save = readb(db->io_addr); 1266 reg_save = readb(db->io_addr);
1062 1267
1063 /* Fill the phyxcer register into REG 1268 /* Fill the phyxcer register into REG_0C */
1064 iow(db, DM9000_EPAR, DM9000_PHY | reg 1269 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1065 1270
1066 iow(db, DM9000_EPCR, EPCR_ERPRR | EPC !! 1271 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1067 1272
1068 writeb(reg_save, db->io_addr); 1273 writeb(reg_save, db->io_addr);
1069 spin_unlock_irqrestore(&db->lock,flag 1274 spin_unlock_irqrestore(&db->lock,flags);
1070 1275
1071 dm9000_msleep(db, 1); /* Wa 1276 dm9000_msleep(db, 1); /* Wait read complete */
1072 1277
1073 spin_lock_irqsave(&db->lock,flags); 1278 spin_lock_irqsave(&db->lock,flags);
1074 reg_save = readb(db->io_addr); 1279 reg_save = readb(db->io_addr);
1075 1280
1076 iow(db, DM9000_EPCR, 0x0); /* Cl 1281 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1077 1282
1078 /* The read data keeps on REG_0D & RE 1283 /* The read data keeps on REG_0D & REG_0E */
1079 ret = (ior(db, DM9000_EPDRH) << 8) | 1284 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1080 1285
1081 /* restore the previous address */ 1286 /* restore the previous address */
1082 writeb(reg_save, db->io_addr); 1287 writeb(reg_save, db->io_addr);
1083 spin_unlock_irqrestore(&db->lock,flag 1288 spin_unlock_irqrestore(&db->lock,flags);
1084 1289
1085 mutex_unlock(&db->addr_lock); 1290 mutex_unlock(&db->addr_lock);
1086 <<
1087 dm9000_dbg(db, 5, "phy_read[%02x] -> <<
1088 return ret; 1291 return ret;
1089 } 1292 }
1090 1293
1091 /* 1294 /*
1092 * Write a word to phyxcer 1295 * Write a word to phyxcer
1093 */ 1296 */
1094 static void 1297 static void
1095 dm9000_phy_write(struct net_device *dev, !! 1298 dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1096 int phyaddr_unused, int reg, <<
1097 { 1299 {
1098 board_info_t *db = netdev_priv(dev); !! 1300 board_info_t *db = (board_info_t *) dev->priv;
1099 unsigned long flags; 1301 unsigned long flags;
1100 unsigned long reg_save; 1302 unsigned long reg_save;
1101 1303
1102 dm9000_dbg(db, 5, "phy_write[%02x] = <<
1103 mutex_lock(&db->addr_lock); 1304 mutex_lock(&db->addr_lock);
1104 1305
1105 spin_lock_irqsave(&db->lock,flags); 1306 spin_lock_irqsave(&db->lock,flags);
1106 1307
1107 /* Save previous register address */ 1308 /* Save previous register address */
1108 reg_save = readb(db->io_addr); 1309 reg_save = readb(db->io_addr);
1109 1310
1110 /* Fill the phyxcer register into REG 1311 /* Fill the phyxcer register into REG_0C */
1111 iow(db, DM9000_EPAR, DM9000_PHY | reg 1312 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1112 1313
1113 /* Fill the written data into REG_0D 1314 /* Fill the written data into REG_0D & REG_0E */
1114 iow(db, DM9000_EPDRL, value); 1315 iow(db, DM9000_EPDRL, value);
1115 iow(db, DM9000_EPDRH, value >> 8); 1316 iow(db, DM9000_EPDRH, value >> 8);
1116 1317
1117 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR !! 1318 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1118 1319
1119 writeb(reg_save, db->io_addr); 1320 writeb(reg_save, db->io_addr);
1120 spin_unlock_irqrestore(&db->lock, fla 1321 spin_unlock_irqrestore(&db->lock, flags);
1121 1322
1122 dm9000_msleep(db, 1); /* Wa 1323 dm9000_msleep(db, 1); /* Wait write complete */
1123 1324
1124 spin_lock_irqsave(&db->lock,flags); 1325 spin_lock_irqsave(&db->lock,flags);
1125 reg_save = readb(db->io_addr); 1326 reg_save = readb(db->io_addr);
1126 1327
1127 iow(db, DM9000_EPCR, 0x0); /* Cl 1328 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1128 1329
1129 /* restore the previous address */ 1330 /* restore the previous address */
1130 writeb(reg_save, db->io_addr); 1331 writeb(reg_save, db->io_addr);
1131 1332
1132 spin_unlock_irqrestore(&db->lock, fla 1333 spin_unlock_irqrestore(&db->lock, flags);
1133 mutex_unlock(&db->addr_lock); 1334 mutex_unlock(&db->addr_lock);
1134 } 1335 }
1135 1336
1136 static void <<
1137 dm9000_shutdown(struct net_device *dev) <<
1138 { <<
1139 board_info_t *db = netdev_priv(dev); <<
1140 <<
1141 /* RESET device */ <<
1142 dm9000_phy_write(dev, 0, MII_BMCR, BM <<
1143 iow(db, DM9000_GPR, 0x01); /* Po <<
1144 iow(db, DM9000_IMR, IMR_PAR); /* Di <<
1145 iow(db, DM9000_RCR, 0x00); /* Di <<
1146 } <<
1147 <<
1148 /* <<
1149 * Stop the interface. <<
1150 * The interface is stopped when it is brough <<
1151 */ <<
1152 static int <<
1153 dm9000_stop(struct net_device *ndev) <<
1154 { <<
1155 board_info_t *db = netdev_priv(ndev); <<
1156 <<
1157 if (netif_msg_ifdown(db)) <<
1158 dev_dbg(db->dev, "shutting do <<
1159 <<
1160 cancel_delayed_work_sync(&db->phy_pol <<
1161 <<
1162 netif_stop_queue(ndev); <<
1163 netif_carrier_off(ndev); <<
1164 <<
1165 /* free interrupt */ <<
1166 free_irq(ndev->irq, ndev); <<
1167 <<
1168 dm9000_shutdown(ndev); <<
1169 <<
1170 return 0; <<
1171 } <<
1172 <<
1173 static const struct net_device_ops dm9000_net <<
1174 .ndo_open = dm9000_open <<
1175 .ndo_stop = dm9000_stop <<
1176 .ndo_start_xmit = dm9000_star <<
1177 .ndo_tx_timeout = dm9000_time <<
1178 .ndo_set_multicast_list = dm9000_hash <<
1179 .ndo_do_ioctl = dm9000_ioct <<
1180 .ndo_change_mtu = eth_change_ <<
1181 .ndo_validate_addr = eth_validat <<
1182 .ndo_set_mac_address = eth_mac_add <<
1183 #ifdef CONFIG_NET_POLL_CONTROLLER <<
1184 .ndo_poll_controller = dm9000_poll <<
1185 #endif <<
1186 }; <<
1187 <<
1188 #define res_size(_r) (((_r)->end - (_r)->star <<
1189 <<
1190 /* <<
1191 * Search DM9000 board, allocate space and re <<
1192 */ <<
1193 static int __devinit <<
1194 dm9000_probe(struct platform_device *pdev) <<
1195 { <<
1196 struct dm9000_plat_data *pdata = pdev <<
1197 struct board_info *db; /* Point a bo <<
1198 struct net_device *ndev; <<
1199 const unsigned char *mac_src; <<
1200 int ret = 0; <<
1201 int iosize; <<
1202 int i; <<
1203 u32 id_val; <<
1204 <<
1205 /* Init network device */ <<
1206 ndev = alloc_etherdev(sizeof(struct b <<
1207 if (!ndev) { <<
1208 dev_err(&pdev->dev, "could no <<
1209 return -ENOMEM; <<
1210 } <<
1211 <<
1212 SET_NETDEV_DEV(ndev, &pdev->dev); <<
1213 <<
1214 dev_dbg(&pdev->dev, "dm9000_probe()\n <<
1215 <<
1216 /* setup board info structure */ <<
1217 db = netdev_priv(ndev); <<
1218 memset(db, 0, sizeof(*db)); <<
1219 <<
1220 db->dev = &pdev->dev; <<
1221 db->ndev = ndev; <<
1222 <<
1223 spin_lock_init(&db->lock); <<
1224 mutex_init(&db->addr_lock); <<
1225 <<
1226 INIT_DELAYED_WORK(&db->phy_poll, dm90 <<
1227 <<
1228 db->addr_res = platform_get_resource( <<
1229 db->data_res = platform_get_resource( <<
1230 db->irq_res = platform_get_resource( <<
1231 <<
1232 if (db->addr_res == NULL || db->data_ <<
1233 db->irq_res == NULL) { <<
1234 dev_err(db->dev, "insufficien <<
1235 ret = -ENOENT; <<
1236 goto out; <<
1237 } <<
1238 <<
1239 iosize = res_size(db->addr_res); <<
1240 db->addr_req = request_mem_region(db- <<
1241 pde <<
1242 <<
1243 if (db->addr_req == NULL) { <<
1244 dev_err(db->dev, "cannot clai <<
1245 ret = -EIO; <<
1246 goto out; <<
1247 } <<
1248 <<
1249 db->io_addr = ioremap(db->addr_res->s <<
1250 <<
1251 if (db->io_addr == NULL) { <<
1252 dev_err(db->dev, "failed to i <<
1253 ret = -EINVAL; <<
1254 goto out; <<
1255 } <<
1256 <<
1257 iosize = res_size(db->data_res); <<
1258 db->data_req = request_mem_region(db- <<
1259 pde <<
1260 <<
1261 if (db->data_req == NULL) { <<
1262 dev_err(db->dev, "cannot clai <<
1263 ret = -EIO; <<
1264 goto out; <<
1265 } <<
1266 <<
1267 db->io_data = ioremap(db->data_res->s <<
1268 <<
1269 if (db->io_data == NULL) { <<
1270 dev_err(db->dev, "failed to i <<
1271 ret = -EINVAL; <<
1272 goto out; <<
1273 } <<
1274 <<
1275 /* fill in parameters for net-dev str <<
1276 ndev->base_addr = (unsigned long)db-> <<
1277 ndev->irq = db->irq_res->start; <<
1278 <<
1279 /* ensure at least we have a default <<
1280 dm9000_set_io(db, iosize); <<
1281 <<
1282 /* check to see if anything is being <<
1283 if (pdata != NULL) { <<
1284 /* check to see if the driver <<
1285 * default IO width */ <<
1286 <<
1287 if (pdata->flags & DM9000_PLA <<
1288 dm9000_set_io(db, 1); <<
1289 <<
1290 if (pdata->flags & DM9000_PLA <<
1291 dm9000_set_io(db, 2); <<
1292 <<
1293 if (pdata->flags & DM9000_PLA <<
1294 dm9000_set_io(db, 4); <<
1295 <<
1296 /* check to see if there are <<
1297 * over-rides */ <<
1298 <<
1299 if (pdata->inblk != NULL) <<
1300 db->inblk = pdata->in <<
1301 <<
1302 if (pdata->outblk != NULL) <<
1303 db->outblk = pdata->o <<
1304 <<
1305 if (pdata->dumpblk != NULL) <<
1306 db->dumpblk = pdata-> <<
1307 <<
1308 db->flags = pdata->flags; <<
1309 } <<
1310 <<
1311 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL <<
1312 db->flags |= DM9000_PLATF_SIMPLE_PHY; <<
1313 #endif <<
1314 <<
1315 dm9000_reset(db); <<
1316 <<
1317 /* try multiple times, DM9000 sometim <<
1318 for (i = 0; i < 8; i++) { <<
1319 id_val = ior(db, DM9000_VIDL <<
1320 id_val |= (u32)ior(db, DM9000 <<
1321 id_val |= (u32)ior(db, DM9000 <<
1322 id_val |= (u32)ior(db, DM9000 <<
1323 <<
1324 if (id_val == DM9000_ID) <<
1325 break; <<
1326 dev_err(db->dev, "read wrong <<
1327 } <<
1328 <<
1329 if (id_val != DM9000_ID) { <<
1330 dev_err(db->dev, "wrong id: 0 <<
1331 ret = -ENODEV; <<
1332 goto out; <<
1333 } <<
1334 <<
1335 /* Identify what type of DM9000 we ar <<
1336 <<
1337 id_val = ior(db, DM9000_CHIPR); <<
1338 dev_dbg(db->dev, "dm9000 revision 0x% <<
1339 <<
1340 switch (id_val) { <<
1341 case CHIPR_DM9000A: <<
1342 db->type = TYPE_DM9000A; <<
1343 break; <<
1344 case CHIPR_DM9000B: <<
1345 db->type = TYPE_DM9000B; <<
1346 break; <<
1347 default: <<
1348 dev_dbg(db->dev, "ID %02x => <<
1349 db->type = TYPE_DM9000E; <<
1350 } <<
1351 <<
1352 /* from this point we assume that we <<
1353 <<
1354 /* driver system function */ <<
1355 ether_setup(ndev); <<
1356 <<
1357 ndev->netdev_ops = &dm9000_net <<
1358 ndev->watchdog_timeo = msecs_to_ji <<
1359 ndev->ethtool_ops = &dm9000_eth <<
1360 <<
1361 db->msg_enable = NETIF_MSG_LINK <<
1362 db->mii.phy_id_mask = 0x1f; <<
1363 db->mii.reg_num_mask = 0x1f; <<
1364 db->mii.force_media = 0; <<
1365 db->mii.full_duplex = 0; <<
1366 db->mii.dev = ndev; <<
1367 db->mii.mdio_read = dm9000_phy_rea <<
1368 db->mii.mdio_write = dm9000_phy_wri <<
1369 <<
1370 mac_src = "eeprom"; <<
1371 <<
1372 /* try reading the node address from <<
1373 for (i = 0; i < 6; i += 2) <<
1374 dm9000_read_eeprom(db, i / 2, <<
1375 <<
1376 if (!is_valid_ether_addr(ndev->dev_ad <<
1377 mac_src = "platform data"; <<
1378 memcpy(ndev->dev_addr, pdata- <<
1379 } <<
1380 <<
1381 if (!is_valid_ether_addr(ndev->dev_ad <<
1382 /* try reading from mac */ <<
1383 <<
1384 mac_src = "chip"; <<
1385 for (i = 0; i < 6; i++) <<
1386 ndev->dev_addr[i] = i <<
1387 } <<
1388 <<
1389 if (!is_valid_ether_addr(ndev->dev_ad <<
1390 dev_warn(db->dev, "%s: Invali <<
1391 "set using ifconfig\ <<
1392 <<
1393 platform_set_drvdata(pdev, ndev); <<
1394 ret = register_netdev(ndev); <<
1395 <<
1396 if (ret == 0) <<
1397 printk(KERN_INFO "%s: dm9000% <<
1398 ndev->name, dm9000_typ <<
1399 db->io_addr, db->io_da <<
1400 ndev->dev_addr, mac_sr <<
1401 return 0; <<
1402 <<
1403 out: <<
1404 dev_err(db->dev, "not found (%d).\n", <<
1405 <<
1406 dm9000_release_board(pdev, db); <<
1407 free_netdev(ndev); <<
1408 <<
1409 return ret; <<
1410 } <<
1411 <<
1412 static int 1337 static int
1413 dm9000_drv_suspend(struct platform_device *de 1338 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1414 { 1339 {
1415 struct net_device *ndev = platform_ge 1340 struct net_device *ndev = platform_get_drvdata(dev);
1416 board_info_t *db; 1341 board_info_t *db;
1417 1342
1418 if (ndev) { 1343 if (ndev) {
1419 db = netdev_priv(ndev); !! 1344 db = (board_info_t *) ndev->priv;
1420 db->in_suspend = 1; 1345 db->in_suspend = 1;
1421 1346
1422 if (netif_running(ndev)) { 1347 if (netif_running(ndev)) {
1423 netif_device_detach(n 1348 netif_device_detach(ndev);
1424 dm9000_shutdown(ndev) 1349 dm9000_shutdown(ndev);
1425 } 1350 }
1426 } 1351 }
1427 return 0; 1352 return 0;
1428 } 1353 }
1429 1354
1430 static int 1355 static int
1431 dm9000_drv_resume(struct platform_device *dev 1356 dm9000_drv_resume(struct platform_device *dev)
1432 { 1357 {
1433 struct net_device *ndev = platform_ge 1358 struct net_device *ndev = platform_get_drvdata(dev);
1434 board_info_t *db = netdev_priv(ndev); !! 1359 board_info_t *db = (board_info_t *) ndev->priv;
1435 1360
1436 if (ndev) { 1361 if (ndev) {
1437 1362
1438 if (netif_running(ndev)) { 1363 if (netif_running(ndev)) {
1439 dm9000_reset(db); 1364 dm9000_reset(db);
1440 dm9000_init_dm9000(nd 1365 dm9000_init_dm9000(ndev);
1441 1366
1442 netif_device_attach(n 1367 netif_device_attach(ndev);
1443 } 1368 }
1444 1369
1445 db->in_suspend = 0; 1370 db->in_suspend = 0;
1446 } 1371 }
1447 return 0; 1372 return 0;
1448 } 1373 }
1449 1374
1450 static int __devexit !! 1375 static int
1451 dm9000_drv_remove(struct platform_device *pde 1376 dm9000_drv_remove(struct platform_device *pdev)
1452 { 1377 {
1453 struct net_device *ndev = platform_ge 1378 struct net_device *ndev = platform_get_drvdata(pdev);
1454 1379
1455 platform_set_drvdata(pdev, NULL); 1380 platform_set_drvdata(pdev, NULL);
1456 1381
1457 unregister_netdev(ndev); 1382 unregister_netdev(ndev);
1458 dm9000_release_board(pdev, (board_inf !! 1383 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1459 free_netdev(ndev); /* fr 1384 free_netdev(ndev); /* free device structure */
1460 1385
1461 dev_dbg(&pdev->dev, "released and fre 1386 dev_dbg(&pdev->dev, "released and freed device\n");
1462 return 0; 1387 return 0;
1463 } 1388 }
1464 1389
1465 static struct platform_driver dm9000_driver = 1390 static struct platform_driver dm9000_driver = {
1466 .driver = { 1391 .driver = {
1467 .name = "dm9000", 1392 .name = "dm9000",
1468 .owner = THIS_MODULE, 1393 .owner = THIS_MODULE,
1469 }, 1394 },
1470 .probe = dm9000_probe, 1395 .probe = dm9000_probe,
1471 .remove = __devexit_p(dm9000_drv_rem !! 1396 .remove = dm9000_drv_remove,
1472 .suspend = dm9000_drv_suspend, 1397 .suspend = dm9000_drv_suspend,
1473 .resume = dm9000_drv_resume, 1398 .resume = dm9000_drv_resume,
1474 }; 1399 };
1475 1400
1476 static int __init 1401 static int __init
1477 dm9000_init(void) 1402 dm9000_init(void)
1478 { 1403 {
1479 printk(KERN_INFO "%s Ethernet Driver, 1404 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1480 1405
1481 return platform_driver_register(&dm90 !! 1406 return platform_driver_register(&dm9000_driver); /* search board and register */
1482 } 1407 }
1483 1408
1484 static void __exit 1409 static void __exit
1485 dm9000_cleanup(void) 1410 dm9000_cleanup(void)
1486 { 1411 {
1487 platform_driver_unregister(&dm9000_dr 1412 platform_driver_unregister(&dm9000_driver);
1488 } 1413 }
1489 1414
1490 module_init(dm9000_init); 1415 module_init(dm9000_init);
1491 module_exit(dm9000_cleanup); 1416 module_exit(dm9000_cleanup);
1492 1417
1493 MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); 1418 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1494 MODULE_DESCRIPTION("Davicom DM9000 network dr 1419 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1495 MODULE_LICENSE("GPL"); 1420 MODULE_LICENSE("GPL");
1496 MODULE_ALIAS("platform:dm9000"); <<
1497 1421
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