Linux kernel & device driver programming

Cross-Referenced Linux and Device Driver Code

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ]
Version: [ 2.6.11.8 ] [ 2.6.25 ] [ 2.6.25.8 ] [ 2.6.31.13 ] Architecture: [ i386 ]

Diff markup

Differences between /linux/drivers/atm/eni.h (Version 2.6.25.8) and /linux/drivers/atm/eni.h (Version 2.6.11.8)


  1 /* drivers/atm/eni.h - Efficient Networks ENI1      1 /* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */
  2                                                     2  
  3 /* Written 1995-2000 by Werner Almesberger, EP      3 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
  4                                                     4  
  5                                                     5  
  6 #ifndef DRIVER_ATM_ENI_H                            6 #ifndef DRIVER_ATM_ENI_H
  7 #define DRIVER_ATM_ENI_H                            7 #define DRIVER_ATM_ENI_H
  8                                                     8 
  9 #include <linux/atm.h>                              9 #include <linux/atm.h>
 10 #include <linux/atmdev.h>                          10 #include <linux/atmdev.h>
 11 #include <linux/sonet.h>                           11 #include <linux/sonet.h>
 12 #include <linux/skbuff.h>                          12 #include <linux/skbuff.h>
 13 #include <linux/time.h>                            13 #include <linux/time.h>
 14 #include <linux/pci.h>                             14 #include <linux/pci.h>
 15 #include <linux/spinlock.h>                        15 #include <linux/spinlock.h>
 16 #include <asm/atomic.h>                            16 #include <asm/atomic.h>
 17                                                    17 
 18 #include "midway.h"                                18 #include "midway.h"
 19                                                    19 
 20                                                    20 
 21 #define KERNEL_OFFSET   0xC0000000      /* ker     21 #define KERNEL_OFFSET   0xC0000000      /* kernel 0x0 is at phys 0xC0000000 */
 22 #define DEV_LABEL       "eni"                      22 #define DEV_LABEL       "eni"
 23                                                    23 
 24 #define UBR_BUFFER      (128*1024)      /* UBR     24 #define UBR_BUFFER      (128*1024)      /* UBR buffer size */
 25                                                    25 
 26 #define RX_DMA_BUF        8             /* bur     26 #define RX_DMA_BUF        8             /* burst and skip a few things */
 27 #define TX_DMA_BUF      100             /* sho     27 #define TX_DMA_BUF      100             /* should be enough for 64 kB */
 28                                                    28 
 29 #define DEFAULT_RX_MULT 300             /* max     29 #define DEFAULT_RX_MULT 300             /* max_sdu*3 */
 30 #define DEFAULT_TX_MULT 300             /* max     30 #define DEFAULT_TX_MULT 300             /* max_sdu*3 */
 31                                                    31 
 32 #define ENI_ZEROES_SIZE   4             /* nee     32 #define ENI_ZEROES_SIZE   4             /* need that many DMA-able zero bytes */
 33                                                    33 
 34                                                    34 
 35 struct eni_free {                                  35 struct eni_free {
 36         void __iomem *start;            /* cou     36         void __iomem *start;            /* counting in bytes */
 37         int order;                                 37         int order;
 38 };                                                 38 };
 39                                                    39 
 40 struct eni_tx {                                    40 struct eni_tx {
 41         void __iomem *send;             /* bas     41         void __iomem *send;             /* base, 0 if unused */
 42         int prescaler;                  /* sha     42         int prescaler;                  /* shaping prescaler */
 43         int resolution;                 /* sha     43         int resolution;                 /* shaping divider */
 44         unsigned long tx_pos;           /* cur     44         unsigned long tx_pos;           /* current TX write position */
 45         unsigned long words;            /* siz     45         unsigned long words;            /* size of TX queue */
 46         int index;                      /* TX      46         int index;                      /* TX channel number */
 47         int reserved;                   /* res     47         int reserved;                   /* reserved peak cell rate */
 48         int shaping;                    /* sha     48         int shaping;                    /* shaped peak cell rate */
 49         struct sk_buff_head backlog;    /* que     49         struct sk_buff_head backlog;    /* queue of waiting TX buffers */
 50 };                                                 50 };
 51                                                    51 
 52 struct eni_vcc {                                   52 struct eni_vcc {
 53         int (*rx)(struct atm_vcc *vcc); /* RX      53         int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */
 54         void __iomem *recv;             /* rec     54         void __iomem *recv;             /* receive buffer */
 55         unsigned long words;            /* its     55         unsigned long words;            /* its size in words */
 56         unsigned long descr;            /* nex     56         unsigned long descr;            /* next descriptor (RX) */
 57         unsigned long rx_pos;           /* cur     57         unsigned long rx_pos;           /* current RX descriptor pos */
 58         struct eni_tx *tx;              /* TXe     58         struct eni_tx *tx;              /* TXer, NULL if none */
 59         int rxing;                      /* num     59         int rxing;                      /* number of pending PDUs */
 60         int servicing;                  /* num     60         int servicing;                  /* number of waiting VCs (0 or 1) */
 61         int txing;                      /* num     61         int txing;                      /* number of pending TX bytes */
 62         ktime_t timestamp;              /* for !!  62         struct timeval timestamp;       /* for RX timing */
 63         struct atm_vcc *next;           /* nex     63         struct atm_vcc *next;           /* next pending RX */
 64         struct sk_buff *last;           /* las     64         struct sk_buff *last;           /* last PDU being DMAed (used to carry
 65                                            dis     65                                            discard information) */
 66 };                                                 66 };
 67                                                    67 
 68 struct eni_dev {                                   68 struct eni_dev {
 69         /*-------------------------------- spi     69         /*-------------------------------- spinlock */
 70         spinlock_t lock;                /* syn     70         spinlock_t lock;                /* sync with interrupt */
 71         struct tasklet_struct task;     /* tas     71         struct tasklet_struct task;     /* tasklet for interrupt work */
 72         u32 events;                     /* pen     72         u32 events;                     /* pending events */
 73         /*-------------------------------- bas     73         /*-------------------------------- base pointers into Midway address
 74                                            spa     74                                            space */
 75         void __iomem *phy;              /* PHY     75         void __iomem *phy;              /* PHY interface chip registers */
 76         void __iomem *reg;              /* reg     76         void __iomem *reg;              /* register base */
 77         void __iomem *ram;              /* RAM     77         void __iomem *ram;              /* RAM base */
 78         void __iomem *vci;              /* VCI     78         void __iomem *vci;              /* VCI table */
 79         void __iomem *rx_dma;           /* RX      79         void __iomem *rx_dma;           /* RX DMA queue */
 80         void __iomem *tx_dma;           /* TX      80         void __iomem *tx_dma;           /* TX DMA queue */
 81         void __iomem *service;          /* ser     81         void __iomem *service;          /* service list */
 82         /*-------------------------------- TX      82         /*-------------------------------- TX part */
 83         struct eni_tx tx[NR_CHAN];      /* TX      83         struct eni_tx tx[NR_CHAN];      /* TX channels */
 84         struct eni_tx *ubr;             /* UBR     84         struct eni_tx *ubr;             /* UBR channel */
 85         struct sk_buff_head tx_queue;   /* PDU     85         struct sk_buff_head tx_queue;   /* PDUs currently being TX DMAed*/
 86         wait_queue_head_t tx_wait;      /* for     86         wait_queue_head_t tx_wait;      /* for close */
 87         int tx_bw;                      /* rem     87         int tx_bw;                      /* remaining bandwidth */
 88         u32 dma[TX_DMA_BUF*2];          /* DMA     88         u32 dma[TX_DMA_BUF*2];          /* DMA request scratch area */
 89         int tx_mult;                    /* buf     89         int tx_mult;                    /* buffer size multiplier (percent) */
 90         /*-------------------------------- RX      90         /*-------------------------------- RX part */
 91         u32 serv_read;                  /* hos     91         u32 serv_read;                  /* host service read index */
 92         struct atm_vcc *fast,*last_fast;/* que     92         struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */
 93         struct atm_vcc *slow,*last_slow;           93         struct atm_vcc *slow,*last_slow;
 94         struct atm_vcc **rx_map;        /* for     94         struct atm_vcc **rx_map;        /* for fast lookups */
 95         struct sk_buff_head rx_queue;   /* PDU     95         struct sk_buff_head rx_queue;   /* PDUs currently being RX-DMAed */
 96         wait_queue_head_t rx_wait;      /* for     96         wait_queue_head_t rx_wait;      /* for close */
 97         int rx_mult;                    /* buf     97         int rx_mult;                    /* buffer size multiplier (percent) */
 98         /*-------------------------------- sta     98         /*-------------------------------- statistics */
 99         unsigned long lost;             /* num     99         unsigned long lost;             /* number of lost cells (RX) */
100         /*-------------------------------- mem    100         /*-------------------------------- memory management */
101         unsigned long base_diff;        /* vir    101         unsigned long base_diff;        /* virtual-real base address */
102         int free_len;                   /* fre    102         int free_len;                   /* free list length */
103         struct eni_free *free_list;     /* fre    103         struct eni_free *free_list;     /* free list */
104         int free_list_size;             /* max    104         int free_list_size;             /* maximum size of free list */
105         /*-------------------------------- ENI    105         /*-------------------------------- ENI links */
106         struct atm_dev *more;           /* oth    106         struct atm_dev *more;           /* other ENI devices */
107         /*-------------------------------- gen    107         /*-------------------------------- general information */
108         int mem;                        /* RAM    108         int mem;                        /* RAM on board (in bytes) */
109         int asic;                       /* PCI    109         int asic;                       /* PCI interface type, 0 for FPGA */
110         unsigned int irq;               /* IRQ    110         unsigned int irq;               /* IRQ */
111         struct pci_dev *pci_dev;        /* PCI    111         struct pci_dev *pci_dev;        /* PCI stuff */
112 };                                                112 };
113                                                   113 
114                                                   114 
115 #define ENI_DEV(d) ((struct eni_dev *) (d)->de    115 #define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data)
116 #define ENI_VCC(d) ((struct eni_vcc *) (d)->de    116 #define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data)
117                                                   117 
118                                                   118 
119 struct eni_skb_prv {                              119 struct eni_skb_prv {
120         struct atm_skb_data _;          /* res    120         struct atm_skb_data _;          /* reserved */
121         unsigned long pos;              /* pos    121         unsigned long pos;              /* position of next descriptor */
122         int size;                       /* PDU    122         int size;                       /* PDU size in reassembly buffer */
123         dma_addr_t paddr;               /* DMA    123         dma_addr_t paddr;               /* DMA handle */
124 };                                                124 };
125                                                   125 
126 #define ENI_PRV_SIZE(skb) (((struct eni_skb_pr    126 #define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size)
127 #define ENI_PRV_POS(skb) (((struct eni_skb_prv    127 #define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos)
128 #define ENI_PRV_PADDR(skb) (((struct eni_skb_p    128 #define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr)
129                                                   129 
130 #endif                                            130 #endif
131                                                   131 
  This page was automatically generated by the LXR engine.