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$1.2M Grant awarded to Dr. Whalley and Dr. TysonMarch 30, 2010

Title="Static Pipelining, an Approach for Ultra-Low Power Embedded Processors"
PI: David Whalley
co-PI: Gary Tyson
Amount: $1,199,999 ($799,999 for FSU, $400,000 for University of Pittsburgh)
This is a 4 year grant from NSF.

Abstract:
As mobile embedded systems become more prevalent, there is an increasing demand to make processor pipelines more power efficient. Conventional pipeline inefficiencies include unnecessary accesses to the register file due to duplication or avoidable computation from constantly checking for forwarding and hazards at points where they cannot possibly occur, repeated calculation of invariant values, etc. It is desirable to develop an alternative processor design that can avoid these wasteful energy consumption aspects of a traditionally pipelined processor while still achieving comparable performance.

A statically pipelined processor is expected to achieve these goals by having the control during each cycle for each portion of the processor explicitly represented in each instruction. The pipelining is in effect statically determined by the compiler, which has several potential benefits, such as reducing energy consumption without degrading performance, supporting a less complex design with a lower production cost, and being able to apply more effective compiler optimizations due to instructions having more explicit control of the processor.